xref: /linux/drivers/gpu/drm/display/drm_hdmi_helper.c (revision 53597deca0e38c30e6cd4ba2114fa42d2bcd85bb)
1 // SPDX-License-Identifier: MIT
2 
3 #include <linux/export.h>
4 #include <linux/module.h>
5 
6 #include <drm/display/drm_hdmi_helper.h>
7 #include <drm/drm_connector.h>
8 #include <drm/drm_edid.h>
9 #include <drm/drm_modes.h>
10 #include <drm/drm_print.h>
11 #include <drm/drm_property.h>
12 
13 static inline bool is_eotf_supported(u8 output_eotf, u8 sink_eotf)
14 {
15 	return sink_eotf & BIT(output_eotf);
16 }
17 
18 /**
19  * drm_hdmi_infoframe_set_hdr_metadata() - fill an HDMI DRM infoframe with
20  *                                         HDR metadata from userspace
21  * @frame: HDMI DRM infoframe
22  * @conn_state: Connector state containing HDR metadata
23  *
24  * Return: 0 on success or a negative error code on failure.
25  */
26 int drm_hdmi_infoframe_set_hdr_metadata(struct hdmi_drm_infoframe *frame,
27 					const struct drm_connector_state *conn_state)
28 {
29 	struct drm_connector *connector;
30 	struct hdr_output_metadata *hdr_metadata;
31 	int err;
32 
33 	if (!frame || !conn_state)
34 		return -EINVAL;
35 
36 	connector = conn_state->connector;
37 
38 	if (!conn_state->hdr_output_metadata)
39 		return -EINVAL;
40 
41 	hdr_metadata = conn_state->hdr_output_metadata->data;
42 
43 	if (!hdr_metadata || !connector)
44 		return -EINVAL;
45 
46 	/* Sink EOTF is Bit map while infoframe is absolute values */
47 	if (!is_eotf_supported(hdr_metadata->hdmi_metadata_type1.eotf,
48 			       connector->display_info.hdr_sink_metadata.hdmi_type1.eotf))
49 		DRM_DEBUG_KMS("Unknown EOTF %d\n", hdr_metadata->hdmi_metadata_type1.eotf);
50 
51 	err = hdmi_drm_infoframe_init(frame);
52 	if (err < 0)
53 		return err;
54 
55 	frame->eotf = hdr_metadata->hdmi_metadata_type1.eotf;
56 	frame->metadata_type = hdr_metadata->hdmi_metadata_type1.metadata_type;
57 
58 	BUILD_BUG_ON(sizeof(frame->display_primaries) !=
59 		     sizeof(hdr_metadata->hdmi_metadata_type1.display_primaries));
60 	BUILD_BUG_ON(sizeof(frame->white_point) !=
61 		     sizeof(hdr_metadata->hdmi_metadata_type1.white_point));
62 
63 	memcpy(&frame->display_primaries,
64 	       &hdr_metadata->hdmi_metadata_type1.display_primaries,
65 	       sizeof(frame->display_primaries));
66 
67 	memcpy(&frame->white_point,
68 	       &hdr_metadata->hdmi_metadata_type1.white_point,
69 	       sizeof(frame->white_point));
70 
71 	frame->max_display_mastering_luminance =
72 		hdr_metadata->hdmi_metadata_type1.max_display_mastering_luminance;
73 	frame->min_display_mastering_luminance =
74 		hdr_metadata->hdmi_metadata_type1.min_display_mastering_luminance;
75 	frame->max_fall = hdr_metadata->hdmi_metadata_type1.max_fall;
76 	frame->max_cll = hdr_metadata->hdmi_metadata_type1.max_cll;
77 
78 	return 0;
79 }
80 EXPORT_SYMBOL(drm_hdmi_infoframe_set_hdr_metadata);
81 
82 /* HDMI Colorspace Spec Definitions */
83 #define FULL_COLORIMETRY_MASK		0x1FF
84 #define NORMAL_COLORIMETRY_MASK		0x3
85 #define EXTENDED_COLORIMETRY_MASK	0x7
86 #define EXTENDED_ACE_COLORIMETRY_MASK	0xF
87 
88 #define C(x) ((x) << 0)
89 #define EC(x) ((x) << 2)
90 #define ACE(x) ((x) << 5)
91 
92 #define HDMI_COLORIMETRY_NO_DATA		0x0
93 #define HDMI_COLORIMETRY_SMPTE_170M_YCC		(C(1) | EC(0) | ACE(0))
94 #define HDMI_COLORIMETRY_BT709_YCC		(C(2) | EC(0) | ACE(0))
95 #define HDMI_COLORIMETRY_XVYCC_601		(C(3) | EC(0) | ACE(0))
96 #define HDMI_COLORIMETRY_XVYCC_709		(C(3) | EC(1) | ACE(0))
97 #define HDMI_COLORIMETRY_SYCC_601		(C(3) | EC(2) | ACE(0))
98 #define HDMI_COLORIMETRY_OPYCC_601		(C(3) | EC(3) | ACE(0))
99 #define HDMI_COLORIMETRY_OPRGB			(C(3) | EC(4) | ACE(0))
100 #define HDMI_COLORIMETRY_BT2020_CYCC		(C(3) | EC(5) | ACE(0))
101 #define HDMI_COLORIMETRY_BT2020_RGB		(C(3) | EC(6) | ACE(0))
102 #define HDMI_COLORIMETRY_BT2020_YCC		(C(3) | EC(6) | ACE(0))
103 #define HDMI_COLORIMETRY_DCI_P3_RGB_D65		(C(3) | EC(7) | ACE(0))
104 #define HDMI_COLORIMETRY_DCI_P3_RGB_THEATER	(C(3) | EC(7) | ACE(1))
105 
106 static const u32 hdmi_colorimetry_val[] = {
107 	[DRM_MODE_COLORIMETRY_NO_DATA] = HDMI_COLORIMETRY_NO_DATA,
108 	[DRM_MODE_COLORIMETRY_SMPTE_170M_YCC] = HDMI_COLORIMETRY_SMPTE_170M_YCC,
109 	[DRM_MODE_COLORIMETRY_BT709_YCC] = HDMI_COLORIMETRY_BT709_YCC,
110 	[DRM_MODE_COLORIMETRY_XVYCC_601] = HDMI_COLORIMETRY_XVYCC_601,
111 	[DRM_MODE_COLORIMETRY_XVYCC_709] = HDMI_COLORIMETRY_XVYCC_709,
112 	[DRM_MODE_COLORIMETRY_SYCC_601] = HDMI_COLORIMETRY_SYCC_601,
113 	[DRM_MODE_COLORIMETRY_OPYCC_601] = HDMI_COLORIMETRY_OPYCC_601,
114 	[DRM_MODE_COLORIMETRY_OPRGB] = HDMI_COLORIMETRY_OPRGB,
115 	[DRM_MODE_COLORIMETRY_BT2020_CYCC] = HDMI_COLORIMETRY_BT2020_CYCC,
116 	[DRM_MODE_COLORIMETRY_BT2020_RGB] = HDMI_COLORIMETRY_BT2020_RGB,
117 	[DRM_MODE_COLORIMETRY_BT2020_YCC] = HDMI_COLORIMETRY_BT2020_YCC,
118 };
119 
120 #undef C
121 #undef EC
122 #undef ACE
123 
124 /**
125  * drm_hdmi_avi_infoframe_colorimetry() - fill the HDMI AVI infoframe
126  *                                       colorimetry information
127  * @frame: HDMI AVI infoframe
128  * @conn_state: connector state
129  */
130 void drm_hdmi_avi_infoframe_colorimetry(struct hdmi_avi_infoframe *frame,
131 					const struct drm_connector_state *conn_state)
132 {
133 	u32 colorimetry_val;
134 	u32 colorimetry_index = conn_state->colorspace & FULL_COLORIMETRY_MASK;
135 
136 	if (colorimetry_index >= ARRAY_SIZE(hdmi_colorimetry_val))
137 		colorimetry_val = HDMI_COLORIMETRY_NO_DATA;
138 	else
139 		colorimetry_val = hdmi_colorimetry_val[colorimetry_index];
140 
141 	frame->colorimetry = colorimetry_val & NORMAL_COLORIMETRY_MASK;
142 	/*
143 	 * ToDo: Extend it for ACE formats as well. Modify the infoframe
144 	 * structure and extend it in drivers/video/hdmi
145 	 */
146 	frame->extended_colorimetry = (colorimetry_val >> 2) &
147 					EXTENDED_COLORIMETRY_MASK;
148 }
149 EXPORT_SYMBOL(drm_hdmi_avi_infoframe_colorimetry);
150 
151 /**
152  * drm_hdmi_avi_infoframe_bars() - fill the HDMI AVI infoframe
153  *                                 bar information
154  * @frame: HDMI AVI infoframe
155  * @conn_state: connector state
156  */
157 void drm_hdmi_avi_infoframe_bars(struct hdmi_avi_infoframe *frame,
158 				 const struct drm_connector_state *conn_state)
159 {
160 	frame->right_bar = conn_state->tv.margins.right;
161 	frame->left_bar = conn_state->tv.margins.left;
162 	frame->top_bar = conn_state->tv.margins.top;
163 	frame->bottom_bar = conn_state->tv.margins.bottom;
164 }
165 EXPORT_SYMBOL(drm_hdmi_avi_infoframe_bars);
166 
167 /**
168  * drm_hdmi_avi_infoframe_content_type() - fill the HDMI AVI infoframe
169  *                                         content type information, based
170  *                                         on correspondent DRM property.
171  * @frame: HDMI AVI infoframe
172  * @conn_state: DRM display connector state
173  *
174  */
175 void drm_hdmi_avi_infoframe_content_type(struct hdmi_avi_infoframe *frame,
176 					 const struct drm_connector_state *conn_state)
177 {
178 	switch (conn_state->content_type) {
179 	case DRM_MODE_CONTENT_TYPE_GRAPHICS:
180 		frame->content_type = HDMI_CONTENT_TYPE_GRAPHICS;
181 		break;
182 	case DRM_MODE_CONTENT_TYPE_CINEMA:
183 		frame->content_type = HDMI_CONTENT_TYPE_CINEMA;
184 		break;
185 	case DRM_MODE_CONTENT_TYPE_GAME:
186 		frame->content_type = HDMI_CONTENT_TYPE_GAME;
187 		break;
188 	case DRM_MODE_CONTENT_TYPE_PHOTO:
189 		frame->content_type = HDMI_CONTENT_TYPE_PHOTO;
190 		break;
191 	default:
192 		/* Graphics is the default(0) */
193 		frame->content_type = HDMI_CONTENT_TYPE_GRAPHICS;
194 	}
195 
196 	frame->itc = conn_state->content_type != DRM_MODE_CONTENT_TYPE_NO_DATA;
197 }
198 EXPORT_SYMBOL(drm_hdmi_avi_infoframe_content_type);
199 
200 /**
201  * drm_hdmi_compute_mode_clock() - Computes the TMDS Character Rate
202  * @mode: Display mode to compute the clock for
203  * @bpc: Bits per character
204  * @fmt: Output Pixel Format used
205  *
206  * Returns the TMDS Character Rate for a given mode, bpc count and output format.
207  *
208  * RETURNS:
209  * The TMDS Character Rate, in Hertz, or 0 on error.
210  */
211 unsigned long long
212 drm_hdmi_compute_mode_clock(const struct drm_display_mode *mode,
213 			    unsigned int bpc,
214 			    enum drm_output_color_format fmt)
215 {
216 	unsigned long long clock = mode->clock * 1000ULL;
217 	unsigned int vic = drm_match_cea_mode(mode);
218 
219 	/*
220 	 * CTA-861-G Spec, section 5.4 - Color Coding and Quantization
221 	 * mandates that VIC 1 always uses 8 bpc.
222 	 */
223 	if (vic == 1 && bpc != 8)
224 		return 0;
225 
226 	if (fmt == DRM_OUTPUT_COLOR_FORMAT_YCBCR422) {
227 		/*
228 		 * HDMI 1.0 Spec, section 6.5 - Pixel Encoding states that
229 		 * YUV422 sends 24 bits over three channels, with Cb and Cr
230 		 * components being sent on odd and even pixels, respectively.
231 		 *
232 		 * If fewer than 12 bpc are sent, data are left justified.
233 		 */
234 		if (bpc > 12)
235 			return 0;
236 
237 		/*
238 		 * HDMI 1.0 Spec, section 6.5 - Pixel Encoding
239 		 * specifies that YUV422 sends two 12-bits components over
240 		 * three TMDS channels per pixel clock, which is equivalent to
241 		 * three 8-bits components over three channels used by RGB as
242 		 * far as the clock rate goes.
243 		 */
244 		bpc = 8;
245 	}
246 
247 	/*
248 	 * HDMI 2.0 Spec, Section 7.1 - YCbCr 4:2:0 Pixel Encoding
249 	 * specifies that YUV420 encoding is carried at a TMDS Character Rate
250 	 * equal to half the pixel clock rate.
251 	 */
252 	if (fmt == DRM_OUTPUT_COLOR_FORMAT_YCBCR420)
253 		clock = clock / 2;
254 
255 	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
256 		clock = clock * 2;
257 
258 	return DIV_ROUND_CLOSEST_ULL(clock * bpc, 8);
259 }
260 EXPORT_SYMBOL(drm_hdmi_compute_mode_clock);
261 
262 struct drm_hdmi_acr_n_cts_entry {
263 	unsigned int n;
264 	unsigned int cts;
265 };
266 
267 struct drm_hdmi_acr_data {
268 	unsigned long tmds_clock_khz;
269 	struct drm_hdmi_acr_n_cts_entry n_cts_32k,
270 					n_cts_44k1,
271 					n_cts_48k;
272 };
273 
274 static const struct drm_hdmi_acr_data hdmi_acr_n_cts[] = {
275 	{
276 		/* "Other" entry */
277 		.n_cts_32k =  { .n = 4096, },
278 		.n_cts_44k1 = { .n = 6272, },
279 		.n_cts_48k =  { .n = 6144, },
280 	}, {
281 		.tmds_clock_khz = 25175,
282 		.n_cts_32k =  { .n = 4576,  .cts = 28125, },
283 		.n_cts_44k1 = { .n = 7007,  .cts = 31250, },
284 		.n_cts_48k =  { .n = 6864,  .cts = 28125, },
285 	}, {
286 		.tmds_clock_khz = 25200,
287 		.n_cts_32k =  { .n = 4096,  .cts = 25200, },
288 		.n_cts_44k1 = { .n = 6272,  .cts = 28000, },
289 		.n_cts_48k =  { .n = 6144,  .cts = 25200, },
290 	}, {
291 		.tmds_clock_khz = 27000,
292 		.n_cts_32k =  { .n = 4096,  .cts = 27000, },
293 		.n_cts_44k1 = { .n = 6272,  .cts = 30000, },
294 		.n_cts_48k =  { .n = 6144,  .cts = 27000, },
295 	}, {
296 		.tmds_clock_khz = 27027,
297 		.n_cts_32k =  { .n = 4096,  .cts = 27027, },
298 		.n_cts_44k1 = { .n = 6272,  .cts = 30030, },
299 		.n_cts_48k =  { .n = 6144,  .cts = 27027, },
300 	}, {
301 		.tmds_clock_khz = 54000,
302 		.n_cts_32k =  { .n = 4096,  .cts = 54000, },
303 		.n_cts_44k1 = { .n = 6272,  .cts = 60000, },
304 		.n_cts_48k =  { .n = 6144,  .cts = 54000, },
305 	}, {
306 		.tmds_clock_khz = 54054,
307 		.n_cts_32k =  { .n = 4096,  .cts = 54054, },
308 		.n_cts_44k1 = { .n = 6272,  .cts = 60060, },
309 		.n_cts_48k =  { .n = 6144,  .cts = 54054, },
310 	}, {
311 		.tmds_clock_khz = 74176,
312 		.n_cts_32k =  { .n = 11648, .cts = 210937, }, /* and 210938 */
313 		.n_cts_44k1 = { .n = 17836, .cts = 234375, },
314 		.n_cts_48k =  { .n = 11648, .cts = 140625, },
315 	}, {
316 		.tmds_clock_khz = 74250,
317 		.n_cts_32k =  { .n = 4096,  .cts = 74250, },
318 		.n_cts_44k1 = { .n = 6272,  .cts = 82500, },
319 		.n_cts_48k =  { .n = 6144,  .cts = 74250, },
320 	}, {
321 		.tmds_clock_khz = 148352,
322 		.n_cts_32k =  { .n = 11648, .cts = 421875, },
323 		.n_cts_44k1 = { .n = 8918,  .cts = 234375, },
324 		.n_cts_48k =  { .n = 5824,  .cts = 140625, },
325 	}, {
326 		.tmds_clock_khz = 148500,
327 		.n_cts_32k =  { .n = 4096,  .cts = 148500, },
328 		.n_cts_44k1 = { .n = 6272,  .cts = 165000, },
329 		.n_cts_48k =  { .n = 6144,  .cts = 148500, },
330 	}, {
331 		.tmds_clock_khz = 296703,
332 		.n_cts_32k =  { .n = 5824,  .cts = 421875, },
333 		.n_cts_44k1 = { .n = 4459,  .cts = 234375, },
334 		.n_cts_48k =  { .n = 5824,  .cts = 281250, },
335 	}, {
336 		.tmds_clock_khz = 297000,
337 		.n_cts_32k =  { .n = 3072,  .cts = 222750, },
338 		.n_cts_44k1 = { .n = 4704,  .cts = 247500, },
339 		.n_cts_48k =  { .n = 5120,  .cts = 247500, },
340 	}, {
341 		.tmds_clock_khz = 593407,
342 		.n_cts_32k =  { .n = 5824,  .cts = 843750, },
343 		.n_cts_44k1 = { .n = 8918,  .cts = 937500, },
344 		.n_cts_48k =  { .n = 5824,  .cts = 562500, },
345 	}, {
346 		.tmds_clock_khz = 594000,
347 		.n_cts_32k =  { .n = 3072,  .cts = 445500, },
348 		.n_cts_44k1 = { .n = 9408,  .cts = 990000, },
349 		.n_cts_48k =  { .n = 6144,  .cts = 594000, },
350 	},
351 };
352 
353 static int drm_hdmi_acr_find_tmds_entry(unsigned long tmds_clock_khz)
354 {
355 	int i;
356 
357 	/* skip the "other" entry */
358 	for (i = 1; i < ARRAY_SIZE(hdmi_acr_n_cts); i++) {
359 		if (hdmi_acr_n_cts[i].tmds_clock_khz == tmds_clock_khz)
360 			return i;
361 	}
362 
363 	return 0;
364 }
365 
366 /**
367  * drm_hdmi_acr_get_n_cts() - get N and CTS values for Audio Clock Regeneration
368  *
369  * @tmds_char_rate: TMDS clock (char rate) as used by the HDMI connector
370  * @sample_rate: audio sample rate
371  * @out_n: a pointer to write the N value
372  * @out_cts: a pointer to write the CTS value
373  *
374  * Get the N and CTS values (either by calculating them or by returning data
375  * from the tables. This follows the HDMI 1.4b Section 7.2 "Audio Sample Clock
376  * Capture and Regeneration".
377  *
378  * Note, @sample_rate corresponds to the Fs value, see sections 7.2.4 - 7.2.6
379  * on how to select Fs for non-L-PCM formats.
380  */
381 void
382 drm_hdmi_acr_get_n_cts(unsigned long long tmds_char_rate,
383 		       unsigned int sample_rate,
384 		       unsigned int *out_n,
385 		       unsigned int *out_cts)
386 {
387 	/* be a bit more tolerant, especially for the 1.001 entries */
388 	unsigned long tmds_clock_khz = DIV_ROUND_CLOSEST_ULL(tmds_char_rate, 1000);
389 	const struct drm_hdmi_acr_n_cts_entry *entry;
390 	unsigned int n, cts, mult;
391 	int tmds_idx;
392 
393 	tmds_idx = drm_hdmi_acr_find_tmds_entry(tmds_clock_khz);
394 
395 	/*
396 	 * Don't change the order, 192 kHz is divisible by 48k and 32k, but it
397 	 * should use 48k entry.
398 	 */
399 	if (sample_rate % 48000 == 0) {
400 		entry = &hdmi_acr_n_cts[tmds_idx].n_cts_48k;
401 		mult = sample_rate / 48000;
402 	} else if (sample_rate % 44100 == 0) {
403 		entry = &hdmi_acr_n_cts[tmds_idx].n_cts_44k1;
404 		mult = sample_rate / 44100;
405 	} else if (sample_rate % 32000 == 0) {
406 		entry = &hdmi_acr_n_cts[tmds_idx].n_cts_32k;
407 		mult = sample_rate / 32000;
408 	} else {
409 		entry = NULL;
410 	}
411 
412 	if (entry) {
413 		n = entry->n * mult;
414 		cts = entry->cts;
415 	} else {
416 		/* Recommended optimal value, HDMI 1.4b, Section 7.2.1 */
417 		n = 128 * sample_rate / 1000;
418 		cts = 0;
419 	}
420 
421 	if (!cts)
422 		cts = DIV_ROUND_CLOSEST_ULL(tmds_char_rate * n,
423 					    128 * sample_rate);
424 
425 	*out_n = n;
426 	*out_cts = cts;
427 }
428 EXPORT_SYMBOL(drm_hdmi_acr_get_n_cts);
429