1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2018 Renesas Electronics 4 * 5 * Copyright (C) 2016 Atmel 6 * Bo Shen <voice.shen@atmel.com> 7 * 8 * Authors: Bo Shen <voice.shen@atmel.com> 9 * Boris Brezillon <boris.brezillon@free-electrons.com> 10 * Wu, Songjun <Songjun.Wu@atmel.com> 11 * 12 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. All Rights Reserved. 13 */ 14 15 #include <linux/gpio/consumer.h> 16 #include <linux/i2c-mux.h> 17 #include <linux/i2c.h> 18 #include <linux/media-bus-format.h> 19 #include <linux/module.h> 20 #include <linux/regmap.h> 21 #include <linux/regulator/consumer.h> 22 #include <linux/clk.h> 23 24 #include <drm/drm_atomic_helper.h> 25 #include <drm/drm_bridge.h> 26 #include <drm/drm_drv.h> 27 #include <drm/drm_edid.h> 28 #include <drm/drm_print.h> 29 #include <drm/drm_probe_helper.h> 30 31 #include <sound/hdmi-codec.h> 32 33 #define SII902X_TPI_VIDEO_DATA 0x0 34 35 #define SII902X_TPI_PIXEL_REPETITION 0x8 36 #define SII902X_TPI_AVI_PIXEL_REP_BUS_24BIT BIT(5) 37 #define SII902X_TPI_AVI_PIXEL_REP_RISING_EDGE BIT(4) 38 #define SII902X_TPI_AVI_PIXEL_REP_4X 3 39 #define SII902X_TPI_AVI_PIXEL_REP_2X 1 40 #define SII902X_TPI_AVI_PIXEL_REP_NONE 0 41 #define SII902X_TPI_CLK_RATIO_HALF (0 << 6) 42 #define SII902X_TPI_CLK_RATIO_1X (1 << 6) 43 #define SII902X_TPI_CLK_RATIO_2X (2 << 6) 44 #define SII902X_TPI_CLK_RATIO_4X (3 << 6) 45 46 #define SII902X_TPI_AVI_IN_FORMAT 0x9 47 #define SII902X_TPI_AVI_INPUT_BITMODE_12BIT BIT(7) 48 #define SII902X_TPI_AVI_INPUT_DITHER BIT(6) 49 #define SII902X_TPI_AVI_INPUT_RANGE_LIMITED (2 << 2) 50 #define SII902X_TPI_AVI_INPUT_RANGE_FULL (1 << 2) 51 #define SII902X_TPI_AVI_INPUT_RANGE_AUTO (0 << 2) 52 #define SII902X_TPI_AVI_INPUT_COLORSPACE_BLACK (3 << 0) 53 #define SII902X_TPI_AVI_INPUT_COLORSPACE_YUV422 (2 << 0) 54 #define SII902X_TPI_AVI_INPUT_COLORSPACE_YUV444 (1 << 0) 55 #define SII902X_TPI_AVI_INPUT_COLORSPACE_RGB (0 << 0) 56 57 #define SII902X_TPI_AVI_INFOFRAME 0x0c 58 59 #define SII902X_SYS_CTRL_DATA 0x1a 60 #define SII902X_SYS_CTRL_PWR_DWN BIT(4) 61 #define SII902X_SYS_CTRL_AV_MUTE BIT(3) 62 #define SII902X_SYS_CTRL_DDC_BUS_REQ BIT(2) 63 #define SII902X_SYS_CTRL_DDC_BUS_GRTD BIT(1) 64 #define SII902X_SYS_CTRL_OUTPUT_MODE BIT(0) 65 #define SII902X_SYS_CTRL_OUTPUT_HDMI 1 66 #define SII902X_SYS_CTRL_OUTPUT_DVI 0 67 68 #define SII902X_REG_CHIPID(n) (0x1b + (n)) 69 70 #define SII902X_PWR_STATE_CTRL 0x1e 71 #define SII902X_AVI_POWER_STATE_MSK GENMASK(1, 0) 72 #define SII902X_AVI_POWER_STATE_D(l) ((l) & SII902X_AVI_POWER_STATE_MSK) 73 74 /* Audio */ 75 #define SII902X_TPI_I2S_ENABLE_MAPPING_REG 0x1f 76 #define SII902X_TPI_I2S_CONFIG_FIFO0 (0 << 0) 77 #define SII902X_TPI_I2S_CONFIG_FIFO1 (1 << 0) 78 #define SII902X_TPI_I2S_CONFIG_FIFO2 (2 << 0) 79 #define SII902X_TPI_I2S_CONFIG_FIFO3 (3 << 0) 80 #define SII902X_TPI_I2S_LEFT_RIGHT_SWAP (1 << 2) 81 #define SII902X_TPI_I2S_AUTO_DOWNSAMPLE (1 << 3) 82 #define SII902X_TPI_I2S_SELECT_SD0 (0 << 4) 83 #define SII902X_TPI_I2S_SELECT_SD1 (1 << 4) 84 #define SII902X_TPI_I2S_SELECT_SD2 (2 << 4) 85 #define SII902X_TPI_I2S_SELECT_SD3 (3 << 4) 86 #define SII902X_TPI_I2S_FIFO_ENABLE (1 << 7) 87 88 #define SII902X_TPI_I2S_INPUT_CONFIG_REG 0x20 89 #define SII902X_TPI_I2S_FIRST_BIT_SHIFT_YES (0 << 0) 90 #define SII902X_TPI_I2S_FIRST_BIT_SHIFT_NO (1 << 0) 91 #define SII902X_TPI_I2S_SD_DIRECTION_MSB_FIRST (0 << 1) 92 #define SII902X_TPI_I2S_SD_DIRECTION_LSB_FIRST (1 << 1) 93 #define SII902X_TPI_I2S_SD_JUSTIFY_LEFT (0 << 2) 94 #define SII902X_TPI_I2S_SD_JUSTIFY_RIGHT (1 << 2) 95 #define SII902X_TPI_I2S_WS_POLARITY_LOW (0 << 3) 96 #define SII902X_TPI_I2S_WS_POLARITY_HIGH (1 << 3) 97 #define SII902X_TPI_I2S_MCLK_MULTIPLIER_128 (0 << 4) 98 #define SII902X_TPI_I2S_MCLK_MULTIPLIER_256 (1 << 4) 99 #define SII902X_TPI_I2S_MCLK_MULTIPLIER_384 (2 << 4) 100 #define SII902X_TPI_I2S_MCLK_MULTIPLIER_512 (3 << 4) 101 #define SII902X_TPI_I2S_MCLK_MULTIPLIER_768 (4 << 4) 102 #define SII902X_TPI_I2S_MCLK_MULTIPLIER_1024 (5 << 4) 103 #define SII902X_TPI_I2S_MCLK_MULTIPLIER_1152 (6 << 4) 104 #define SII902X_TPI_I2S_MCLK_MULTIPLIER_192 (7 << 4) 105 #define SII902X_TPI_I2S_SCK_EDGE_FALLING (0 << 7) 106 #define SII902X_TPI_I2S_SCK_EDGE_RISING (1 << 7) 107 108 #define SII902X_TPI_I2S_STRM_HDR_BASE 0x21 109 #define SII902X_TPI_I2S_STRM_HDR_SIZE 5 110 111 #define SII902X_TPI_AUDIO_CONFIG_BYTE2_REG 0x26 112 #define SII902X_TPI_AUDIO_CODING_STREAM_HEADER (0 << 0) 113 #define SII902X_TPI_AUDIO_CODING_PCM (1 << 0) 114 #define SII902X_TPI_AUDIO_CODING_AC3 (2 << 0) 115 #define SII902X_TPI_AUDIO_CODING_MPEG1 (3 << 0) 116 #define SII902X_TPI_AUDIO_CODING_MP3 (4 << 0) 117 #define SII902X_TPI_AUDIO_CODING_MPEG2 (5 << 0) 118 #define SII902X_TPI_AUDIO_CODING_AAC (6 << 0) 119 #define SII902X_TPI_AUDIO_CODING_DTS (7 << 0) 120 #define SII902X_TPI_AUDIO_CODING_ATRAC (8 << 0) 121 #define SII902X_TPI_AUDIO_MUTE_DISABLE (0 << 4) 122 #define SII902X_TPI_AUDIO_MUTE_ENABLE (1 << 4) 123 #define SII902X_TPI_AUDIO_LAYOUT_2_CHANNELS (0 << 5) 124 #define SII902X_TPI_AUDIO_LAYOUT_8_CHANNELS (1 << 5) 125 #define SII902X_TPI_AUDIO_INTERFACE_DISABLE (0 << 6) 126 #define SII902X_TPI_AUDIO_INTERFACE_SPDIF (1 << 6) 127 #define SII902X_TPI_AUDIO_INTERFACE_I2S (2 << 6) 128 129 #define SII902X_TPI_AUDIO_CONFIG_BYTE3_REG 0x27 130 #define SII902X_TPI_AUDIO_FREQ_STREAM (0 << 3) 131 #define SII902X_TPI_AUDIO_FREQ_32KHZ (1 << 3) 132 #define SII902X_TPI_AUDIO_FREQ_44KHZ (2 << 3) 133 #define SII902X_TPI_AUDIO_FREQ_48KHZ (3 << 3) 134 #define SII902X_TPI_AUDIO_FREQ_88KHZ (4 << 3) 135 #define SII902X_TPI_AUDIO_FREQ_96KHZ (5 << 3) 136 #define SII902X_TPI_AUDIO_FREQ_176KHZ (6 << 3) 137 #define SII902X_TPI_AUDIO_FREQ_192KHZ (7 << 3) 138 #define SII902X_TPI_AUDIO_SAMPLE_SIZE_STREAM (0 << 6) 139 #define SII902X_TPI_AUDIO_SAMPLE_SIZE_16 (1 << 6) 140 #define SII902X_TPI_AUDIO_SAMPLE_SIZE_20 (2 << 6) 141 #define SII902X_TPI_AUDIO_SAMPLE_SIZE_24 (3 << 6) 142 143 #define SII902X_TPI_AUDIO_CONFIG_BYTE4_REG 0x28 144 145 #define SII902X_INT_ENABLE 0x3c 146 #define SII902X_INT_STATUS 0x3d 147 #define SII902X_HOTPLUG_EVENT BIT(0) 148 #define SII902X_PLUGGED_STATUS BIT(2) 149 150 #define SII902X_REG_TPI_RQB 0xc7 151 152 /* Indirect internal register access */ 153 #define SII902X_IND_SET_PAGE 0xbc 154 #define SII902X_IND_OFFSET 0xbd 155 #define SII902X_IND_VALUE 0xbe 156 157 #define SII902X_TPI_MISC_INFOFRAME_BASE 0xbf 158 #define SII902X_TPI_MISC_INFOFRAME_END 0xde 159 #define SII902X_TPI_MISC_INFOFRAME_SIZE \ 160 (SII902X_TPI_MISC_INFOFRAME_END - SII902X_TPI_MISC_INFOFRAME_BASE) 161 162 #define SII902X_I2C_BUS_ACQUISITION_TIMEOUT_MS 500 163 164 #define SII902X_AUDIO_PORT_INDEX 3 165 166 /* 167 * The maximum resolution supported by the HDMI bridge is 1080p@60Hz 168 * and 1920x1200 requiring a pixel clock of 165MHz and the minimum 169 * resolution supported is 480p@60Hz requiring a pixel clock of 25MHz 170 */ 171 #define SII902X_MIN_PIXEL_CLOCK_KHZ 25000 172 #define SII902X_MAX_PIXEL_CLOCK_KHZ 165000 173 174 struct sii902x { 175 struct i2c_client *i2c; 176 struct regmap *regmap; 177 struct drm_bridge bridge; 178 struct drm_bridge *next_bridge; 179 struct drm_connector connector; 180 struct gpio_desc *reset_gpio; 181 struct i2c_mux_core *i2cmux; 182 u32 bus_width; 183 184 /* 185 * Mutex protects audio and video functions from interfering 186 * each other, by keeping their i2c command sequences atomic. 187 */ 188 struct mutex mutex; 189 struct sii902x_audio { 190 struct platform_device *pdev; 191 struct clk *mclk; 192 u32 i2s_fifo_sequence[4]; 193 } audio; 194 }; 195 196 static int sii902x_read_unlocked(struct i2c_client *i2c, u8 reg, u8 *val) 197 { 198 union i2c_smbus_data data; 199 int ret; 200 201 ret = __i2c_smbus_xfer(i2c->adapter, i2c->addr, i2c->flags, 202 I2C_SMBUS_READ, reg, I2C_SMBUS_BYTE_DATA, &data); 203 204 if (ret < 0) 205 return ret; 206 207 *val = data.byte; 208 return 0; 209 } 210 211 static int sii902x_write_unlocked(struct i2c_client *i2c, u8 reg, u8 val) 212 { 213 union i2c_smbus_data data; 214 215 data.byte = val; 216 217 return __i2c_smbus_xfer(i2c->adapter, i2c->addr, i2c->flags, 218 I2C_SMBUS_WRITE, reg, I2C_SMBUS_BYTE_DATA, 219 &data); 220 } 221 222 static int sii902x_update_bits_unlocked(struct i2c_client *i2c, u8 reg, u8 mask, 223 u8 val) 224 { 225 int ret; 226 u8 status; 227 228 ret = sii902x_read_unlocked(i2c, reg, &status); 229 if (ret) 230 return ret; 231 status &= ~mask; 232 status |= val & mask; 233 return sii902x_write_unlocked(i2c, reg, status); 234 } 235 236 static inline struct sii902x *bridge_to_sii902x(struct drm_bridge *bridge) 237 { 238 return container_of(bridge, struct sii902x, bridge); 239 } 240 241 static inline struct sii902x *connector_to_sii902x(struct drm_connector *con) 242 { 243 return container_of(con, struct sii902x, connector); 244 } 245 246 static void sii902x_reset(struct sii902x *sii902x) 247 { 248 if (!sii902x->reset_gpio) 249 return; 250 251 gpiod_set_value_cansleep(sii902x->reset_gpio, 1); 252 253 /* The datasheet says treset-min = 100us. Make it 150us to be sure. */ 254 usleep_range(150, 200); 255 256 gpiod_set_value_cansleep(sii902x->reset_gpio, 0); 257 } 258 259 static enum drm_connector_status sii902x_detect(struct sii902x *sii902x) 260 { 261 unsigned int status; 262 263 mutex_lock(&sii902x->mutex); 264 265 regmap_read(sii902x->regmap, SII902X_INT_STATUS, &status); 266 267 mutex_unlock(&sii902x->mutex); 268 269 return (status & SII902X_PLUGGED_STATUS) ? 270 connector_status_connected : connector_status_disconnected; 271 } 272 273 static enum drm_connector_status 274 sii902x_connector_detect(struct drm_connector *connector, bool force) 275 { 276 struct sii902x *sii902x = connector_to_sii902x(connector); 277 278 return sii902x_detect(sii902x); 279 } 280 281 static const struct drm_connector_funcs sii902x_connector_funcs = { 282 .detect = sii902x_connector_detect, 283 .fill_modes = drm_helper_probe_single_connector_modes, 284 .destroy = drm_connector_cleanup, 285 .reset = drm_atomic_helper_connector_reset, 286 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, 287 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 288 }; 289 290 static const struct drm_edid *sii902x_edid_read(struct sii902x *sii902x, 291 struct drm_connector *connector) 292 { 293 const struct drm_edid *drm_edid; 294 295 mutex_lock(&sii902x->mutex); 296 297 drm_edid = drm_edid_read_ddc(connector, sii902x->i2cmux->adapter[0]); 298 299 mutex_unlock(&sii902x->mutex); 300 301 return drm_edid; 302 } 303 304 static int sii902x_get_modes(struct drm_connector *connector) 305 { 306 struct sii902x *sii902x = connector_to_sii902x(connector); 307 const struct drm_edid *drm_edid; 308 int num = 0; 309 310 drm_edid = sii902x_edid_read(sii902x, connector); 311 drm_edid_connector_update(connector, drm_edid); 312 if (drm_edid) { 313 num = drm_edid_connector_add_modes(connector); 314 drm_edid_free(drm_edid); 315 } 316 317 return num; 318 } 319 320 static const struct drm_connector_helper_funcs sii902x_connector_helper_funcs = { 321 .get_modes = sii902x_get_modes, 322 }; 323 324 static void sii902x_bridge_atomic_disable(struct drm_bridge *bridge, 325 struct drm_atomic_state *state) 326 { 327 struct sii902x *sii902x = bridge_to_sii902x(bridge); 328 329 mutex_lock(&sii902x->mutex); 330 331 regmap_update_bits(sii902x->regmap, SII902X_SYS_CTRL_DATA, 332 SII902X_SYS_CTRL_PWR_DWN, 333 SII902X_SYS_CTRL_PWR_DWN); 334 335 mutex_unlock(&sii902x->mutex); 336 } 337 338 static void sii902x_bridge_atomic_enable(struct drm_bridge *bridge, 339 struct drm_atomic_state *state) 340 { 341 struct sii902x *sii902x = bridge_to_sii902x(bridge); 342 struct drm_connector *connector; 343 u8 output_mode = SII902X_SYS_CTRL_OUTPUT_DVI; 344 345 connector = drm_atomic_get_new_connector_for_encoder(state, bridge->encoder); 346 if (connector && connector->display_info.is_hdmi) 347 output_mode = SII902X_SYS_CTRL_OUTPUT_HDMI; 348 349 mutex_lock(&sii902x->mutex); 350 351 regmap_update_bits(sii902x->regmap, SII902X_SYS_CTRL_DATA, 352 SII902X_SYS_CTRL_OUTPUT_MODE, output_mode); 353 regmap_update_bits(sii902x->regmap, SII902X_PWR_STATE_CTRL, 354 SII902X_AVI_POWER_STATE_MSK, 355 SII902X_AVI_POWER_STATE_D(0)); 356 regmap_update_bits(sii902x->regmap, SII902X_SYS_CTRL_DATA, 357 SII902X_SYS_CTRL_PWR_DWN, 0); 358 359 mutex_unlock(&sii902x->mutex); 360 } 361 362 static void sii902x_bridge_mode_set(struct drm_bridge *bridge, 363 const struct drm_display_mode *mode, 364 const struct drm_display_mode *adj) 365 { 366 struct sii902x *sii902x = bridge_to_sii902x(bridge); 367 struct regmap *regmap = sii902x->regmap; 368 u8 buf[HDMI_INFOFRAME_SIZE(AVI)]; 369 struct hdmi_avi_infoframe frame; 370 u16 pixel_clock_10kHz = adj->clock / 10; 371 int ret; 372 373 buf[0] = pixel_clock_10kHz & 0xff; 374 buf[1] = pixel_clock_10kHz >> 8; 375 buf[2] = drm_mode_vrefresh(adj); 376 buf[3] = 0x00; 377 buf[4] = adj->hdisplay; 378 buf[5] = adj->hdisplay >> 8; 379 buf[6] = adj->vdisplay; 380 buf[7] = adj->vdisplay >> 8; 381 buf[8] = SII902X_TPI_CLK_RATIO_1X | SII902X_TPI_AVI_PIXEL_REP_NONE | 382 SII902X_TPI_AVI_PIXEL_REP_BUS_24BIT; 383 buf[9] = SII902X_TPI_AVI_INPUT_RANGE_AUTO | 384 SII902X_TPI_AVI_INPUT_COLORSPACE_RGB; 385 386 mutex_lock(&sii902x->mutex); 387 388 ret = regmap_bulk_write(regmap, SII902X_TPI_VIDEO_DATA, buf, 10); 389 if (ret) 390 goto out; 391 392 ret = drm_hdmi_avi_infoframe_from_display_mode(&frame, 393 &sii902x->connector, adj); 394 if (ret < 0) { 395 DRM_ERROR("couldn't fill AVI infoframe\n"); 396 goto out; 397 } 398 399 ret = hdmi_avi_infoframe_pack(&frame, buf, sizeof(buf)); 400 if (ret < 0) { 401 DRM_ERROR("failed to pack AVI infoframe: %d\n", ret); 402 goto out; 403 } 404 405 /* Do not send the infoframe header, but keep the CRC field. */ 406 regmap_bulk_write(regmap, SII902X_TPI_AVI_INFOFRAME, 407 buf + HDMI_INFOFRAME_HEADER_SIZE - 1, 408 HDMI_AVI_INFOFRAME_SIZE + 1); 409 410 out: 411 mutex_unlock(&sii902x->mutex); 412 } 413 414 static int sii902x_bridge_attach(struct drm_bridge *bridge, 415 struct drm_encoder *encoder, 416 enum drm_bridge_attach_flags flags) 417 { 418 struct sii902x *sii902x = bridge_to_sii902x(bridge); 419 u32 bus_format = MEDIA_BUS_FMT_RGB888_1X24; 420 struct drm_device *drm = bridge->dev; 421 int ret; 422 423 if (flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR) 424 return drm_bridge_attach(encoder, sii902x->next_bridge, 425 bridge, flags); 426 427 drm_connector_helper_add(&sii902x->connector, 428 &sii902x_connector_helper_funcs); 429 430 if (!drm_core_check_feature(drm, DRIVER_ATOMIC)) { 431 dev_err(&sii902x->i2c->dev, 432 "sii902x driver is only compatible with DRM devices supporting atomic updates\n"); 433 return -ENOTSUPP; 434 } 435 436 ret = drm_connector_init(drm, &sii902x->connector, 437 &sii902x_connector_funcs, 438 DRM_MODE_CONNECTOR_HDMIA); 439 if (ret) 440 return ret; 441 442 if (sii902x->i2c->irq > 0) 443 sii902x->connector.polled = DRM_CONNECTOR_POLL_HPD; 444 else 445 sii902x->connector.polled = DRM_CONNECTOR_POLL_CONNECT; 446 447 ret = drm_display_info_set_bus_formats(&sii902x->connector.display_info, 448 &bus_format, 1); 449 if (ret) 450 return ret; 451 452 drm_connector_attach_encoder(&sii902x->connector, encoder); 453 454 return 0; 455 } 456 457 static enum drm_connector_status 458 sii902x_bridge_detect(struct drm_bridge *bridge, struct drm_connector *connector) 459 { 460 struct sii902x *sii902x = bridge_to_sii902x(bridge); 461 462 return sii902x_detect(sii902x); 463 } 464 465 static const struct drm_edid *sii902x_bridge_edid_read(struct drm_bridge *bridge, 466 struct drm_connector *connector) 467 { 468 struct sii902x *sii902x = bridge_to_sii902x(bridge); 469 470 return sii902x_edid_read(sii902x, connector); 471 } 472 473 static u32 *sii902x_bridge_atomic_get_input_bus_fmts(struct drm_bridge *bridge, 474 struct drm_bridge_state *bridge_state, 475 struct drm_crtc_state *crtc_state, 476 struct drm_connector_state *conn_state, 477 u32 output_fmt, 478 unsigned int *num_input_fmts) 479 { 480 481 struct sii902x *sii902x = bridge_to_sii902x(bridge); 482 u32 *input_fmts; 483 484 *num_input_fmts = 0; 485 486 input_fmts = kcalloc(1, sizeof(*input_fmts), GFP_KERNEL); 487 if (!input_fmts) 488 return NULL; 489 490 switch (sii902x->bus_width) { 491 case 16: 492 input_fmts[0] = MEDIA_BUS_FMT_RGB565_1X16; 493 break; 494 case 18: 495 input_fmts[0] = MEDIA_BUS_FMT_RGB666_1X18; 496 break; 497 case 24: 498 input_fmts[0] = MEDIA_BUS_FMT_RGB888_1X24; 499 break; 500 default: 501 return NULL; 502 } 503 504 *num_input_fmts = 1; 505 506 return input_fmts; 507 } 508 509 static int sii902x_bridge_atomic_check(struct drm_bridge *bridge, 510 struct drm_bridge_state *bridge_state, 511 struct drm_crtc_state *crtc_state, 512 struct drm_connector_state *conn_state) 513 { 514 if (crtc_state->mode.clock < SII902X_MIN_PIXEL_CLOCK_KHZ || 515 crtc_state->mode.clock > SII902X_MAX_PIXEL_CLOCK_KHZ) 516 return -EINVAL; 517 518 /* 519 * There might be flags negotiation supported in future but 520 * set the bus flags in atomic_check statically for now. 521 */ 522 bridge_state->input_bus_cfg.flags = bridge->timings->input_bus_flags; 523 524 return 0; 525 } 526 527 static enum drm_mode_status 528 sii902x_bridge_mode_valid(struct drm_bridge *bridge, 529 const struct drm_display_info *info, 530 const struct drm_display_mode *mode) 531 { 532 if (mode->clock < SII902X_MIN_PIXEL_CLOCK_KHZ) 533 return MODE_CLOCK_LOW; 534 535 if (mode->clock > SII902X_MAX_PIXEL_CLOCK_KHZ) 536 return MODE_CLOCK_HIGH; 537 538 return MODE_OK; 539 } 540 541 static const struct drm_bridge_funcs sii902x_bridge_funcs = { 542 .attach = sii902x_bridge_attach, 543 .mode_set = sii902x_bridge_mode_set, 544 .atomic_disable = sii902x_bridge_atomic_disable, 545 .atomic_enable = sii902x_bridge_atomic_enable, 546 .detect = sii902x_bridge_detect, 547 .edid_read = sii902x_bridge_edid_read, 548 .atomic_reset = drm_atomic_helper_bridge_reset, 549 .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state, 550 .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state, 551 .atomic_get_input_bus_fmts = sii902x_bridge_atomic_get_input_bus_fmts, 552 .atomic_check = sii902x_bridge_atomic_check, 553 .mode_valid = sii902x_bridge_mode_valid, 554 }; 555 556 static int sii902x_mute(struct sii902x *sii902x, bool mute) 557 { 558 struct device *dev = &sii902x->i2c->dev; 559 unsigned int val = mute ? SII902X_TPI_AUDIO_MUTE_ENABLE : 560 SII902X_TPI_AUDIO_MUTE_DISABLE; 561 562 dev_dbg(dev, "%s: %s\n", __func__, mute ? "Muted" : "Unmuted"); 563 564 return regmap_update_bits(sii902x->regmap, 565 SII902X_TPI_AUDIO_CONFIG_BYTE2_REG, 566 SII902X_TPI_AUDIO_MUTE_ENABLE, val); 567 } 568 569 static const int sii902x_mclk_div_table[] = { 570 128, 256, 384, 512, 768, 1024, 1152, 192 }; 571 572 static int sii902x_select_mclk_div(u8 *i2s_config_reg, unsigned int rate, 573 unsigned int mclk) 574 { 575 int div = mclk / rate; 576 int distance = 100000; 577 u8 i, nearest = 0; 578 579 for (i = 0; i < ARRAY_SIZE(sii902x_mclk_div_table); i++) { 580 unsigned int d = abs(div - sii902x_mclk_div_table[i]); 581 582 if (d >= distance) 583 continue; 584 585 nearest = i; 586 distance = d; 587 if (d == 0) 588 break; 589 } 590 591 *i2s_config_reg |= nearest << 4; 592 593 return sii902x_mclk_div_table[nearest]; 594 } 595 596 static const struct sii902x_sample_freq { 597 u32 freq; 598 u8 val; 599 } sii902x_sample_freq[] = { 600 { .freq = 32000, .val = SII902X_TPI_AUDIO_FREQ_32KHZ }, 601 { .freq = 44000, .val = SII902X_TPI_AUDIO_FREQ_44KHZ }, 602 { .freq = 48000, .val = SII902X_TPI_AUDIO_FREQ_48KHZ }, 603 { .freq = 88000, .val = SII902X_TPI_AUDIO_FREQ_88KHZ }, 604 { .freq = 96000, .val = SII902X_TPI_AUDIO_FREQ_96KHZ }, 605 { .freq = 176000, .val = SII902X_TPI_AUDIO_FREQ_176KHZ }, 606 { .freq = 192000, .val = SII902X_TPI_AUDIO_FREQ_192KHZ }, 607 }; 608 609 static int sii902x_audio_hw_params(struct device *dev, void *data, 610 struct hdmi_codec_daifmt *daifmt, 611 struct hdmi_codec_params *params) 612 { 613 struct sii902x *sii902x = dev_get_drvdata(dev); 614 u8 i2s_config_reg = SII902X_TPI_I2S_SD_DIRECTION_MSB_FIRST; 615 u8 config_byte2_reg = (SII902X_TPI_AUDIO_INTERFACE_I2S | 616 SII902X_TPI_AUDIO_MUTE_ENABLE | 617 SII902X_TPI_AUDIO_CODING_PCM); 618 u8 config_byte3_reg = 0; 619 u8 infoframe_buf[HDMI_INFOFRAME_SIZE(AUDIO)]; 620 unsigned long mclk_rate; 621 int i, ret; 622 623 if (daifmt->bit_clk_provider || daifmt->frame_clk_provider) { 624 dev_dbg(dev, "%s: I2S clock provider mode not supported\n", 625 __func__); 626 return -EINVAL; 627 } 628 629 switch (daifmt->fmt) { 630 case HDMI_I2S: 631 i2s_config_reg |= SII902X_TPI_I2S_FIRST_BIT_SHIFT_YES | 632 SII902X_TPI_I2S_SD_JUSTIFY_LEFT; 633 break; 634 case HDMI_RIGHT_J: 635 i2s_config_reg |= SII902X_TPI_I2S_SD_JUSTIFY_RIGHT; 636 break; 637 case HDMI_LEFT_J: 638 i2s_config_reg |= SII902X_TPI_I2S_SD_JUSTIFY_LEFT; 639 break; 640 default: 641 dev_dbg(dev, "%s: Unsupported i2s format %u\n", __func__, 642 daifmt->fmt); 643 return -EINVAL; 644 } 645 646 if (daifmt->bit_clk_inv) 647 i2s_config_reg |= SII902X_TPI_I2S_SCK_EDGE_FALLING; 648 else 649 i2s_config_reg |= SII902X_TPI_I2S_SCK_EDGE_RISING; 650 651 if (daifmt->frame_clk_inv) 652 i2s_config_reg |= SII902X_TPI_I2S_WS_POLARITY_LOW; 653 else 654 i2s_config_reg |= SII902X_TPI_I2S_WS_POLARITY_HIGH; 655 656 if (params->channels > 2) 657 config_byte2_reg |= SII902X_TPI_AUDIO_LAYOUT_8_CHANNELS; 658 else 659 config_byte2_reg |= SII902X_TPI_AUDIO_LAYOUT_2_CHANNELS; 660 661 switch (params->sample_width) { 662 case 16: 663 config_byte3_reg |= SII902X_TPI_AUDIO_SAMPLE_SIZE_16; 664 break; 665 case 20: 666 config_byte3_reg |= SII902X_TPI_AUDIO_SAMPLE_SIZE_20; 667 break; 668 case 24: 669 case 32: 670 config_byte3_reg |= SII902X_TPI_AUDIO_SAMPLE_SIZE_24; 671 break; 672 default: 673 dev_err(dev, "%s: Unsupported sample width %u\n", __func__, 674 params->sample_width); 675 return -EINVAL; 676 } 677 678 for (i = 0; i < ARRAY_SIZE(sii902x_sample_freq); i++) { 679 if (params->sample_rate == sii902x_sample_freq[i].freq) { 680 config_byte3_reg |= sii902x_sample_freq[i].val; 681 break; 682 } 683 } 684 685 ret = clk_prepare_enable(sii902x->audio.mclk); 686 if (ret) { 687 dev_err(dev, "Enabling mclk failed: %d\n", ret); 688 return ret; 689 } 690 691 if (sii902x->audio.mclk) { 692 mclk_rate = clk_get_rate(sii902x->audio.mclk); 693 ret = sii902x_select_mclk_div(&i2s_config_reg, 694 params->sample_rate, mclk_rate); 695 if (mclk_rate != ret * params->sample_rate) 696 dev_dbg(dev, "Inaccurate reference clock (%ld/%d != %u)\n", 697 mclk_rate, ret, params->sample_rate); 698 } 699 700 mutex_lock(&sii902x->mutex); 701 702 ret = regmap_write(sii902x->regmap, 703 SII902X_TPI_AUDIO_CONFIG_BYTE2_REG, 704 config_byte2_reg); 705 if (ret < 0) 706 goto out; 707 708 ret = regmap_write(sii902x->regmap, SII902X_TPI_I2S_INPUT_CONFIG_REG, 709 i2s_config_reg); 710 if (ret) 711 goto out; 712 713 for (i = 0; i < ARRAY_SIZE(sii902x->audio.i2s_fifo_sequence) && 714 sii902x->audio.i2s_fifo_sequence[i]; i++) 715 regmap_write(sii902x->regmap, 716 SII902X_TPI_I2S_ENABLE_MAPPING_REG, 717 sii902x->audio.i2s_fifo_sequence[i]); 718 719 ret = regmap_write(sii902x->regmap, SII902X_TPI_AUDIO_CONFIG_BYTE3_REG, 720 config_byte3_reg); 721 if (ret) 722 goto out; 723 724 ret = regmap_bulk_write(sii902x->regmap, SII902X_TPI_I2S_STRM_HDR_BASE, 725 params->iec.status, 726 min((size_t) SII902X_TPI_I2S_STRM_HDR_SIZE, 727 sizeof(params->iec.status))); 728 if (ret) 729 goto out; 730 731 ret = hdmi_audio_infoframe_pack(¶ms->cea, infoframe_buf, 732 sizeof(infoframe_buf)); 733 if (ret < 0) { 734 dev_err(dev, "%s: Failed to pack audio infoframe: %d\n", 735 __func__, ret); 736 goto out; 737 } 738 739 ret = regmap_bulk_write(sii902x->regmap, 740 SII902X_TPI_MISC_INFOFRAME_BASE, 741 infoframe_buf, 742 min(ret, SII902X_TPI_MISC_INFOFRAME_SIZE)); 743 if (ret) 744 goto out; 745 746 /* Decode Level 0 Packets */ 747 ret = regmap_write(sii902x->regmap, SII902X_IND_SET_PAGE, 0x02); 748 if (ret) 749 goto out; 750 751 ret = regmap_write(sii902x->regmap, SII902X_IND_OFFSET, 0x24); 752 if (ret) 753 goto out; 754 755 ret = regmap_write(sii902x->regmap, SII902X_IND_VALUE, 0x02); 756 if (ret) 757 goto out; 758 759 dev_dbg(dev, "%s: hdmi audio enabled\n", __func__); 760 out: 761 mutex_unlock(&sii902x->mutex); 762 763 if (ret) { 764 clk_disable_unprepare(sii902x->audio.mclk); 765 dev_err(dev, "%s: hdmi audio enable failed: %d\n", __func__, 766 ret); 767 } 768 769 return ret; 770 } 771 772 static void sii902x_audio_shutdown(struct device *dev, void *data) 773 { 774 struct sii902x *sii902x = dev_get_drvdata(dev); 775 776 mutex_lock(&sii902x->mutex); 777 778 regmap_write(sii902x->regmap, SII902X_TPI_AUDIO_CONFIG_BYTE2_REG, 779 SII902X_TPI_AUDIO_INTERFACE_DISABLE); 780 781 mutex_unlock(&sii902x->mutex); 782 783 clk_disable_unprepare(sii902x->audio.mclk); 784 } 785 786 static int sii902x_audio_mute(struct device *dev, void *data, 787 bool enable, int direction) 788 { 789 struct sii902x *sii902x = dev_get_drvdata(dev); 790 791 mutex_lock(&sii902x->mutex); 792 793 sii902x_mute(sii902x, enable); 794 795 mutex_unlock(&sii902x->mutex); 796 797 return 0; 798 } 799 800 static int sii902x_audio_get_eld(struct device *dev, void *data, 801 uint8_t *buf, size_t len) 802 { 803 struct sii902x *sii902x = dev_get_drvdata(dev); 804 805 mutex_lock(&sii902x->mutex); 806 807 memcpy(buf, sii902x->connector.eld, 808 min(sizeof(sii902x->connector.eld), len)); 809 810 mutex_unlock(&sii902x->mutex); 811 812 return 0; 813 } 814 815 static int sii902x_audio_get_dai_id(struct snd_soc_component *component, 816 struct device_node *endpoint, 817 void *data) 818 { 819 struct of_endpoint of_ep; 820 int ret; 821 822 ret = of_graph_parse_endpoint(endpoint, &of_ep); 823 if (ret < 0) 824 return ret; 825 826 /* 827 * HDMI sound should be located at reg = <3> 828 * Return expected DAI index 0. 829 */ 830 if (of_ep.port == SII902X_AUDIO_PORT_INDEX) 831 return 0; 832 833 return -EINVAL; 834 } 835 836 static const struct hdmi_codec_ops sii902x_audio_codec_ops = { 837 .hw_params = sii902x_audio_hw_params, 838 .audio_shutdown = sii902x_audio_shutdown, 839 .mute_stream = sii902x_audio_mute, 840 .get_eld = sii902x_audio_get_eld, 841 .get_dai_id = sii902x_audio_get_dai_id, 842 }; 843 844 static int sii902x_audio_codec_init(struct sii902x *sii902x, 845 struct device *dev) 846 { 847 static const u8 audio_fifo_id[] = { 848 SII902X_TPI_I2S_CONFIG_FIFO0, 849 SII902X_TPI_I2S_CONFIG_FIFO1, 850 SII902X_TPI_I2S_CONFIG_FIFO2, 851 SII902X_TPI_I2S_CONFIG_FIFO3, 852 }; 853 static const u8 i2s_lane_id[] = { 854 SII902X_TPI_I2S_SELECT_SD0, 855 SII902X_TPI_I2S_SELECT_SD1, 856 SII902X_TPI_I2S_SELECT_SD2, 857 SII902X_TPI_I2S_SELECT_SD3, 858 }; 859 struct hdmi_codec_pdata codec_data = { 860 .ops = &sii902x_audio_codec_ops, 861 .i2s = 1, /* Only i2s support for now. */ 862 .spdif = 0, 863 .max_i2s_channels = 0, 864 .no_capture_mute = 1, 865 }; 866 u8 lanes[4]; 867 int num_lanes, i; 868 869 if (!of_property_present(dev->of_node, "#sound-dai-cells")) { 870 dev_dbg(dev, "%s: No \"#sound-dai-cells\", no audio\n", 871 __func__); 872 return 0; 873 } 874 875 num_lanes = of_property_read_variable_u8_array(dev->of_node, 876 "sil,i2s-data-lanes", 877 lanes, 1, 878 ARRAY_SIZE(lanes)); 879 880 if (num_lanes == -EINVAL) { 881 dev_dbg(dev, 882 "%s: No \"sil,i2s-data-lanes\", use default <0>\n", 883 __func__); 884 num_lanes = 1; 885 lanes[0] = 0; 886 } else if (num_lanes < 0) { 887 dev_err(dev, 888 "%s: Error getting \"sil,i2s-data-lanes\": %d\n", 889 __func__, num_lanes); 890 return num_lanes; 891 } 892 codec_data.max_i2s_channels = 2 * num_lanes; 893 894 for (i = 0; i < num_lanes; i++) 895 sii902x->audio.i2s_fifo_sequence[i] |= audio_fifo_id[i] | 896 i2s_lane_id[lanes[i]] | SII902X_TPI_I2S_FIFO_ENABLE; 897 898 sii902x->audio.mclk = devm_clk_get_optional(dev, "mclk"); 899 if (IS_ERR(sii902x->audio.mclk)) { 900 dev_err(dev, "%s: No clock (audio mclk) found: %ld\n", 901 __func__, PTR_ERR(sii902x->audio.mclk)); 902 return PTR_ERR(sii902x->audio.mclk); 903 } 904 905 sii902x->audio.pdev = platform_device_register_data( 906 dev, HDMI_CODEC_DRV_NAME, PLATFORM_DEVID_AUTO, 907 &codec_data, sizeof(codec_data)); 908 909 return PTR_ERR_OR_ZERO(sii902x->audio.pdev); 910 } 911 912 static const struct regmap_range sii902x_volatile_ranges[] = { 913 { .range_min = 0, .range_max = 0xff }, 914 }; 915 916 static const struct regmap_access_table sii902x_volatile_table = { 917 .yes_ranges = sii902x_volatile_ranges, 918 .n_yes_ranges = ARRAY_SIZE(sii902x_volatile_ranges), 919 }; 920 921 static const struct regmap_config sii902x_regmap_config = { 922 .reg_bits = 8, 923 .val_bits = 8, 924 .disable_locking = true, /* struct sii902x mutex should be enough */ 925 .max_register = SII902X_TPI_MISC_INFOFRAME_END, 926 .volatile_table = &sii902x_volatile_table, 927 .cache_type = REGCACHE_NONE, 928 }; 929 930 static irqreturn_t sii902x_interrupt(int irq, void *data) 931 { 932 struct sii902x *sii902x = data; 933 unsigned int status = 0; 934 935 mutex_lock(&sii902x->mutex); 936 937 regmap_read(sii902x->regmap, SII902X_INT_STATUS, &status); 938 regmap_write(sii902x->regmap, SII902X_INT_STATUS, status); 939 940 mutex_unlock(&sii902x->mutex); 941 942 if ((status & SII902X_HOTPLUG_EVENT) && sii902x->bridge.dev) { 943 drm_helper_hpd_irq_event(sii902x->bridge.dev); 944 drm_bridge_hpd_notify(&sii902x->bridge, (status & SII902X_PLUGGED_STATUS) 945 ? connector_status_connected 946 : connector_status_disconnected); 947 } 948 949 return IRQ_HANDLED; 950 } 951 952 /* 953 * The purpose of sii902x_i2c_bypass_select is to enable the pass through 954 * mode of the HDMI transmitter. Do not use regmap from within this function, 955 * only use sii902x_*_unlocked functions to read/modify/write registers. 956 * We are holding the parent adapter lock here, keep this in mind before 957 * adding more i2c transactions. 958 * 959 * Also, since SII902X_SYS_CTRL_DATA is used with regmap_update_bits elsewhere 960 * in this driver, we need to make sure that we only touch 0x1A[2:1] from 961 * within sii902x_i2c_bypass_select and sii902x_i2c_bypass_deselect, and that 962 * we leave the remaining bits as we have found them. 963 */ 964 static int sii902x_i2c_bypass_select(struct i2c_mux_core *mux, u32 chan_id) 965 { 966 struct sii902x *sii902x = i2c_mux_priv(mux); 967 struct device *dev = &sii902x->i2c->dev; 968 unsigned long timeout; 969 u8 status; 970 int ret; 971 972 ret = sii902x_update_bits_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA, 973 SII902X_SYS_CTRL_DDC_BUS_REQ, 974 SII902X_SYS_CTRL_DDC_BUS_REQ); 975 if (ret) 976 return ret; 977 978 timeout = jiffies + 979 msecs_to_jiffies(SII902X_I2C_BUS_ACQUISITION_TIMEOUT_MS); 980 do { 981 ret = sii902x_read_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA, 982 &status); 983 if (ret) 984 return ret; 985 } while (!(status & SII902X_SYS_CTRL_DDC_BUS_GRTD) && 986 time_before(jiffies, timeout)); 987 988 if (!(status & SII902X_SYS_CTRL_DDC_BUS_GRTD)) { 989 dev_err(dev, "Failed to acquire the i2c bus\n"); 990 return -ETIMEDOUT; 991 } 992 993 return sii902x_write_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA, 994 status); 995 } 996 997 /* 998 * The purpose of sii902x_i2c_bypass_deselect is to disable the pass through 999 * mode of the HDMI transmitter. Do not use regmap from within this function, 1000 * only use sii902x_*_unlocked functions to read/modify/write registers. 1001 * We are holding the parent adapter lock here, keep this in mind before 1002 * adding more i2c transactions. 1003 * 1004 * Also, since SII902X_SYS_CTRL_DATA is used with regmap_update_bits elsewhere 1005 * in this driver, we need to make sure that we only touch 0x1A[2:1] from 1006 * within sii902x_i2c_bypass_select and sii902x_i2c_bypass_deselect, and that 1007 * we leave the remaining bits as we have found them. 1008 */ 1009 static int sii902x_i2c_bypass_deselect(struct i2c_mux_core *mux, u32 chan_id) 1010 { 1011 struct sii902x *sii902x = i2c_mux_priv(mux); 1012 struct device *dev = &sii902x->i2c->dev; 1013 unsigned long timeout; 1014 unsigned int retries; 1015 u8 status; 1016 int ret; 1017 1018 /* 1019 * When the HDMI transmitter is in pass through mode, we need an 1020 * (undocumented) additional delay between STOP and START conditions 1021 * to guarantee the bus won't get stuck. 1022 */ 1023 udelay(30); 1024 1025 /* 1026 * Sometimes the I2C bus can stall after failure to use the 1027 * EDID channel. Retry a few times to see if things clear 1028 * up, else continue anyway. 1029 */ 1030 retries = 5; 1031 do { 1032 ret = sii902x_read_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA, 1033 &status); 1034 retries--; 1035 } while (ret && retries); 1036 if (ret) { 1037 dev_err(dev, "failed to read status (%d)\n", ret); 1038 return ret; 1039 } 1040 1041 ret = sii902x_update_bits_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA, 1042 SII902X_SYS_CTRL_DDC_BUS_REQ | 1043 SII902X_SYS_CTRL_DDC_BUS_GRTD, 0); 1044 if (ret) 1045 return ret; 1046 1047 timeout = jiffies + 1048 msecs_to_jiffies(SII902X_I2C_BUS_ACQUISITION_TIMEOUT_MS); 1049 do { 1050 ret = sii902x_read_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA, 1051 &status); 1052 if (ret) 1053 return ret; 1054 } while (status & (SII902X_SYS_CTRL_DDC_BUS_REQ | 1055 SII902X_SYS_CTRL_DDC_BUS_GRTD) && 1056 time_before(jiffies, timeout)); 1057 1058 if (status & (SII902X_SYS_CTRL_DDC_BUS_REQ | 1059 SII902X_SYS_CTRL_DDC_BUS_GRTD)) { 1060 dev_err(dev, "failed to release the i2c bus\n"); 1061 return -ETIMEDOUT; 1062 } 1063 1064 return 0; 1065 } 1066 1067 static const struct drm_bridge_timings default_sii902x_timings = { 1068 .input_bus_flags = DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE 1069 | DRM_BUS_FLAG_SYNC_SAMPLE_NEGEDGE 1070 | DRM_BUS_FLAG_DE_HIGH, 1071 }; 1072 1073 static int sii902x_init(struct sii902x *sii902x) 1074 { 1075 struct device *dev = &sii902x->i2c->dev; 1076 unsigned int status = 0; 1077 u8 chipid[4]; 1078 int ret; 1079 1080 sii902x_reset(sii902x); 1081 1082 ret = regmap_write(sii902x->regmap, SII902X_REG_TPI_RQB, 0x0); 1083 if (ret) 1084 return ret; 1085 1086 ret = regmap_bulk_read(sii902x->regmap, SII902X_REG_CHIPID(0), 1087 &chipid, 4); 1088 if (ret) { 1089 dev_err(dev, "regmap_read failed %d\n", ret); 1090 return ret; 1091 } 1092 1093 if (chipid[0] != 0xb0) { 1094 dev_err(dev, "Invalid chipid: %02x (expecting 0xb0)\n", 1095 chipid[0]); 1096 return -EINVAL; 1097 } 1098 1099 /* Clear all pending interrupts */ 1100 regmap_read(sii902x->regmap, SII902X_INT_STATUS, &status); 1101 regmap_write(sii902x->regmap, SII902X_INT_STATUS, status); 1102 1103 if (sii902x->i2c->irq > 0) { 1104 regmap_write(sii902x->regmap, SII902X_INT_ENABLE, 1105 SII902X_HOTPLUG_EVENT); 1106 1107 ret = devm_request_threaded_irq(dev, sii902x->i2c->irq, NULL, 1108 sii902x_interrupt, 1109 IRQF_ONESHOT, dev_name(dev), 1110 sii902x); 1111 if (ret) 1112 return ret; 1113 } 1114 1115 ret = sii902x_audio_codec_init(sii902x, dev); 1116 if (ret) 1117 return ret; 1118 1119 i2c_set_clientdata(sii902x->i2c, sii902x); 1120 1121 sii902x->i2cmux = i2c_mux_alloc(sii902x->i2c->adapter, dev, 1122 1, 0, I2C_MUX_GATE, 1123 sii902x_i2c_bypass_select, 1124 sii902x_i2c_bypass_deselect); 1125 if (!sii902x->i2cmux) { 1126 ret = -ENOMEM; 1127 goto err_unreg_audio; 1128 } 1129 1130 sii902x->i2cmux->priv = sii902x; 1131 ret = i2c_mux_add_adapter(sii902x->i2cmux, 0, 0); 1132 if (ret) 1133 goto err_unreg_audio; 1134 1135 sii902x->bridge.of_node = dev->of_node; 1136 sii902x->bridge.timings = &default_sii902x_timings; 1137 sii902x->bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID; 1138 sii902x->bridge.type = DRM_MODE_CONNECTOR_HDMIA; 1139 1140 if (sii902x->i2c->irq > 0) 1141 sii902x->bridge.ops |= DRM_BRIDGE_OP_HPD; 1142 1143 drm_bridge_add(&sii902x->bridge); 1144 1145 return 0; 1146 1147 err_unreg_audio: 1148 if (!PTR_ERR_OR_ZERO(sii902x->audio.pdev)) 1149 platform_device_unregister(sii902x->audio.pdev); 1150 1151 return ret; 1152 } 1153 1154 static int sii902x_probe(struct i2c_client *client) 1155 { 1156 struct device *dev = &client->dev; 1157 struct device_node *endpoint; 1158 struct sii902x *sii902x; 1159 static const char * const supplies[] = {"iovcc", "cvcc12"}; 1160 int ret; 1161 1162 ret = i2c_check_functionality(client->adapter, 1163 I2C_FUNC_SMBUS_BYTE_DATA); 1164 if (!ret) { 1165 dev_err(dev, "I2C adapter not suitable\n"); 1166 return -EIO; 1167 } 1168 1169 sii902x = devm_drm_bridge_alloc(dev, struct sii902x, bridge, &sii902x_bridge_funcs); 1170 if (IS_ERR(sii902x)) 1171 return PTR_ERR(sii902x); 1172 1173 sii902x->i2c = client; 1174 sii902x->regmap = devm_regmap_init_i2c(client, &sii902x_regmap_config); 1175 if (IS_ERR(sii902x->regmap)) 1176 return PTR_ERR(sii902x->regmap); 1177 1178 sii902x->reset_gpio = devm_gpiod_get_optional(dev, "reset", 1179 GPIOD_OUT_LOW); 1180 if (IS_ERR(sii902x->reset_gpio)) { 1181 dev_err(dev, "Failed to retrieve/request reset gpio: %ld\n", 1182 PTR_ERR(sii902x->reset_gpio)); 1183 return PTR_ERR(sii902x->reset_gpio); 1184 } 1185 1186 sii902x->bus_width = 24; 1187 endpoint = of_graph_get_endpoint_by_regs(dev->of_node, 0, -1); 1188 if (endpoint) 1189 of_property_read_u32(endpoint, "bus-width", &sii902x->bus_width); 1190 1191 endpoint = of_graph_get_endpoint_by_regs(dev->of_node, 1, -1); 1192 if (endpoint) { 1193 struct device_node *remote = of_graph_get_remote_port_parent(endpoint); 1194 1195 of_node_put(endpoint); 1196 if (!remote) { 1197 dev_err(dev, "Endpoint in port@1 unconnected\n"); 1198 return -ENODEV; 1199 } 1200 1201 if (!of_device_is_available(remote)) { 1202 dev_err(dev, "port@1 remote device is disabled\n"); 1203 of_node_put(remote); 1204 return -ENODEV; 1205 } 1206 1207 sii902x->next_bridge = of_drm_find_bridge(remote); 1208 of_node_put(remote); 1209 if (!sii902x->next_bridge) 1210 return dev_err_probe(dev, -EPROBE_DEFER, 1211 "Failed to find remote bridge\n"); 1212 } 1213 1214 mutex_init(&sii902x->mutex); 1215 1216 ret = devm_regulator_bulk_get_enable(dev, ARRAY_SIZE(supplies), supplies); 1217 if (ret < 0) 1218 return dev_err_probe(dev, ret, "Failed to enable supplies"); 1219 1220 return sii902x_init(sii902x); 1221 } 1222 1223 static void sii902x_remove(struct i2c_client *client) 1224 { 1225 struct sii902x *sii902x = i2c_get_clientdata(client); 1226 1227 drm_bridge_remove(&sii902x->bridge); 1228 i2c_mux_del_adapters(sii902x->i2cmux); 1229 1230 if (!PTR_ERR_OR_ZERO(sii902x->audio.pdev)) 1231 platform_device_unregister(sii902x->audio.pdev); 1232 } 1233 1234 static const struct of_device_id sii902x_dt_ids[] = { 1235 { .compatible = "sil,sii9022", }, 1236 { } 1237 }; 1238 MODULE_DEVICE_TABLE(of, sii902x_dt_ids); 1239 1240 static const struct i2c_device_id sii902x_i2c_ids[] = { 1241 { "sii9022" }, 1242 { } 1243 }; 1244 MODULE_DEVICE_TABLE(i2c, sii902x_i2c_ids); 1245 1246 static struct i2c_driver sii902x_driver = { 1247 .probe = sii902x_probe, 1248 .remove = sii902x_remove, 1249 .driver = { 1250 .name = "sii902x", 1251 .of_match_table = sii902x_dt_ids, 1252 }, 1253 .id_table = sii902x_i2c_ids, 1254 }; 1255 module_i2c_driver(sii902x_driver); 1256 1257 MODULE_AUTHOR("Boris Brezillon <boris.brezillon@free-electrons.com>"); 1258 MODULE_DESCRIPTION("SII902x RGB -> HDMI bridges"); 1259 MODULE_LICENSE("GPL"); 1260