1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2018, The Linux Foundation. All rights reserved. 4 * Copyright (c) 2019-2020. Linaro Limited. 5 */ 6 7 #include <linux/firmware.h> 8 #include <linux/gpio/consumer.h> 9 #include <linux/i2c.h> 10 #include <linux/interrupt.h> 11 #include <linux/module.h> 12 #include <linux/mutex.h> 13 #include <linux/of_graph.h> 14 #include <linux/platform_device.h> 15 #include <linux/regmap.h> 16 #include <linux/regulator/consumer.h> 17 #include <linux/wait.h> 18 #include <linux/workqueue.h> 19 20 #include <sound/hdmi-codec.h> 21 22 #include <drm/drm_atomic_helper.h> 23 #include <drm/drm_bridge.h> 24 #include <drm/drm_edid.h> 25 #include <drm/drm_mipi_dsi.h> 26 #include <drm/drm_of.h> 27 #include <drm/drm_print.h> 28 #include <drm/drm_probe_helper.h> 29 30 #define EDID_BLOCK_SIZE 128 31 #define EDID_NUM_BLOCKS 2 32 33 #define FW_FILE "lt9611uxc_fw.bin" 34 35 struct lt9611uxc { 36 struct device *dev; 37 struct drm_bridge bridge; 38 struct drm_bridge *next_bridge; 39 40 struct regmap *regmap; 41 /* Protects all accesses to registers by stopping the on-chip MCU */ 42 struct mutex ocm_lock; 43 44 struct wait_queue_head wq; 45 struct work_struct work; 46 47 struct device_node *dsi0_node; 48 struct device_node *dsi1_node; 49 struct mipi_dsi_device *dsi0; 50 struct mipi_dsi_device *dsi1; 51 struct platform_device *audio_pdev; 52 53 struct gpio_desc *reset_gpio; 54 struct gpio_desc *enable_gpio; 55 56 struct regulator_bulk_data supplies[2]; 57 58 struct i2c_client *client; 59 60 bool hpd_supported; 61 bool edid_read; 62 /* can be accessed from different threads, so protect this with ocm_lock */ 63 bool hdmi_connected; 64 uint8_t fw_version; 65 }; 66 67 #define LT9611_PAGE_CONTROL 0xff 68 69 static const struct regmap_range_cfg lt9611uxc_ranges[] = { 70 { 71 .name = "register_range", 72 .range_min = 0, 73 .range_max = 0xd0ff, 74 .selector_reg = LT9611_PAGE_CONTROL, 75 .selector_mask = 0xff, 76 .selector_shift = 0, 77 .window_start = 0, 78 .window_len = 0x100, 79 }, 80 }; 81 82 static const struct regmap_config lt9611uxc_regmap_config = { 83 .reg_bits = 8, 84 .val_bits = 8, 85 .max_register = 0xffff, 86 .ranges = lt9611uxc_ranges, 87 .num_ranges = ARRAY_SIZE(lt9611uxc_ranges), 88 }; 89 90 struct lt9611uxc_mode { 91 u16 hdisplay; 92 u16 vdisplay; 93 u8 vrefresh; 94 }; 95 96 /* 97 * This chip supports only a fixed set of modes. 98 * Enumerate them here to check whether the mode is supported. 99 */ 100 static struct lt9611uxc_mode lt9611uxc_modes[] = { 101 { 1920, 1080, 60 }, 102 { 1920, 1080, 30 }, 103 { 1920, 1080, 25 }, 104 { 1366, 768, 60 }, 105 { 1360, 768, 60 }, 106 { 1280, 1024, 60 }, 107 { 1280, 800, 60 }, 108 { 1280, 720, 60 }, 109 { 1280, 720, 50 }, 110 { 1280, 720, 30 }, 111 { 1152, 864, 60 }, 112 { 1024, 768, 60 }, 113 { 800, 600, 60 }, 114 { 720, 576, 50 }, 115 { 720, 480, 60 }, 116 { 640, 480, 60 }, 117 }; 118 119 static struct lt9611uxc *bridge_to_lt9611uxc(struct drm_bridge *bridge) 120 { 121 return container_of(bridge, struct lt9611uxc, bridge); 122 } 123 124 static void lt9611uxc_lock(struct lt9611uxc *lt9611uxc) 125 { 126 mutex_lock(<9611uxc->ocm_lock); 127 regmap_write(lt9611uxc->regmap, 0x80ee, 0x01); 128 } 129 130 static void lt9611uxc_unlock(struct lt9611uxc *lt9611uxc) 131 { 132 regmap_write(lt9611uxc->regmap, 0x80ee, 0x00); 133 msleep(50); 134 mutex_unlock(<9611uxc->ocm_lock); 135 } 136 137 static irqreturn_t lt9611uxc_irq_thread_handler(int irq, void *dev_id) 138 { 139 struct lt9611uxc *lt9611uxc = dev_id; 140 unsigned int irq_status = 0; 141 unsigned int hpd_status = 0; 142 143 lt9611uxc_lock(lt9611uxc); 144 145 regmap_read(lt9611uxc->regmap, 0xb022, &irq_status); 146 regmap_read(lt9611uxc->regmap, 0xb023, &hpd_status); 147 if (irq_status) 148 regmap_write(lt9611uxc->regmap, 0xb022, 0); 149 150 if (irq_status & BIT(0)) { 151 lt9611uxc->edid_read = !!(hpd_status & BIT(0)); 152 wake_up_all(<9611uxc->wq); 153 } 154 155 if (irq_status & BIT(1)) { 156 lt9611uxc->hdmi_connected = hpd_status & BIT(1); 157 schedule_work(<9611uxc->work); 158 } 159 160 lt9611uxc_unlock(lt9611uxc); 161 162 return IRQ_HANDLED; 163 } 164 165 static void lt9611uxc_hpd_work(struct work_struct *work) 166 { 167 struct lt9611uxc *lt9611uxc = container_of(work, struct lt9611uxc, work); 168 bool connected; 169 170 mutex_lock(<9611uxc->ocm_lock); 171 connected = lt9611uxc->hdmi_connected; 172 mutex_unlock(<9611uxc->ocm_lock); 173 174 drm_bridge_hpd_notify(<9611uxc->bridge, 175 connected ? 176 connector_status_connected : 177 connector_status_disconnected); 178 } 179 180 static void lt9611uxc_reset(struct lt9611uxc *lt9611uxc) 181 { 182 gpiod_set_value_cansleep(lt9611uxc->reset_gpio, 1); 183 msleep(20); 184 185 gpiod_set_value_cansleep(lt9611uxc->reset_gpio, 0); 186 msleep(20); 187 188 gpiod_set_value_cansleep(lt9611uxc->reset_gpio, 1); 189 msleep(300); 190 } 191 192 static void lt9611uxc_assert_5v(struct lt9611uxc *lt9611uxc) 193 { 194 if (!lt9611uxc->enable_gpio) 195 return; 196 197 gpiod_set_value_cansleep(lt9611uxc->enable_gpio, 1); 198 msleep(20); 199 } 200 201 static int lt9611uxc_regulator_init(struct lt9611uxc *lt9611uxc) 202 { 203 int ret; 204 205 lt9611uxc->supplies[0].supply = "vdd"; 206 lt9611uxc->supplies[1].supply = "vcc"; 207 208 ret = devm_regulator_bulk_get(lt9611uxc->dev, 2, lt9611uxc->supplies); 209 if (ret < 0) 210 return ret; 211 212 return regulator_set_load(lt9611uxc->supplies[0].consumer, 200000); 213 } 214 215 static int lt9611uxc_regulator_enable(struct lt9611uxc *lt9611uxc) 216 { 217 int ret; 218 219 ret = regulator_enable(lt9611uxc->supplies[0].consumer); 220 if (ret < 0) 221 return ret; 222 223 usleep_range(1000, 10000); /* 50000 according to dtsi */ 224 225 ret = regulator_enable(lt9611uxc->supplies[1].consumer); 226 if (ret < 0) { 227 regulator_disable(lt9611uxc->supplies[0].consumer); 228 return ret; 229 } 230 231 return 0; 232 } 233 234 static struct lt9611uxc_mode *lt9611uxc_find_mode(const struct drm_display_mode *mode) 235 { 236 int i; 237 238 for (i = 0; i < ARRAY_SIZE(lt9611uxc_modes); i++) { 239 if (lt9611uxc_modes[i].hdisplay == mode->hdisplay && 240 lt9611uxc_modes[i].vdisplay == mode->vdisplay && 241 lt9611uxc_modes[i].vrefresh == drm_mode_vrefresh(mode)) { 242 return <9611uxc_modes[i]; 243 } 244 } 245 246 return NULL; 247 } 248 249 static struct mipi_dsi_device *lt9611uxc_attach_dsi(struct lt9611uxc *lt9611uxc, 250 struct device_node *dsi_node) 251 { 252 const struct mipi_dsi_device_info info = { "lt9611uxc", 0, NULL }; 253 struct mipi_dsi_device *dsi; 254 struct mipi_dsi_host *host; 255 struct device *dev = lt9611uxc->dev; 256 int ret; 257 258 host = of_find_mipi_dsi_host_by_node(dsi_node); 259 if (!host) 260 return ERR_PTR(dev_err_probe(dev, -EPROBE_DEFER, "failed to find dsi host\n")); 261 262 dsi = devm_mipi_dsi_device_register_full(dev, host, &info); 263 if (IS_ERR(dsi)) { 264 dev_err(dev, "failed to create dsi device\n"); 265 return dsi; 266 } 267 268 dsi->lanes = 4; 269 dsi->format = MIPI_DSI_FMT_RGB888; 270 dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | 271 MIPI_DSI_MODE_VIDEO_HSE; 272 273 ret = devm_mipi_dsi_attach(dev, dsi); 274 if (ret < 0) { 275 dev_err(dev, "failed to attach dsi to host\n"); 276 return ERR_PTR(ret); 277 } 278 279 return dsi; 280 } 281 282 static int lt9611uxc_bridge_attach(struct drm_bridge *bridge, 283 struct drm_encoder *encoder, 284 enum drm_bridge_attach_flags flags) 285 { 286 struct lt9611uxc *lt9611uxc = bridge_to_lt9611uxc(bridge); 287 288 return drm_bridge_attach(encoder, lt9611uxc->next_bridge, 289 bridge, flags); 290 } 291 292 static enum drm_mode_status 293 lt9611uxc_bridge_mode_valid(struct drm_bridge *bridge, 294 const struct drm_display_info *info, 295 const struct drm_display_mode *mode) 296 { 297 struct lt9611uxc_mode *lt9611uxc_mode; 298 299 lt9611uxc_mode = lt9611uxc_find_mode(mode); 300 301 return lt9611uxc_mode ? MODE_OK : MODE_BAD; 302 } 303 304 static void lt9611uxc_video_setup(struct lt9611uxc *lt9611uxc, 305 const struct drm_display_mode *mode) 306 { 307 u32 h_total, hactive, hsync_len, hfront_porch; 308 u32 v_total, vactive, vsync_len, vfront_porch; 309 310 h_total = mode->htotal; 311 v_total = mode->vtotal; 312 313 hactive = mode->hdisplay; 314 hsync_len = mode->hsync_end - mode->hsync_start; 315 hfront_porch = mode->hsync_start - mode->hdisplay; 316 317 vactive = mode->vdisplay; 318 vsync_len = mode->vsync_end - mode->vsync_start; 319 vfront_porch = mode->vsync_start - mode->vdisplay; 320 321 regmap_write(lt9611uxc->regmap, 0xd00d, (u8)(v_total / 256)); 322 regmap_write(lt9611uxc->regmap, 0xd00e, (u8)(v_total % 256)); 323 324 regmap_write(lt9611uxc->regmap, 0xd00f, (u8)(vactive / 256)); 325 regmap_write(lt9611uxc->regmap, 0xd010, (u8)(vactive % 256)); 326 327 regmap_write(lt9611uxc->regmap, 0xd011, (u8)(h_total / 256)); 328 regmap_write(lt9611uxc->regmap, 0xd012, (u8)(h_total % 256)); 329 330 regmap_write(lt9611uxc->regmap, 0xd013, (u8)(hactive / 256)); 331 regmap_write(lt9611uxc->regmap, 0xd014, (u8)(hactive % 256)); 332 333 regmap_write(lt9611uxc->regmap, 0xd015, (u8)(vsync_len % 256)); 334 335 regmap_update_bits(lt9611uxc->regmap, 0xd016, 0xf, (u8)(hsync_len / 256)); 336 regmap_write(lt9611uxc->regmap, 0xd017, (u8)(hsync_len % 256)); 337 338 regmap_update_bits(lt9611uxc->regmap, 0xd018, 0xf, (u8)(vfront_porch / 256)); 339 regmap_write(lt9611uxc->regmap, 0xd019, (u8)(vfront_porch % 256)); 340 341 regmap_update_bits(lt9611uxc->regmap, 0xd01a, 0xf, (u8)(hfront_porch / 256)); 342 regmap_write(lt9611uxc->regmap, 0xd01b, (u8)(hfront_porch % 256)); 343 } 344 345 static void lt9611uxc_bridge_mode_set(struct drm_bridge *bridge, 346 const struct drm_display_mode *mode, 347 const struct drm_display_mode *adj_mode) 348 { 349 struct lt9611uxc *lt9611uxc = bridge_to_lt9611uxc(bridge); 350 351 lt9611uxc_lock(lt9611uxc); 352 lt9611uxc_video_setup(lt9611uxc, mode); 353 lt9611uxc_unlock(lt9611uxc); 354 } 355 356 static enum drm_connector_status lt9611uxc_bridge_detect(struct drm_bridge *bridge) 357 { 358 struct lt9611uxc *lt9611uxc = bridge_to_lt9611uxc(bridge); 359 unsigned int reg_val = 0; 360 int ret; 361 bool connected = true; 362 363 lt9611uxc_lock(lt9611uxc); 364 365 if (lt9611uxc->hpd_supported) { 366 ret = regmap_read(lt9611uxc->regmap, 0xb023, ®_val); 367 368 if (ret) 369 dev_err(lt9611uxc->dev, "failed to read hpd status: %d\n", ret); 370 else 371 connected = reg_val & BIT(1); 372 } 373 lt9611uxc->hdmi_connected = connected; 374 375 lt9611uxc_unlock(lt9611uxc); 376 377 return connected ? connector_status_connected : 378 connector_status_disconnected; 379 } 380 381 static int lt9611uxc_wait_for_edid(struct lt9611uxc *lt9611uxc) 382 { 383 return wait_event_interruptible_timeout(lt9611uxc->wq, lt9611uxc->edid_read, 384 msecs_to_jiffies(500)); 385 } 386 387 static int lt9611uxc_get_edid_block(void *data, u8 *buf, unsigned int block, size_t len) 388 { 389 struct lt9611uxc *lt9611uxc = data; 390 int ret; 391 392 if (len > EDID_BLOCK_SIZE) 393 return -EINVAL; 394 395 if (block >= EDID_NUM_BLOCKS) 396 return -EINVAL; 397 398 lt9611uxc_lock(lt9611uxc); 399 400 regmap_write(lt9611uxc->regmap, 0xb00b, 0x10); 401 402 regmap_write(lt9611uxc->regmap, 0xb00a, block * EDID_BLOCK_SIZE); 403 404 ret = regmap_noinc_read(lt9611uxc->regmap, 0xb0b0, buf, len); 405 if (ret) 406 dev_err(lt9611uxc->dev, "edid read failed: %d\n", ret); 407 408 lt9611uxc_unlock(lt9611uxc); 409 410 return 0; 411 }; 412 413 static const struct drm_edid *lt9611uxc_bridge_edid_read(struct drm_bridge *bridge, 414 struct drm_connector *connector) 415 { 416 struct lt9611uxc *lt9611uxc = bridge_to_lt9611uxc(bridge); 417 int ret; 418 419 ret = lt9611uxc_wait_for_edid(lt9611uxc); 420 if (ret < 0) { 421 dev_err(lt9611uxc->dev, "wait for EDID failed: %d\n", ret); 422 return NULL; 423 } else if (ret == 0) { 424 dev_err(lt9611uxc->dev, "wait for EDID timeout\n"); 425 return NULL; 426 } 427 428 return drm_edid_read_custom(connector, lt9611uxc_get_edid_block, lt9611uxc); 429 } 430 431 static const struct drm_bridge_funcs lt9611uxc_bridge_funcs = { 432 .attach = lt9611uxc_bridge_attach, 433 .mode_valid = lt9611uxc_bridge_mode_valid, 434 .mode_set = lt9611uxc_bridge_mode_set, 435 .detect = lt9611uxc_bridge_detect, 436 .edid_read = lt9611uxc_bridge_edid_read, 437 }; 438 439 static int lt9611uxc_parse_dt(struct device *dev, 440 struct lt9611uxc *lt9611uxc) 441 { 442 lt9611uxc->dsi0_node = of_graph_get_remote_node(dev->of_node, 0, -1); 443 if (!lt9611uxc->dsi0_node) { 444 dev_err(lt9611uxc->dev, "failed to get remote node for primary dsi\n"); 445 return -ENODEV; 446 } 447 448 lt9611uxc->dsi1_node = of_graph_get_remote_node(dev->of_node, 1, -1); 449 450 return drm_of_find_panel_or_bridge(dev->of_node, 2, -1, NULL, <9611uxc->next_bridge); 451 } 452 453 static int lt9611uxc_gpio_init(struct lt9611uxc *lt9611uxc) 454 { 455 struct device *dev = lt9611uxc->dev; 456 457 lt9611uxc->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); 458 if (IS_ERR(lt9611uxc->reset_gpio)) { 459 dev_err(dev, "failed to acquire reset gpio\n"); 460 return PTR_ERR(lt9611uxc->reset_gpio); 461 } 462 463 lt9611uxc->enable_gpio = devm_gpiod_get_optional(dev, "enable", GPIOD_OUT_LOW); 464 if (IS_ERR(lt9611uxc->enable_gpio)) { 465 dev_err(dev, "failed to acquire enable gpio\n"); 466 return PTR_ERR(lt9611uxc->enable_gpio); 467 } 468 469 return 0; 470 } 471 472 static int lt9611uxc_read_device_rev(struct lt9611uxc *lt9611uxc) 473 { 474 unsigned int rev0, rev1, rev2; 475 int ret; 476 477 lt9611uxc_lock(lt9611uxc); 478 479 ret = regmap_read(lt9611uxc->regmap, 0x8100, &rev0); 480 ret |= regmap_read(lt9611uxc->regmap, 0x8101, &rev1); 481 ret |= regmap_read(lt9611uxc->regmap, 0x8102, &rev2); 482 if (ret) 483 dev_err(lt9611uxc->dev, "failed to read revision: %d\n", ret); 484 else 485 dev_info(lt9611uxc->dev, "LT9611 revision: 0x%02x.%02x.%02x\n", rev0, rev1, rev2); 486 487 lt9611uxc_unlock(lt9611uxc); 488 489 return ret; 490 } 491 492 static int lt9611uxc_read_version(struct lt9611uxc *lt9611uxc) 493 { 494 unsigned int rev; 495 int ret; 496 497 lt9611uxc_lock(lt9611uxc); 498 499 ret = regmap_read(lt9611uxc->regmap, 0xb021, &rev); 500 if (ret) 501 dev_err(lt9611uxc->dev, "failed to read revision: %d\n", ret); 502 else 503 dev_info(lt9611uxc->dev, "LT9611 version: 0x%02x\n", rev); 504 505 lt9611uxc_unlock(lt9611uxc); 506 507 return ret < 0 ? ret : rev; 508 } 509 510 static int lt9611uxc_hdmi_hw_params(struct device *dev, void *data, 511 struct hdmi_codec_daifmt *fmt, 512 struct hdmi_codec_params *hparms) 513 { 514 /* 515 * LT9611UXC will automatically detect rate and sample size, so no need 516 * to setup anything here. 517 */ 518 return 0; 519 } 520 521 static void lt9611uxc_audio_shutdown(struct device *dev, void *data) 522 { 523 } 524 525 static int lt9611uxc_hdmi_i2s_get_dai_id(struct snd_soc_component *component, 526 struct device_node *endpoint, 527 void *data) 528 { 529 struct of_endpoint of_ep; 530 int ret; 531 532 ret = of_graph_parse_endpoint(endpoint, &of_ep); 533 if (ret < 0) 534 return ret; 535 536 /* 537 * HDMI sound should be located as reg = <2> 538 * Then, it is sound port 0 539 */ 540 if (of_ep.port == 2) 541 return 0; 542 543 return -EINVAL; 544 } 545 546 static const struct hdmi_codec_ops lt9611uxc_codec_ops = { 547 .hw_params = lt9611uxc_hdmi_hw_params, 548 .audio_shutdown = lt9611uxc_audio_shutdown, 549 .get_dai_id = lt9611uxc_hdmi_i2s_get_dai_id, 550 }; 551 552 static int lt9611uxc_audio_init(struct device *dev, struct lt9611uxc *lt9611uxc) 553 { 554 struct hdmi_codec_pdata codec_data = { 555 .ops = <9611uxc_codec_ops, 556 .max_i2s_channels = 2, 557 .i2s = 1, 558 .data = lt9611uxc, 559 }; 560 561 lt9611uxc->audio_pdev = 562 platform_device_register_data(dev, HDMI_CODEC_DRV_NAME, 563 PLATFORM_DEVID_AUTO, 564 &codec_data, sizeof(codec_data)); 565 566 return PTR_ERR_OR_ZERO(lt9611uxc->audio_pdev); 567 } 568 569 static void lt9611uxc_audio_exit(struct lt9611uxc *lt9611uxc) 570 { 571 if (lt9611uxc->audio_pdev) { 572 platform_device_unregister(lt9611uxc->audio_pdev); 573 lt9611uxc->audio_pdev = NULL; 574 } 575 } 576 577 #define LT9611UXC_FW_PAGE_SIZE 32 578 static void lt9611uxc_firmware_write_page(struct lt9611uxc *lt9611uxc, u16 addr, const u8 *buf) 579 { 580 struct reg_sequence seq_write_prepare[] = { 581 REG_SEQ0(0x805a, 0x04), 582 REG_SEQ0(0x805a, 0x00), 583 584 REG_SEQ0(0x805e, 0xdf), 585 REG_SEQ0(0x805a, 0x20), 586 REG_SEQ0(0x805a, 0x00), 587 REG_SEQ0(0x8058, 0x21), 588 }; 589 590 struct reg_sequence seq_write_addr[] = { 591 REG_SEQ0(0x805b, (addr >> 16) & 0xff), 592 REG_SEQ0(0x805c, (addr >> 8) & 0xff), 593 REG_SEQ0(0x805d, addr & 0xff), 594 REG_SEQ0(0x805a, 0x10), 595 REG_SEQ0(0x805a, 0x00), 596 }; 597 598 regmap_write(lt9611uxc->regmap, 0x8108, 0xbf); 599 msleep(20); 600 regmap_write(lt9611uxc->regmap, 0x8108, 0xff); 601 msleep(20); 602 regmap_multi_reg_write(lt9611uxc->regmap, seq_write_prepare, ARRAY_SIZE(seq_write_prepare)); 603 regmap_noinc_write(lt9611uxc->regmap, 0x8059, buf, LT9611UXC_FW_PAGE_SIZE); 604 regmap_multi_reg_write(lt9611uxc->regmap, seq_write_addr, ARRAY_SIZE(seq_write_addr)); 605 msleep(20); 606 } 607 608 static void lt9611uxc_firmware_read_page(struct lt9611uxc *lt9611uxc, u16 addr, char *buf) 609 { 610 struct reg_sequence seq_read_page[] = { 611 REG_SEQ0(0x805a, 0xa0), 612 REG_SEQ0(0x805a, 0x80), 613 REG_SEQ0(0x805b, (addr >> 16) & 0xff), 614 REG_SEQ0(0x805c, (addr >> 8) & 0xff), 615 REG_SEQ0(0x805d, addr & 0xff), 616 REG_SEQ0(0x805a, 0x90), 617 REG_SEQ0(0x805a, 0x80), 618 REG_SEQ0(0x8058, 0x21), 619 }; 620 621 regmap_multi_reg_write(lt9611uxc->regmap, seq_read_page, ARRAY_SIZE(seq_read_page)); 622 regmap_noinc_read(lt9611uxc->regmap, 0x805f, buf, LT9611UXC_FW_PAGE_SIZE); 623 } 624 625 static char *lt9611uxc_firmware_read(struct lt9611uxc *lt9611uxc, size_t size) 626 { 627 struct reg_sequence seq_read_setup[] = { 628 REG_SEQ0(0x805a, 0x84), 629 REG_SEQ0(0x805a, 0x80), 630 }; 631 632 char *readbuf; 633 u16 offset; 634 635 readbuf = kzalloc(ALIGN(size, 32), GFP_KERNEL); 636 if (!readbuf) 637 return NULL; 638 639 regmap_multi_reg_write(lt9611uxc->regmap, seq_read_setup, ARRAY_SIZE(seq_read_setup)); 640 641 for (offset = 0; 642 offset < size; 643 offset += LT9611UXC_FW_PAGE_SIZE) 644 lt9611uxc_firmware_read_page(lt9611uxc, offset, &readbuf[offset]); 645 646 return readbuf; 647 } 648 649 static int lt9611uxc_firmware_update(struct lt9611uxc *lt9611uxc) 650 { 651 int ret; 652 u16 offset; 653 size_t remain; 654 char *readbuf; 655 const struct firmware *fw; 656 657 struct reg_sequence seq_setup[] = { 658 REG_SEQ0(0x805e, 0xdf), 659 REG_SEQ0(0x8058, 0x00), 660 REG_SEQ0(0x8059, 0x50), 661 REG_SEQ0(0x805a, 0x10), 662 REG_SEQ0(0x805a, 0x00), 663 }; 664 665 666 struct reg_sequence seq_block_erase[] = { 667 REG_SEQ0(0x805a, 0x04), 668 REG_SEQ0(0x805a, 0x00), 669 REG_SEQ0(0x805b, 0x00), 670 REG_SEQ0(0x805c, 0x00), 671 REG_SEQ0(0x805d, 0x00), 672 REG_SEQ0(0x805a, 0x01), 673 REG_SEQ0(0x805a, 0x00), 674 }; 675 676 ret = request_firmware(&fw, FW_FILE, lt9611uxc->dev); 677 if (ret < 0) 678 return ret; 679 680 dev_info(lt9611uxc->dev, "Updating firmware\n"); 681 lt9611uxc_lock(lt9611uxc); 682 683 regmap_multi_reg_write(lt9611uxc->regmap, seq_setup, ARRAY_SIZE(seq_setup)); 684 685 /* 686 * Need erase block 2 timess here. Sometimes, block erase can fail. 687 * This is a workaroud. 688 */ 689 regmap_multi_reg_write(lt9611uxc->regmap, seq_block_erase, ARRAY_SIZE(seq_block_erase)); 690 msleep(3000); 691 regmap_multi_reg_write(lt9611uxc->regmap, seq_block_erase, ARRAY_SIZE(seq_block_erase)); 692 msleep(3000); 693 694 for (offset = 0, remain = fw->size; 695 remain >= LT9611UXC_FW_PAGE_SIZE; 696 offset += LT9611UXC_FW_PAGE_SIZE, remain -= LT9611UXC_FW_PAGE_SIZE) 697 lt9611uxc_firmware_write_page(lt9611uxc, offset, fw->data + offset); 698 699 if (remain > 0) { 700 char buf[LT9611UXC_FW_PAGE_SIZE]; 701 702 memset(buf, 0xff, LT9611UXC_FW_PAGE_SIZE); 703 memcpy(buf, fw->data + offset, remain); 704 lt9611uxc_firmware_write_page(lt9611uxc, offset, buf); 705 } 706 msleep(20); 707 708 readbuf = lt9611uxc_firmware_read(lt9611uxc, fw->size); 709 if (!readbuf) { 710 ret = -ENOMEM; 711 goto out; 712 } 713 714 if (!memcmp(readbuf, fw->data, fw->size)) { 715 dev_err(lt9611uxc->dev, "Firmware update failed\n"); 716 print_hex_dump(KERN_ERR, "fw: ", DUMP_PREFIX_OFFSET, 16, 1, readbuf, fw->size, false); 717 ret = -EINVAL; 718 } else { 719 dev_info(lt9611uxc->dev, "Firmware updates successfully\n"); 720 ret = 0; 721 } 722 kfree(readbuf); 723 724 out: 725 lt9611uxc_unlock(lt9611uxc); 726 lt9611uxc_reset(lt9611uxc); 727 release_firmware(fw); 728 729 return ret; 730 } 731 732 static ssize_t lt9611uxc_firmware_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t len) 733 { 734 struct lt9611uxc *lt9611uxc = dev_get_drvdata(dev); 735 int ret; 736 737 ret = lt9611uxc_firmware_update(lt9611uxc); 738 if (ret < 0) 739 return ret; 740 return len; 741 } 742 743 static ssize_t lt9611uxc_firmware_show(struct device *dev, struct device_attribute *attr, char *buf) 744 { 745 struct lt9611uxc *lt9611uxc = dev_get_drvdata(dev); 746 747 return sysfs_emit(buf, "%02x\n", lt9611uxc->fw_version); 748 } 749 750 static DEVICE_ATTR_RW(lt9611uxc_firmware); 751 752 static struct attribute *lt9611uxc_attrs[] = { 753 &dev_attr_lt9611uxc_firmware.attr, 754 NULL, 755 }; 756 757 static const struct attribute_group lt9611uxc_attr_group = { 758 .attrs = lt9611uxc_attrs, 759 }; 760 761 static const struct attribute_group *lt9611uxc_attr_groups[] = { 762 <9611uxc_attr_group, 763 NULL, 764 }; 765 766 static int lt9611uxc_probe(struct i2c_client *client) 767 { 768 struct lt9611uxc *lt9611uxc; 769 struct device *dev = &client->dev; 770 int ret; 771 bool fw_updated = false; 772 773 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { 774 dev_err(dev, "device doesn't support I2C\n"); 775 return -ENODEV; 776 } 777 778 lt9611uxc = devm_drm_bridge_alloc(dev, struct lt9611uxc, bridge, <9611uxc_bridge_funcs); 779 if (IS_ERR(lt9611uxc)) 780 return PTR_ERR(lt9611uxc); 781 782 lt9611uxc->dev = dev; 783 lt9611uxc->client = client; 784 mutex_init(<9611uxc->ocm_lock); 785 786 lt9611uxc->regmap = devm_regmap_init_i2c(client, <9611uxc_regmap_config); 787 if (IS_ERR(lt9611uxc->regmap)) { 788 dev_err(lt9611uxc->dev, "regmap i2c init failed\n"); 789 return PTR_ERR(lt9611uxc->regmap); 790 } 791 792 ret = lt9611uxc_parse_dt(dev, lt9611uxc); 793 if (ret) { 794 dev_err(dev, "failed to parse device tree\n"); 795 return ret; 796 } 797 798 ret = lt9611uxc_gpio_init(lt9611uxc); 799 if (ret < 0) 800 goto err_of_put; 801 802 ret = lt9611uxc_regulator_init(lt9611uxc); 803 if (ret < 0) 804 goto err_of_put; 805 806 lt9611uxc_assert_5v(lt9611uxc); 807 808 ret = lt9611uxc_regulator_enable(lt9611uxc); 809 if (ret) 810 goto err_of_put; 811 812 lt9611uxc_reset(lt9611uxc); 813 814 ret = lt9611uxc_read_device_rev(lt9611uxc); 815 if (ret) { 816 dev_err(dev, "failed to read chip rev\n"); 817 goto err_disable_regulators; 818 } 819 820 retry: 821 ret = lt9611uxc_read_version(lt9611uxc); 822 if (ret < 0) { 823 dev_err(dev, "failed to read FW version\n"); 824 goto err_disable_regulators; 825 } else if (ret == 0) { 826 if (!fw_updated) { 827 fw_updated = true; 828 dev_err(dev, "FW version 0, enforcing firmware update\n"); 829 ret = lt9611uxc_firmware_update(lt9611uxc); 830 if (ret < 0) 831 goto err_disable_regulators; 832 else 833 goto retry; 834 } else { 835 dev_err(dev, "FW version 0, update failed\n"); 836 ret = -EOPNOTSUPP; 837 goto err_disable_regulators; 838 } 839 } else if (ret < 0x40) { 840 dev_info(dev, "FW version 0x%x, HPD not supported\n", ret); 841 } else { 842 lt9611uxc->hpd_supported = true; 843 } 844 lt9611uxc->fw_version = ret; 845 846 init_waitqueue_head(<9611uxc->wq); 847 INIT_WORK(<9611uxc->work, lt9611uxc_hpd_work); 848 849 ret = request_threaded_irq(client->irq, NULL, 850 lt9611uxc_irq_thread_handler, 851 IRQF_ONESHOT, "lt9611uxc", lt9611uxc); 852 if (ret) { 853 dev_err(dev, "failed to request irq\n"); 854 goto err_disable_regulators; 855 } 856 857 i2c_set_clientdata(client, lt9611uxc); 858 859 lt9611uxc->bridge.of_node = client->dev.of_node; 860 lt9611uxc->bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID; 861 if (lt9611uxc->hpd_supported) 862 lt9611uxc->bridge.ops |= DRM_BRIDGE_OP_HPD; 863 lt9611uxc->bridge.type = DRM_MODE_CONNECTOR_HDMIA; 864 865 drm_bridge_add(<9611uxc->bridge); 866 867 /* Attach primary DSI */ 868 lt9611uxc->dsi0 = lt9611uxc_attach_dsi(lt9611uxc, lt9611uxc->dsi0_node); 869 if (IS_ERR(lt9611uxc->dsi0)) { 870 ret = PTR_ERR(lt9611uxc->dsi0); 871 goto err_remove_bridge; 872 } 873 874 /* Attach secondary DSI, if specified */ 875 if (lt9611uxc->dsi1_node) { 876 lt9611uxc->dsi1 = lt9611uxc_attach_dsi(lt9611uxc, lt9611uxc->dsi1_node); 877 if (IS_ERR(lt9611uxc->dsi1)) { 878 ret = PTR_ERR(lt9611uxc->dsi1); 879 goto err_remove_bridge; 880 } 881 } 882 883 ret = lt9611uxc_audio_init(dev, lt9611uxc); 884 if (ret) 885 goto err_remove_bridge; 886 887 return 0; 888 889 err_remove_bridge: 890 free_irq(client->irq, lt9611uxc); 891 cancel_work_sync(<9611uxc->work); 892 drm_bridge_remove(<9611uxc->bridge); 893 894 err_disable_regulators: 895 regulator_bulk_disable(ARRAY_SIZE(lt9611uxc->supplies), lt9611uxc->supplies); 896 897 err_of_put: 898 of_node_put(lt9611uxc->dsi1_node); 899 of_node_put(lt9611uxc->dsi0_node); 900 901 return ret; 902 } 903 904 static void lt9611uxc_remove(struct i2c_client *client) 905 { 906 struct lt9611uxc *lt9611uxc = i2c_get_clientdata(client); 907 908 free_irq(client->irq, lt9611uxc); 909 cancel_work_sync(<9611uxc->work); 910 lt9611uxc_audio_exit(lt9611uxc); 911 drm_bridge_remove(<9611uxc->bridge); 912 913 mutex_destroy(<9611uxc->ocm_lock); 914 915 regulator_bulk_disable(ARRAY_SIZE(lt9611uxc->supplies), lt9611uxc->supplies); 916 917 of_node_put(lt9611uxc->dsi1_node); 918 of_node_put(lt9611uxc->dsi0_node); 919 } 920 921 static const struct i2c_device_id lt9611uxc_id[] = { 922 { "lontium,lt9611uxc" }, 923 { /* sentinel */ } 924 }; 925 926 static const struct of_device_id lt9611uxc_match_table[] = { 927 { .compatible = "lontium,lt9611uxc" }, 928 { /* sentinel */ } 929 }; 930 MODULE_DEVICE_TABLE(of, lt9611uxc_match_table); 931 932 static struct i2c_driver lt9611uxc_driver = { 933 .driver = { 934 .name = "lt9611uxc", 935 .of_match_table = lt9611uxc_match_table, 936 .dev_groups = lt9611uxc_attr_groups, 937 }, 938 .probe = lt9611uxc_probe, 939 .remove = lt9611uxc_remove, 940 .id_table = lt9611uxc_id, 941 }; 942 module_i2c_driver(lt9611uxc_driver); 943 944 MODULE_AUTHOR("Dmitry Baryshkov <dmitry.baryshkov@linaro.org>"); 945 MODULE_DESCRIPTION("Lontium LT9611UXC DSI/HDMI bridge driver"); 946 MODULE_LICENSE("GPL v2"); 947 948 MODULE_FIRMWARE(FW_FILE); 949