xref: /linux/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c (revision fc2d791a43d3880496d1c729b8bd74d2c19cb4e7)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Cadence MHDP8546 DP bridge driver.
4  *
5  * Copyright (C) 2020 Cadence Design Systems, Inc.
6  *
7  * Authors: Quentin Schulz <quentin.schulz@free-electrons.com>
8  *          Swapnil Jakhade <sjakhade@cadence.com>
9  *          Yuti Amonkar <yamonkar@cadence.com>
10  *          Tomi Valkeinen <tomi.valkeinen@ti.com>
11  *          Jyri Sarha <jsarha@ti.com>
12  *
13  * TODO:
14  *     - Implement optimized mailbox communication using mailbox interrupts
15  *     - Add support for power management
16  *     - Add support for features like audio, MST and fast link training
17  *     - Implement request_fw_cancel to handle HW_STATE
18  *     - Fix asynchronous loading of firmware implementation
19  *     - Add DRM helper function for cdns_mhdp_lower_link_rate
20  */
21 
22 #include <linux/clk.h>
23 #include <linux/delay.h>
24 #include <linux/err.h>
25 #include <linux/firmware.h>
26 #include <linux/io.h>
27 #include <linux/iopoll.h>
28 #include <linux/irq.h>
29 #include <linux/media-bus-format.h>
30 #include <linux/module.h>
31 #include <linux/of.h>
32 #include <linux/phy/phy.h>
33 #include <linux/phy/phy-dp.h>
34 #include <linux/platform_device.h>
35 #include <linux/slab.h>
36 #include <linux/wait.h>
37 
38 #include <drm/display/drm_dp_helper.h>
39 #include <drm/display/drm_hdcp_helper.h>
40 #include <drm/drm_atomic.h>
41 #include <drm/drm_atomic_helper.h>
42 #include <drm/drm_atomic_state_helper.h>
43 #include <drm/drm_bridge.h>
44 #include <drm/drm_connector.h>
45 #include <drm/drm_edid.h>
46 #include <drm/drm_modeset_helper_vtables.h>
47 #include <drm/drm_print.h>
48 #include <drm/drm_probe_helper.h>
49 
50 #include <linux/unaligned.h>
51 
52 #include "cdns-mhdp8546-core.h"
53 #include "cdns-mhdp8546-hdcp.h"
54 #include "cdns-mhdp8546-j721e.h"
55 
56 static void cdns_mhdp_bridge_hpd_enable(struct drm_bridge *bridge)
57 {
58 	struct cdns_mhdp_device *mhdp = bridge_to_mhdp(bridge);
59 
60 	/* Enable SW event interrupts */
61 	if (mhdp->bridge_attached)
62 		writel(readl(mhdp->regs + CDNS_APB_INT_MASK) &
63 		       ~CDNS_APB_INT_MASK_SW_EVENT_INT,
64 		       mhdp->regs + CDNS_APB_INT_MASK);
65 }
66 
67 static void cdns_mhdp_bridge_hpd_disable(struct drm_bridge *bridge)
68 {
69 	struct cdns_mhdp_device *mhdp = bridge_to_mhdp(bridge);
70 
71 	writel(readl(mhdp->regs + CDNS_APB_INT_MASK) |
72 	       CDNS_APB_INT_MASK_SW_EVENT_INT,
73 	       mhdp->regs + CDNS_APB_INT_MASK);
74 }
75 
76 static int cdns_mhdp_mailbox_read(struct cdns_mhdp_device *mhdp)
77 {
78 	int ret, empty;
79 
80 	WARN_ON(!mutex_is_locked(&mhdp->mbox_mutex));
81 
82 	ret = readx_poll_timeout(readl, mhdp->regs + CDNS_MAILBOX_EMPTY,
83 				 empty, !empty, MAILBOX_RETRY_US,
84 				 MAILBOX_TIMEOUT_US);
85 	if (ret < 0)
86 		return ret;
87 
88 	return readl(mhdp->regs + CDNS_MAILBOX_RX_DATA) & 0xff;
89 }
90 
91 static int cdns_mhdp_mailbox_write(struct cdns_mhdp_device *mhdp, u8 val)
92 {
93 	int ret, full;
94 
95 	WARN_ON(!mutex_is_locked(&mhdp->mbox_mutex));
96 
97 	ret = readx_poll_timeout(readl, mhdp->regs + CDNS_MAILBOX_FULL,
98 				 full, !full, MAILBOX_RETRY_US,
99 				 MAILBOX_TIMEOUT_US);
100 	if (ret < 0)
101 		return ret;
102 
103 	writel(val, mhdp->regs + CDNS_MAILBOX_TX_DATA);
104 
105 	return 0;
106 }
107 
108 static int cdns_mhdp_mailbox_recv_header(struct cdns_mhdp_device *mhdp,
109 					 u8 module_id, u8 opcode,
110 					 u16 req_size)
111 {
112 	u32 mbox_size, i;
113 	u8 header[4];
114 	int ret;
115 
116 	/* read the header of the message */
117 	for (i = 0; i < sizeof(header); i++) {
118 		ret = cdns_mhdp_mailbox_read(mhdp);
119 		if (ret < 0)
120 			return ret;
121 
122 		header[i] = ret;
123 	}
124 
125 	mbox_size = get_unaligned_be16(header + 2);
126 
127 	if (opcode != header[0] || module_id != header[1] ||
128 	    req_size != mbox_size) {
129 		/*
130 		 * If the message in mailbox is not what we want, we need to
131 		 * clear the mailbox by reading its contents.
132 		 */
133 		for (i = 0; i < mbox_size; i++)
134 			if (cdns_mhdp_mailbox_read(mhdp) < 0)
135 				break;
136 
137 		return -EINVAL;
138 	}
139 
140 	return 0;
141 }
142 
143 static int cdns_mhdp_mailbox_recv_data(struct cdns_mhdp_device *mhdp,
144 				       u8 *buff, u16 buff_size)
145 {
146 	u32 i;
147 	int ret;
148 
149 	for (i = 0; i < buff_size; i++) {
150 		ret = cdns_mhdp_mailbox_read(mhdp);
151 		if (ret < 0)
152 			return ret;
153 
154 		buff[i] = ret;
155 	}
156 
157 	return 0;
158 }
159 
160 static int cdns_mhdp_mailbox_send(struct cdns_mhdp_device *mhdp, u8 module_id,
161 				  u8 opcode, u16 size, u8 *message)
162 {
163 	u8 header[4];
164 	int ret, i;
165 
166 	header[0] = opcode;
167 	header[1] = module_id;
168 	put_unaligned_be16(size, header + 2);
169 
170 	for (i = 0; i < sizeof(header); i++) {
171 		ret = cdns_mhdp_mailbox_write(mhdp, header[i]);
172 		if (ret)
173 			return ret;
174 	}
175 
176 	for (i = 0; i < size; i++) {
177 		ret = cdns_mhdp_mailbox_write(mhdp, message[i]);
178 		if (ret)
179 			return ret;
180 	}
181 
182 	return 0;
183 }
184 
185 static
186 int cdns_mhdp_reg_read(struct cdns_mhdp_device *mhdp, u32 addr, u32 *value)
187 {
188 	u8 msg[4], resp[8];
189 	int ret;
190 
191 	put_unaligned_be32(addr, msg);
192 
193 	mutex_lock(&mhdp->mbox_mutex);
194 
195 	ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_GENERAL,
196 				     GENERAL_REGISTER_READ,
197 				     sizeof(msg), msg);
198 	if (ret)
199 		goto out;
200 
201 	ret = cdns_mhdp_mailbox_recv_header(mhdp, MB_MODULE_ID_GENERAL,
202 					    GENERAL_REGISTER_READ,
203 					    sizeof(resp));
204 	if (ret)
205 		goto out;
206 
207 	ret = cdns_mhdp_mailbox_recv_data(mhdp, resp, sizeof(resp));
208 	if (ret)
209 		goto out;
210 
211 	/* Returned address value should be the same as requested */
212 	if (memcmp(msg, resp, sizeof(msg))) {
213 		ret = -EINVAL;
214 		goto out;
215 	}
216 
217 	*value = get_unaligned_be32(resp + 4);
218 
219 out:
220 	mutex_unlock(&mhdp->mbox_mutex);
221 	if (ret) {
222 		dev_err(mhdp->dev, "Failed to read register\n");
223 		*value = 0;
224 	}
225 
226 	return ret;
227 }
228 
229 static
230 int cdns_mhdp_reg_write(struct cdns_mhdp_device *mhdp, u16 addr, u32 val)
231 {
232 	u8 msg[6];
233 	int ret;
234 
235 	put_unaligned_be16(addr, msg);
236 	put_unaligned_be32(val, msg + 2);
237 
238 	mutex_lock(&mhdp->mbox_mutex);
239 
240 	ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX,
241 				     DPTX_WRITE_REGISTER, sizeof(msg), msg);
242 
243 	mutex_unlock(&mhdp->mbox_mutex);
244 
245 	return ret;
246 }
247 
248 static
249 int cdns_mhdp_reg_write_bit(struct cdns_mhdp_device *mhdp, u16 addr,
250 			    u8 start_bit, u8 bits_no, u32 val)
251 {
252 	u8 field[8];
253 	int ret;
254 
255 	put_unaligned_be16(addr, field);
256 	field[2] = start_bit;
257 	field[3] = bits_no;
258 	put_unaligned_be32(val, field + 4);
259 
260 	mutex_lock(&mhdp->mbox_mutex);
261 
262 	ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX,
263 				     DPTX_WRITE_FIELD, sizeof(field), field);
264 
265 	mutex_unlock(&mhdp->mbox_mutex);
266 
267 	return ret;
268 }
269 
270 static
271 int cdns_mhdp_dpcd_read(struct cdns_mhdp_device *mhdp,
272 			u32 addr, u8 *data, u16 len)
273 {
274 	u8 msg[5], reg[5];
275 	int ret;
276 
277 	put_unaligned_be16(len, msg);
278 	put_unaligned_be24(addr, msg + 2);
279 
280 	mutex_lock(&mhdp->mbox_mutex);
281 
282 	ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX,
283 				     DPTX_READ_DPCD, sizeof(msg), msg);
284 	if (ret)
285 		goto out;
286 
287 	ret = cdns_mhdp_mailbox_recv_header(mhdp, MB_MODULE_ID_DP_TX,
288 					    DPTX_READ_DPCD,
289 					    sizeof(reg) + len);
290 	if (ret)
291 		goto out;
292 
293 	ret = cdns_mhdp_mailbox_recv_data(mhdp, reg, sizeof(reg));
294 	if (ret)
295 		goto out;
296 
297 	ret = cdns_mhdp_mailbox_recv_data(mhdp, data, len);
298 
299 out:
300 	mutex_unlock(&mhdp->mbox_mutex);
301 
302 	return ret;
303 }
304 
305 static
306 int cdns_mhdp_dpcd_write(struct cdns_mhdp_device *mhdp, u32 addr, u8 value)
307 {
308 	u8 msg[6], reg[5];
309 	int ret;
310 
311 	put_unaligned_be16(1, msg);
312 	put_unaligned_be24(addr, msg + 2);
313 	msg[5] = value;
314 
315 	mutex_lock(&mhdp->mbox_mutex);
316 
317 	ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX,
318 				     DPTX_WRITE_DPCD, sizeof(msg), msg);
319 	if (ret)
320 		goto out;
321 
322 	ret = cdns_mhdp_mailbox_recv_header(mhdp, MB_MODULE_ID_DP_TX,
323 					    DPTX_WRITE_DPCD, sizeof(reg));
324 	if (ret)
325 		goto out;
326 
327 	ret = cdns_mhdp_mailbox_recv_data(mhdp, reg, sizeof(reg));
328 	if (ret)
329 		goto out;
330 
331 	if (addr != get_unaligned_be24(reg + 2))
332 		ret = -EINVAL;
333 
334 out:
335 	mutex_unlock(&mhdp->mbox_mutex);
336 
337 	if (ret)
338 		dev_err(mhdp->dev, "dpcd write failed: %d\n", ret);
339 	return ret;
340 }
341 
342 static
343 int cdns_mhdp_set_firmware_active(struct cdns_mhdp_device *mhdp, bool enable)
344 {
345 	u8 msg[5];
346 	int ret, i;
347 
348 	msg[0] = GENERAL_MAIN_CONTROL;
349 	msg[1] = MB_MODULE_ID_GENERAL;
350 	msg[2] = 0;
351 	msg[3] = 1;
352 	msg[4] = enable ? FW_ACTIVE : FW_STANDBY;
353 
354 	mutex_lock(&mhdp->mbox_mutex);
355 
356 	for (i = 0; i < sizeof(msg); i++) {
357 		ret = cdns_mhdp_mailbox_write(mhdp, msg[i]);
358 		if (ret)
359 			goto out;
360 	}
361 
362 	/* read the firmware state */
363 	ret = cdns_mhdp_mailbox_recv_data(mhdp, msg, sizeof(msg));
364 	if (ret)
365 		goto out;
366 
367 	ret = 0;
368 
369 out:
370 	mutex_unlock(&mhdp->mbox_mutex);
371 
372 	if (ret < 0)
373 		dev_err(mhdp->dev, "set firmware active failed\n");
374 	return ret;
375 }
376 
377 static
378 int cdns_mhdp_get_hpd_status(struct cdns_mhdp_device *mhdp)
379 {
380 	u8 status;
381 	int ret;
382 
383 	mutex_lock(&mhdp->mbox_mutex);
384 
385 	ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX,
386 				     DPTX_HPD_STATE, 0, NULL);
387 	if (ret)
388 		goto err_get_hpd;
389 
390 	ret = cdns_mhdp_mailbox_recv_header(mhdp, MB_MODULE_ID_DP_TX,
391 					    DPTX_HPD_STATE,
392 					    sizeof(status));
393 	if (ret)
394 		goto err_get_hpd;
395 
396 	ret = cdns_mhdp_mailbox_recv_data(mhdp, &status, sizeof(status));
397 	if (ret)
398 		goto err_get_hpd;
399 
400 	mutex_unlock(&mhdp->mbox_mutex);
401 
402 	dev_dbg(mhdp->dev, "%s: HPD %splugged\n", __func__,
403 		status ? "" : "un");
404 
405 	return status;
406 
407 err_get_hpd:
408 	mutex_unlock(&mhdp->mbox_mutex);
409 
410 	return ret;
411 }
412 
413 static
414 int cdns_mhdp_get_edid_block(void *data, u8 *edid,
415 			     unsigned int block, size_t length)
416 {
417 	struct cdns_mhdp_device *mhdp = data;
418 	u8 msg[2], reg[2], i;
419 	int ret;
420 
421 	mutex_lock(&mhdp->mbox_mutex);
422 
423 	for (i = 0; i < 4; i++) {
424 		msg[0] = block / 2;
425 		msg[1] = block % 2;
426 
427 		ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX,
428 					     DPTX_GET_EDID, sizeof(msg), msg);
429 		if (ret)
430 			continue;
431 
432 		ret = cdns_mhdp_mailbox_recv_header(mhdp, MB_MODULE_ID_DP_TX,
433 						    DPTX_GET_EDID,
434 						    sizeof(reg) + length);
435 		if (ret)
436 			continue;
437 
438 		ret = cdns_mhdp_mailbox_recv_data(mhdp, reg, sizeof(reg));
439 		if (ret)
440 			continue;
441 
442 		ret = cdns_mhdp_mailbox_recv_data(mhdp, edid, length);
443 		if (ret)
444 			continue;
445 
446 		if (reg[0] == length && reg[1] == block / 2)
447 			break;
448 	}
449 
450 	mutex_unlock(&mhdp->mbox_mutex);
451 
452 	if (ret)
453 		dev_err(mhdp->dev, "get block[%d] edid failed: %d\n",
454 			block, ret);
455 
456 	return ret;
457 }
458 
459 static
460 int cdns_mhdp_read_hpd_event(struct cdns_mhdp_device *mhdp)
461 {
462 	u8 event = 0;
463 	int ret;
464 
465 	mutex_lock(&mhdp->mbox_mutex);
466 
467 	ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX,
468 				     DPTX_READ_EVENT, 0, NULL);
469 	if (ret)
470 		goto out;
471 
472 	ret = cdns_mhdp_mailbox_recv_header(mhdp, MB_MODULE_ID_DP_TX,
473 					    DPTX_READ_EVENT, sizeof(event));
474 	if (ret < 0)
475 		goto out;
476 
477 	ret = cdns_mhdp_mailbox_recv_data(mhdp, &event, sizeof(event));
478 out:
479 	mutex_unlock(&mhdp->mbox_mutex);
480 
481 	if (ret < 0)
482 		return ret;
483 
484 	dev_dbg(mhdp->dev, "%s: %s%s%s%s\n", __func__,
485 		(event & DPTX_READ_EVENT_HPD_TO_HIGH) ? "TO_HIGH " : "",
486 		(event & DPTX_READ_EVENT_HPD_TO_LOW) ? "TO_LOW " : "",
487 		(event & DPTX_READ_EVENT_HPD_PULSE) ? "PULSE " : "",
488 		(event & DPTX_READ_EVENT_HPD_STATE) ? "HPD_STATE " : "");
489 
490 	return event;
491 }
492 
493 static
494 int cdns_mhdp_adjust_lt(struct cdns_mhdp_device *mhdp, unsigned int nlanes,
495 			unsigned int udelay, const u8 *lanes_data,
496 			u8 link_status[DP_LINK_STATUS_SIZE])
497 {
498 	u8 payload[7];
499 	u8 hdr[5]; /* For DPCD read response header */
500 	u32 addr;
501 	int ret;
502 
503 	if (nlanes != 4 && nlanes != 2 && nlanes != 1) {
504 		dev_err(mhdp->dev, "invalid number of lanes: %u\n", nlanes);
505 		ret = -EINVAL;
506 		goto out;
507 	}
508 
509 	payload[0] = nlanes;
510 	put_unaligned_be16(udelay, payload + 1);
511 	memcpy(payload + 3, lanes_data, nlanes);
512 
513 	mutex_lock(&mhdp->mbox_mutex);
514 
515 	ret = cdns_mhdp_mailbox_send(mhdp, MB_MODULE_ID_DP_TX,
516 				     DPTX_ADJUST_LT,
517 				     sizeof(payload), payload);
518 	if (ret)
519 		goto out;
520 
521 	/* Yes, read the DPCD read command response */
522 	ret = cdns_mhdp_mailbox_recv_header(mhdp, MB_MODULE_ID_DP_TX,
523 					    DPTX_READ_DPCD,
524 					    sizeof(hdr) + DP_LINK_STATUS_SIZE);
525 	if (ret)
526 		goto out;
527 
528 	ret = cdns_mhdp_mailbox_recv_data(mhdp, hdr, sizeof(hdr));
529 	if (ret)
530 		goto out;
531 
532 	addr = get_unaligned_be24(hdr + 2);
533 	if (addr != DP_LANE0_1_STATUS)
534 		goto out;
535 
536 	ret = cdns_mhdp_mailbox_recv_data(mhdp, link_status,
537 					  DP_LINK_STATUS_SIZE);
538 
539 out:
540 	mutex_unlock(&mhdp->mbox_mutex);
541 
542 	if (ret)
543 		dev_err(mhdp->dev, "Failed to adjust Link Training.\n");
544 
545 	return ret;
546 }
547 
548 /**
549  * cdns_mhdp_link_configure() - configure a DisplayPort link
550  * @aux: DisplayPort AUX channel
551  * @link: pointer to a structure containing the link configuration
552  *
553  * Returns 0 on success or a negative error code on failure.
554  */
555 static
556 int cdns_mhdp_link_configure(struct drm_dp_aux *aux,
557 			     struct cdns_mhdp_link *link)
558 {
559 	u8 values[2];
560 	int err;
561 
562 	values[0] = drm_dp_link_rate_to_bw_code(link->rate);
563 	values[1] = link->num_lanes;
564 
565 	if (link->capabilities & DP_LINK_CAP_ENHANCED_FRAMING)
566 		values[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN;
567 
568 	err = drm_dp_dpcd_write(aux, DP_LINK_BW_SET, values, sizeof(values));
569 	if (err < 0)
570 		return err;
571 
572 	return 0;
573 }
574 
575 static unsigned int cdns_mhdp_max_link_rate(struct cdns_mhdp_device *mhdp)
576 {
577 	return min(mhdp->host.link_rate, mhdp->sink.link_rate);
578 }
579 
580 static u8 cdns_mhdp_max_num_lanes(struct cdns_mhdp_device *mhdp)
581 {
582 	return min(mhdp->sink.lanes_cnt, mhdp->host.lanes_cnt);
583 }
584 
585 static u8 cdns_mhdp_eq_training_pattern_supported(struct cdns_mhdp_device *mhdp)
586 {
587 	return fls(mhdp->host.pattern_supp & mhdp->sink.pattern_supp);
588 }
589 
590 static bool cdns_mhdp_get_ssc_supported(struct cdns_mhdp_device *mhdp)
591 {
592 	/* Check if SSC is supported by both sides */
593 	return mhdp->host.ssc && mhdp->sink.ssc;
594 }
595 
596 static enum drm_connector_status cdns_mhdp_detect(struct cdns_mhdp_device *mhdp)
597 {
598 	dev_dbg(mhdp->dev, "%s: %d\n", __func__, mhdp->plugged);
599 
600 	if (mhdp->plugged)
601 		return connector_status_connected;
602 	else
603 		return connector_status_disconnected;
604 }
605 
606 static int cdns_mhdp_check_fw_version(struct cdns_mhdp_device *mhdp)
607 {
608 	u32 major_num, minor_num, revision;
609 	u32 fw_ver, lib_ver;
610 
611 	fw_ver = (readl(mhdp->regs + CDNS_VER_H) << 8)
612 	       | readl(mhdp->regs + CDNS_VER_L);
613 
614 	lib_ver = (readl(mhdp->regs + CDNS_LIB_H_ADDR) << 8)
615 		| readl(mhdp->regs + CDNS_LIB_L_ADDR);
616 
617 	if (lib_ver < 33984) {
618 		/*
619 		 * Older FW versions with major number 1, used to store FW
620 		 * version information by storing repository revision number
621 		 * in registers. This is for identifying these FW versions.
622 		 */
623 		major_num = 1;
624 		minor_num = 2;
625 		if (fw_ver == 26098) {
626 			revision = 15;
627 		} else if (lib_ver == 0 && fw_ver == 0) {
628 			revision = 17;
629 		} else {
630 			dev_err(mhdp->dev, "Unsupported FW version: fw_ver = %u, lib_ver = %u\n",
631 				fw_ver, lib_ver);
632 			return -ENODEV;
633 		}
634 	} else {
635 		/* To identify newer FW versions with major number 2 onwards. */
636 		major_num = fw_ver / 10000;
637 		minor_num = (fw_ver / 100) % 100;
638 		revision = (fw_ver % 10000) % 100;
639 	}
640 
641 	dev_dbg(mhdp->dev, "FW version: v%u.%u.%u\n", major_num, minor_num,
642 		revision);
643 	return 0;
644 }
645 
646 static int cdns_mhdp_fw_activate(const struct firmware *fw,
647 				 struct cdns_mhdp_device *mhdp)
648 {
649 	unsigned int reg;
650 	int ret;
651 
652 	/* Release uCPU reset and stall it. */
653 	writel(CDNS_CPU_STALL, mhdp->regs + CDNS_APB_CTRL);
654 
655 	memcpy_toio(mhdp->regs + CDNS_MHDP_IMEM, fw->data, fw->size);
656 
657 	/* Leave debug mode, release stall */
658 	writel(0, mhdp->regs + CDNS_APB_CTRL);
659 
660 	/*
661 	 * Wait for the KEEP_ALIVE "message" on the first 8 bits.
662 	 * Updated each sched "tick" (~2ms)
663 	 */
664 	ret = readl_poll_timeout(mhdp->regs + CDNS_KEEP_ALIVE, reg,
665 				 reg & CDNS_KEEP_ALIVE_MASK, 500,
666 				 CDNS_KEEP_ALIVE_TIMEOUT);
667 	if (ret) {
668 		dev_err(mhdp->dev,
669 			"device didn't give any life sign: reg %d\n", reg);
670 		return ret;
671 	}
672 
673 	ret = cdns_mhdp_check_fw_version(mhdp);
674 	if (ret)
675 		return ret;
676 
677 	/* Init events to 0 as it's not cleared by FW at boot but on read */
678 	readl(mhdp->regs + CDNS_SW_EVENT0);
679 	readl(mhdp->regs + CDNS_SW_EVENT1);
680 	readl(mhdp->regs + CDNS_SW_EVENT2);
681 	readl(mhdp->regs + CDNS_SW_EVENT3);
682 
683 	/* Activate uCPU */
684 	ret = cdns_mhdp_set_firmware_active(mhdp, true);
685 	if (ret)
686 		return ret;
687 
688 	spin_lock(&mhdp->start_lock);
689 
690 	mhdp->hw_state = MHDP_HW_READY;
691 
692 	/*
693 	 * Here we must keep the lock while enabling the interrupts
694 	 * since it would otherwise be possible that interrupt enable
695 	 * code is executed after the bridge is detached. The similar
696 	 * situation is not possible in attach()/detach() callbacks
697 	 * since the hw_state changes from MHDP_HW_READY to
698 	 * MHDP_HW_STOPPED happens only due to driver removal when
699 	 * bridge should already be detached.
700 	 */
701 	cdns_mhdp_bridge_hpd_enable(&mhdp->bridge);
702 
703 	spin_unlock(&mhdp->start_lock);
704 
705 	wake_up(&mhdp->fw_load_wq);
706 	dev_dbg(mhdp->dev, "DP FW activated\n");
707 
708 	return 0;
709 }
710 
711 static void cdns_mhdp_fw_cb(const struct firmware *fw, void *context)
712 {
713 	struct cdns_mhdp_device *mhdp = context;
714 	bool bridge_attached;
715 	int ret;
716 
717 	dev_dbg(mhdp->dev, "firmware callback\n");
718 
719 	if (!fw || !fw->data) {
720 		dev_err(mhdp->dev, "%s: No firmware.\n", __func__);
721 		return;
722 	}
723 
724 	ret = cdns_mhdp_fw_activate(fw, mhdp);
725 
726 	release_firmware(fw);
727 
728 	if (ret)
729 		return;
730 
731 	/*
732 	 *  XXX how to make sure the bridge is still attached when
733 	 *      calling drm_kms_helper_hotplug_event() after releasing
734 	 *      the lock? We should not hold the spin lock when
735 	 *      calling drm_kms_helper_hotplug_event() since it may
736 	 *      cause a dead lock. FB-dev console calls detect from the
737 	 *      same thread just down the call stack started here.
738 	 */
739 	spin_lock(&mhdp->start_lock);
740 	bridge_attached = mhdp->bridge_attached;
741 	spin_unlock(&mhdp->start_lock);
742 	if (bridge_attached)
743 		drm_bridge_hpd_notify(&mhdp->bridge, cdns_mhdp_detect(mhdp));
744 }
745 
746 static int cdns_mhdp_load_firmware(struct cdns_mhdp_device *mhdp)
747 {
748 	int ret;
749 
750 	ret = request_firmware_nowait(THIS_MODULE, true, FW_NAME, mhdp->dev,
751 				      GFP_KERNEL, mhdp, cdns_mhdp_fw_cb);
752 	if (ret) {
753 		dev_err(mhdp->dev, "failed to load firmware (%s), ret: %d\n",
754 			FW_NAME, ret);
755 		return ret;
756 	}
757 
758 	return 0;
759 }
760 
761 static ssize_t cdns_mhdp_transfer(struct drm_dp_aux *aux,
762 				  struct drm_dp_aux_msg *msg)
763 {
764 	struct cdns_mhdp_device *mhdp = dev_get_drvdata(aux->dev);
765 	int ret;
766 
767 	if (msg->request != DP_AUX_NATIVE_WRITE &&
768 	    msg->request != DP_AUX_NATIVE_READ)
769 		return -EOPNOTSUPP;
770 
771 	if (msg->request == DP_AUX_NATIVE_WRITE) {
772 		const u8 *buf = msg->buffer;
773 		unsigned int i;
774 
775 		for (i = 0; i < msg->size; ++i) {
776 			ret = cdns_mhdp_dpcd_write(mhdp,
777 						   msg->address + i, buf[i]);
778 			if (!ret)
779 				continue;
780 
781 			dev_dbg(mhdp->dev,
782 				"Failed to write DPCD addr %u\n",
783 				msg->address + i);
784 
785 			return ret;
786 		}
787 	} else {
788 		ret = cdns_mhdp_dpcd_read(mhdp, msg->address,
789 					  msg->buffer, msg->size);
790 		if (ret) {
791 			dev_dbg(mhdp->dev,
792 				"Failed to read DPCD addr %u\n",
793 				msg->address);
794 
795 			return ret;
796 		}
797 	}
798 
799 	return msg->size;
800 }
801 
802 static int cdns_mhdp_link_training_init(struct cdns_mhdp_device *mhdp)
803 {
804 	union phy_configure_opts phy_cfg;
805 	u32 reg32;
806 	int ret;
807 
808 	drm_dp_dpcd_writeb(&mhdp->aux, DP_TRAINING_PATTERN_SET,
809 			   DP_TRAINING_PATTERN_DISABLE);
810 
811 	/* Reset PHY configuration */
812 	reg32 = CDNS_PHY_COMMON_CONFIG | CDNS_PHY_TRAINING_TYPE(1);
813 	if (!mhdp->host.scrambler)
814 		reg32 |= CDNS_PHY_SCRAMBLER_BYPASS;
815 
816 	cdns_mhdp_reg_write(mhdp, CDNS_DPTX_PHY_CONFIG, reg32);
817 
818 	cdns_mhdp_reg_write(mhdp, CDNS_DP_ENHNCD,
819 			    mhdp->sink.enhanced & mhdp->host.enhanced);
820 
821 	cdns_mhdp_reg_write(mhdp, CDNS_DP_LANE_EN,
822 			    CDNS_DP_LANE_EN_LANES(mhdp->link.num_lanes));
823 
824 	cdns_mhdp_link_configure(&mhdp->aux, &mhdp->link);
825 	phy_cfg.dp.link_rate = mhdp->link.rate / 100;
826 	phy_cfg.dp.lanes = mhdp->link.num_lanes;
827 
828 	memset(phy_cfg.dp.voltage, 0, sizeof(phy_cfg.dp.voltage));
829 	memset(phy_cfg.dp.pre, 0, sizeof(phy_cfg.dp.pre));
830 
831 	phy_cfg.dp.ssc = cdns_mhdp_get_ssc_supported(mhdp);
832 	phy_cfg.dp.set_lanes = true;
833 	phy_cfg.dp.set_rate = true;
834 	phy_cfg.dp.set_voltages = true;
835 	ret = phy_configure(mhdp->phy,  &phy_cfg);
836 	if (ret) {
837 		dev_err(mhdp->dev, "%s: phy_configure() failed: %d\n",
838 			__func__, ret);
839 		return ret;
840 	}
841 
842 	cdns_mhdp_reg_write(mhdp, CDNS_DPTX_PHY_CONFIG,
843 			    CDNS_PHY_COMMON_CONFIG |
844 			    CDNS_PHY_TRAINING_EN |
845 			    CDNS_PHY_TRAINING_TYPE(1) |
846 			    CDNS_PHY_SCRAMBLER_BYPASS);
847 
848 	drm_dp_dpcd_writeb(&mhdp->aux, DP_TRAINING_PATTERN_SET,
849 			   DP_TRAINING_PATTERN_1 | DP_LINK_SCRAMBLING_DISABLE);
850 
851 	return 0;
852 }
853 
854 static void cdns_mhdp_get_adjust_train(struct cdns_mhdp_device *mhdp,
855 				       u8 link_status[DP_LINK_STATUS_SIZE],
856 				       u8 lanes_data[CDNS_DP_MAX_NUM_LANES],
857 				       union phy_configure_opts *phy_cfg)
858 {
859 	u8 adjust, max_pre_emph, max_volt_swing;
860 	u8 set_volt, set_pre;
861 	unsigned int i;
862 
863 	max_pre_emph = CDNS_PRE_EMPHASIS(mhdp->host.pre_emphasis)
864 			   << DP_TRAIN_PRE_EMPHASIS_SHIFT;
865 	max_volt_swing = CDNS_VOLT_SWING(mhdp->host.volt_swing);
866 
867 	for (i = 0; i < mhdp->link.num_lanes; i++) {
868 		/* Check if Voltage swing and pre-emphasis are within limits */
869 		adjust = drm_dp_get_adjust_request_voltage(link_status, i);
870 		set_volt = min(adjust, max_volt_swing);
871 
872 		adjust = drm_dp_get_adjust_request_pre_emphasis(link_status, i);
873 		set_pre = min(adjust, max_pre_emph)
874 			  >> DP_TRAIN_PRE_EMPHASIS_SHIFT;
875 
876 		/*
877 		 * Voltage swing level and pre-emphasis level combination is
878 		 * not allowed: leaving pre-emphasis as-is, and adjusting
879 		 * voltage swing.
880 		 */
881 		if (set_volt + set_pre > 3)
882 			set_volt = 3 - set_pre;
883 
884 		phy_cfg->dp.voltage[i] = set_volt;
885 		lanes_data[i] = set_volt;
886 
887 		if (set_volt == max_volt_swing)
888 			lanes_data[i] |= DP_TRAIN_MAX_SWING_REACHED;
889 
890 		phy_cfg->dp.pre[i] = set_pre;
891 		lanes_data[i] |= (set_pre << DP_TRAIN_PRE_EMPHASIS_SHIFT);
892 
893 		if (set_pre == (max_pre_emph >> DP_TRAIN_PRE_EMPHASIS_SHIFT))
894 			lanes_data[i] |= DP_TRAIN_MAX_PRE_EMPHASIS_REACHED;
895 	}
896 }
897 
898 static
899 void cdns_mhdp_set_adjust_request_voltage(u8 link_status[DP_LINK_STATUS_SIZE],
900 					  unsigned int lane, u8 volt)
901 {
902 	unsigned int s = ((lane & 1) ?
903 			  DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT :
904 			  DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT);
905 	unsigned int idx = DP_ADJUST_REQUEST_LANE0_1 - DP_LANE0_1_STATUS + (lane >> 1);
906 
907 	link_status[idx] &= ~(DP_ADJUST_VOLTAGE_SWING_LANE0_MASK << s);
908 	link_status[idx] |= volt << s;
909 }
910 
911 static
912 void cdns_mhdp_set_adjust_request_pre_emphasis(u8 link_status[DP_LINK_STATUS_SIZE],
913 					       unsigned int lane, u8 pre_emphasis)
914 {
915 	unsigned int s = ((lane & 1) ?
916 			  DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT :
917 			  DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT);
918 	unsigned int idx = DP_ADJUST_REQUEST_LANE0_1 - DP_LANE0_1_STATUS + (lane >> 1);
919 
920 	link_status[idx] &= ~(DP_ADJUST_PRE_EMPHASIS_LANE0_MASK << s);
921 	link_status[idx] |= pre_emphasis << s;
922 }
923 
924 static void cdns_mhdp_adjust_requested_eq(struct cdns_mhdp_device *mhdp,
925 					  u8 link_status[DP_LINK_STATUS_SIZE])
926 {
927 	u8 max_pre = CDNS_PRE_EMPHASIS(mhdp->host.pre_emphasis);
928 	u8 max_volt = CDNS_VOLT_SWING(mhdp->host.volt_swing);
929 	unsigned int i;
930 	u8 volt, pre;
931 
932 	for (i = 0; i < mhdp->link.num_lanes; i++) {
933 		volt = drm_dp_get_adjust_request_voltage(link_status, i);
934 		pre = drm_dp_get_adjust_request_pre_emphasis(link_status, i);
935 		if (volt + pre > 3)
936 			cdns_mhdp_set_adjust_request_voltage(link_status, i,
937 							     3 - pre);
938 		if (mhdp->host.volt_swing & CDNS_FORCE_VOLT_SWING)
939 			cdns_mhdp_set_adjust_request_voltage(link_status, i,
940 							     max_volt);
941 		if (mhdp->host.pre_emphasis & CDNS_FORCE_PRE_EMPHASIS)
942 			cdns_mhdp_set_adjust_request_pre_emphasis(link_status,
943 								  i, max_pre);
944 	}
945 }
946 
947 static void cdns_mhdp_print_lt_status(const char *prefix,
948 				      struct cdns_mhdp_device *mhdp,
949 				      union phy_configure_opts *phy_cfg)
950 {
951 	char vs[8] = "0/0/0/0";
952 	char pe[8] = "0/0/0/0";
953 	unsigned int i;
954 
955 	for (i = 0; i < mhdp->link.num_lanes; i++) {
956 		vs[i * 2] = '0' + phy_cfg->dp.voltage[i];
957 		pe[i * 2] = '0' + phy_cfg->dp.pre[i];
958 	}
959 
960 	vs[i * 2 - 1] = '\0';
961 	pe[i * 2 - 1] = '\0';
962 
963 	dev_dbg(mhdp->dev, "%s, %u lanes, %u Mbps, vs %s, pe %s\n",
964 		prefix,
965 		mhdp->link.num_lanes, mhdp->link.rate / 100,
966 		vs, pe);
967 }
968 
969 static bool cdns_mhdp_link_training_channel_eq(struct cdns_mhdp_device *mhdp,
970 					       u8 eq_tps,
971 					       unsigned int training_interval)
972 {
973 	u8 lanes_data[CDNS_DP_MAX_NUM_LANES], fail_counter_short = 0;
974 	u8 link_status[DP_LINK_STATUS_SIZE];
975 	union phy_configure_opts phy_cfg;
976 	u32 reg32;
977 	int ret;
978 	bool r;
979 
980 	dev_dbg(mhdp->dev, "Starting EQ phase\n");
981 
982 	/* Enable link training TPS[eq_tps] in PHY */
983 	reg32 = CDNS_PHY_COMMON_CONFIG | CDNS_PHY_TRAINING_EN |
984 		CDNS_PHY_TRAINING_TYPE(eq_tps);
985 	if (eq_tps != 4)
986 		reg32 |= CDNS_PHY_SCRAMBLER_BYPASS;
987 	cdns_mhdp_reg_write(mhdp, CDNS_DPTX_PHY_CONFIG, reg32);
988 
989 	drm_dp_dpcd_writeb(&mhdp->aux, DP_TRAINING_PATTERN_SET,
990 			   (eq_tps != 4) ? eq_tps | DP_LINK_SCRAMBLING_DISABLE :
991 			   CDNS_DP_TRAINING_PATTERN_4);
992 
993 	drm_dp_dpcd_read_link_status(&mhdp->aux, link_status);
994 
995 	do {
996 		cdns_mhdp_get_adjust_train(mhdp, link_status, lanes_data,
997 					   &phy_cfg);
998 		phy_cfg.dp.lanes = mhdp->link.num_lanes;
999 		phy_cfg.dp.ssc = cdns_mhdp_get_ssc_supported(mhdp);
1000 		phy_cfg.dp.set_lanes = false;
1001 		phy_cfg.dp.set_rate = false;
1002 		phy_cfg.dp.set_voltages = true;
1003 		ret = phy_configure(mhdp->phy,  &phy_cfg);
1004 		if (ret) {
1005 			dev_err(mhdp->dev, "%s: phy_configure() failed: %d\n",
1006 				__func__, ret);
1007 			goto err;
1008 		}
1009 
1010 		cdns_mhdp_adjust_lt(mhdp, mhdp->link.num_lanes,
1011 				    training_interval, lanes_data, link_status);
1012 
1013 		r = drm_dp_clock_recovery_ok(link_status, mhdp->link.num_lanes);
1014 		if (!r)
1015 			goto err;
1016 
1017 		if (drm_dp_channel_eq_ok(link_status, mhdp->link.num_lanes)) {
1018 			cdns_mhdp_print_lt_status("EQ phase ok", mhdp,
1019 						  &phy_cfg);
1020 			return true;
1021 		}
1022 
1023 		fail_counter_short++;
1024 
1025 		cdns_mhdp_adjust_requested_eq(mhdp, link_status);
1026 	} while (fail_counter_short < 5);
1027 
1028 err:
1029 	cdns_mhdp_print_lt_status("EQ phase failed", mhdp, &phy_cfg);
1030 
1031 	return false;
1032 }
1033 
1034 static void cdns_mhdp_adjust_requested_cr(struct cdns_mhdp_device *mhdp,
1035 					  u8 link_status[DP_LINK_STATUS_SIZE],
1036 					  u8 *req_volt, u8 *req_pre)
1037 {
1038 	const u8 max_volt = CDNS_VOLT_SWING(mhdp->host.volt_swing);
1039 	const u8 max_pre = CDNS_PRE_EMPHASIS(mhdp->host.pre_emphasis);
1040 	unsigned int i;
1041 
1042 	for (i = 0; i < mhdp->link.num_lanes; i++) {
1043 		u8 val;
1044 
1045 		val = mhdp->host.volt_swing & CDNS_FORCE_VOLT_SWING ?
1046 		      max_volt : req_volt[i];
1047 		cdns_mhdp_set_adjust_request_voltage(link_status, i, val);
1048 
1049 		val = mhdp->host.pre_emphasis & CDNS_FORCE_PRE_EMPHASIS ?
1050 		      max_pre : req_pre[i];
1051 		cdns_mhdp_set_adjust_request_pre_emphasis(link_status, i, val);
1052 	}
1053 }
1054 
1055 static
1056 void cdns_mhdp_validate_cr(struct cdns_mhdp_device *mhdp, bool *cr_done,
1057 			   bool *same_before_adjust, bool *max_swing_reached,
1058 			   u8 before_cr[CDNS_DP_MAX_NUM_LANES],
1059 			   u8 after_cr[DP_LINK_STATUS_SIZE], u8 *req_volt,
1060 			   u8 *req_pre)
1061 {
1062 	const u8 max_volt = CDNS_VOLT_SWING(mhdp->host.volt_swing);
1063 	const u8 max_pre = CDNS_PRE_EMPHASIS(mhdp->host.pre_emphasis);
1064 	bool same_pre, same_volt;
1065 	unsigned int i;
1066 	u8 adjust;
1067 
1068 	*same_before_adjust = false;
1069 	*max_swing_reached = false;
1070 	*cr_done = drm_dp_clock_recovery_ok(after_cr, mhdp->link.num_lanes);
1071 
1072 	for (i = 0; i < mhdp->link.num_lanes; i++) {
1073 		adjust = drm_dp_get_adjust_request_voltage(after_cr, i);
1074 		req_volt[i] = min(adjust, max_volt);
1075 
1076 		adjust = drm_dp_get_adjust_request_pre_emphasis(after_cr, i) >>
1077 		      DP_TRAIN_PRE_EMPHASIS_SHIFT;
1078 		req_pre[i] = min(adjust, max_pre);
1079 
1080 		same_pre = (before_cr[i] & DP_TRAIN_PRE_EMPHASIS_MASK) ==
1081 			   req_pre[i] << DP_TRAIN_PRE_EMPHASIS_SHIFT;
1082 		same_volt = (before_cr[i] & DP_TRAIN_VOLTAGE_SWING_MASK) ==
1083 			    req_volt[i];
1084 		if (same_pre && same_volt)
1085 			*same_before_adjust = true;
1086 
1087 		/* 3.1.5.2 in DP Standard v1.4. Table 3-1 */
1088 		if (!*cr_done && req_volt[i] + req_pre[i] >= 3) {
1089 			*max_swing_reached = true;
1090 			return;
1091 		}
1092 	}
1093 }
1094 
1095 static bool cdns_mhdp_link_training_cr(struct cdns_mhdp_device *mhdp)
1096 {
1097 	u8 lanes_data[CDNS_DP_MAX_NUM_LANES],
1098 	fail_counter_short = 0, fail_counter_cr_long = 0;
1099 	u8 link_status[DP_LINK_STATUS_SIZE];
1100 	bool cr_done;
1101 	union phy_configure_opts phy_cfg;
1102 	int ret;
1103 
1104 	dev_dbg(mhdp->dev, "Starting CR phase\n");
1105 
1106 	ret = cdns_mhdp_link_training_init(mhdp);
1107 	if (ret)
1108 		goto err;
1109 
1110 	drm_dp_dpcd_read_link_status(&mhdp->aux, link_status);
1111 
1112 	do {
1113 		u8 requested_adjust_volt_swing[CDNS_DP_MAX_NUM_LANES] = {};
1114 		u8 requested_adjust_pre_emphasis[CDNS_DP_MAX_NUM_LANES] = {};
1115 		bool same_before_adjust, max_swing_reached;
1116 
1117 		cdns_mhdp_get_adjust_train(mhdp, link_status, lanes_data,
1118 					   &phy_cfg);
1119 		phy_cfg.dp.lanes = mhdp->link.num_lanes;
1120 		phy_cfg.dp.ssc = cdns_mhdp_get_ssc_supported(mhdp);
1121 		phy_cfg.dp.set_lanes = false;
1122 		phy_cfg.dp.set_rate = false;
1123 		phy_cfg.dp.set_voltages = true;
1124 		ret = phy_configure(mhdp->phy,  &phy_cfg);
1125 		if (ret) {
1126 			dev_err(mhdp->dev, "%s: phy_configure() failed: %d\n",
1127 				__func__, ret);
1128 			goto err;
1129 		}
1130 
1131 		cdns_mhdp_adjust_lt(mhdp, mhdp->link.num_lanes, 100,
1132 				    lanes_data, link_status);
1133 
1134 		cdns_mhdp_validate_cr(mhdp, &cr_done, &same_before_adjust,
1135 				      &max_swing_reached, lanes_data,
1136 				      link_status,
1137 				      requested_adjust_volt_swing,
1138 				      requested_adjust_pre_emphasis);
1139 
1140 		if (max_swing_reached) {
1141 			dev_err(mhdp->dev, "CR: max swing reached\n");
1142 			goto err;
1143 		}
1144 
1145 		if (cr_done) {
1146 			cdns_mhdp_print_lt_status("CR phase ok", mhdp,
1147 						  &phy_cfg);
1148 			return true;
1149 		}
1150 
1151 		/* Not all CR_DONE bits set */
1152 		fail_counter_cr_long++;
1153 
1154 		if (same_before_adjust) {
1155 			fail_counter_short++;
1156 			continue;
1157 		}
1158 
1159 		fail_counter_short = 0;
1160 		/*
1161 		 * Voltage swing/pre-emphasis adjust requested
1162 		 * during CR phase
1163 		 */
1164 		cdns_mhdp_adjust_requested_cr(mhdp, link_status,
1165 					      requested_adjust_volt_swing,
1166 					      requested_adjust_pre_emphasis);
1167 	} while (fail_counter_short < 5 && fail_counter_cr_long < 10);
1168 
1169 err:
1170 	cdns_mhdp_print_lt_status("CR phase failed", mhdp, &phy_cfg);
1171 
1172 	return false;
1173 }
1174 
1175 static void cdns_mhdp_lower_link_rate(struct cdns_mhdp_link *link)
1176 {
1177 	switch (drm_dp_link_rate_to_bw_code(link->rate)) {
1178 	case DP_LINK_BW_2_7:
1179 		link->rate = drm_dp_bw_code_to_link_rate(DP_LINK_BW_1_62);
1180 		break;
1181 	case DP_LINK_BW_5_4:
1182 		link->rate = drm_dp_bw_code_to_link_rate(DP_LINK_BW_2_7);
1183 		break;
1184 	case DP_LINK_BW_8_1:
1185 		link->rate = drm_dp_bw_code_to_link_rate(DP_LINK_BW_5_4);
1186 		break;
1187 	}
1188 }
1189 
1190 static int cdns_mhdp_link_training(struct cdns_mhdp_device *mhdp,
1191 				   unsigned int training_interval)
1192 {
1193 	u32 reg32;
1194 	const u8 eq_tps = cdns_mhdp_eq_training_pattern_supported(mhdp);
1195 	int ret;
1196 
1197 	while (1) {
1198 		if (!cdns_mhdp_link_training_cr(mhdp)) {
1199 			if (drm_dp_link_rate_to_bw_code(mhdp->link.rate) !=
1200 			    DP_LINK_BW_1_62) {
1201 				dev_dbg(mhdp->dev,
1202 					"Reducing link rate during CR phase\n");
1203 				cdns_mhdp_lower_link_rate(&mhdp->link);
1204 
1205 				continue;
1206 			} else if (mhdp->link.num_lanes > 1) {
1207 				dev_dbg(mhdp->dev,
1208 					"Reducing lanes number during CR phase\n");
1209 				mhdp->link.num_lanes >>= 1;
1210 				mhdp->link.rate = cdns_mhdp_max_link_rate(mhdp);
1211 
1212 				continue;
1213 			}
1214 
1215 			dev_err(mhdp->dev,
1216 				"Link training failed during CR phase\n");
1217 			goto err;
1218 		}
1219 
1220 		if (cdns_mhdp_link_training_channel_eq(mhdp, eq_tps,
1221 						       training_interval))
1222 			break;
1223 
1224 		if (mhdp->link.num_lanes > 1) {
1225 			dev_dbg(mhdp->dev,
1226 				"Reducing lanes number during EQ phase\n");
1227 			mhdp->link.num_lanes >>= 1;
1228 
1229 			continue;
1230 		} else if (drm_dp_link_rate_to_bw_code(mhdp->link.rate) !=
1231 			   DP_LINK_BW_1_62) {
1232 			dev_dbg(mhdp->dev,
1233 				"Reducing link rate during EQ phase\n");
1234 			cdns_mhdp_lower_link_rate(&mhdp->link);
1235 			mhdp->link.num_lanes = cdns_mhdp_max_num_lanes(mhdp);
1236 
1237 			continue;
1238 		}
1239 
1240 		dev_err(mhdp->dev, "Link training failed during EQ phase\n");
1241 		goto err;
1242 	}
1243 
1244 	dev_dbg(mhdp->dev, "Link training ok. Lanes: %u, Rate %u Mbps\n",
1245 		mhdp->link.num_lanes, mhdp->link.rate / 100);
1246 
1247 	drm_dp_dpcd_writeb(&mhdp->aux, DP_TRAINING_PATTERN_SET,
1248 			   mhdp->host.scrambler ? 0 :
1249 			   DP_LINK_SCRAMBLING_DISABLE);
1250 
1251 	ret = cdns_mhdp_reg_read(mhdp, CDNS_DP_FRAMER_GLOBAL_CONFIG, &reg32);
1252 	if (ret < 0) {
1253 		dev_err(mhdp->dev,
1254 			"Failed to read CDNS_DP_FRAMER_GLOBAL_CONFIG %d\n",
1255 			ret);
1256 		return ret;
1257 	}
1258 	reg32 &= ~GENMASK(1, 0);
1259 	reg32 |= CDNS_DP_NUM_LANES(mhdp->link.num_lanes);
1260 	reg32 |= CDNS_DP_WR_FAILING_EDGE_VSYNC;
1261 	reg32 |= CDNS_DP_FRAMER_EN;
1262 	cdns_mhdp_reg_write(mhdp, CDNS_DP_FRAMER_GLOBAL_CONFIG, reg32);
1263 
1264 	/* Reset PHY config */
1265 	reg32 = CDNS_PHY_COMMON_CONFIG | CDNS_PHY_TRAINING_TYPE(1);
1266 	if (!mhdp->host.scrambler)
1267 		reg32 |= CDNS_PHY_SCRAMBLER_BYPASS;
1268 	cdns_mhdp_reg_write(mhdp, CDNS_DPTX_PHY_CONFIG, reg32);
1269 
1270 	return 0;
1271 err:
1272 	/* Reset PHY config */
1273 	reg32 = CDNS_PHY_COMMON_CONFIG | CDNS_PHY_TRAINING_TYPE(1);
1274 	if (!mhdp->host.scrambler)
1275 		reg32 |= CDNS_PHY_SCRAMBLER_BYPASS;
1276 	cdns_mhdp_reg_write(mhdp, CDNS_DPTX_PHY_CONFIG, reg32);
1277 
1278 	drm_dp_dpcd_writeb(&mhdp->aux, DP_TRAINING_PATTERN_SET,
1279 			   DP_TRAINING_PATTERN_DISABLE);
1280 
1281 	return -EIO;
1282 }
1283 
1284 static u32 cdns_mhdp_get_training_interval_us(struct cdns_mhdp_device *mhdp,
1285 					      u32 interval)
1286 {
1287 	if (interval == 0)
1288 		return 400;
1289 	if (interval < 5)
1290 		return 4000 << (interval - 1);
1291 	dev_err(mhdp->dev,
1292 		"wrong training interval returned by DPCD: %d\n", interval);
1293 	return 0;
1294 }
1295 
1296 static void cdns_mhdp_fill_host_caps(struct cdns_mhdp_device *mhdp)
1297 {
1298 	unsigned int link_rate;
1299 
1300 	/* Get source capabilities based on PHY attributes */
1301 
1302 	mhdp->host.lanes_cnt = mhdp->phy->attrs.bus_width;
1303 	if (!mhdp->host.lanes_cnt)
1304 		mhdp->host.lanes_cnt = 4;
1305 
1306 	link_rate = mhdp->phy->attrs.max_link_rate;
1307 	if (!link_rate)
1308 		link_rate = drm_dp_bw_code_to_link_rate(DP_LINK_BW_8_1);
1309 	else
1310 		/* PHY uses Mb/s, DRM uses tens of kb/s. */
1311 		link_rate *= 100;
1312 
1313 	mhdp->host.link_rate = link_rate;
1314 	mhdp->host.volt_swing = CDNS_VOLT_SWING(3);
1315 	mhdp->host.pre_emphasis = CDNS_PRE_EMPHASIS(3);
1316 	mhdp->host.pattern_supp = CDNS_SUPPORT_TPS(1) |
1317 				  CDNS_SUPPORT_TPS(2) | CDNS_SUPPORT_TPS(3) |
1318 				  CDNS_SUPPORT_TPS(4);
1319 	mhdp->host.lane_mapping = CDNS_LANE_MAPPING_NORMAL;
1320 	mhdp->host.fast_link = false;
1321 	mhdp->host.enhanced = true;
1322 	mhdp->host.scrambler = true;
1323 	mhdp->host.ssc = false;
1324 }
1325 
1326 static void cdns_mhdp_fill_sink_caps(struct cdns_mhdp_device *mhdp,
1327 				     u8 dpcd[DP_RECEIVER_CAP_SIZE])
1328 {
1329 	mhdp->sink.link_rate = mhdp->link.rate;
1330 	mhdp->sink.lanes_cnt = mhdp->link.num_lanes;
1331 	mhdp->sink.enhanced = !!(mhdp->link.capabilities &
1332 				 DP_LINK_CAP_ENHANCED_FRAMING);
1333 
1334 	/* Set SSC support */
1335 	mhdp->sink.ssc = !!(dpcd[DP_MAX_DOWNSPREAD] &
1336 				  DP_MAX_DOWNSPREAD_0_5);
1337 
1338 	/* Set TPS support */
1339 	mhdp->sink.pattern_supp = CDNS_SUPPORT_TPS(1) | CDNS_SUPPORT_TPS(2);
1340 	if (drm_dp_tps3_supported(dpcd))
1341 		mhdp->sink.pattern_supp |= CDNS_SUPPORT_TPS(3);
1342 	if (drm_dp_tps4_supported(dpcd))
1343 		mhdp->sink.pattern_supp |= CDNS_SUPPORT_TPS(4);
1344 
1345 	/* Set fast link support */
1346 	mhdp->sink.fast_link = !!(dpcd[DP_MAX_DOWNSPREAD] &
1347 				  DP_NO_AUX_HANDSHAKE_LINK_TRAINING);
1348 }
1349 
1350 static int cdns_mhdp_link_up(struct cdns_mhdp_device *mhdp)
1351 {
1352 	u8 dpcd[DP_RECEIVER_CAP_SIZE], amp[2];
1353 	u32 resp, interval, interval_us;
1354 	u8 ext_cap_chk = 0;
1355 	unsigned int addr;
1356 	int err;
1357 
1358 	WARN_ON(!mutex_is_locked(&mhdp->link_mutex));
1359 
1360 	drm_dp_dpcd_readb(&mhdp->aux, DP_TRAINING_AUX_RD_INTERVAL,
1361 			  &ext_cap_chk);
1362 
1363 	if (ext_cap_chk & DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT)
1364 		addr = DP_DP13_DPCD_REV;
1365 	else
1366 		addr = DP_DPCD_REV;
1367 
1368 	err = drm_dp_dpcd_read(&mhdp->aux, addr, dpcd, DP_RECEIVER_CAP_SIZE);
1369 	if (err < 0) {
1370 		dev_err(mhdp->dev, "Failed to read receiver capabilities\n");
1371 		return err;
1372 	}
1373 
1374 	mhdp->link.revision = dpcd[0];
1375 	mhdp->link.rate = drm_dp_bw_code_to_link_rate(dpcd[1]);
1376 	mhdp->link.num_lanes = dpcd[2] & DP_MAX_LANE_COUNT_MASK;
1377 
1378 	if (dpcd[2] & DP_ENHANCED_FRAME_CAP)
1379 		mhdp->link.capabilities |= DP_LINK_CAP_ENHANCED_FRAMING;
1380 
1381 	dev_dbg(mhdp->dev, "Set sink device power state via DPCD\n");
1382 	drm_dp_link_power_up(&mhdp->aux, mhdp->link.revision);
1383 
1384 	cdns_mhdp_fill_sink_caps(mhdp, dpcd);
1385 
1386 	mhdp->link.rate = cdns_mhdp_max_link_rate(mhdp);
1387 	mhdp->link.num_lanes = cdns_mhdp_max_num_lanes(mhdp);
1388 
1389 	/* Disable framer for link training */
1390 	err = cdns_mhdp_reg_read(mhdp, CDNS_DP_FRAMER_GLOBAL_CONFIG, &resp);
1391 	if (err < 0) {
1392 		dev_err(mhdp->dev,
1393 			"Failed to read CDNS_DP_FRAMER_GLOBAL_CONFIG %d\n",
1394 			err);
1395 		return err;
1396 	}
1397 
1398 	resp &= ~CDNS_DP_FRAMER_EN;
1399 	cdns_mhdp_reg_write(mhdp, CDNS_DP_FRAMER_GLOBAL_CONFIG, resp);
1400 
1401 	/* Spread AMP if required, enable 8b/10b coding */
1402 	amp[0] = cdns_mhdp_get_ssc_supported(mhdp) ? DP_SPREAD_AMP_0_5 : 0;
1403 	amp[1] = DP_SET_ANSI_8B10B;
1404 	drm_dp_dpcd_write(&mhdp->aux, DP_DOWNSPREAD_CTRL, amp, 2);
1405 
1406 	if (mhdp->host.fast_link & mhdp->sink.fast_link) {
1407 		dev_err(mhdp->dev, "fastlink not supported\n");
1408 		return -EOPNOTSUPP;
1409 	}
1410 
1411 	interval = dpcd[DP_TRAINING_AUX_RD_INTERVAL] & DP_TRAINING_AUX_RD_MASK;
1412 	interval_us = cdns_mhdp_get_training_interval_us(mhdp, interval);
1413 	if (!interval_us ||
1414 	    cdns_mhdp_link_training(mhdp, interval_us)) {
1415 		dev_err(mhdp->dev, "Link training failed. Exiting.\n");
1416 		return -EIO;
1417 	}
1418 
1419 	mhdp->link_up = true;
1420 
1421 	return 0;
1422 }
1423 
1424 static void cdns_mhdp_link_down(struct cdns_mhdp_device *mhdp)
1425 {
1426 	WARN_ON(!mutex_is_locked(&mhdp->link_mutex));
1427 
1428 	if (mhdp->plugged)
1429 		drm_dp_link_power_down(&mhdp->aux, mhdp->link.revision);
1430 
1431 	mhdp->link_up = false;
1432 }
1433 
1434 static const struct drm_edid *cdns_mhdp_edid_read(struct cdns_mhdp_device *mhdp,
1435 						  struct drm_connector *connector)
1436 {
1437 	if (!mhdp->plugged)
1438 		return NULL;
1439 
1440 	return drm_edid_read_custom(connector, cdns_mhdp_get_edid_block, mhdp);
1441 }
1442 
1443 static u32 cdns_mhdp_get_bpp(struct cdns_mhdp_display_fmt *fmt)
1444 {
1445 	u32 bpp;
1446 
1447 	if (fmt->y_only)
1448 		return fmt->bpc;
1449 
1450 	switch (fmt->color_format) {
1451 	case DRM_OUTPUT_COLOR_FORMAT_RGB444:
1452 	case DRM_OUTPUT_COLOR_FORMAT_YCBCR444:
1453 		bpp = fmt->bpc * 3;
1454 		break;
1455 	case DRM_OUTPUT_COLOR_FORMAT_YCBCR422:
1456 		bpp = fmt->bpc * 2;
1457 		break;
1458 	case DRM_OUTPUT_COLOR_FORMAT_YCBCR420:
1459 		bpp = fmt->bpc * 3 / 2;
1460 		break;
1461 	default:
1462 		bpp = fmt->bpc * 3;
1463 		WARN_ON(1);
1464 	}
1465 	return bpp;
1466 }
1467 
1468 static
1469 bool cdns_mhdp_bandwidth_ok(struct cdns_mhdp_device *mhdp,
1470 			    const struct drm_display_mode *mode,
1471 			    unsigned int lanes, unsigned int rate)
1472 {
1473 	u32 max_bw, req_bw, bpp;
1474 
1475 	/*
1476 	 * mode->clock is expressed in kHz. Multiplying by bpp and dividing by 8
1477 	 * we get the number of kB/s. DisplayPort applies a 8b-10b encoding, the
1478 	 * value thus equals the bandwidth in 10kb/s units, which matches the
1479 	 * units of the rate parameter.
1480 	 */
1481 
1482 	bpp = cdns_mhdp_get_bpp(&mhdp->display_fmt);
1483 	req_bw = mode->clock * bpp / 8;
1484 	max_bw = lanes * rate;
1485 	if (req_bw > max_bw) {
1486 		dev_dbg(mhdp->dev,
1487 			"Unsupported Mode: %s, Req BW: %u, Available Max BW:%u\n",
1488 			mode->name, req_bw, max_bw);
1489 
1490 		return false;
1491 	}
1492 
1493 	return true;
1494 }
1495 
1496 static int cdns_mhdp_attach(struct drm_bridge *bridge,
1497 			    struct drm_encoder *encoder,
1498 			    enum drm_bridge_attach_flags flags)
1499 {
1500 	struct cdns_mhdp_device *mhdp = bridge_to_mhdp(bridge);
1501 	bool hw_ready;
1502 	int ret;
1503 
1504 	dev_dbg(mhdp->dev, "%s\n", __func__);
1505 
1506 	mhdp->aux.drm_dev = bridge->dev;
1507 	ret = drm_dp_aux_register(&mhdp->aux);
1508 	if (ret < 0)
1509 		return ret;
1510 
1511 	if (!(flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR)) {
1512 		ret = -EINVAL;
1513 		dev_err(mhdp->dev,
1514 			"Connector initialisation not supported in bridge_attach %d\n",
1515 			ret);
1516 		goto aux_unregister;
1517 	}
1518 
1519 	spin_lock(&mhdp->start_lock);
1520 
1521 	mhdp->bridge_attached = true;
1522 	hw_ready = mhdp->hw_state == MHDP_HW_READY;
1523 
1524 	spin_unlock(&mhdp->start_lock);
1525 
1526 	/* Enable SW event interrupts */
1527 	if (hw_ready)
1528 		cdns_mhdp_bridge_hpd_enable(bridge);
1529 
1530 	return 0;
1531 aux_unregister:
1532 	drm_dp_aux_unregister(&mhdp->aux);
1533 	return ret;
1534 }
1535 
1536 static void cdns_mhdp_configure_video(struct cdns_mhdp_device *mhdp,
1537 				      const struct drm_display_mode *mode)
1538 {
1539 	unsigned int dp_framer_sp = 0, msa_horizontal_1,
1540 		msa_vertical_1, bnd_hsync2vsync, hsync2vsync_pol_ctrl,
1541 		misc0 = 0, misc1 = 0, pxl_repr,
1542 		front_porch, back_porch, msa_h0, msa_v0, hsync, vsync,
1543 		dp_vertical_1;
1544 	u8 stream_id = mhdp->stream_id;
1545 	u32 bpp, bpc, pxlfmt, framer;
1546 	int ret;
1547 
1548 	pxlfmt = mhdp->display_fmt.color_format;
1549 	bpc = mhdp->display_fmt.bpc;
1550 
1551 	/*
1552 	 * If YCBCR supported and stream not SD, use ITU709
1553 	 * Need to handle ITU version with YCBCR420 when supported
1554 	 */
1555 	if ((pxlfmt == DRM_OUTPUT_COLOR_FORMAT_YCBCR444 ||
1556 	     pxlfmt == DRM_OUTPUT_COLOR_FORMAT_YCBCR422) && mode->crtc_vdisplay >= 720)
1557 		misc0 = DP_YCBCR_COEFFICIENTS_ITU709;
1558 
1559 	bpp = cdns_mhdp_get_bpp(&mhdp->display_fmt);
1560 
1561 	switch (pxlfmt) {
1562 	case DRM_OUTPUT_COLOR_FORMAT_RGB444:
1563 		pxl_repr = CDNS_DP_FRAMER_RGB << CDNS_DP_FRAMER_PXL_FORMAT;
1564 		misc0 |= DP_COLOR_FORMAT_RGB;
1565 		break;
1566 	case DRM_OUTPUT_COLOR_FORMAT_YCBCR444:
1567 		pxl_repr = CDNS_DP_FRAMER_YCBCR444 << CDNS_DP_FRAMER_PXL_FORMAT;
1568 		misc0 |= DP_COLOR_FORMAT_YCbCr444 | DP_TEST_DYNAMIC_RANGE_CEA;
1569 		break;
1570 	case DRM_OUTPUT_COLOR_FORMAT_YCBCR422:
1571 		pxl_repr = CDNS_DP_FRAMER_YCBCR422 << CDNS_DP_FRAMER_PXL_FORMAT;
1572 		misc0 |= DP_COLOR_FORMAT_YCbCr422 | DP_TEST_DYNAMIC_RANGE_CEA;
1573 		break;
1574 	case DRM_OUTPUT_COLOR_FORMAT_YCBCR420:
1575 		pxl_repr = CDNS_DP_FRAMER_YCBCR420 << CDNS_DP_FRAMER_PXL_FORMAT;
1576 		break;
1577 	default:
1578 		pxl_repr = CDNS_DP_FRAMER_Y_ONLY << CDNS_DP_FRAMER_PXL_FORMAT;
1579 	}
1580 
1581 	switch (bpc) {
1582 	case 6:
1583 		misc0 |= DP_TEST_BIT_DEPTH_6;
1584 		pxl_repr |= CDNS_DP_FRAMER_6_BPC;
1585 		break;
1586 	case 8:
1587 		misc0 |= DP_TEST_BIT_DEPTH_8;
1588 		pxl_repr |= CDNS_DP_FRAMER_8_BPC;
1589 		break;
1590 	case 10:
1591 		misc0 |= DP_TEST_BIT_DEPTH_10;
1592 		pxl_repr |= CDNS_DP_FRAMER_10_BPC;
1593 		break;
1594 	case 12:
1595 		misc0 |= DP_TEST_BIT_DEPTH_12;
1596 		pxl_repr |= CDNS_DP_FRAMER_12_BPC;
1597 		break;
1598 	case 16:
1599 		misc0 |= DP_TEST_BIT_DEPTH_16;
1600 		pxl_repr |= CDNS_DP_FRAMER_16_BPC;
1601 		break;
1602 	}
1603 
1604 	bnd_hsync2vsync = CDNS_IP_BYPASS_V_INTERFACE;
1605 	if (mode->flags & DRM_MODE_FLAG_INTERLACE)
1606 		bnd_hsync2vsync |= CDNS_IP_DET_INTERLACE_FORMAT;
1607 
1608 	cdns_mhdp_reg_write(mhdp, CDNS_BND_HSYNC2VSYNC(stream_id),
1609 			    bnd_hsync2vsync);
1610 
1611 	hsync2vsync_pol_ctrl = 0;
1612 	if (mode->flags & DRM_MODE_FLAG_NHSYNC)
1613 		hsync2vsync_pol_ctrl |= CDNS_H2V_HSYNC_POL_ACTIVE_LOW;
1614 	if (mode->flags & DRM_MODE_FLAG_NVSYNC)
1615 		hsync2vsync_pol_ctrl |= CDNS_H2V_VSYNC_POL_ACTIVE_LOW;
1616 	cdns_mhdp_reg_write(mhdp, CDNS_HSYNC2VSYNC_POL_CTRL(stream_id),
1617 			    hsync2vsync_pol_ctrl);
1618 
1619 	cdns_mhdp_reg_write(mhdp, CDNS_DP_FRAMER_PXL_REPR(stream_id), pxl_repr);
1620 
1621 	if (mode->flags & DRM_MODE_FLAG_INTERLACE)
1622 		dp_framer_sp |= CDNS_DP_FRAMER_INTERLACE;
1623 	if (mode->flags & DRM_MODE_FLAG_NHSYNC)
1624 		dp_framer_sp |= CDNS_DP_FRAMER_HSYNC_POL_LOW;
1625 	if (mode->flags & DRM_MODE_FLAG_NVSYNC)
1626 		dp_framer_sp |= CDNS_DP_FRAMER_VSYNC_POL_LOW;
1627 	cdns_mhdp_reg_write(mhdp, CDNS_DP_FRAMER_SP(stream_id), dp_framer_sp);
1628 
1629 	front_porch = mode->crtc_hsync_start - mode->crtc_hdisplay;
1630 	back_porch = mode->crtc_htotal - mode->crtc_hsync_end;
1631 	cdns_mhdp_reg_write(mhdp, CDNS_DP_FRONT_BACK_PORCH(stream_id),
1632 			    CDNS_DP_FRONT_PORCH(front_porch) |
1633 			    CDNS_DP_BACK_PORCH(back_porch));
1634 
1635 	cdns_mhdp_reg_write(mhdp, CDNS_DP_BYTE_COUNT(stream_id),
1636 			    mode->crtc_hdisplay * bpp / 8);
1637 
1638 	msa_h0 = mode->crtc_htotal - mode->crtc_hsync_start;
1639 	cdns_mhdp_reg_write(mhdp, CDNS_DP_MSA_HORIZONTAL_0(stream_id),
1640 			    CDNS_DP_MSAH0_H_TOTAL(mode->crtc_htotal) |
1641 			    CDNS_DP_MSAH0_HSYNC_START(msa_h0));
1642 
1643 	hsync = mode->crtc_hsync_end - mode->crtc_hsync_start;
1644 	msa_horizontal_1 = CDNS_DP_MSAH1_HSYNC_WIDTH(hsync) |
1645 			   CDNS_DP_MSAH1_HDISP_WIDTH(mode->crtc_hdisplay);
1646 	if (mode->flags & DRM_MODE_FLAG_NHSYNC)
1647 		msa_horizontal_1 |= CDNS_DP_MSAH1_HSYNC_POL_LOW;
1648 	cdns_mhdp_reg_write(mhdp, CDNS_DP_MSA_HORIZONTAL_1(stream_id),
1649 			    msa_horizontal_1);
1650 
1651 	msa_v0 = mode->crtc_vtotal - mode->crtc_vsync_start;
1652 	cdns_mhdp_reg_write(mhdp, CDNS_DP_MSA_VERTICAL_0(stream_id),
1653 			    CDNS_DP_MSAV0_V_TOTAL(mode->crtc_vtotal) |
1654 			    CDNS_DP_MSAV0_VSYNC_START(msa_v0));
1655 
1656 	vsync = mode->crtc_vsync_end - mode->crtc_vsync_start;
1657 	msa_vertical_1 = CDNS_DP_MSAV1_VSYNC_WIDTH(vsync) |
1658 			 CDNS_DP_MSAV1_VDISP_WIDTH(mode->crtc_vdisplay);
1659 	if (mode->flags & DRM_MODE_FLAG_NVSYNC)
1660 		msa_vertical_1 |= CDNS_DP_MSAV1_VSYNC_POL_LOW;
1661 	cdns_mhdp_reg_write(mhdp, CDNS_DP_MSA_VERTICAL_1(stream_id),
1662 			    msa_vertical_1);
1663 
1664 	if ((mode->flags & DRM_MODE_FLAG_INTERLACE) &&
1665 	    mode->crtc_vtotal % 2 == 0)
1666 		misc1 = DP_TEST_INTERLACED;
1667 	if (mhdp->display_fmt.y_only)
1668 		misc1 |= CDNS_DP_TEST_COLOR_FORMAT_RAW_Y_ONLY;
1669 	/* Use VSC SDP for Y420 */
1670 	if (pxlfmt == DRM_OUTPUT_COLOR_FORMAT_YCBCR420)
1671 		misc1 = CDNS_DP_TEST_VSC_SDP;
1672 
1673 	cdns_mhdp_reg_write(mhdp, CDNS_DP_MSA_MISC(stream_id),
1674 			    misc0 | (misc1 << 8));
1675 
1676 	cdns_mhdp_reg_write(mhdp, CDNS_DP_HORIZONTAL(stream_id),
1677 			    CDNS_DP_H_HSYNC_WIDTH(hsync) |
1678 			    CDNS_DP_H_H_TOTAL(mode->crtc_hdisplay));
1679 
1680 	cdns_mhdp_reg_write(mhdp, CDNS_DP_VERTICAL_0(stream_id),
1681 			    CDNS_DP_V0_VHEIGHT(mode->crtc_vdisplay) |
1682 			    CDNS_DP_V0_VSTART(msa_v0));
1683 
1684 	dp_vertical_1 = CDNS_DP_V1_VTOTAL(mode->crtc_vtotal);
1685 	if ((mode->flags & DRM_MODE_FLAG_INTERLACE) &&
1686 	    mode->crtc_vtotal % 2 == 0)
1687 		dp_vertical_1 |= CDNS_DP_V1_VTOTAL_EVEN;
1688 
1689 	cdns_mhdp_reg_write(mhdp, CDNS_DP_VERTICAL_1(stream_id), dp_vertical_1);
1690 
1691 	cdns_mhdp_reg_write_bit(mhdp, CDNS_DP_VB_ID(stream_id), 2, 1,
1692 				(mode->flags & DRM_MODE_FLAG_INTERLACE) ?
1693 				CDNS_DP_VB_ID_INTERLACED : 0);
1694 
1695 	ret = cdns_mhdp_reg_read(mhdp, CDNS_DP_FRAMER_GLOBAL_CONFIG, &framer);
1696 	if (ret < 0) {
1697 		dev_err(mhdp->dev,
1698 			"Failed to read CDNS_DP_FRAMER_GLOBAL_CONFIG %d\n",
1699 			ret);
1700 		return;
1701 	}
1702 	framer |= CDNS_DP_FRAMER_EN;
1703 	framer &= ~CDNS_DP_NO_VIDEO_MODE;
1704 	cdns_mhdp_reg_write(mhdp, CDNS_DP_FRAMER_GLOBAL_CONFIG, framer);
1705 }
1706 
1707 static void cdns_mhdp_sst_enable(struct cdns_mhdp_device *mhdp,
1708 				 const struct drm_display_mode *mode)
1709 {
1710 	u32 rate, vs, required_bandwidth, available_bandwidth;
1711 	s32 line_thresh1, line_thresh2, line_thresh = 0;
1712 	int pxlclock = mode->crtc_clock;
1713 	u32 tu_size = 64;
1714 	u32 bpp;
1715 
1716 	/* Get rate in MSymbols per second per lane */
1717 	rate = mhdp->link.rate / 1000;
1718 
1719 	bpp = cdns_mhdp_get_bpp(&mhdp->display_fmt);
1720 
1721 	required_bandwidth = pxlclock * bpp / 8;
1722 	available_bandwidth = mhdp->link.num_lanes * rate;
1723 
1724 	vs = tu_size * required_bandwidth / available_bandwidth;
1725 	vs /= 1000;
1726 
1727 	if (vs == tu_size)
1728 		vs = tu_size - 1;
1729 
1730 	line_thresh1 = ((vs + 1) << 5) * 8 / bpp;
1731 	line_thresh2 = (pxlclock << 5) / 1000 / rate * (vs + 1) - (1 << 5);
1732 	line_thresh = line_thresh1 - line_thresh2 / (s32)mhdp->link.num_lanes;
1733 	line_thresh = (line_thresh >> 5) + 2;
1734 
1735 	mhdp->stream_id = 0;
1736 
1737 	cdns_mhdp_reg_write(mhdp, CDNS_DP_FRAMER_TU,
1738 			    CDNS_DP_FRAMER_TU_VS(vs) |
1739 			    CDNS_DP_FRAMER_TU_SIZE(tu_size) |
1740 			    CDNS_DP_FRAMER_TU_CNT_RST_EN);
1741 
1742 	cdns_mhdp_reg_write(mhdp, CDNS_DP_LINE_THRESH(0),
1743 			    line_thresh & GENMASK(5, 0));
1744 
1745 	cdns_mhdp_reg_write(mhdp, CDNS_DP_STREAM_CONFIG_2(0),
1746 			    CDNS_DP_SC2_TU_VS_DIFF((tu_size - vs > 3) ?
1747 						   0 : tu_size - vs));
1748 
1749 	cdns_mhdp_configure_video(mhdp, mode);
1750 }
1751 
1752 static void cdns_mhdp_atomic_enable(struct drm_bridge *bridge,
1753 				    struct drm_atomic_state *state)
1754 {
1755 	struct cdns_mhdp_device *mhdp = bridge_to_mhdp(bridge);
1756 	struct cdns_mhdp_bridge_state *mhdp_state;
1757 	struct drm_crtc_state *crtc_state;
1758 	struct drm_connector_state *conn_state;
1759 	struct drm_bridge_state *new_state;
1760 	const struct drm_display_mode *mode;
1761 	u32 resp;
1762 	int ret = 0;
1763 
1764 	dev_dbg(mhdp->dev, "bridge enable\n");
1765 
1766 	mutex_lock(&mhdp->link_mutex);
1767 
1768 	mhdp->connector = drm_atomic_get_new_connector_for_encoder(state,
1769 								   bridge->encoder);
1770 	if (WARN_ON(!mhdp->connector))
1771 		goto out;
1772 
1773 	conn_state = drm_atomic_get_new_connector_state(state, mhdp->connector);
1774 	if (WARN_ON(!conn_state))
1775 		goto out;
1776 
1777 	if (mhdp->plugged && !mhdp->link_up) {
1778 		ret = cdns_mhdp_link_up(mhdp);
1779 		if (ret < 0)
1780 			goto out;
1781 	}
1782 
1783 	if (mhdp->info && mhdp->info->ops && mhdp->info->ops->enable)
1784 		mhdp->info->ops->enable(mhdp);
1785 
1786 	/* Enable VIF clock for stream 0 */
1787 	ret = cdns_mhdp_reg_read(mhdp, CDNS_DPTX_CAR, &resp);
1788 	if (ret < 0) {
1789 		dev_err(mhdp->dev, "Failed to read CDNS_DPTX_CAR %d\n", ret);
1790 		goto out;
1791 	}
1792 
1793 	cdns_mhdp_reg_write(mhdp, CDNS_DPTX_CAR,
1794 			    resp | CDNS_VIF_CLK_EN | CDNS_VIF_CLK_RSTN);
1795 
1796 	if (mhdp->hdcp_supported &&
1797 	    mhdp->hw_state == MHDP_HW_READY &&
1798 	    conn_state->content_protection ==
1799 	    DRM_MODE_CONTENT_PROTECTION_DESIRED) {
1800 		mutex_unlock(&mhdp->link_mutex);
1801 		cdns_mhdp_hdcp_enable(mhdp, conn_state->hdcp_content_type);
1802 		mutex_lock(&mhdp->link_mutex);
1803 	}
1804 
1805 	crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);
1806 	if (WARN_ON(!crtc_state))
1807 		goto out;
1808 
1809 	mode = &crtc_state->adjusted_mode;
1810 
1811 	new_state = drm_atomic_get_new_bridge_state(state, bridge);
1812 	if (WARN_ON(!new_state))
1813 		goto out;
1814 
1815 	if (!cdns_mhdp_bandwidth_ok(mhdp, mode, mhdp->link.num_lanes,
1816 				    mhdp->link.rate)) {
1817 		ret = -EINVAL;
1818 		goto out;
1819 	}
1820 
1821 	cdns_mhdp_sst_enable(mhdp, mode);
1822 
1823 	mhdp_state = to_cdns_mhdp_bridge_state(new_state);
1824 
1825 	mhdp_state->current_mode = drm_mode_duplicate(bridge->dev, mode);
1826 	if (!mhdp_state->current_mode) {
1827 		ret = -EINVAL;
1828 		goto out;
1829 	}
1830 
1831 	drm_mode_set_name(mhdp_state->current_mode);
1832 
1833 	dev_dbg(mhdp->dev, "%s: Enabling mode %s\n", __func__, mode->name);
1834 
1835 	mhdp->bridge_enabled = true;
1836 
1837 out:
1838 	mutex_unlock(&mhdp->link_mutex);
1839 	if (ret < 0)
1840 		schedule_work(&mhdp->modeset_retry_work);
1841 }
1842 
1843 static void cdns_mhdp_atomic_disable(struct drm_bridge *bridge,
1844 				     struct drm_atomic_state *state)
1845 {
1846 	struct cdns_mhdp_device *mhdp = bridge_to_mhdp(bridge);
1847 	u32 resp;
1848 
1849 	dev_dbg(mhdp->dev, "%s\n", __func__);
1850 
1851 	mutex_lock(&mhdp->link_mutex);
1852 
1853 	if (mhdp->hdcp_supported)
1854 		cdns_mhdp_hdcp_disable(mhdp);
1855 
1856 	mhdp->bridge_enabled = false;
1857 	cdns_mhdp_reg_read(mhdp, CDNS_DP_FRAMER_GLOBAL_CONFIG, &resp);
1858 	resp &= ~CDNS_DP_FRAMER_EN;
1859 	resp |= CDNS_DP_NO_VIDEO_MODE;
1860 	cdns_mhdp_reg_write(mhdp, CDNS_DP_FRAMER_GLOBAL_CONFIG, resp);
1861 
1862 	cdns_mhdp_link_down(mhdp);
1863 
1864 	/* Disable VIF clock for stream 0 */
1865 	cdns_mhdp_reg_read(mhdp, CDNS_DPTX_CAR, &resp);
1866 	cdns_mhdp_reg_write(mhdp, CDNS_DPTX_CAR,
1867 			    resp & ~(CDNS_VIF_CLK_EN | CDNS_VIF_CLK_RSTN));
1868 
1869 	if (mhdp->info && mhdp->info->ops && mhdp->info->ops->disable)
1870 		mhdp->info->ops->disable(mhdp);
1871 
1872 	mhdp->connector = NULL;
1873 	mutex_unlock(&mhdp->link_mutex);
1874 }
1875 
1876 static void cdns_mhdp_detach(struct drm_bridge *bridge)
1877 {
1878 	struct cdns_mhdp_device *mhdp = bridge_to_mhdp(bridge);
1879 
1880 	dev_dbg(mhdp->dev, "%s\n", __func__);
1881 
1882 	drm_dp_aux_unregister(&mhdp->aux);
1883 
1884 	spin_lock(&mhdp->start_lock);
1885 
1886 	mhdp->bridge_attached = false;
1887 
1888 	spin_unlock(&mhdp->start_lock);
1889 
1890 	writel(~0, mhdp->regs + CDNS_APB_INT_MASK);
1891 }
1892 
1893 static struct drm_bridge_state *
1894 cdns_mhdp_bridge_atomic_duplicate_state(struct drm_bridge *bridge)
1895 {
1896 	struct cdns_mhdp_bridge_state *state;
1897 
1898 	state = kzalloc_obj(*state);
1899 	if (!state)
1900 		return NULL;
1901 
1902 	__drm_atomic_helper_bridge_duplicate_state(bridge, &state->base);
1903 
1904 	return &state->base;
1905 }
1906 
1907 static void
1908 cdns_mhdp_bridge_atomic_destroy_state(struct drm_bridge *bridge,
1909 				      struct drm_bridge_state *state)
1910 {
1911 	struct cdns_mhdp_bridge_state *cdns_mhdp_state;
1912 
1913 	cdns_mhdp_state = to_cdns_mhdp_bridge_state(state);
1914 
1915 	if (cdns_mhdp_state->current_mode) {
1916 		drm_mode_destroy(bridge->dev, cdns_mhdp_state->current_mode);
1917 		cdns_mhdp_state->current_mode = NULL;
1918 	}
1919 
1920 	kfree(cdns_mhdp_state);
1921 }
1922 
1923 static struct drm_bridge_state *
1924 cdns_mhdp_bridge_atomic_reset(struct drm_bridge *bridge)
1925 {
1926 	struct cdns_mhdp_bridge_state *cdns_mhdp_state;
1927 
1928 	cdns_mhdp_state = kzalloc_obj(*cdns_mhdp_state);
1929 	if (!cdns_mhdp_state)
1930 		return NULL;
1931 
1932 	__drm_atomic_helper_bridge_reset(bridge, &cdns_mhdp_state->base);
1933 
1934 	return &cdns_mhdp_state->base;
1935 }
1936 
1937 static u32 *cdns_mhdp_get_input_bus_fmts(struct drm_bridge *bridge,
1938 					 struct drm_bridge_state *bridge_state,
1939 					 struct drm_crtc_state *crtc_state,
1940 					 struct drm_connector_state *conn_state,
1941 					 u32 output_fmt,
1942 					 unsigned int *num_input_fmts)
1943 {
1944 	u32 *input_fmts;
1945 
1946 	*num_input_fmts = 0;
1947 
1948 	input_fmts = kzalloc_obj(*input_fmts);
1949 	if (!input_fmts)
1950 		return NULL;
1951 
1952 	*num_input_fmts = 1;
1953 	input_fmts[0] = MEDIA_BUS_FMT_RGB121212_1X36;
1954 
1955 	return input_fmts;
1956 }
1957 
1958 static int cdns_mhdp_atomic_check(struct drm_bridge *bridge,
1959 				  struct drm_bridge_state *bridge_state,
1960 				  struct drm_crtc_state *crtc_state,
1961 				  struct drm_connector_state *conn_state)
1962 {
1963 	struct cdns_mhdp_device *mhdp = bridge_to_mhdp(bridge);
1964 	const struct drm_display_mode *mode = &crtc_state->adjusted_mode;
1965 	struct drm_connector_state *old_state, *new_state;
1966 	struct drm_atomic_state *state = crtc_state->state;
1967 	struct drm_connector *conn = mhdp->connector;
1968 	u64 old_cp, new_cp;
1969 
1970 	mutex_lock(&mhdp->link_mutex);
1971 
1972 	if (!cdns_mhdp_bandwidth_ok(mhdp, mode, mhdp->link.num_lanes,
1973 				    mhdp->link.rate)) {
1974 		dev_err(mhdp->dev, "%s: Not enough BW for %s (%u lanes at %u Mbps)\n",
1975 			__func__, mode->name, mhdp->link.num_lanes,
1976 			mhdp->link.rate / 100);
1977 		mutex_unlock(&mhdp->link_mutex);
1978 		return -EINVAL;
1979 	}
1980 
1981 	/*
1982 	 * There might be flags negotiation supported in future.
1983 	 * Set the bus flags in atomic_check statically for now.
1984 	 */
1985 	if (mhdp->info)
1986 		bridge_state->input_bus_cfg.flags = *mhdp->info->input_bus_flags;
1987 
1988 	if (conn && mhdp->hdcp_supported) {
1989 		old_state = drm_atomic_get_old_connector_state(state, conn);
1990 		new_state = drm_atomic_get_new_connector_state(state, conn);
1991 		old_cp = old_state->content_protection;
1992 		new_cp = new_state->content_protection;
1993 
1994 		if (old_state->hdcp_content_type != new_state->hdcp_content_type &&
1995 		    new_cp != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) {
1996 			new_state->content_protection = DRM_MODE_CONTENT_PROTECTION_DESIRED;
1997 			crtc_state = drm_atomic_get_new_crtc_state(state, new_state->crtc);
1998 			crtc_state->mode_changed = true;
1999 		}
2000 
2001 		if (!new_state->crtc) {
2002 			if (old_cp == DRM_MODE_CONTENT_PROTECTION_ENABLED)
2003 				new_state->content_protection = DRM_MODE_CONTENT_PROTECTION_DESIRED;
2004 		}
2005 	}
2006 
2007 	mutex_unlock(&mhdp->link_mutex);
2008 	return 0;
2009 }
2010 
2011 static enum drm_connector_status
2012 cdns_mhdp_bridge_detect(struct drm_bridge *bridge, struct drm_connector *connector)
2013 {
2014 	struct cdns_mhdp_device *mhdp = bridge_to_mhdp(bridge);
2015 
2016 	return cdns_mhdp_detect(mhdp);
2017 }
2018 
2019 static const struct drm_edid *cdns_mhdp_bridge_edid_read(struct drm_bridge *bridge,
2020 							 struct drm_connector *connector)
2021 {
2022 	struct cdns_mhdp_device *mhdp = bridge_to_mhdp(bridge);
2023 
2024 	return cdns_mhdp_edid_read(mhdp, connector);
2025 }
2026 
2027 static enum drm_mode_status
2028 cdns_mhdp_bridge_mode_valid(struct drm_bridge *bridge,
2029 			    const struct drm_display_info *info,
2030 			    const struct drm_display_mode *mode)
2031 {
2032 	struct cdns_mhdp_device *mhdp = bridge_to_mhdp(bridge);
2033 
2034 	mutex_lock(&mhdp->link_mutex);
2035 
2036 	if (!cdns_mhdp_bandwidth_ok(mhdp, mode, mhdp->link.num_lanes,
2037 				    mhdp->link.rate)) {
2038 		mutex_unlock(&mhdp->link_mutex);
2039 		return MODE_CLOCK_HIGH;
2040 	}
2041 
2042 	mutex_unlock(&mhdp->link_mutex);
2043 	return MODE_OK;
2044 }
2045 
2046 static const struct drm_bridge_funcs cdns_mhdp_bridge_funcs = {
2047 	.atomic_enable = cdns_mhdp_atomic_enable,
2048 	.atomic_disable = cdns_mhdp_atomic_disable,
2049 	.atomic_check = cdns_mhdp_atomic_check,
2050 	.attach = cdns_mhdp_attach,
2051 	.detach = cdns_mhdp_detach,
2052 	.atomic_duplicate_state = cdns_mhdp_bridge_atomic_duplicate_state,
2053 	.atomic_destroy_state = cdns_mhdp_bridge_atomic_destroy_state,
2054 	.atomic_reset = cdns_mhdp_bridge_atomic_reset,
2055 	.atomic_get_input_bus_fmts = cdns_mhdp_get_input_bus_fmts,
2056 	.detect = cdns_mhdp_bridge_detect,
2057 	.edid_read = cdns_mhdp_bridge_edid_read,
2058 	.hpd_enable = cdns_mhdp_bridge_hpd_enable,
2059 	.hpd_disable = cdns_mhdp_bridge_hpd_disable,
2060 	.mode_valid = cdns_mhdp_bridge_mode_valid,
2061 };
2062 
2063 static bool cdns_mhdp_detect_hpd(struct cdns_mhdp_device *mhdp, bool *hpd_pulse)
2064 {
2065 	int hpd_event, hpd_status;
2066 
2067 	*hpd_pulse = false;
2068 
2069 	hpd_event = cdns_mhdp_read_hpd_event(mhdp);
2070 
2071 	/* Getting event bits failed, bail out */
2072 	if (hpd_event < 0) {
2073 		dev_warn(mhdp->dev, "%s: read event failed: %d\n",
2074 			 __func__, hpd_event);
2075 		return false;
2076 	}
2077 
2078 	hpd_status = cdns_mhdp_get_hpd_status(mhdp);
2079 	if (hpd_status < 0) {
2080 		dev_warn(mhdp->dev, "%s: get hpd status failed: %d\n",
2081 			 __func__, hpd_status);
2082 		return false;
2083 	}
2084 
2085 	if (hpd_event & DPTX_READ_EVENT_HPD_PULSE)
2086 		*hpd_pulse = true;
2087 
2088 	return !!hpd_status;
2089 }
2090 
2091 static int cdns_mhdp_update_link_status(struct cdns_mhdp_device *mhdp)
2092 {
2093 	struct cdns_mhdp_bridge_state *cdns_bridge_state;
2094 	struct drm_display_mode *current_mode;
2095 	bool old_plugged = mhdp->plugged;
2096 	struct drm_bridge_state *state;
2097 	u8 status[DP_LINK_STATUS_SIZE];
2098 	bool hpd_pulse;
2099 	int ret = 0;
2100 
2101 	mutex_lock(&mhdp->link_mutex);
2102 
2103 	mhdp->plugged = cdns_mhdp_detect_hpd(mhdp, &hpd_pulse);
2104 
2105 	if (!mhdp->plugged) {
2106 		cdns_mhdp_link_down(mhdp);
2107 		mhdp->link.rate = mhdp->host.link_rate;
2108 		mhdp->link.num_lanes = mhdp->host.lanes_cnt;
2109 		goto out;
2110 	}
2111 
2112 	/*
2113 	 * If we get a HPD pulse event and we were and still are connected,
2114 	 * check the link status. If link status is ok, there's nothing to do
2115 	 * as we don't handle DP interrupts. If link status is bad, continue
2116 	 * with full link setup.
2117 	 */
2118 	if (hpd_pulse && old_plugged == mhdp->plugged) {
2119 		ret = drm_dp_dpcd_read_link_status(&mhdp->aux, status);
2120 
2121 		/*
2122 		 * If everything looks fine, just return, as we don't handle
2123 		 * DP IRQs.
2124 		 */
2125 		if (!ret &&
2126 		    drm_dp_channel_eq_ok(status, mhdp->link.num_lanes) &&
2127 		    drm_dp_clock_recovery_ok(status, mhdp->link.num_lanes))
2128 			goto out;
2129 
2130 		/* If link is bad, mark link as down so that we do a new LT */
2131 		mhdp->link_up = false;
2132 	}
2133 
2134 	if (!mhdp->link_up) {
2135 		ret = cdns_mhdp_link_up(mhdp);
2136 		if (ret < 0)
2137 			goto out;
2138 	}
2139 
2140 	if (mhdp->bridge_enabled) {
2141 		state = drm_priv_to_bridge_state(mhdp->bridge.base.state);
2142 		if (!state) {
2143 			ret = -EINVAL;
2144 			goto out;
2145 		}
2146 
2147 		cdns_bridge_state = to_cdns_mhdp_bridge_state(state);
2148 		if (!cdns_bridge_state) {
2149 			ret = -EINVAL;
2150 			goto out;
2151 		}
2152 
2153 		current_mode = cdns_bridge_state->current_mode;
2154 		if (!current_mode) {
2155 			ret = -EINVAL;
2156 			goto out;
2157 		}
2158 
2159 		if (!cdns_mhdp_bandwidth_ok(mhdp, current_mode, mhdp->link.num_lanes,
2160 					    mhdp->link.rate)) {
2161 			ret = -EINVAL;
2162 			goto out;
2163 		}
2164 
2165 		dev_dbg(mhdp->dev, "%s: Enabling mode %s\n", __func__,
2166 			current_mode->name);
2167 
2168 		cdns_mhdp_sst_enable(mhdp, current_mode);
2169 	}
2170 out:
2171 	mutex_unlock(&mhdp->link_mutex);
2172 	return ret;
2173 }
2174 
2175 static void cdns_mhdp_modeset_retry_fn(struct work_struct *work)
2176 {
2177 	struct cdns_mhdp_device *mhdp;
2178 	struct drm_connector *conn;
2179 
2180 	mhdp = container_of(work, typeof(*mhdp), modeset_retry_work);
2181 
2182 	conn = mhdp->connector;
2183 
2184 	/* Grab the locks before changing connector property */
2185 	mutex_lock(&conn->dev->mode_config.mutex);
2186 
2187 	/*
2188 	 * Set connector link status to BAD and send a Uevent to notify
2189 	 * userspace to do a modeset.
2190 	 */
2191 	drm_connector_set_link_status_property(conn, DRM_MODE_LINK_STATUS_BAD);
2192 	mutex_unlock(&conn->dev->mode_config.mutex);
2193 
2194 	/* Send Hotplug uevent so userspace can reprobe */
2195 	drm_kms_helper_hotplug_event(mhdp->bridge.dev);
2196 }
2197 
2198 static irqreturn_t cdns_mhdp_irq_handler(int irq, void *data)
2199 {
2200 	struct cdns_mhdp_device *mhdp = data;
2201 	u32 apb_stat, sw_ev0;
2202 	bool bridge_attached;
2203 
2204 	apb_stat = readl(mhdp->regs + CDNS_APB_INT_STATUS);
2205 	if (!(apb_stat & CDNS_APB_INT_MASK_SW_EVENT_INT))
2206 		return IRQ_NONE;
2207 
2208 	sw_ev0 = readl(mhdp->regs + CDNS_SW_EVENT0);
2209 
2210 	/*
2211 	 *  Calling drm_kms_helper_hotplug_event() when not attached
2212 	 *  to drm device causes an oops because the drm_bridge->dev
2213 	 *  is NULL. See cdns_mhdp_fw_cb() comments for details about the
2214 	 *  problems related drm_kms_helper_hotplug_event() call.
2215 	 */
2216 	spin_lock(&mhdp->start_lock);
2217 	bridge_attached = mhdp->bridge_attached;
2218 	spin_unlock(&mhdp->start_lock);
2219 
2220 	if (bridge_attached && (sw_ev0 & CDNS_DPTX_HPD)) {
2221 		schedule_work(&mhdp->hpd_work);
2222 	}
2223 
2224 	if (sw_ev0 & ~CDNS_DPTX_HPD) {
2225 		mhdp->sw_events |= (sw_ev0 & ~CDNS_DPTX_HPD);
2226 		wake_up(&mhdp->sw_events_wq);
2227 	}
2228 
2229 	return IRQ_HANDLED;
2230 }
2231 
2232 u32 cdns_mhdp_wait_for_sw_event(struct cdns_mhdp_device *mhdp, u32 event)
2233 {
2234 	u32 ret;
2235 
2236 	ret = wait_event_timeout(mhdp->sw_events_wq,
2237 				 mhdp->sw_events & event,
2238 				 msecs_to_jiffies(500));
2239 	if (!ret) {
2240 		dev_dbg(mhdp->dev, "SW event 0x%x timeout\n", event);
2241 		goto sw_event_out;
2242 	}
2243 
2244 	ret = mhdp->sw_events;
2245 	mhdp->sw_events &= ~event;
2246 
2247 sw_event_out:
2248 	return ret;
2249 }
2250 
2251 static void cdns_mhdp_hpd_work(struct work_struct *work)
2252 {
2253 	struct cdns_mhdp_device *mhdp = container_of(work,
2254 						     struct cdns_mhdp_device,
2255 						     hpd_work);
2256 	cdns_mhdp_update_link_status(mhdp);
2257 
2258 	drm_bridge_hpd_notify(&mhdp->bridge, cdns_mhdp_detect(mhdp));
2259 }
2260 
2261 static int cdns_mhdp_probe(struct platform_device *pdev)
2262 {
2263 	struct device *dev = &pdev->dev;
2264 	struct cdns_mhdp_device *mhdp;
2265 	unsigned long rate;
2266 	struct clk *clk;
2267 	int ret;
2268 	int irq;
2269 
2270 	mhdp = devm_drm_bridge_alloc(dev, struct cdns_mhdp_device, bridge,
2271 				     &cdns_mhdp_bridge_funcs);
2272 	if (IS_ERR(mhdp))
2273 		return PTR_ERR(mhdp);
2274 
2275 	clk = devm_clk_get_enabled(dev, NULL);
2276 	if (IS_ERR(clk)) {
2277 		dev_err(dev, "couldn't get and enable clk: %ld\n", PTR_ERR(clk));
2278 		return PTR_ERR(clk);
2279 	}
2280 
2281 	mhdp->clk = clk;
2282 	mhdp->dev = dev;
2283 	mutex_init(&mhdp->mbox_mutex);
2284 	mutex_init(&mhdp->link_mutex);
2285 	spin_lock_init(&mhdp->start_lock);
2286 
2287 	drm_dp_aux_init(&mhdp->aux);
2288 	mhdp->aux.dev = dev;
2289 	mhdp->aux.transfer = cdns_mhdp_transfer;
2290 
2291 	mhdp->regs = devm_platform_ioremap_resource(pdev, 0);
2292 	if (IS_ERR(mhdp->regs)) {
2293 		dev_err(dev, "Failed to get memory resource\n");
2294 		return PTR_ERR(mhdp->regs);
2295 	}
2296 
2297 	mhdp->sapb_regs = devm_platform_ioremap_resource_byname(pdev, "mhdptx-sapb");
2298 	if (IS_ERR(mhdp->sapb_regs)) {
2299 		mhdp->hdcp_supported = false;
2300 		dev_warn(dev,
2301 			 "Failed to get SAPB memory resource, HDCP not supported\n");
2302 	} else {
2303 		mhdp->hdcp_supported = true;
2304 	}
2305 
2306 	mhdp->phy = devm_of_phy_get_by_index(dev, pdev->dev.of_node, 0);
2307 	if (IS_ERR(mhdp->phy)) {
2308 		dev_err(dev, "no PHY configured\n");
2309 		return PTR_ERR(mhdp->phy);
2310 	}
2311 
2312 	platform_set_drvdata(pdev, mhdp);
2313 
2314 	mhdp->info = of_device_get_match_data(dev);
2315 
2316 	pm_runtime_enable(dev);
2317 	ret = pm_runtime_resume_and_get(dev);
2318 	if (ret < 0) {
2319 		dev_err(dev, "pm_runtime_resume_and_get failed\n");
2320 		pm_runtime_disable(dev);
2321 		return ret;
2322 	}
2323 
2324 	if (mhdp->info && mhdp->info->ops && mhdp->info->ops->init) {
2325 		ret = mhdp->info->ops->init(mhdp);
2326 		if (ret != 0) {
2327 			dev_err(dev, "MHDP platform initialization failed: %d\n",
2328 				ret);
2329 			goto runtime_put;
2330 		}
2331 	}
2332 
2333 	rate = clk_get_rate(clk);
2334 	writel(rate % 1000000, mhdp->regs + CDNS_SW_CLK_L);
2335 	writel(rate / 1000000, mhdp->regs + CDNS_SW_CLK_H);
2336 
2337 	dev_dbg(dev, "func clk rate %lu Hz\n", rate);
2338 
2339 	writel(~0, mhdp->regs + CDNS_APB_INT_MASK);
2340 
2341 	irq = platform_get_irq(pdev, 0);
2342 	ret = devm_request_threaded_irq(mhdp->dev, irq, NULL,
2343 					cdns_mhdp_irq_handler, IRQF_ONESHOT,
2344 					"mhdp8546", mhdp);
2345 	if (ret) {
2346 		dev_err(dev, "cannot install IRQ %d\n", irq);
2347 		ret = -EIO;
2348 		goto plat_fini;
2349 	}
2350 
2351 	cdns_mhdp_fill_host_caps(mhdp);
2352 
2353 	/* Initialize link rate and num of lanes to host values */
2354 	mhdp->link.rate = mhdp->host.link_rate;
2355 	mhdp->link.num_lanes = mhdp->host.lanes_cnt;
2356 
2357 	/* The only currently supported format */
2358 	mhdp->display_fmt.y_only = false;
2359 	mhdp->display_fmt.color_format = DRM_OUTPUT_COLOR_FORMAT_RGB444;
2360 	mhdp->display_fmt.bpc = 8;
2361 
2362 	mhdp->bridge.of_node = pdev->dev.of_node;
2363 	mhdp->bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID |
2364 			   DRM_BRIDGE_OP_HPD;
2365 	mhdp->bridge.type = DRM_MODE_CONNECTOR_DisplayPort;
2366 
2367 	ret = phy_init(mhdp->phy);
2368 	if (ret) {
2369 		dev_err(mhdp->dev, "Failed to initialize PHY: %d\n", ret);
2370 		goto plat_fini;
2371 	}
2372 
2373 	/* Initialize the work for modeset in case of link train failure */
2374 	INIT_WORK(&mhdp->modeset_retry_work, cdns_mhdp_modeset_retry_fn);
2375 	INIT_WORK(&mhdp->hpd_work, cdns_mhdp_hpd_work);
2376 
2377 	init_waitqueue_head(&mhdp->fw_load_wq);
2378 	init_waitqueue_head(&mhdp->sw_events_wq);
2379 
2380 	ret = cdns_mhdp_load_firmware(mhdp);
2381 	if (ret)
2382 		goto phy_exit;
2383 
2384 	if (mhdp->hdcp_supported)
2385 		cdns_mhdp_hdcp_init(mhdp);
2386 
2387 	drm_bridge_add(&mhdp->bridge);
2388 
2389 	return 0;
2390 
2391 phy_exit:
2392 	phy_exit(mhdp->phy);
2393 plat_fini:
2394 	if (mhdp->info && mhdp->info->ops && mhdp->info->ops->exit)
2395 		mhdp->info->ops->exit(mhdp);
2396 runtime_put:
2397 	pm_runtime_put_sync(dev);
2398 	pm_runtime_disable(dev);
2399 
2400 	return ret;
2401 }
2402 
2403 static void cdns_mhdp_remove(struct platform_device *pdev)
2404 {
2405 	struct cdns_mhdp_device *mhdp = platform_get_drvdata(pdev);
2406 	unsigned long timeout = msecs_to_jiffies(100);
2407 	int ret;
2408 
2409 	drm_bridge_remove(&mhdp->bridge);
2410 
2411 	ret = wait_event_timeout(mhdp->fw_load_wq,
2412 				 mhdp->hw_state == MHDP_HW_READY,
2413 				 timeout);
2414 	spin_lock(&mhdp->start_lock);
2415 	mhdp->hw_state = MHDP_HW_STOPPED;
2416 	spin_unlock(&mhdp->start_lock);
2417 
2418 	if (ret == 0) {
2419 		dev_err(mhdp->dev, "%s: Timeout waiting for fw loading\n",
2420 			__func__);
2421 	} else {
2422 		ret = cdns_mhdp_set_firmware_active(mhdp, false);
2423 		if (ret)
2424 			dev_err(mhdp->dev, "Failed to stop firmware (%pe)\n",
2425 				ERR_PTR(ret));
2426 	}
2427 
2428 	phy_exit(mhdp->phy);
2429 
2430 	if (mhdp->info && mhdp->info->ops && mhdp->info->ops->exit)
2431 		mhdp->info->ops->exit(mhdp);
2432 
2433 	pm_runtime_put_sync(&pdev->dev);
2434 	pm_runtime_disable(&pdev->dev);
2435 
2436 	cancel_work_sync(&mhdp->modeset_retry_work);
2437 	flush_work(&mhdp->hpd_work);
2438 	/* Ignoring mhdp->hdcp.check_work and mhdp->hdcp.prop_work here. */
2439 }
2440 
2441 static const struct of_device_id mhdp_ids[] = {
2442 	{ .compatible = "cdns,mhdp8546", },
2443 #ifdef CONFIG_DRM_CDNS_MHDP8546_J721E
2444 	{ .compatible = "ti,j721e-mhdp8546",
2445 	  .data = &(const struct cdns_mhdp_platform_info) {
2446 		  .input_bus_flags = &mhdp_ti_j721e_bridge_input_bus_flags,
2447 		  .ops = &mhdp_ti_j721e_ops,
2448 	  },
2449 	},
2450 #endif
2451 	{ /* sentinel */ }
2452 };
2453 MODULE_DEVICE_TABLE(of, mhdp_ids);
2454 
2455 static struct platform_driver mhdp_driver = {
2456 	.driver	= {
2457 		.name		= "cdns-mhdp8546",
2458 		.of_match_table	= mhdp_ids,
2459 	},
2460 	.probe	= cdns_mhdp_probe,
2461 	.remove = cdns_mhdp_remove,
2462 };
2463 module_platform_driver(mhdp_driver);
2464 
2465 MODULE_FIRMWARE(FW_NAME);
2466 
2467 MODULE_AUTHOR("Quentin Schulz <quentin.schulz@free-electrons.com>");
2468 MODULE_AUTHOR("Swapnil Jakhade <sjakhade@cadence.com>");
2469 MODULE_AUTHOR("Yuti Amonkar <yamonkar@cadence.com>");
2470 MODULE_AUTHOR("Tomi Valkeinen <tomi.valkeinen@ti.com>");
2471 MODULE_AUTHOR("Jyri Sarha <jsarha@ti.com>");
2472 MODULE_DESCRIPTION("Cadence MHDP8546 DP bridge driver");
2473 MODULE_LICENSE("GPL");
2474 MODULE_ALIAS("platform:cdns-mhdp8546");
2475