1# SPDX-License-Identifier: GPL-2.0-only 2config DRM_CDNS_DSI 3 tristate "Cadence DPI/DSI bridge" 4 select DRM_KMS_HELPER 5 select DRM_MIPI_DSI 6 select DRM_PANEL_BRIDGE 7 select GENERIC_PHY_MIPI_DPHY 8 depends on OF 9 help 10 Support Cadence DPI to DSI bridge. This is an internal 11 bridge and is meant to be directly embedded in a SoC. 12 13if DRM_CDNS_DSI 14 15config DRM_CDNS_DSI_J721E 16 bool "J721E Cadence DSI wrapper support" 17 default y 18 help 19 Support J721E Cadence DSI wrapper. The wrapper manages 20 the routing of the DSS DPI signal to the Cadence DSI. 21endif 22 23config DRM_CDNS_MHDP8546 24 tristate "Cadence DPI/DP bridge" 25 select DRM_DISPLAY_DP_HELPER 26 select DRM_DISPLAY_HDCP_HELPER 27 select DRM_DISPLAY_HELPER 28 select DRM_KMS_HELPER 29 select DRM_PANEL_BRIDGE 30 depends on OF 31 help 32 Support Cadence DPI to DP bridge. This is an internal 33 bridge and is meant to be directly embedded in a SoC. 34 It takes a DPI stream as input and outputs it encoded 35 in DP format. 36 37if DRM_CDNS_MHDP8546 38 39config DRM_CDNS_MHDP8546_J721E 40 depends on ARCH_K3 || COMPILE_TEST 41 bool "J721E Cadence DPI/DP wrapper support" 42 default y 43 help 44 Support J721E Cadence DPI/DP wrapper. This is a wrapper 45 which adds support for J721E related platform ops. It 46 initializes the J721E Display Port and sets up the 47 clock and data muxes. 48endif 49