1 /* 2 * Copyright 2012 Red Hat Inc. 3 * Parts based on xf86-video-ast 4 * Copyright (c) 2005 ASPEED Technology Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 18 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 19 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 20 * USE OR OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * The above copyright notice and this permission notice (including the 23 * next paragraph) shall be included in all copies or substantial portions 24 * of the Software. 25 * 26 */ 27 /* 28 * Authors: Dave Airlie <airlied@redhat.com> 29 */ 30 31 #include <linux/delay.h> 32 #include <linux/export.h> 33 #include <linux/pci.h> 34 35 #include <drm/drm_atomic.h> 36 #include <drm/drm_atomic_helper.h> 37 #include <drm/drm_crtc.h> 38 #include <drm/drm_damage_helper.h> 39 #include <drm/drm_format_helper.h> 40 #include <drm/drm_fourcc.h> 41 #include <drm/drm_gem_atomic_helper.h> 42 #include <drm/drm_gem_framebuffer_helper.h> 43 #include <drm/drm_gem_shmem_helper.h> 44 #include <drm/drm_managed.h> 45 #include <drm/drm_panic.h> 46 #include <drm/drm_probe_helper.h> 47 48 #include "ast_drv.h" 49 #include "ast_tables.h" 50 #include "ast_vbios.h" 51 52 #define AST_LUT_SIZE 256 53 54 #define AST_PRIMARY_PLANE_MAX_OFFSET (BIT(16) - 1) 55 56 static unsigned long ast_fb_vram_offset(void) 57 { 58 return 0; // with shmem, the primary plane is always at offset 0 59 } 60 61 static unsigned long ast_fb_vram_size(struct ast_device *ast) 62 { 63 struct drm_device *dev = &ast->base; 64 unsigned long offset = ast_fb_vram_offset(); // starts at offset 65 long cursor_offset = ast_cursor_vram_offset(ast); // ends at cursor offset 66 67 if (cursor_offset < 0) 68 cursor_offset = ast->vram_size; // no cursor; it's all ours 69 if (drm_WARN_ON_ONCE(dev, offset > cursor_offset)) 70 return 0; // cannot legally happen; signal error 71 return cursor_offset - offset; 72 } 73 74 static inline void ast_load_palette_index(struct ast_device *ast, 75 u8 index, u8 red, u8 green, 76 u8 blue) 77 { 78 ast_io_write8(ast, AST_IO_VGADWR, index); 79 ast_io_read8(ast, AST_IO_VGASRI); 80 ast_io_write8(ast, AST_IO_VGAPDR, red); 81 ast_io_read8(ast, AST_IO_VGASRI); 82 ast_io_write8(ast, AST_IO_VGAPDR, green); 83 ast_io_read8(ast, AST_IO_VGASRI); 84 ast_io_write8(ast, AST_IO_VGAPDR, blue); 85 ast_io_read8(ast, AST_IO_VGASRI); 86 } 87 88 static void ast_crtc_set_gamma_linear(struct ast_device *ast, 89 const struct drm_format_info *format) 90 { 91 int i; 92 93 switch (format->format) { 94 case DRM_FORMAT_C8: /* In this case, gamma table is used as color palette */ 95 case DRM_FORMAT_RGB565: 96 case DRM_FORMAT_XRGB8888: 97 for (i = 0; i < AST_LUT_SIZE; i++) 98 ast_load_palette_index(ast, i, i, i, i); 99 break; 100 default: 101 drm_warn_once(&ast->base, "Unsupported format %p4cc for gamma correction\n", 102 &format->format); 103 break; 104 } 105 } 106 107 static void ast_crtc_set_gamma(struct ast_device *ast, 108 const struct drm_format_info *format, 109 struct drm_color_lut *lut) 110 { 111 int i; 112 113 switch (format->format) { 114 case DRM_FORMAT_C8: /* In this case, gamma table is used as color palette */ 115 case DRM_FORMAT_RGB565: 116 case DRM_FORMAT_XRGB8888: 117 for (i = 0; i < AST_LUT_SIZE; i++) 118 ast_load_palette_index(ast, i, 119 lut[i].red >> 8, 120 lut[i].green >> 8, 121 lut[i].blue >> 8); 122 break; 123 default: 124 drm_warn_once(&ast->base, "Unsupported format %p4cc for gamma correction\n", 125 &format->format); 126 break; 127 } 128 } 129 130 static void ast_set_vbios_color_reg(struct ast_device *ast, 131 const struct drm_format_info *format, 132 const struct ast_vbios_enhtable *vmode) 133 { 134 u32 color_index; 135 136 switch (format->cpp[0]) { 137 case 1: 138 color_index = VGAModeIndex - 1; 139 break; 140 case 2: 141 color_index = HiCModeIndex; 142 break; 143 case 3: 144 case 4: 145 color_index = TrueCModeIndex; 146 break; 147 default: 148 return; 149 } 150 151 ast_set_index_reg(ast, AST_IO_VGACRI, 0x8c, (u8)((color_index & 0x0f) << 4)); 152 153 ast_set_index_reg(ast, AST_IO_VGACRI, 0x91, 0x00); 154 155 if (vmode->flags & NewModeInfo) { 156 ast_set_index_reg(ast, AST_IO_VGACRI, 0x91, 0xa8); 157 ast_set_index_reg(ast, AST_IO_VGACRI, 0x92, format->cpp[0] * 8); 158 } 159 } 160 161 static void ast_set_vbios_mode_reg(struct ast_device *ast, 162 const struct drm_display_mode *adjusted_mode, 163 const struct ast_vbios_enhtable *vmode) 164 { 165 u32 refresh_rate_index, mode_id; 166 167 refresh_rate_index = vmode->refresh_rate_index; 168 mode_id = vmode->mode_id; 169 170 ast_set_index_reg(ast, AST_IO_VGACRI, 0x8d, refresh_rate_index & 0xff); 171 ast_set_index_reg(ast, AST_IO_VGACRI, 0x8e, mode_id & 0xff); 172 173 ast_set_index_reg(ast, AST_IO_VGACRI, 0x91, 0x00); 174 175 if (vmode->flags & NewModeInfo) { 176 ast_set_index_reg(ast, AST_IO_VGACRI, 0x91, 0xa8); 177 ast_set_index_reg(ast, AST_IO_VGACRI, 0x93, adjusted_mode->clock / 1000); 178 ast_set_index_reg(ast, AST_IO_VGACRI, 0x94, adjusted_mode->crtc_hdisplay); 179 ast_set_index_reg(ast, AST_IO_VGACRI, 0x95, adjusted_mode->crtc_hdisplay >> 8); 180 ast_set_index_reg(ast, AST_IO_VGACRI, 0x96, adjusted_mode->crtc_vdisplay); 181 ast_set_index_reg(ast, AST_IO_VGACRI, 0x97, adjusted_mode->crtc_vdisplay >> 8); 182 } 183 } 184 185 static void ast_set_std_reg(struct ast_device *ast, 186 struct drm_display_mode *mode, 187 const struct ast_vbios_stdtable *stdtable) 188 { 189 u32 i; 190 u8 jreg; 191 192 jreg = stdtable->misc; 193 ast_io_write8(ast, AST_IO_VGAMR_W, jreg); 194 195 /* Set SEQ; except Screen Disable field */ 196 ast_set_index_reg(ast, AST_IO_VGASRI, 0x00, 0x03); 197 ast_set_index_reg_mask(ast, AST_IO_VGASRI, 0x01, 0x20, stdtable->seq[0]); 198 for (i = 1; i < 4; i++) { 199 jreg = stdtable->seq[i]; 200 ast_set_index_reg(ast, AST_IO_VGASRI, (i + 1), jreg); 201 } 202 203 /* Set CRTC; except base address and offset */ 204 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x11, 0x7f, 0x00); 205 for (i = 0; i < 12; i++) 206 ast_set_index_reg(ast, AST_IO_VGACRI, i, stdtable->crtc[i]); 207 for (i = 14; i < 19; i++) 208 ast_set_index_reg(ast, AST_IO_VGACRI, i, stdtable->crtc[i]); 209 for (i = 20; i < 25; i++) 210 ast_set_index_reg(ast, AST_IO_VGACRI, i, stdtable->crtc[i]); 211 212 /* set AR */ 213 jreg = ast_io_read8(ast, AST_IO_VGAIR1_R); 214 for (i = 0; i < 20; i++) { 215 jreg = stdtable->ar[i]; 216 ast_io_write8(ast, AST_IO_VGAARI_W, (u8)i); 217 ast_io_write8(ast, AST_IO_VGAARI_W, jreg); 218 } 219 ast_io_write8(ast, AST_IO_VGAARI_W, 0x14); 220 ast_io_write8(ast, AST_IO_VGAARI_W, 0x00); 221 222 jreg = ast_io_read8(ast, AST_IO_VGAIR1_R); 223 ast_io_write8(ast, AST_IO_VGAARI_W, 0x20); 224 225 /* Set GR */ 226 for (i = 0; i < 9; i++) 227 ast_set_index_reg(ast, AST_IO_VGAGRI, i, stdtable->gr[i]); 228 } 229 230 static void ast_set_crtc_reg(struct ast_device *ast, 231 struct drm_display_mode *mode, 232 const struct ast_vbios_enhtable *vmode) 233 { 234 u8 jreg05 = 0, jreg07 = 0, jreg09 = 0, jregAC = 0, jregAD = 0, jregAE = 0; 235 u16 temp, precache = 0; 236 237 if ((IS_AST_GEN6(ast) || IS_AST_GEN7(ast)) && 238 (vmode->flags & AST2500PreCatchCRT)) 239 precache = 40; 240 241 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x11, 0x7f, 0x00); 242 243 temp = (mode->crtc_htotal >> 3) - 5; 244 if (temp & 0x100) 245 jregAC |= 0x01; /* HT D[8] */ 246 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x00, 0x00, temp); 247 248 temp = (mode->crtc_hdisplay >> 3) - 1; 249 if (temp & 0x100) 250 jregAC |= 0x04; /* HDE D[8] */ 251 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x01, 0x00, temp); 252 253 temp = (mode->crtc_hblank_start >> 3) - 1; 254 if (temp & 0x100) 255 jregAC |= 0x10; /* HBS D[8] */ 256 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x02, 0x00, temp); 257 258 temp = ((mode->crtc_hblank_end >> 3) - 1) & 0x7f; 259 if (temp & 0x20) 260 jreg05 |= 0x80; /* HBE D[5] */ 261 if (temp & 0x40) 262 jregAD |= 0x01; /* HBE D[5] */ 263 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x03, 0xE0, (temp & 0x1f)); 264 265 temp = ((mode->crtc_hsync_start-precache) >> 3) - 1; 266 if (temp & 0x100) 267 jregAC |= 0x40; /* HRS D[5] */ 268 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x04, 0x00, temp); 269 270 temp = (((mode->crtc_hsync_end-precache) >> 3) - 1) & 0x3f; 271 if (temp & 0x20) 272 jregAD |= 0x04; /* HRE D[5] */ 273 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x05, 0x60, (u8)((temp & 0x1f) | jreg05)); 274 275 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xAC, 0x00, jregAC); 276 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xAD, 0x00, jregAD); 277 278 // Workaround for HSync Time non octave pixels (1920x1080@60Hz HSync 44 pixels); 279 if (IS_AST_GEN7(ast) && (mode->crtc_vdisplay == 1080)) 280 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xFC, 0xFD, 0x02); 281 else 282 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xFC, 0xFD, 0x00); 283 284 /* vert timings */ 285 temp = (mode->crtc_vtotal) - 2; 286 if (temp & 0x100) 287 jreg07 |= 0x01; 288 if (temp & 0x200) 289 jreg07 |= 0x20; 290 if (temp & 0x400) 291 jregAE |= 0x01; 292 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x06, 0x00, temp); 293 294 temp = (mode->crtc_vsync_start) - 1; 295 if (temp & 0x100) 296 jreg07 |= 0x04; 297 if (temp & 0x200) 298 jreg07 |= 0x80; 299 if (temp & 0x400) 300 jregAE |= 0x08; 301 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x10, 0x00, temp); 302 303 temp = (mode->crtc_vsync_end - 1) & 0x3f; 304 if (temp & 0x10) 305 jregAE |= 0x20; 306 if (temp & 0x20) 307 jregAE |= 0x40; 308 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x11, 0x70, temp & 0xf); 309 310 temp = mode->crtc_vdisplay - 1; 311 if (temp & 0x100) 312 jreg07 |= 0x02; 313 if (temp & 0x200) 314 jreg07 |= 0x40; 315 if (temp & 0x400) 316 jregAE |= 0x02; 317 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x12, 0x00, temp); 318 319 temp = mode->crtc_vblank_start - 1; 320 if (temp & 0x100) 321 jreg07 |= 0x08; 322 if (temp & 0x200) 323 jreg09 |= 0x20; 324 if (temp & 0x400) 325 jregAE |= 0x04; 326 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x15, 0x00, temp); 327 328 temp = mode->crtc_vblank_end - 1; 329 if (temp & 0x100) 330 jregAE |= 0x10; 331 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x16, 0x00, temp); 332 333 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x07, 0x00, jreg07); 334 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x09, 0xdf, jreg09); 335 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xAE, 0x00, (jregAE | 0x80)); 336 337 if (precache) 338 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0x3f, 0x80); 339 else 340 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0x3f, 0x00); 341 342 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x11, 0x7f, 0x80); 343 } 344 345 static void ast_set_offset_reg(struct ast_device *ast, 346 struct drm_framebuffer *fb) 347 { 348 u16 offset; 349 350 offset = fb->pitches[0] >> 3; 351 ast_set_index_reg(ast, AST_IO_VGACRI, 0x13, (offset & 0xff)); 352 ast_set_index_reg(ast, AST_IO_VGACRI, 0xb0, (offset >> 8) & 0x3f); 353 } 354 355 static void ast_set_dclk_reg(struct ast_device *ast, 356 struct drm_display_mode *mode, 357 const struct ast_vbios_enhtable *vmode) 358 { 359 const struct ast_vbios_dclk_info *clk_info; 360 361 if (IS_AST_GEN6(ast) || IS_AST_GEN7(ast)) 362 clk_info = &dclk_table_ast2500[vmode->dclk_index]; 363 else 364 clk_info = &dclk_table[vmode->dclk_index]; 365 366 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xc0, 0x00, clk_info->param1); 367 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xc1, 0x00, clk_info->param2); 368 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xbb, 0x0f, 369 (clk_info->param3 & 0xc0) | 370 ((clk_info->param3 & 0x3) << 4)); 371 } 372 373 static void ast_set_color_reg(struct ast_device *ast, 374 const struct drm_format_info *format) 375 { 376 u8 jregA0 = 0, jregA3 = 0, jregA8 = 0; 377 378 switch (format->cpp[0] * 8) { 379 case 8: 380 jregA0 = 0x70; 381 jregA3 = 0x01; 382 jregA8 = 0x00; 383 break; 384 case 15: 385 case 16: 386 jregA0 = 0x70; 387 jregA3 = 0x04; 388 jregA8 = 0x02; 389 break; 390 case 32: 391 jregA0 = 0x70; 392 jregA3 = 0x08; 393 jregA8 = 0x02; 394 break; 395 } 396 397 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xa0, 0x8f, jregA0); 398 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xa3, 0xf0, jregA3); 399 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xa8, 0xfd, jregA8); 400 } 401 402 static void ast_set_crtthd_reg(struct ast_device *ast) 403 { 404 /* Set Threshold */ 405 if (IS_AST_GEN7(ast)) { 406 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa7, 0xe0); 407 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa6, 0xa0); 408 } else if (IS_AST_GEN6(ast) || IS_AST_GEN5(ast) || IS_AST_GEN4(ast)) { 409 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa7, 0x78); 410 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa6, 0x60); 411 } else if (IS_AST_GEN3(ast) || IS_AST_GEN2(ast)) { 412 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa7, 0x3f); 413 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa6, 0x2f); 414 } else { 415 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa7, 0x2f); 416 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa6, 0x1f); 417 } 418 } 419 420 static void ast_set_sync_reg(struct ast_device *ast, 421 struct drm_display_mode *mode, 422 const struct ast_vbios_enhtable *vmode) 423 { 424 u8 jreg; 425 426 jreg = ast_io_read8(ast, AST_IO_VGAMR_R); 427 jreg &= ~0xC0; 428 if (vmode->flags & NVSync) 429 jreg |= 0x80; 430 if (vmode->flags & NHSync) 431 jreg |= 0x40; 432 ast_io_write8(ast, AST_IO_VGAMR_W, jreg); 433 } 434 435 static void ast_set_start_address_crt1(struct ast_device *ast, 436 unsigned int offset) 437 { 438 u32 addr; 439 440 addr = offset >> 2; 441 ast_set_index_reg(ast, AST_IO_VGACRI, 0x0d, (u8)(addr & 0xff)); 442 ast_set_index_reg(ast, AST_IO_VGACRI, 0x0c, (u8)((addr >> 8) & 0xff)); 443 ast_set_index_reg(ast, AST_IO_VGACRI, 0xaf, (u8)((addr >> 16) & 0xff)); 444 445 } 446 447 static void ast_wait_for_vretrace(struct ast_device *ast) 448 { 449 unsigned long timeout = jiffies + HZ; 450 u8 vgair1; 451 452 do { 453 vgair1 = ast_io_read8(ast, AST_IO_VGAIR1_R); 454 } while (!(vgair1 & AST_IO_VGAIR1_VREFRESH) && time_before(jiffies, timeout)); 455 } 456 457 /* 458 * Planes 459 */ 460 461 int ast_plane_init(struct drm_device *dev, struct ast_plane *ast_plane, 462 u64 offset, unsigned long size, 463 uint32_t possible_crtcs, 464 const struct drm_plane_funcs *funcs, 465 const uint32_t *formats, unsigned int format_count, 466 const uint64_t *format_modifiers, 467 enum drm_plane_type type) 468 { 469 struct drm_plane *plane = &ast_plane->base; 470 471 ast_plane->offset = offset; 472 ast_plane->size = size; 473 474 return drm_universal_plane_init(dev, plane, possible_crtcs, funcs, 475 formats, format_count, format_modifiers, 476 type, NULL); 477 } 478 479 void __iomem *ast_plane_vaddr(struct ast_plane *ast_plane) 480 { 481 struct ast_device *ast = to_ast_device(ast_plane->base.dev); 482 483 return ast->vram + ast_plane->offset; 484 } 485 486 /* 487 * Primary plane 488 */ 489 490 static const uint32_t ast_primary_plane_formats[] = { 491 DRM_FORMAT_XRGB8888, 492 DRM_FORMAT_RGB565, 493 DRM_FORMAT_C8, 494 }; 495 496 static int ast_primary_plane_helper_atomic_check(struct drm_plane *plane, 497 struct drm_atomic_state *state) 498 { 499 struct drm_device *dev = plane->dev; 500 struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane); 501 struct drm_crtc_state *new_crtc_state = NULL; 502 struct ast_crtc_state *new_ast_crtc_state; 503 int ret; 504 505 if (new_plane_state->crtc) 506 new_crtc_state = drm_atomic_get_new_crtc_state(state, new_plane_state->crtc); 507 508 ret = drm_atomic_helper_check_plane_state(new_plane_state, new_crtc_state, 509 DRM_PLANE_NO_SCALING, 510 DRM_PLANE_NO_SCALING, 511 false, true); 512 if (ret) { 513 return ret; 514 } else if (!new_plane_state->visible) { 515 if (drm_WARN_ON(dev, new_plane_state->crtc)) /* cannot legally happen */ 516 return -EINVAL; 517 else 518 return 0; 519 } 520 521 new_ast_crtc_state = to_ast_crtc_state(new_crtc_state); 522 523 new_ast_crtc_state->format = new_plane_state->fb->format; 524 525 return 0; 526 } 527 528 static void ast_handle_damage(struct ast_plane *ast_plane, struct iosys_map *src, 529 struct drm_framebuffer *fb, 530 const struct drm_rect *clip) 531 { 532 struct iosys_map dst = IOSYS_MAP_INIT_VADDR_IOMEM(ast_plane_vaddr(ast_plane)); 533 534 iosys_map_incr(&dst, drm_fb_clip_offset(fb->pitches[0], fb->format, clip)); 535 drm_fb_memcpy(&dst, fb->pitches, src, fb, clip); 536 } 537 538 static void ast_primary_plane_helper_atomic_update(struct drm_plane *plane, 539 struct drm_atomic_state *state) 540 { 541 struct drm_device *dev = plane->dev; 542 struct ast_device *ast = to_ast_device(dev); 543 struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane); 544 struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state); 545 struct drm_framebuffer *fb = plane_state->fb; 546 struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane); 547 struct drm_framebuffer *old_fb = old_plane_state->fb; 548 struct ast_plane *ast_plane = to_ast_plane(plane); 549 struct drm_crtc *crtc = plane_state->crtc; 550 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc); 551 struct drm_rect damage; 552 struct drm_atomic_helper_damage_iter iter; 553 554 if (!old_fb || (fb->format != old_fb->format) || crtc_state->mode_changed) { 555 struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state); 556 557 ast_set_color_reg(ast, fb->format); 558 ast_set_vbios_color_reg(ast, fb->format, ast_crtc_state->vmode); 559 } 560 561 drm_atomic_helper_damage_iter_init(&iter, old_plane_state, plane_state); 562 drm_atomic_for_each_plane_damage(&iter, &damage) { 563 ast_handle_damage(ast_plane, shadow_plane_state->data, fb, &damage); 564 } 565 566 /* 567 * Some BMCs stop scanning out the video signal after the driver 568 * reprogrammed the offset. This stalls display output for several 569 * seconds and makes the display unusable. Therefore only update 570 * the offset if it changes. 571 */ 572 if (!old_fb || old_fb->pitches[0] != fb->pitches[0]) 573 ast_set_offset_reg(ast, fb); 574 } 575 576 static void ast_primary_plane_helper_atomic_enable(struct drm_plane *plane, 577 struct drm_atomic_state *state) 578 { 579 struct ast_device *ast = to_ast_device(plane->dev); 580 struct ast_plane *ast_plane = to_ast_plane(plane); 581 582 /* 583 * Some BMCs stop scanning out the video signal after the driver 584 * reprogrammed the scanout address. This stalls display 585 * output for several seconds and makes the display unusable. 586 * Therefore only reprogram the address after enabling the plane. 587 */ 588 ast_set_start_address_crt1(ast, (u32)ast_plane->offset); 589 } 590 591 static void ast_primary_plane_helper_atomic_disable(struct drm_plane *plane, 592 struct drm_atomic_state *state) 593 { 594 /* 595 * Keep this empty function to avoid calling 596 * atomic_update when disabling the plane. 597 */ 598 } 599 600 static int ast_primary_plane_helper_get_scanout_buffer(struct drm_plane *plane, 601 struct drm_scanout_buffer *sb) 602 { 603 struct ast_plane *ast_plane = to_ast_plane(plane); 604 605 if (plane->state && plane->state->fb) { 606 sb->format = plane->state->fb->format; 607 sb->width = plane->state->fb->width; 608 sb->height = plane->state->fb->height; 609 sb->pitch[0] = plane->state->fb->pitches[0]; 610 iosys_map_set_vaddr_iomem(&sb->map[0], ast_plane_vaddr(ast_plane)); 611 return 0; 612 } 613 return -ENODEV; 614 } 615 616 static const struct drm_plane_helper_funcs ast_primary_plane_helper_funcs = { 617 DRM_GEM_SHADOW_PLANE_HELPER_FUNCS, 618 .atomic_check = ast_primary_plane_helper_atomic_check, 619 .atomic_update = ast_primary_plane_helper_atomic_update, 620 .atomic_enable = ast_primary_plane_helper_atomic_enable, 621 .atomic_disable = ast_primary_plane_helper_atomic_disable, 622 .get_scanout_buffer = ast_primary_plane_helper_get_scanout_buffer, 623 }; 624 625 static const struct drm_plane_funcs ast_primary_plane_funcs = { 626 .update_plane = drm_atomic_helper_update_plane, 627 .disable_plane = drm_atomic_helper_disable_plane, 628 .destroy = drm_plane_cleanup, 629 DRM_GEM_SHADOW_PLANE_FUNCS, 630 }; 631 632 static int ast_primary_plane_init(struct ast_device *ast) 633 { 634 struct drm_device *dev = &ast->base; 635 struct ast_plane *ast_primary_plane = &ast->primary_plane; 636 struct drm_plane *primary_plane = &ast_primary_plane->base; 637 u64 offset = ast_fb_vram_offset(); 638 unsigned long size = ast_fb_vram_size(ast); 639 int ret; 640 641 ret = ast_plane_init(dev, ast_primary_plane, offset, size, 642 0x01, &ast_primary_plane_funcs, 643 ast_primary_plane_formats, ARRAY_SIZE(ast_primary_plane_formats), 644 NULL, DRM_PLANE_TYPE_PRIMARY); 645 if (ret) { 646 drm_err(dev, "ast_plane_init() failed: %d\n", ret); 647 return ret; 648 } 649 drm_plane_helper_add(primary_plane, &ast_primary_plane_helper_funcs); 650 drm_plane_enable_fb_damage_clips(primary_plane); 651 652 return 0; 653 } 654 655 /* 656 * CRTC 657 */ 658 659 static enum drm_mode_status 660 ast_crtc_helper_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *mode) 661 { 662 struct ast_device *ast = to_ast_device(crtc->dev); 663 const struct ast_vbios_enhtable *vmode; 664 665 vmode = ast_vbios_find_mode(ast, mode); 666 if (!vmode) 667 return MODE_NOMODE; 668 669 return MODE_OK; 670 } 671 672 static void ast_crtc_helper_mode_set_nofb(struct drm_crtc *crtc) 673 { 674 struct drm_device *dev = crtc->dev; 675 struct ast_device *ast = to_ast_device(dev); 676 struct drm_crtc_state *crtc_state = crtc->state; 677 struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state); 678 const struct ast_vbios_stdtable *std_table = ast_crtc_state->std_table; 679 const struct ast_vbios_enhtable *vmode = ast_crtc_state->vmode; 680 struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode; 681 682 /* 683 * Ensure that no scanout takes place before reprogramming mode 684 * and format registers. 685 * 686 * TODO: Get vblank interrupts working and remove this line. 687 */ 688 ast_wait_for_vretrace(ast); 689 690 ast_set_vbios_mode_reg(ast, adjusted_mode, vmode); 691 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa1, 0x06); 692 ast_set_std_reg(ast, adjusted_mode, std_table); 693 ast_set_crtc_reg(ast, adjusted_mode, vmode); 694 ast_set_dclk_reg(ast, adjusted_mode, vmode); 695 ast_set_crtthd_reg(ast); 696 ast_set_sync_reg(ast, adjusted_mode, vmode); 697 } 698 699 static int ast_crtc_helper_atomic_check(struct drm_crtc *crtc, 700 struct drm_atomic_state *state) 701 { 702 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc); 703 struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode; 704 struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state, crtc); 705 struct ast_crtc_state *old_ast_crtc_state = to_ast_crtc_state(old_crtc_state); 706 struct drm_device *dev = crtc->dev; 707 struct ast_device *ast = to_ast_device(dev); 708 struct ast_crtc_state *ast_state; 709 const struct drm_format_info *format; 710 const struct ast_vbios_enhtable *vmode; 711 unsigned int hborder = 0; 712 unsigned int vborder = 0; 713 int ret; 714 715 if (!crtc_state->enable) 716 return 0; 717 718 ret = drm_atomic_helper_check_crtc_primary_plane(crtc_state); 719 if (ret) 720 return ret; 721 722 ast_state = to_ast_crtc_state(crtc_state); 723 724 format = ast_state->format; 725 if (drm_WARN_ON_ONCE(dev, !format)) 726 return -EINVAL; /* BUG: We didn't set format in primary check(). */ 727 728 /* 729 * The gamma LUT has to be reloaded after changing the primary 730 * plane's color format. 731 */ 732 if (old_ast_crtc_state->format != format) 733 crtc_state->color_mgmt_changed = true; 734 735 if (crtc_state->color_mgmt_changed && crtc_state->gamma_lut) { 736 if (crtc_state->gamma_lut->length != 737 AST_LUT_SIZE * sizeof(struct drm_color_lut)) { 738 drm_err(dev, "Wrong size for gamma_lut %zu\n", 739 crtc_state->gamma_lut->length); 740 return -EINVAL; 741 } 742 } 743 744 /* 745 * Set register tables. 746 * 747 * TODO: These tables mix all kinds of fields and should 748 * probably be resolved into various helper functions. 749 */ 750 switch (format->format) { 751 case DRM_FORMAT_C8: 752 ast_state->std_table = &vbios_stdtable[VGAModeIndex]; 753 break; 754 case DRM_FORMAT_RGB565: 755 ast_state->std_table = &vbios_stdtable[HiCModeIndex]; 756 break; 757 case DRM_FORMAT_RGB888: 758 case DRM_FORMAT_XRGB8888: 759 ast_state->std_table = &vbios_stdtable[TrueCModeIndex]; 760 break; 761 default: 762 return -EINVAL; 763 } 764 765 /* 766 * Find the VBIOS mode and adjust the DRM display mode accordingly 767 * if a full modeset is required. Otherwise keep the existing values. 768 */ 769 if (drm_atomic_crtc_needs_modeset(crtc_state)) { 770 vmode = ast_vbios_find_mode(ast, &crtc_state->mode); 771 if (!vmode) 772 return -EINVAL; 773 ast_state->vmode = vmode; 774 775 if (vmode->flags & HBorder) 776 hborder = 8; 777 if (vmode->flags & VBorder) 778 vborder = 8; 779 780 adjusted_mode->crtc_hdisplay = vmode->hde; 781 adjusted_mode->crtc_hblank_start = vmode->hde + hborder; 782 adjusted_mode->crtc_hblank_end = vmode->ht - hborder; 783 adjusted_mode->crtc_hsync_start = vmode->hde + hborder + vmode->hfp; 784 adjusted_mode->crtc_hsync_end = vmode->hde + hborder + vmode->hfp + vmode->hsync; 785 adjusted_mode->crtc_htotal = vmode->ht; 786 787 adjusted_mode->crtc_vdisplay = vmode->vde; 788 adjusted_mode->crtc_vblank_start = vmode->vde + vborder; 789 adjusted_mode->crtc_vblank_end = vmode->vt - vborder; 790 adjusted_mode->crtc_vsync_start = vmode->vde + vborder + vmode->vfp; 791 adjusted_mode->crtc_vsync_end = vmode->vde + vborder + vmode->vfp + vmode->vsync; 792 adjusted_mode->crtc_vtotal = vmode->vt; 793 } 794 795 return 0; 796 } 797 798 static void 799 ast_crtc_helper_atomic_flush(struct drm_crtc *crtc, 800 struct drm_atomic_state *state) 801 { 802 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, 803 crtc); 804 struct drm_device *dev = crtc->dev; 805 struct ast_device *ast = to_ast_device(dev); 806 struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state); 807 808 /* 809 * The gamma LUT has to be reloaded after changing the primary 810 * plane's color format. 811 */ 812 if (crtc_state->enable && crtc_state->color_mgmt_changed) { 813 if (crtc_state->gamma_lut) 814 ast_crtc_set_gamma(ast, 815 ast_crtc_state->format, 816 crtc_state->gamma_lut->data); 817 else 818 ast_crtc_set_gamma_linear(ast, ast_crtc_state->format); 819 } 820 } 821 822 static void ast_crtc_helper_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_state *state) 823 { 824 struct ast_device *ast = to_ast_device(crtc->dev); 825 826 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0xfc, 0x00); 827 ast_set_index_reg_mask(ast, AST_IO_VGASRI, 0x01, 0xdf, 0x00); 828 } 829 830 static void ast_crtc_helper_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_state *state) 831 { 832 struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state, crtc); 833 struct ast_device *ast = to_ast_device(crtc->dev); 834 u8 vgacrb6; 835 836 ast_set_index_reg_mask(ast, AST_IO_VGASRI, 0x01, 0xdf, AST_IO_VGASR1_SD); 837 838 vgacrb6 = AST_IO_VGACRB6_VSYNC_OFF | 839 AST_IO_VGACRB6_HSYNC_OFF; 840 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0xfc, vgacrb6); 841 842 /* 843 * HW cursors require the underlying primary plane and CRTC to 844 * display a valid mode and image. This is not the case during 845 * full modeset operations. So we temporarily disable any active 846 * plane, including the HW cursor. Each plane's atomic_update() 847 * helper will re-enable it if necessary. 848 * 849 * We only do this during *full* modesets. It does not affect 850 * simple pageflips on the planes. 851 */ 852 drm_atomic_helper_disable_planes_on_crtc(old_crtc_state, false); 853 } 854 855 static const struct drm_crtc_helper_funcs ast_crtc_helper_funcs = { 856 .mode_valid = ast_crtc_helper_mode_valid, 857 .mode_set_nofb = ast_crtc_helper_mode_set_nofb, 858 .atomic_check = ast_crtc_helper_atomic_check, 859 .atomic_flush = ast_crtc_helper_atomic_flush, 860 .atomic_enable = ast_crtc_helper_atomic_enable, 861 .atomic_disable = ast_crtc_helper_atomic_disable, 862 }; 863 864 static void ast_crtc_reset(struct drm_crtc *crtc) 865 { 866 struct ast_crtc_state *ast_state = 867 kzalloc(sizeof(*ast_state), GFP_KERNEL); 868 869 if (crtc->state) 870 crtc->funcs->atomic_destroy_state(crtc, crtc->state); 871 872 if (ast_state) 873 __drm_atomic_helper_crtc_reset(crtc, &ast_state->base); 874 else 875 __drm_atomic_helper_crtc_reset(crtc, NULL); 876 } 877 878 static struct drm_crtc_state * 879 ast_crtc_atomic_duplicate_state(struct drm_crtc *crtc) 880 { 881 struct ast_crtc_state *new_ast_state, *ast_state; 882 struct drm_device *dev = crtc->dev; 883 884 if (drm_WARN_ON(dev, !crtc->state)) 885 return NULL; 886 887 new_ast_state = kmalloc(sizeof(*new_ast_state), GFP_KERNEL); 888 if (!new_ast_state) 889 return NULL; 890 __drm_atomic_helper_crtc_duplicate_state(crtc, &new_ast_state->base); 891 892 ast_state = to_ast_crtc_state(crtc->state); 893 894 new_ast_state->format = ast_state->format; 895 new_ast_state->std_table = ast_state->std_table; 896 new_ast_state->vmode = ast_state->vmode; 897 898 return &new_ast_state->base; 899 } 900 901 static void ast_crtc_atomic_destroy_state(struct drm_crtc *crtc, 902 struct drm_crtc_state *state) 903 { 904 struct ast_crtc_state *ast_state = to_ast_crtc_state(state); 905 906 __drm_atomic_helper_crtc_destroy_state(&ast_state->base); 907 kfree(ast_state); 908 } 909 910 static const struct drm_crtc_funcs ast_crtc_funcs = { 911 .reset = ast_crtc_reset, 912 .destroy = drm_crtc_cleanup, 913 .set_config = drm_atomic_helper_set_config, 914 .page_flip = drm_atomic_helper_page_flip, 915 .atomic_duplicate_state = ast_crtc_atomic_duplicate_state, 916 .atomic_destroy_state = ast_crtc_atomic_destroy_state, 917 }; 918 919 static int ast_crtc_init(struct ast_device *ast) 920 { 921 struct drm_device *dev = &ast->base; 922 struct drm_crtc *crtc = &ast->crtc; 923 int ret; 924 925 ret = drm_crtc_init_with_planes(dev, crtc, &ast->primary_plane.base, 926 &ast->cursor_plane.base.base, &ast_crtc_funcs, 927 NULL); 928 if (ret) 929 return ret; 930 931 drm_mode_crtc_set_gamma_size(crtc, AST_LUT_SIZE); 932 drm_crtc_enable_color_mgmt(crtc, 0, false, AST_LUT_SIZE); 933 934 drm_crtc_helper_add(crtc, &ast_crtc_helper_funcs); 935 936 return 0; 937 } 938 939 /* 940 * Mode config 941 */ 942 943 static void ast_mode_config_helper_atomic_commit_tail(struct drm_atomic_state *state) 944 { 945 struct ast_device *ast = to_ast_device(state->dev); 946 947 /* 948 * Concurrent operations could possibly trigger a call to 949 * drm_connector_helper_funcs.get_modes by reading the display 950 * modes. Protect access to registers by acquiring the modeset 951 * lock. 952 */ 953 mutex_lock(&ast->modeset_lock); 954 drm_atomic_helper_commit_tail(state); 955 mutex_unlock(&ast->modeset_lock); 956 } 957 958 static const struct drm_mode_config_helper_funcs ast_mode_config_helper_funcs = { 959 .atomic_commit_tail = ast_mode_config_helper_atomic_commit_tail, 960 }; 961 962 static enum drm_mode_status ast_mode_config_mode_valid(struct drm_device *dev, 963 const struct drm_display_mode *mode) 964 { 965 const struct drm_format_info *info = drm_format_info(DRM_FORMAT_XRGB8888); 966 struct ast_device *ast = to_ast_device(dev); 967 unsigned long max_fb_size = ast_fb_vram_size(ast); 968 u64 pitch; 969 970 if (drm_WARN_ON_ONCE(dev, !info)) 971 return MODE_ERROR; /* driver bug */ 972 973 pitch = drm_format_info_min_pitch(info, 0, mode->hdisplay); 974 if (!pitch) 975 return MODE_BAD_WIDTH; 976 if (pitch > AST_PRIMARY_PLANE_MAX_OFFSET) 977 return MODE_BAD_WIDTH; /* maximum programmable pitch */ 978 if (pitch > max_fb_size / mode->vdisplay) 979 return MODE_MEM; 980 981 return MODE_OK; 982 } 983 984 static const struct drm_mode_config_funcs ast_mode_config_funcs = { 985 .fb_create = drm_gem_fb_create_with_dirty, 986 .mode_valid = ast_mode_config_mode_valid, 987 .atomic_check = drm_atomic_helper_check, 988 .atomic_commit = drm_atomic_helper_commit, 989 }; 990 991 int ast_mode_config_init(struct ast_device *ast) 992 { 993 struct drm_device *dev = &ast->base; 994 int ret; 995 996 ret = drmm_mutex_init(dev, &ast->modeset_lock); 997 if (ret) 998 return ret; 999 1000 ret = drmm_mode_config_init(dev); 1001 if (ret) 1002 return ret; 1003 1004 dev->mode_config.funcs = &ast_mode_config_funcs; 1005 dev->mode_config.min_width = 0; 1006 dev->mode_config.min_height = 0; 1007 dev->mode_config.preferred_depth = 24; 1008 1009 if (ast->support_fullhd) { 1010 dev->mode_config.max_width = 1920; 1011 dev->mode_config.max_height = 2048; 1012 } else { 1013 dev->mode_config.max_width = 1600; 1014 dev->mode_config.max_height = 1200; 1015 } 1016 1017 dev->mode_config.helper_private = &ast_mode_config_helper_funcs; 1018 1019 ret = ast_primary_plane_init(ast); 1020 if (ret) 1021 return ret; 1022 1023 ret = ast_cursor_plane_init(ast); 1024 if (ret) 1025 return ret; 1026 1027 ret = ast_crtc_init(ast); 1028 if (ret) 1029 return ret; 1030 1031 switch (ast->tx_chip) { 1032 case AST_TX_NONE: 1033 ret = ast_vga_output_init(ast); 1034 break; 1035 case AST_TX_SIL164: 1036 ret = ast_sil164_output_init(ast); 1037 break; 1038 case AST_TX_DP501: 1039 ret = ast_dp501_output_init(ast); 1040 break; 1041 case AST_TX_ASTDP: 1042 ret = ast_astdp_output_init(ast); 1043 break; 1044 } 1045 if (ret) 1046 return ret; 1047 1048 drm_mode_config_reset(dev); 1049 drmm_kms_helper_poll_init(dev); 1050 1051 return 0; 1052 } 1053