1 /* 2 * Copyright 2012 Red Hat Inc. 3 * Parts based on xf86-video-ast 4 * Copyright (c) 2005 ASPEED Technology Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 18 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 19 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 20 * USE OR OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * The above copyright notice and this permission notice (including the 23 * next paragraph) shall be included in all copies or substantial portions 24 * of the Software. 25 * 26 */ 27 /* 28 * Authors: Dave Airlie <airlied@redhat.com> 29 */ 30 31 #include <linux/delay.h> 32 #include <linux/pci.h> 33 34 #include <drm/drm_atomic.h> 35 #include <drm/drm_atomic_helper.h> 36 #include <drm/drm_color_mgmt.h> 37 #include <drm/drm_crtc.h> 38 #include <drm/drm_damage_helper.h> 39 #include <drm/drm_format_helper.h> 40 #include <drm/drm_fourcc.h> 41 #include <drm/drm_gem_atomic_helper.h> 42 #include <drm/drm_gem_framebuffer_helper.h> 43 #include <drm/drm_gem_shmem_helper.h> 44 #include <drm/drm_managed.h> 45 #include <drm/drm_panic.h> 46 #include <drm/drm_probe_helper.h> 47 48 #include "ast_drv.h" 49 #include "ast_tables.h" 50 #include "ast_vbios.h" 51 52 #define AST_LUT_SIZE 256 53 54 #define AST_PRIMARY_PLANE_MAX_OFFSET (BIT(16) - 1) 55 56 static unsigned long ast_fb_vram_offset(void) 57 { 58 return 0; // with shmem, the primary plane is always at offset 0 59 } 60 61 static unsigned long ast_fb_vram_size(struct ast_device *ast) 62 { 63 struct drm_device *dev = &ast->base; 64 unsigned long offset = ast_fb_vram_offset(); // starts at offset 65 long cursor_offset = ast_cursor_vram_offset(ast); // ends at cursor offset 66 67 if (cursor_offset < 0) 68 cursor_offset = ast->vram_size; // no cursor; it's all ours 69 if (drm_WARN_ON_ONCE(dev, offset > cursor_offset)) 70 return 0; // cannot legally happen; signal error 71 return cursor_offset - offset; 72 } 73 74 static void ast_set_gamma_lut(struct drm_crtc *crtc, unsigned int index, 75 u16 red, u16 green, u16 blue) 76 { 77 struct drm_device *dev = crtc->dev; 78 struct ast_device *ast = to_ast_device(dev); 79 u8 i8 = index & 0xff; 80 u8 r8 = red >> 8; 81 u8 g8 = green >> 8; 82 u8 b8 = blue >> 8; 83 84 if (drm_WARN_ON_ONCE(dev, index != i8)) 85 return; /* driver bug */ 86 87 ast_io_write8(ast, AST_IO_VGADWR, i8); 88 ast_io_read8(ast, AST_IO_VGASRI); 89 ast_io_write8(ast, AST_IO_VGAPDR, r8); 90 ast_io_read8(ast, AST_IO_VGASRI); 91 ast_io_write8(ast, AST_IO_VGAPDR, g8); 92 ast_io_read8(ast, AST_IO_VGASRI); 93 ast_io_write8(ast, AST_IO_VGAPDR, b8); 94 ast_io_read8(ast, AST_IO_VGASRI); 95 } 96 97 static void ast_crtc_fill_gamma(struct ast_device *ast, 98 const struct drm_format_info *format) 99 { 100 struct drm_crtc *crtc = &ast->crtc; 101 102 switch (format->format) { 103 case DRM_FORMAT_C8: 104 /* gamma table is used as color palette */ 105 drm_crtc_fill_palette_8(crtc, ast_set_gamma_lut); 106 break; 107 case DRM_FORMAT_RGB565: 108 /* also uses 8-bit gamma ramp on low-color modes */ 109 fallthrough; 110 case DRM_FORMAT_XRGB8888: 111 drm_crtc_fill_gamma_888(crtc, ast_set_gamma_lut); 112 break; 113 default: 114 drm_warn_once(&ast->base, "Unsupported format %p4cc for gamma correction\n", 115 &format->format); 116 break; 117 } 118 } 119 120 static void ast_crtc_load_gamma(struct ast_device *ast, 121 const struct drm_format_info *format, 122 struct drm_color_lut *lut) 123 { 124 struct drm_crtc *crtc = &ast->crtc; 125 126 switch (format->format) { 127 case DRM_FORMAT_C8: 128 /* gamma table is used as color palette */ 129 drm_crtc_load_palette_8(crtc, lut, ast_set_gamma_lut); 130 break; 131 case DRM_FORMAT_RGB565: 132 /* also uses 8-bit gamma ramp on low-color modes */ 133 fallthrough; 134 case DRM_FORMAT_XRGB8888: 135 drm_crtc_load_gamma_888(crtc, lut, ast_set_gamma_lut); 136 break; 137 default: 138 drm_warn_once(&ast->base, "Unsupported format %p4cc for gamma correction\n", 139 &format->format); 140 break; 141 } 142 } 143 144 static void ast_set_vbios_color_reg(struct ast_device *ast, 145 const struct drm_format_info *format, 146 const struct ast_vbios_enhtable *vmode) 147 { 148 u32 color_index; 149 150 switch (format->cpp[0]) { 151 case 1: 152 color_index = VGAModeIndex - 1; 153 break; 154 case 2: 155 color_index = HiCModeIndex; 156 break; 157 case 3: 158 case 4: 159 color_index = TrueCModeIndex; 160 break; 161 default: 162 return; 163 } 164 165 ast_set_index_reg(ast, AST_IO_VGACRI, 0x8c, (u8)((color_index & 0x0f) << 4)); 166 167 ast_set_index_reg(ast, AST_IO_VGACRI, 0x91, 0x00); 168 169 if (vmode->flags & NewModeInfo) { 170 ast_set_index_reg(ast, AST_IO_VGACRI, 0x91, 0xa8); 171 ast_set_index_reg(ast, AST_IO_VGACRI, 0x92, format->cpp[0] * 8); 172 } 173 } 174 175 static void ast_set_vbios_mode_reg(struct ast_device *ast, 176 const struct drm_display_mode *adjusted_mode, 177 const struct ast_vbios_enhtable *vmode) 178 { 179 u32 refresh_rate_index, mode_id; 180 181 refresh_rate_index = vmode->refresh_rate_index; 182 mode_id = vmode->mode_id; 183 184 ast_set_index_reg(ast, AST_IO_VGACRI, 0x8d, refresh_rate_index & 0xff); 185 ast_set_index_reg(ast, AST_IO_VGACRI, 0x8e, mode_id & 0xff); 186 187 ast_set_index_reg(ast, AST_IO_VGACRI, 0x91, 0x00); 188 189 if (vmode->flags & NewModeInfo) { 190 ast_set_index_reg(ast, AST_IO_VGACRI, 0x91, 0xa8); 191 ast_set_index_reg(ast, AST_IO_VGACRI, 0x93, adjusted_mode->clock / 1000); 192 ast_set_index_reg(ast, AST_IO_VGACRI, 0x94, adjusted_mode->crtc_hdisplay); 193 ast_set_index_reg(ast, AST_IO_VGACRI, 0x95, adjusted_mode->crtc_hdisplay >> 8); 194 ast_set_index_reg(ast, AST_IO_VGACRI, 0x96, adjusted_mode->crtc_vdisplay); 195 ast_set_index_reg(ast, AST_IO_VGACRI, 0x97, adjusted_mode->crtc_vdisplay >> 8); 196 } 197 } 198 199 static void ast_set_std_reg(struct ast_device *ast, 200 struct drm_display_mode *mode, 201 const struct ast_vbios_stdtable *stdtable) 202 { 203 u32 i; 204 u8 jreg; 205 206 jreg = stdtable->misc; 207 ast_io_write8(ast, AST_IO_VGAMR_W, jreg); 208 209 /* Set SEQ; except Screen Disable field */ 210 ast_set_index_reg(ast, AST_IO_VGASRI, 0x00, 0x03); 211 ast_set_index_reg_mask(ast, AST_IO_VGASRI, 0x01, 0x20, stdtable->seq[0]); 212 for (i = 1; i < 4; i++) { 213 jreg = stdtable->seq[i]; 214 ast_set_index_reg(ast, AST_IO_VGASRI, (i + 1), jreg); 215 } 216 217 /* Set CRTC; except base address and offset */ 218 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x11, 0x7f, 0x00); 219 for (i = 0; i < 12; i++) 220 ast_set_index_reg(ast, AST_IO_VGACRI, i, stdtable->crtc[i]); 221 for (i = 14; i < 19; i++) 222 ast_set_index_reg(ast, AST_IO_VGACRI, i, stdtable->crtc[i]); 223 for (i = 20; i < 25; i++) 224 ast_set_index_reg(ast, AST_IO_VGACRI, i, stdtable->crtc[i]); 225 226 /* set AR */ 227 jreg = ast_io_read8(ast, AST_IO_VGAIR1_R); 228 for (i = 0; i < 20; i++) { 229 jreg = stdtable->ar[i]; 230 ast_io_write8(ast, AST_IO_VGAARI_W, (u8)i); 231 ast_io_write8(ast, AST_IO_VGAARI_W, jreg); 232 } 233 ast_io_write8(ast, AST_IO_VGAARI_W, 0x14); 234 ast_io_write8(ast, AST_IO_VGAARI_W, 0x00); 235 236 jreg = ast_io_read8(ast, AST_IO_VGAIR1_R); 237 ast_io_write8(ast, AST_IO_VGAARI_W, 0x20); 238 239 /* Set GR */ 240 for (i = 0; i < 9; i++) 241 ast_set_index_reg(ast, AST_IO_VGAGRI, i, stdtable->gr[i]); 242 } 243 244 static void ast_set_crtc_reg(struct ast_device *ast, struct drm_display_mode *mode, 245 const struct ast_vbios_enhtable *vmode) 246 { 247 u8 jreg05 = 0, jreg07 = 0, jreg09 = 0, jregAC = 0, jregAD = 0, jregAE = 0; 248 u16 temp; 249 unsigned char crtc_hsync_precatch = 0; 250 251 if (ast->quirks->crtc_hsync_precatch_needed && (vmode->flags & AST2500PreCatchCRT)) 252 crtc_hsync_precatch = 40; 253 254 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x11, 0x7f, 0x00); 255 256 temp = (mode->crtc_htotal >> 3) - 5; 257 if (temp & 0x100) 258 jregAC |= 0x01; /* HT D[8] */ 259 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x00, 0x00, temp); 260 261 temp = (mode->crtc_hdisplay >> 3) - 1; 262 if (temp & 0x100) 263 jregAC |= 0x04; /* HDE D[8] */ 264 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x01, 0x00, temp); 265 266 temp = (mode->crtc_hblank_start >> 3) - 1; 267 if (temp & 0x100) 268 jregAC |= 0x10; /* HBS D[8] */ 269 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x02, 0x00, temp); 270 271 temp = ((mode->crtc_hblank_end >> 3) - 1) & 0x7f; 272 if (temp & 0x20) 273 jreg05 |= 0x80; /* HBE D[5] */ 274 if (temp & 0x40) 275 jregAD |= 0x01; /* HBE D[5] */ 276 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x03, 0xE0, (temp & 0x1f)); 277 278 temp = ((mode->crtc_hsync_start - crtc_hsync_precatch) >> 3) - 1; 279 if (temp & 0x100) 280 jregAC |= 0x40; /* HRS D[5] */ 281 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x04, 0x00, temp); 282 283 temp = (((mode->crtc_hsync_end - crtc_hsync_precatch) >> 3) - 1) & 0x3f; 284 if (temp & 0x20) 285 jregAD |= 0x04; /* HRE D[5] */ 286 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x05, 0x60, (u8)((temp & 0x1f) | jreg05)); 287 288 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xAC, 0x00, jregAC); 289 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xAD, 0x00, jregAD); 290 291 if (ast->quirks->crtc_hsync_add4_needed && mode->crtc_vdisplay == 1080) 292 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xFC, 0xFD, 0x02); 293 else 294 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xFC, 0xFD, 0x00); 295 296 /* vert timings */ 297 temp = (mode->crtc_vtotal) - 2; 298 if (temp & 0x100) 299 jreg07 |= 0x01; 300 if (temp & 0x200) 301 jreg07 |= 0x20; 302 if (temp & 0x400) 303 jregAE |= 0x01; 304 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x06, 0x00, temp); 305 306 temp = (mode->crtc_vsync_start) - 1; 307 if (temp & 0x100) 308 jreg07 |= 0x04; 309 if (temp & 0x200) 310 jreg07 |= 0x80; 311 if (temp & 0x400) 312 jregAE |= 0x08; 313 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x10, 0x00, temp); 314 315 temp = (mode->crtc_vsync_end - 1) & 0x3f; 316 if (temp & 0x10) 317 jregAE |= 0x20; 318 if (temp & 0x20) 319 jregAE |= 0x40; 320 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x11, 0x70, temp & 0xf); 321 322 temp = mode->crtc_vdisplay - 1; 323 if (temp & 0x100) 324 jreg07 |= 0x02; 325 if (temp & 0x200) 326 jreg07 |= 0x40; 327 if (temp & 0x400) 328 jregAE |= 0x02; 329 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x12, 0x00, temp); 330 331 temp = mode->crtc_vblank_start - 1; 332 if (temp & 0x100) 333 jreg07 |= 0x08; 334 if (temp & 0x200) 335 jreg09 |= 0x20; 336 if (temp & 0x400) 337 jregAE |= 0x04; 338 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x15, 0x00, temp); 339 340 temp = mode->crtc_vblank_end - 1; 341 if (temp & 0x100) 342 jregAE |= 0x10; 343 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x16, 0x00, temp); 344 345 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x07, 0x00, jreg07); 346 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x09, 0xdf, jreg09); 347 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xAE, 0x00, (jregAE | 0x80)); 348 349 if (crtc_hsync_precatch) 350 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0x3f, 0x80); 351 else 352 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0x3f, 0x00); 353 354 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x11, 0x7f, 0x80); 355 } 356 357 static void ast_set_offset_reg(struct ast_device *ast, 358 struct drm_framebuffer *fb) 359 { 360 u16 offset; 361 362 offset = fb->pitches[0] >> 3; 363 ast_set_index_reg(ast, AST_IO_VGACRI, 0x13, (offset & 0xff)); 364 ast_set_index_reg(ast, AST_IO_VGACRI, 0xb0, (offset >> 8) & 0x3f); 365 } 366 367 static void ast_set_dclk_reg(struct ast_device *ast, 368 struct drm_display_mode *mode, 369 const struct ast_vbios_enhtable *vmode) 370 { 371 const struct ast_vbios_dclk_info *clk_info = &ast->dclk_table[vmode->dclk_index]; 372 373 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xc0, 0x00, clk_info->param1); 374 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xc1, 0x00, clk_info->param2); 375 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xbb, 0x0f, 376 (clk_info->param3 & 0xc0) | 377 ((clk_info->param3 & 0x3) << 4)); 378 } 379 380 static void ast_set_color_reg(struct ast_device *ast, 381 const struct drm_format_info *format) 382 { 383 u8 jregA0 = 0, jregA3 = 0, jregA8 = 0; 384 385 switch (format->cpp[0] * 8) { 386 case 8: 387 jregA0 = 0x70; 388 jregA3 = 0x01; 389 jregA8 = 0x00; 390 break; 391 case 15: 392 case 16: 393 jregA0 = 0x70; 394 jregA3 = 0x04; 395 jregA8 = 0x02; 396 break; 397 case 32: 398 jregA0 = 0x70; 399 jregA3 = 0x08; 400 jregA8 = 0x02; 401 break; 402 } 403 404 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xa0, 0x8f, jregA0); 405 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xa3, 0xf0, jregA3); 406 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xa8, 0xfd, jregA8); 407 } 408 409 static void ast_set_crtthd_reg(struct ast_device *ast) 410 { 411 u8 vgacra6 = ast->quirks->crtc_mem_req_threshold_low; 412 u8 vgacra7 = ast->quirks->crtc_mem_req_threshold_high; 413 414 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa7, vgacra7); 415 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa6, vgacra6); 416 } 417 418 static void ast_set_sync_reg(struct ast_device *ast, 419 struct drm_display_mode *mode, 420 const struct ast_vbios_enhtable *vmode) 421 { 422 u8 jreg; 423 424 jreg = ast_io_read8(ast, AST_IO_VGAMR_R); 425 jreg &= ~0xC0; 426 if (vmode->flags & NVSync) 427 jreg |= 0x80; 428 if (vmode->flags & NHSync) 429 jreg |= 0x40; 430 ast_io_write8(ast, AST_IO_VGAMR_W, jreg); 431 } 432 433 static void ast_set_start_address_crt1(struct ast_device *ast, 434 unsigned int offset) 435 { 436 u32 addr; 437 438 addr = offset >> 2; 439 ast_set_index_reg(ast, AST_IO_VGACRI, 0x0d, (u8)(addr & 0xff)); 440 ast_set_index_reg(ast, AST_IO_VGACRI, 0x0c, (u8)((addr >> 8) & 0xff)); 441 ast_set_index_reg(ast, AST_IO_VGACRI, 0xaf, (u8)((addr >> 16) & 0xff)); 442 443 } 444 445 static void ast_wait_for_vretrace(struct ast_device *ast) 446 { 447 unsigned long timeout = jiffies + HZ; 448 u8 vgair1; 449 450 do { 451 vgair1 = ast_io_read8(ast, AST_IO_VGAIR1_R); 452 } while (!(vgair1 & AST_IO_VGAIR1_VREFRESH) && time_before(jiffies, timeout)); 453 } 454 455 /* 456 * Planes 457 */ 458 459 int ast_plane_init(struct drm_device *dev, struct ast_plane *ast_plane, 460 u64 offset, unsigned long size, 461 uint32_t possible_crtcs, 462 const struct drm_plane_funcs *funcs, 463 const uint32_t *formats, unsigned int format_count, 464 const uint64_t *format_modifiers, 465 enum drm_plane_type type) 466 { 467 struct drm_plane *plane = &ast_plane->base; 468 469 ast_plane->offset = offset; 470 ast_plane->size = size; 471 472 return drm_universal_plane_init(dev, plane, possible_crtcs, funcs, 473 formats, format_count, format_modifiers, 474 type, NULL); 475 } 476 477 void __iomem *ast_plane_vaddr(struct ast_plane *ast_plane) 478 { 479 struct ast_device *ast = to_ast_device(ast_plane->base.dev); 480 481 return ast->vram + ast_plane->offset; 482 } 483 484 /* 485 * Primary plane 486 */ 487 488 static const uint32_t ast_primary_plane_formats[] = { 489 DRM_FORMAT_XRGB8888, 490 DRM_FORMAT_RGB565, 491 DRM_FORMAT_C8, 492 }; 493 494 static int ast_primary_plane_helper_atomic_check(struct drm_plane *plane, 495 struct drm_atomic_state *state) 496 { 497 struct drm_device *dev = plane->dev; 498 struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane); 499 struct drm_crtc_state *new_crtc_state = NULL; 500 struct ast_crtc_state *new_ast_crtc_state; 501 int ret; 502 503 if (new_plane_state->crtc) 504 new_crtc_state = drm_atomic_get_new_crtc_state(state, new_plane_state->crtc); 505 506 ret = drm_atomic_helper_check_plane_state(new_plane_state, new_crtc_state, 507 DRM_PLANE_NO_SCALING, 508 DRM_PLANE_NO_SCALING, 509 false, true); 510 if (ret) { 511 return ret; 512 } else if (!new_plane_state->visible) { 513 if (drm_WARN_ON(dev, new_plane_state->crtc)) /* cannot legally happen */ 514 return -EINVAL; 515 else 516 return 0; 517 } 518 519 new_ast_crtc_state = to_ast_crtc_state(new_crtc_state); 520 521 new_ast_crtc_state->format = new_plane_state->fb->format; 522 523 return 0; 524 } 525 526 static void ast_handle_damage(struct ast_plane *ast_plane, struct iosys_map *src, 527 struct drm_framebuffer *fb, 528 const struct drm_rect *clip) 529 { 530 struct iosys_map dst = IOSYS_MAP_INIT_VADDR_IOMEM(ast_plane_vaddr(ast_plane)); 531 532 iosys_map_incr(&dst, drm_fb_clip_offset(fb->pitches[0], fb->format, clip)); 533 drm_fb_memcpy(&dst, fb->pitches, src, fb, clip); 534 } 535 536 static void ast_primary_plane_helper_atomic_update(struct drm_plane *plane, 537 struct drm_atomic_state *state) 538 { 539 struct drm_device *dev = plane->dev; 540 struct ast_device *ast = to_ast_device(dev); 541 struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane); 542 struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state); 543 struct drm_framebuffer *fb = plane_state->fb; 544 struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane); 545 struct drm_framebuffer *old_fb = old_plane_state->fb; 546 struct ast_plane *ast_plane = to_ast_plane(plane); 547 struct drm_crtc *crtc = plane_state->crtc; 548 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc); 549 struct drm_rect damage; 550 struct drm_atomic_helper_damage_iter iter; 551 552 if (!old_fb || (fb->format != old_fb->format) || crtc_state->mode_changed) { 553 struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state); 554 555 ast_set_color_reg(ast, fb->format); 556 ast_set_vbios_color_reg(ast, fb->format, ast_crtc_state->vmode); 557 } 558 559 drm_atomic_helper_damage_iter_init(&iter, old_plane_state, plane_state); 560 drm_atomic_for_each_plane_damage(&iter, &damage) { 561 ast_handle_damage(ast_plane, shadow_plane_state->data, fb, &damage); 562 } 563 564 /* 565 * Some BMCs stop scanning out the video signal after the driver 566 * reprogrammed the offset. This stalls display output for several 567 * seconds and makes the display unusable. Therefore only update 568 * the offset if it changes. 569 */ 570 if (!old_fb || old_fb->pitches[0] != fb->pitches[0]) 571 ast_set_offset_reg(ast, fb); 572 } 573 574 static void ast_primary_plane_helper_atomic_enable(struct drm_plane *plane, 575 struct drm_atomic_state *state) 576 { 577 struct ast_device *ast = to_ast_device(plane->dev); 578 struct ast_plane *ast_plane = to_ast_plane(plane); 579 580 /* 581 * Some BMCs stop scanning out the video signal after the driver 582 * reprogrammed the scanout address. This stalls display 583 * output for several seconds and makes the display unusable. 584 * Therefore only reprogram the address after enabling the plane. 585 */ 586 ast_set_start_address_crt1(ast, (u32)ast_plane->offset); 587 } 588 589 static void ast_primary_plane_helper_atomic_disable(struct drm_plane *plane, 590 struct drm_atomic_state *state) 591 { 592 /* 593 * Keep this empty function to avoid calling 594 * atomic_update when disabling the plane. 595 */ 596 } 597 598 static int ast_primary_plane_helper_get_scanout_buffer(struct drm_plane *plane, 599 struct drm_scanout_buffer *sb) 600 { 601 struct ast_plane *ast_plane = to_ast_plane(plane); 602 603 if (plane->state && plane->state->fb) { 604 sb->format = plane->state->fb->format; 605 sb->width = plane->state->fb->width; 606 sb->height = plane->state->fb->height; 607 sb->pitch[0] = plane->state->fb->pitches[0]; 608 iosys_map_set_vaddr_iomem(&sb->map[0], ast_plane_vaddr(ast_plane)); 609 return 0; 610 } 611 return -ENODEV; 612 } 613 614 static const struct drm_plane_helper_funcs ast_primary_plane_helper_funcs = { 615 DRM_GEM_SHADOW_PLANE_HELPER_FUNCS, 616 .atomic_check = ast_primary_plane_helper_atomic_check, 617 .atomic_update = ast_primary_plane_helper_atomic_update, 618 .atomic_enable = ast_primary_plane_helper_atomic_enable, 619 .atomic_disable = ast_primary_plane_helper_atomic_disable, 620 .get_scanout_buffer = ast_primary_plane_helper_get_scanout_buffer, 621 }; 622 623 static const struct drm_plane_funcs ast_primary_plane_funcs = { 624 .update_plane = drm_atomic_helper_update_plane, 625 .disable_plane = drm_atomic_helper_disable_plane, 626 .destroy = drm_plane_cleanup, 627 DRM_GEM_SHADOW_PLANE_FUNCS, 628 }; 629 630 static int ast_primary_plane_init(struct ast_device *ast) 631 { 632 struct drm_device *dev = &ast->base; 633 struct ast_plane *ast_primary_plane = &ast->primary_plane; 634 struct drm_plane *primary_plane = &ast_primary_plane->base; 635 u64 offset = ast_fb_vram_offset(); 636 unsigned long size = ast_fb_vram_size(ast); 637 int ret; 638 639 ret = ast_plane_init(dev, ast_primary_plane, offset, size, 640 0x01, &ast_primary_plane_funcs, 641 ast_primary_plane_formats, ARRAY_SIZE(ast_primary_plane_formats), 642 NULL, DRM_PLANE_TYPE_PRIMARY); 643 if (ret) { 644 drm_err(dev, "ast_plane_init() failed: %d\n", ret); 645 return ret; 646 } 647 drm_plane_helper_add(primary_plane, &ast_primary_plane_helper_funcs); 648 drm_plane_enable_fb_damage_clips(primary_plane); 649 650 return 0; 651 } 652 653 /* 654 * CRTC 655 */ 656 657 static enum drm_mode_status 658 ast_crtc_helper_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *mode) 659 { 660 struct ast_device *ast = to_ast_device(crtc->dev); 661 const struct ast_vbios_enhtable *vmode; 662 663 vmode = ast_vbios_find_mode(ast, mode); 664 if (!vmode) 665 return MODE_NOMODE; 666 667 return MODE_OK; 668 } 669 670 static void ast_crtc_helper_mode_set_nofb(struct drm_crtc *crtc) 671 { 672 struct drm_device *dev = crtc->dev; 673 struct ast_device *ast = to_ast_device(dev); 674 struct drm_crtc_state *crtc_state = crtc->state; 675 struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state); 676 const struct ast_vbios_stdtable *std_table = ast_crtc_state->std_table; 677 const struct ast_vbios_enhtable *vmode = ast_crtc_state->vmode; 678 struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode; 679 680 /* 681 * Ensure that no scanout takes place before reprogramming mode 682 * and format registers. 683 * 684 * TODO: Get vblank interrupts working and remove this line. 685 */ 686 ast_wait_for_vretrace(ast); 687 688 ast_set_vbios_mode_reg(ast, adjusted_mode, vmode); 689 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa1, 0x06); 690 ast_set_std_reg(ast, adjusted_mode, std_table); 691 ast_set_crtc_reg(ast, adjusted_mode, vmode); 692 ast_set_dclk_reg(ast, adjusted_mode, vmode); 693 ast_set_crtthd_reg(ast); 694 ast_set_sync_reg(ast, adjusted_mode, vmode); 695 } 696 697 static int ast_crtc_helper_atomic_check(struct drm_crtc *crtc, 698 struct drm_atomic_state *state) 699 { 700 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc); 701 struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode; 702 struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state, crtc); 703 struct ast_crtc_state *old_ast_crtc_state = to_ast_crtc_state(old_crtc_state); 704 struct drm_device *dev = crtc->dev; 705 struct ast_device *ast = to_ast_device(dev); 706 struct ast_crtc_state *ast_state; 707 const struct drm_format_info *format; 708 const struct ast_vbios_enhtable *vmode; 709 unsigned int hborder = 0; 710 unsigned int vborder = 0; 711 int ret; 712 713 if (!crtc_state->enable) 714 return 0; 715 716 ret = drm_atomic_helper_check_crtc_primary_plane(crtc_state); 717 if (ret) 718 return ret; 719 720 ast_state = to_ast_crtc_state(crtc_state); 721 722 format = ast_state->format; 723 if (drm_WARN_ON_ONCE(dev, !format)) 724 return -EINVAL; /* BUG: We didn't set format in primary check(). */ 725 726 /* 727 * The gamma LUT has to be reloaded after changing the primary 728 * plane's color format. 729 */ 730 if (old_ast_crtc_state->format != format) 731 crtc_state->color_mgmt_changed = true; 732 733 if (crtc_state->color_mgmt_changed && crtc_state->gamma_lut) { 734 if (crtc_state->gamma_lut->length != 735 AST_LUT_SIZE * sizeof(struct drm_color_lut)) { 736 drm_err(dev, "Wrong size for gamma_lut %zu\n", 737 crtc_state->gamma_lut->length); 738 return -EINVAL; 739 } 740 } 741 742 /* 743 * Set register tables. 744 * 745 * TODO: These tables mix all kinds of fields and should 746 * probably be resolved into various helper functions. 747 */ 748 switch (format->format) { 749 case DRM_FORMAT_C8: 750 ast_state->std_table = &vbios_stdtable[VGAModeIndex]; 751 break; 752 case DRM_FORMAT_RGB565: 753 ast_state->std_table = &vbios_stdtable[HiCModeIndex]; 754 break; 755 case DRM_FORMAT_RGB888: 756 case DRM_FORMAT_XRGB8888: 757 ast_state->std_table = &vbios_stdtable[TrueCModeIndex]; 758 break; 759 default: 760 return -EINVAL; 761 } 762 763 /* 764 * Find the VBIOS mode and adjust the DRM display mode accordingly 765 * if a full modeset is required. Otherwise keep the existing values. 766 */ 767 if (drm_atomic_crtc_needs_modeset(crtc_state)) { 768 vmode = ast_vbios_find_mode(ast, &crtc_state->mode); 769 if (!vmode) 770 return -EINVAL; 771 ast_state->vmode = vmode; 772 773 if (vmode->flags & HBorder) 774 hborder = 8; 775 if (vmode->flags & VBorder) 776 vborder = 8; 777 778 adjusted_mode->crtc_hdisplay = vmode->hde; 779 adjusted_mode->crtc_hblank_start = vmode->hde + hborder; 780 adjusted_mode->crtc_hblank_end = vmode->ht - hborder; 781 adjusted_mode->crtc_hsync_start = vmode->hde + hborder + vmode->hfp; 782 adjusted_mode->crtc_hsync_end = vmode->hde + hborder + vmode->hfp + vmode->hsync; 783 adjusted_mode->crtc_htotal = vmode->ht; 784 785 adjusted_mode->crtc_vdisplay = vmode->vde; 786 adjusted_mode->crtc_vblank_start = vmode->vde + vborder; 787 adjusted_mode->crtc_vblank_end = vmode->vt - vborder; 788 adjusted_mode->crtc_vsync_start = vmode->vde + vborder + vmode->vfp; 789 adjusted_mode->crtc_vsync_end = vmode->vde + vborder + vmode->vfp + vmode->vsync; 790 adjusted_mode->crtc_vtotal = vmode->vt; 791 } 792 793 return 0; 794 } 795 796 static void 797 ast_crtc_helper_atomic_flush(struct drm_crtc *crtc, 798 struct drm_atomic_state *state) 799 { 800 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, 801 crtc); 802 struct drm_device *dev = crtc->dev; 803 struct ast_device *ast = to_ast_device(dev); 804 struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state); 805 806 /* 807 * The gamma LUT has to be reloaded after changing the primary 808 * plane's color format. 809 */ 810 if (crtc_state->enable && crtc_state->color_mgmt_changed) { 811 if (crtc_state->gamma_lut) 812 ast_crtc_load_gamma(ast, 813 ast_crtc_state->format, 814 crtc_state->gamma_lut->data); 815 else 816 ast_crtc_fill_gamma(ast, ast_crtc_state->format); 817 } 818 } 819 820 static void ast_crtc_helper_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_state *state) 821 { 822 struct ast_device *ast = to_ast_device(crtc->dev); 823 u8 vgacr17 = 0x00; 824 u8 vgacrb6 = 0xff; 825 826 vgacr17 |= AST_IO_VGACR17_SYNC_ENABLE; 827 vgacrb6 &= ~(AST_IO_VGACRB6_VSYNC_OFF | AST_IO_VGACRB6_HSYNC_OFF); 828 829 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x17, 0x7f, vgacr17); 830 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0xfc, vgacrb6); 831 } 832 833 static void ast_crtc_helper_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_state *state) 834 { 835 struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state, crtc); 836 struct ast_device *ast = to_ast_device(crtc->dev); 837 u8 vgacr17 = 0xff; 838 839 vgacr17 &= ~AST_IO_VGACR17_SYNC_ENABLE; 840 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x17, 0x7f, vgacr17); 841 842 /* 843 * HW cursors require the underlying primary plane and CRTC to 844 * display a valid mode and image. This is not the case during 845 * full modeset operations. So we temporarily disable any active 846 * plane, including the HW cursor. Each plane's atomic_update() 847 * helper will re-enable it if necessary. 848 * 849 * We only do this during *full* modesets. It does not affect 850 * simple pageflips on the planes. 851 */ 852 drm_atomic_helper_disable_planes_on_crtc(old_crtc_state, false); 853 } 854 855 static const struct drm_crtc_helper_funcs ast_crtc_helper_funcs = { 856 .mode_valid = ast_crtc_helper_mode_valid, 857 .mode_set_nofb = ast_crtc_helper_mode_set_nofb, 858 .atomic_check = ast_crtc_helper_atomic_check, 859 .atomic_flush = ast_crtc_helper_atomic_flush, 860 .atomic_enable = ast_crtc_helper_atomic_enable, 861 .atomic_disable = ast_crtc_helper_atomic_disable, 862 }; 863 864 static void ast_crtc_reset(struct drm_crtc *crtc) 865 { 866 struct ast_crtc_state *ast_state = 867 kzalloc(sizeof(*ast_state), GFP_KERNEL); 868 869 if (crtc->state) 870 crtc->funcs->atomic_destroy_state(crtc, crtc->state); 871 872 if (ast_state) 873 __drm_atomic_helper_crtc_reset(crtc, &ast_state->base); 874 else 875 __drm_atomic_helper_crtc_reset(crtc, NULL); 876 } 877 878 static struct drm_crtc_state * 879 ast_crtc_atomic_duplicate_state(struct drm_crtc *crtc) 880 { 881 struct ast_crtc_state *new_ast_state, *ast_state; 882 struct drm_device *dev = crtc->dev; 883 884 if (drm_WARN_ON(dev, !crtc->state)) 885 return NULL; 886 887 new_ast_state = kmalloc(sizeof(*new_ast_state), GFP_KERNEL); 888 if (!new_ast_state) 889 return NULL; 890 __drm_atomic_helper_crtc_duplicate_state(crtc, &new_ast_state->base); 891 892 ast_state = to_ast_crtc_state(crtc->state); 893 894 new_ast_state->format = ast_state->format; 895 new_ast_state->std_table = ast_state->std_table; 896 new_ast_state->vmode = ast_state->vmode; 897 898 return &new_ast_state->base; 899 } 900 901 static void ast_crtc_atomic_destroy_state(struct drm_crtc *crtc, 902 struct drm_crtc_state *state) 903 { 904 struct ast_crtc_state *ast_state = to_ast_crtc_state(state); 905 906 __drm_atomic_helper_crtc_destroy_state(&ast_state->base); 907 kfree(ast_state); 908 } 909 910 static const struct drm_crtc_funcs ast_crtc_funcs = { 911 .reset = ast_crtc_reset, 912 .destroy = drm_crtc_cleanup, 913 .set_config = drm_atomic_helper_set_config, 914 .page_flip = drm_atomic_helper_page_flip, 915 .atomic_duplicate_state = ast_crtc_atomic_duplicate_state, 916 .atomic_destroy_state = ast_crtc_atomic_destroy_state, 917 }; 918 919 static int ast_crtc_init(struct ast_device *ast) 920 { 921 struct drm_device *dev = &ast->base; 922 struct drm_crtc *crtc = &ast->crtc; 923 int ret; 924 925 ret = drm_crtc_init_with_planes(dev, crtc, &ast->primary_plane.base, 926 &ast->cursor_plane.base.base, &ast_crtc_funcs, 927 NULL); 928 if (ret) 929 return ret; 930 931 drm_mode_crtc_set_gamma_size(crtc, AST_LUT_SIZE); 932 drm_crtc_enable_color_mgmt(crtc, 0, false, AST_LUT_SIZE); 933 934 drm_crtc_helper_add(crtc, &ast_crtc_helper_funcs); 935 936 return 0; 937 } 938 939 /* 940 * Mode config 941 */ 942 943 static void ast_mode_config_helper_atomic_commit_tail(struct drm_atomic_state *state) 944 { 945 struct ast_device *ast = to_ast_device(state->dev); 946 947 /* 948 * Concurrent operations could possibly trigger a call to 949 * drm_connector_helper_funcs.get_modes by reading the display 950 * modes. Protect access to registers by acquiring the modeset 951 * lock. 952 */ 953 mutex_lock(&ast->modeset_lock); 954 drm_atomic_helper_commit_tail(state); 955 mutex_unlock(&ast->modeset_lock); 956 } 957 958 static const struct drm_mode_config_helper_funcs ast_mode_config_helper_funcs = { 959 .atomic_commit_tail = ast_mode_config_helper_atomic_commit_tail, 960 }; 961 962 static enum drm_mode_status ast_mode_config_mode_valid(struct drm_device *dev, 963 const struct drm_display_mode *mode) 964 { 965 const struct drm_format_info *info = drm_format_info(DRM_FORMAT_XRGB8888); 966 struct ast_device *ast = to_ast_device(dev); 967 unsigned long max_fb_size = ast_fb_vram_size(ast); 968 u64 pitch; 969 970 if (drm_WARN_ON_ONCE(dev, !info)) 971 return MODE_ERROR; /* driver bug */ 972 973 pitch = drm_format_info_min_pitch(info, 0, mode->hdisplay); 974 if (!pitch) 975 return MODE_BAD_WIDTH; 976 if (pitch > AST_PRIMARY_PLANE_MAX_OFFSET) 977 return MODE_BAD_WIDTH; /* maximum programmable pitch */ 978 if (pitch > max_fb_size / mode->vdisplay) 979 return MODE_MEM; 980 981 return MODE_OK; 982 } 983 984 static const struct drm_mode_config_funcs ast_mode_config_funcs = { 985 .fb_create = drm_gem_fb_create_with_dirty, 986 .mode_valid = ast_mode_config_mode_valid, 987 .atomic_check = drm_atomic_helper_check, 988 .atomic_commit = drm_atomic_helper_commit, 989 }; 990 991 int ast_mode_config_init(struct ast_device *ast) 992 { 993 struct drm_device *dev = &ast->base; 994 int ret; 995 996 ret = drmm_mutex_init(dev, &ast->modeset_lock); 997 if (ret) 998 return ret; 999 1000 ret = drmm_mode_config_init(dev); 1001 if (ret) 1002 return ret; 1003 1004 dev->mode_config.funcs = &ast_mode_config_funcs; 1005 dev->mode_config.min_width = 0; 1006 dev->mode_config.min_height = 0; 1007 dev->mode_config.preferred_depth = 24; 1008 1009 if (ast->support_fullhd) { 1010 dev->mode_config.max_width = 1920; 1011 dev->mode_config.max_height = 2048; 1012 } else { 1013 dev->mode_config.max_width = 1600; 1014 dev->mode_config.max_height = 1200; 1015 } 1016 1017 dev->mode_config.helper_private = &ast_mode_config_helper_funcs; 1018 1019 ret = ast_primary_plane_init(ast); 1020 if (ret) 1021 return ret; 1022 1023 ret = ast_cursor_plane_init(ast); 1024 if (ret) 1025 return ret; 1026 1027 ret = ast_crtc_init(ast); 1028 if (ret) 1029 return ret; 1030 1031 switch (ast->tx_chip) { 1032 case AST_TX_NONE: 1033 ret = ast_vga_output_init(ast); 1034 break; 1035 case AST_TX_SIL164: 1036 ret = ast_sil164_output_init(ast); 1037 break; 1038 case AST_TX_DP501: 1039 ret = ast_dp501_output_init(ast); 1040 break; 1041 case AST_TX_ASTDP: 1042 ret = ast_astdp_output_init(ast); 1043 break; 1044 } 1045 if (ret) 1046 return ret; 1047 1048 drm_mode_config_reset(dev); 1049 drmm_kms_helper_poll_init(dev); 1050 1051 return 0; 1052 } 1053