1 /* 2 * Copyright 2012 Red Hat Inc. 3 * Parts based on xf86-video-ast 4 * Copyright (c) 2005 ASPEED Technology Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 18 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 19 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 20 * USE OR OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * The above copyright notice and this permission notice (including the 23 * next paragraph) shall be included in all copies or substantial portions 24 * of the Software. 25 * 26 */ 27 /* 28 * Authors: Dave Airlie <airlied@redhat.com> 29 */ 30 31 #include <linux/delay.h> 32 #include <linux/export.h> 33 #include <linux/pci.h> 34 35 #include <drm/drm_atomic.h> 36 #include <drm/drm_atomic_helper.h> 37 #include <drm/drm_crtc.h> 38 #include <drm/drm_damage_helper.h> 39 #include <drm/drm_format_helper.h> 40 #include <drm/drm_fourcc.h> 41 #include <drm/drm_gem_atomic_helper.h> 42 #include <drm/drm_gem_framebuffer_helper.h> 43 #include <drm/drm_gem_shmem_helper.h> 44 #include <drm/drm_managed.h> 45 #include <drm/drm_panic.h> 46 #include <drm/drm_probe_helper.h> 47 48 #include "ast_drv.h" 49 #include "ast_tables.h" 50 #include "ast_vbios.h" 51 52 #define AST_LUT_SIZE 256 53 54 static unsigned long ast_fb_vram_offset(void) 55 { 56 return 0; // with shmem, the primary plane is always at offset 0 57 } 58 59 static unsigned long ast_fb_vram_size(struct ast_device *ast) 60 { 61 struct drm_device *dev = &ast->base; 62 unsigned long offset = ast_fb_vram_offset(); // starts at offset 63 long cursor_offset = ast_cursor_vram_offset(ast); // ends at cursor offset 64 65 if (cursor_offset < 0) 66 cursor_offset = ast->vram_size; // no cursor; it's all ours 67 if (drm_WARN_ON_ONCE(dev, offset > cursor_offset)) 68 return 0; // cannot legally happen; signal error 69 return cursor_offset - offset; 70 } 71 72 static inline void ast_load_palette_index(struct ast_device *ast, 73 u8 index, u8 red, u8 green, 74 u8 blue) 75 { 76 ast_io_write8(ast, AST_IO_VGADWR, index); 77 ast_io_read8(ast, AST_IO_VGASRI); 78 ast_io_write8(ast, AST_IO_VGAPDR, red); 79 ast_io_read8(ast, AST_IO_VGASRI); 80 ast_io_write8(ast, AST_IO_VGAPDR, green); 81 ast_io_read8(ast, AST_IO_VGASRI); 82 ast_io_write8(ast, AST_IO_VGAPDR, blue); 83 ast_io_read8(ast, AST_IO_VGASRI); 84 } 85 86 static void ast_crtc_set_gamma_linear(struct ast_device *ast, 87 const struct drm_format_info *format) 88 { 89 int i; 90 91 switch (format->format) { 92 case DRM_FORMAT_C8: /* In this case, gamma table is used as color palette */ 93 case DRM_FORMAT_RGB565: 94 case DRM_FORMAT_XRGB8888: 95 for (i = 0; i < AST_LUT_SIZE; i++) 96 ast_load_palette_index(ast, i, i, i, i); 97 break; 98 default: 99 drm_warn_once(&ast->base, "Unsupported format %p4cc for gamma correction\n", 100 &format->format); 101 break; 102 } 103 } 104 105 static void ast_crtc_set_gamma(struct ast_device *ast, 106 const struct drm_format_info *format, 107 struct drm_color_lut *lut) 108 { 109 int i; 110 111 switch (format->format) { 112 case DRM_FORMAT_C8: /* In this case, gamma table is used as color palette */ 113 case DRM_FORMAT_RGB565: 114 case DRM_FORMAT_XRGB8888: 115 for (i = 0; i < AST_LUT_SIZE; i++) 116 ast_load_palette_index(ast, i, 117 lut[i].red >> 8, 118 lut[i].green >> 8, 119 lut[i].blue >> 8); 120 break; 121 default: 122 drm_warn_once(&ast->base, "Unsupported format %p4cc for gamma correction\n", 123 &format->format); 124 break; 125 } 126 } 127 128 static void ast_set_vbios_color_reg(struct ast_device *ast, 129 const struct drm_format_info *format, 130 const struct ast_vbios_enhtable *vmode) 131 { 132 u32 color_index; 133 134 switch (format->cpp[0]) { 135 case 1: 136 color_index = VGAModeIndex - 1; 137 break; 138 case 2: 139 color_index = HiCModeIndex; 140 break; 141 case 3: 142 case 4: 143 color_index = TrueCModeIndex; 144 break; 145 default: 146 return; 147 } 148 149 ast_set_index_reg(ast, AST_IO_VGACRI, 0x8c, (u8)((color_index & 0x0f) << 4)); 150 151 ast_set_index_reg(ast, AST_IO_VGACRI, 0x91, 0x00); 152 153 if (vmode->flags & NewModeInfo) { 154 ast_set_index_reg(ast, AST_IO_VGACRI, 0x91, 0xa8); 155 ast_set_index_reg(ast, AST_IO_VGACRI, 0x92, format->cpp[0] * 8); 156 } 157 } 158 159 static void ast_set_vbios_mode_reg(struct ast_device *ast, 160 const struct drm_display_mode *adjusted_mode, 161 const struct ast_vbios_enhtable *vmode) 162 { 163 u32 refresh_rate_index, mode_id; 164 165 refresh_rate_index = vmode->refresh_rate_index; 166 mode_id = vmode->mode_id; 167 168 ast_set_index_reg(ast, AST_IO_VGACRI, 0x8d, refresh_rate_index & 0xff); 169 ast_set_index_reg(ast, AST_IO_VGACRI, 0x8e, mode_id & 0xff); 170 171 ast_set_index_reg(ast, AST_IO_VGACRI, 0x91, 0x00); 172 173 if (vmode->flags & NewModeInfo) { 174 ast_set_index_reg(ast, AST_IO_VGACRI, 0x91, 0xa8); 175 ast_set_index_reg(ast, AST_IO_VGACRI, 0x93, adjusted_mode->clock / 1000); 176 ast_set_index_reg(ast, AST_IO_VGACRI, 0x94, adjusted_mode->crtc_hdisplay); 177 ast_set_index_reg(ast, AST_IO_VGACRI, 0x95, adjusted_mode->crtc_hdisplay >> 8); 178 ast_set_index_reg(ast, AST_IO_VGACRI, 0x96, adjusted_mode->crtc_vdisplay); 179 ast_set_index_reg(ast, AST_IO_VGACRI, 0x97, adjusted_mode->crtc_vdisplay >> 8); 180 } 181 } 182 183 static void ast_set_std_reg(struct ast_device *ast, 184 struct drm_display_mode *mode, 185 const struct ast_vbios_stdtable *stdtable) 186 { 187 u32 i; 188 u8 jreg; 189 190 jreg = stdtable->misc; 191 ast_io_write8(ast, AST_IO_VGAMR_W, jreg); 192 193 /* Set SEQ; except Screen Disable field */ 194 ast_set_index_reg(ast, AST_IO_VGASRI, 0x00, 0x03); 195 ast_set_index_reg_mask(ast, AST_IO_VGASRI, 0x01, 0x20, stdtable->seq[0]); 196 for (i = 1; i < 4; i++) { 197 jreg = stdtable->seq[i]; 198 ast_set_index_reg(ast, AST_IO_VGASRI, (i + 1), jreg); 199 } 200 201 /* Set CRTC; except base address and offset */ 202 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x11, 0x7f, 0x00); 203 for (i = 0; i < 12; i++) 204 ast_set_index_reg(ast, AST_IO_VGACRI, i, stdtable->crtc[i]); 205 for (i = 14; i < 19; i++) 206 ast_set_index_reg(ast, AST_IO_VGACRI, i, stdtable->crtc[i]); 207 for (i = 20; i < 25; i++) 208 ast_set_index_reg(ast, AST_IO_VGACRI, i, stdtable->crtc[i]); 209 210 /* set AR */ 211 jreg = ast_io_read8(ast, AST_IO_VGAIR1_R); 212 for (i = 0; i < 20; i++) { 213 jreg = stdtable->ar[i]; 214 ast_io_write8(ast, AST_IO_VGAARI_W, (u8)i); 215 ast_io_write8(ast, AST_IO_VGAARI_W, jreg); 216 } 217 ast_io_write8(ast, AST_IO_VGAARI_W, 0x14); 218 ast_io_write8(ast, AST_IO_VGAARI_W, 0x00); 219 220 jreg = ast_io_read8(ast, AST_IO_VGAIR1_R); 221 ast_io_write8(ast, AST_IO_VGAARI_W, 0x20); 222 223 /* Set GR */ 224 for (i = 0; i < 9; i++) 225 ast_set_index_reg(ast, AST_IO_VGAGRI, i, stdtable->gr[i]); 226 } 227 228 static void ast_set_crtc_reg(struct ast_device *ast, 229 struct drm_display_mode *mode, 230 const struct ast_vbios_enhtable *vmode) 231 { 232 u8 jreg05 = 0, jreg07 = 0, jreg09 = 0, jregAC = 0, jregAD = 0, jregAE = 0; 233 u16 temp, precache = 0; 234 235 if ((IS_AST_GEN6(ast) || IS_AST_GEN7(ast)) && 236 (vmode->flags & AST2500PreCatchCRT)) 237 precache = 40; 238 239 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x11, 0x7f, 0x00); 240 241 temp = (mode->crtc_htotal >> 3) - 5; 242 if (temp & 0x100) 243 jregAC |= 0x01; /* HT D[8] */ 244 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x00, 0x00, temp); 245 246 temp = (mode->crtc_hdisplay >> 3) - 1; 247 if (temp & 0x100) 248 jregAC |= 0x04; /* HDE D[8] */ 249 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x01, 0x00, temp); 250 251 temp = (mode->crtc_hblank_start >> 3) - 1; 252 if (temp & 0x100) 253 jregAC |= 0x10; /* HBS D[8] */ 254 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x02, 0x00, temp); 255 256 temp = ((mode->crtc_hblank_end >> 3) - 1) & 0x7f; 257 if (temp & 0x20) 258 jreg05 |= 0x80; /* HBE D[5] */ 259 if (temp & 0x40) 260 jregAD |= 0x01; /* HBE D[5] */ 261 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x03, 0xE0, (temp & 0x1f)); 262 263 temp = ((mode->crtc_hsync_start-precache) >> 3) - 1; 264 if (temp & 0x100) 265 jregAC |= 0x40; /* HRS D[5] */ 266 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x04, 0x00, temp); 267 268 temp = (((mode->crtc_hsync_end-precache) >> 3) - 1) & 0x3f; 269 if (temp & 0x20) 270 jregAD |= 0x04; /* HRE D[5] */ 271 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x05, 0x60, (u8)((temp & 0x1f) | jreg05)); 272 273 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xAC, 0x00, jregAC); 274 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xAD, 0x00, jregAD); 275 276 // Workaround for HSync Time non octave pixels (1920x1080@60Hz HSync 44 pixels); 277 if (IS_AST_GEN7(ast) && (mode->crtc_vdisplay == 1080)) 278 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xFC, 0xFD, 0x02); 279 else 280 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xFC, 0xFD, 0x00); 281 282 /* vert timings */ 283 temp = (mode->crtc_vtotal) - 2; 284 if (temp & 0x100) 285 jreg07 |= 0x01; 286 if (temp & 0x200) 287 jreg07 |= 0x20; 288 if (temp & 0x400) 289 jregAE |= 0x01; 290 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x06, 0x00, temp); 291 292 temp = (mode->crtc_vsync_start) - 1; 293 if (temp & 0x100) 294 jreg07 |= 0x04; 295 if (temp & 0x200) 296 jreg07 |= 0x80; 297 if (temp & 0x400) 298 jregAE |= 0x08; 299 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x10, 0x00, temp); 300 301 temp = (mode->crtc_vsync_end - 1) & 0x3f; 302 if (temp & 0x10) 303 jregAE |= 0x20; 304 if (temp & 0x20) 305 jregAE |= 0x40; 306 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x11, 0x70, temp & 0xf); 307 308 temp = mode->crtc_vdisplay - 1; 309 if (temp & 0x100) 310 jreg07 |= 0x02; 311 if (temp & 0x200) 312 jreg07 |= 0x40; 313 if (temp & 0x400) 314 jregAE |= 0x02; 315 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x12, 0x00, temp); 316 317 temp = mode->crtc_vblank_start - 1; 318 if (temp & 0x100) 319 jreg07 |= 0x08; 320 if (temp & 0x200) 321 jreg09 |= 0x20; 322 if (temp & 0x400) 323 jregAE |= 0x04; 324 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x15, 0x00, temp); 325 326 temp = mode->crtc_vblank_end - 1; 327 if (temp & 0x100) 328 jregAE |= 0x10; 329 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x16, 0x00, temp); 330 331 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x07, 0x00, jreg07); 332 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x09, 0xdf, jreg09); 333 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xAE, 0x00, (jregAE | 0x80)); 334 335 if (precache) 336 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0x3f, 0x80); 337 else 338 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0x3f, 0x00); 339 340 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x11, 0x7f, 0x80); 341 } 342 343 static void ast_set_offset_reg(struct ast_device *ast, 344 struct drm_framebuffer *fb) 345 { 346 u16 offset; 347 348 offset = fb->pitches[0] >> 3; 349 ast_set_index_reg(ast, AST_IO_VGACRI, 0x13, (offset & 0xff)); 350 ast_set_index_reg(ast, AST_IO_VGACRI, 0xb0, (offset >> 8) & 0x3f); 351 } 352 353 static void ast_set_dclk_reg(struct ast_device *ast, 354 struct drm_display_mode *mode, 355 const struct ast_vbios_enhtable *vmode) 356 { 357 const struct ast_vbios_dclk_info *clk_info; 358 359 if (IS_AST_GEN6(ast) || IS_AST_GEN7(ast)) 360 clk_info = &dclk_table_ast2500[vmode->dclk_index]; 361 else 362 clk_info = &dclk_table[vmode->dclk_index]; 363 364 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xc0, 0x00, clk_info->param1); 365 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xc1, 0x00, clk_info->param2); 366 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xbb, 0x0f, 367 (clk_info->param3 & 0xc0) | 368 ((clk_info->param3 & 0x3) << 4)); 369 } 370 371 static void ast_set_color_reg(struct ast_device *ast, 372 const struct drm_format_info *format) 373 { 374 u8 jregA0 = 0, jregA3 = 0, jregA8 = 0; 375 376 switch (format->cpp[0] * 8) { 377 case 8: 378 jregA0 = 0x70; 379 jregA3 = 0x01; 380 jregA8 = 0x00; 381 break; 382 case 15: 383 case 16: 384 jregA0 = 0x70; 385 jregA3 = 0x04; 386 jregA8 = 0x02; 387 break; 388 case 32: 389 jregA0 = 0x70; 390 jregA3 = 0x08; 391 jregA8 = 0x02; 392 break; 393 } 394 395 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xa0, 0x8f, jregA0); 396 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xa3, 0xf0, jregA3); 397 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xa8, 0xfd, jregA8); 398 } 399 400 static void ast_set_crtthd_reg(struct ast_device *ast) 401 { 402 /* Set Threshold */ 403 if (IS_AST_GEN7(ast)) { 404 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa7, 0xe0); 405 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa6, 0xa0); 406 } else if (IS_AST_GEN6(ast) || IS_AST_GEN5(ast) || IS_AST_GEN4(ast)) { 407 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa7, 0x78); 408 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa6, 0x60); 409 } else if (IS_AST_GEN3(ast) || IS_AST_GEN2(ast)) { 410 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa7, 0x3f); 411 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa6, 0x2f); 412 } else { 413 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa7, 0x2f); 414 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa6, 0x1f); 415 } 416 } 417 418 static void ast_set_sync_reg(struct ast_device *ast, 419 struct drm_display_mode *mode, 420 const struct ast_vbios_enhtable *vmode) 421 { 422 u8 jreg; 423 424 jreg = ast_io_read8(ast, AST_IO_VGAMR_R); 425 jreg &= ~0xC0; 426 if (vmode->flags & NVSync) 427 jreg |= 0x80; 428 if (vmode->flags & NHSync) 429 jreg |= 0x40; 430 ast_io_write8(ast, AST_IO_VGAMR_W, jreg); 431 } 432 433 static void ast_set_start_address_crt1(struct ast_device *ast, 434 unsigned int offset) 435 { 436 u32 addr; 437 438 addr = offset >> 2; 439 ast_set_index_reg(ast, AST_IO_VGACRI, 0x0d, (u8)(addr & 0xff)); 440 ast_set_index_reg(ast, AST_IO_VGACRI, 0x0c, (u8)((addr >> 8) & 0xff)); 441 ast_set_index_reg(ast, AST_IO_VGACRI, 0xaf, (u8)((addr >> 16) & 0xff)); 442 443 } 444 445 static void ast_wait_for_vretrace(struct ast_device *ast) 446 { 447 unsigned long timeout = jiffies + HZ; 448 u8 vgair1; 449 450 do { 451 vgair1 = ast_io_read8(ast, AST_IO_VGAIR1_R); 452 } while (!(vgair1 & AST_IO_VGAIR1_VREFRESH) && time_before(jiffies, timeout)); 453 } 454 455 /* 456 * Planes 457 */ 458 459 int ast_plane_init(struct drm_device *dev, struct ast_plane *ast_plane, 460 void __iomem *vaddr, u64 offset, unsigned long size, 461 uint32_t possible_crtcs, 462 const struct drm_plane_funcs *funcs, 463 const uint32_t *formats, unsigned int format_count, 464 const uint64_t *format_modifiers, 465 enum drm_plane_type type) 466 { 467 struct drm_plane *plane = &ast_plane->base; 468 469 ast_plane->vaddr = vaddr; 470 ast_plane->offset = offset; 471 ast_plane->size = size; 472 473 return drm_universal_plane_init(dev, plane, possible_crtcs, funcs, 474 formats, format_count, format_modifiers, 475 type, NULL); 476 } 477 478 /* 479 * Primary plane 480 */ 481 482 static const uint32_t ast_primary_plane_formats[] = { 483 DRM_FORMAT_XRGB8888, 484 DRM_FORMAT_RGB565, 485 DRM_FORMAT_C8, 486 }; 487 488 static int ast_primary_plane_helper_atomic_check(struct drm_plane *plane, 489 struct drm_atomic_state *state) 490 { 491 struct drm_device *dev = plane->dev; 492 struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane); 493 struct drm_crtc_state *new_crtc_state = NULL; 494 struct ast_crtc_state *new_ast_crtc_state; 495 int ret; 496 497 if (new_plane_state->crtc) 498 new_crtc_state = drm_atomic_get_new_crtc_state(state, new_plane_state->crtc); 499 500 ret = drm_atomic_helper_check_plane_state(new_plane_state, new_crtc_state, 501 DRM_PLANE_NO_SCALING, 502 DRM_PLANE_NO_SCALING, 503 false, true); 504 if (ret) { 505 return ret; 506 } else if (!new_plane_state->visible) { 507 if (drm_WARN_ON(dev, new_plane_state->crtc)) /* cannot legally happen */ 508 return -EINVAL; 509 else 510 return 0; 511 } 512 513 new_ast_crtc_state = to_ast_crtc_state(new_crtc_state); 514 515 new_ast_crtc_state->format = new_plane_state->fb->format; 516 517 return 0; 518 } 519 520 static void ast_handle_damage(struct ast_plane *ast_plane, struct iosys_map *src, 521 struct drm_framebuffer *fb, 522 const struct drm_rect *clip) 523 { 524 struct iosys_map dst = IOSYS_MAP_INIT_VADDR_IOMEM(ast_plane->vaddr); 525 526 iosys_map_incr(&dst, drm_fb_clip_offset(fb->pitches[0], fb->format, clip)); 527 drm_fb_memcpy(&dst, fb->pitches, src, fb, clip); 528 } 529 530 static void ast_primary_plane_helper_atomic_update(struct drm_plane *plane, 531 struct drm_atomic_state *state) 532 { 533 struct drm_device *dev = plane->dev; 534 struct ast_device *ast = to_ast_device(dev); 535 struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane); 536 struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state); 537 struct drm_framebuffer *fb = plane_state->fb; 538 struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane); 539 struct drm_framebuffer *old_fb = old_plane_state->fb; 540 struct ast_plane *ast_plane = to_ast_plane(plane); 541 struct drm_crtc *crtc = plane_state->crtc; 542 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc); 543 struct drm_rect damage; 544 struct drm_atomic_helper_damage_iter iter; 545 546 if (!old_fb || (fb->format != old_fb->format) || crtc_state->mode_changed) { 547 struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state); 548 549 ast_set_color_reg(ast, fb->format); 550 ast_set_vbios_color_reg(ast, fb->format, ast_crtc_state->vmode); 551 } 552 553 drm_atomic_helper_damage_iter_init(&iter, old_plane_state, plane_state); 554 drm_atomic_for_each_plane_damage(&iter, &damage) { 555 ast_handle_damage(ast_plane, shadow_plane_state->data, fb, &damage); 556 } 557 558 /* 559 * Some BMCs stop scanning out the video signal after the driver 560 * reprogrammed the offset. This stalls display output for several 561 * seconds and makes the display unusable. Therefore only update 562 * the offset if it changes. 563 */ 564 if (!old_fb || old_fb->pitches[0] != fb->pitches[0]) 565 ast_set_offset_reg(ast, fb); 566 } 567 568 static void ast_primary_plane_helper_atomic_enable(struct drm_plane *plane, 569 struct drm_atomic_state *state) 570 { 571 struct ast_device *ast = to_ast_device(plane->dev); 572 struct ast_plane *ast_plane = to_ast_plane(plane); 573 574 /* 575 * Some BMCs stop scanning out the video signal after the driver 576 * reprogrammed the scanout address. This stalls display 577 * output for several seconds and makes the display unusable. 578 * Therefore only reprogram the address after enabling the plane. 579 */ 580 ast_set_start_address_crt1(ast, (u32)ast_plane->offset); 581 } 582 583 static void ast_primary_plane_helper_atomic_disable(struct drm_plane *plane, 584 struct drm_atomic_state *state) 585 { 586 /* 587 * Keep this empty function to avoid calling 588 * atomic_update when disabling the plane. 589 */ 590 } 591 592 static int ast_primary_plane_helper_get_scanout_buffer(struct drm_plane *plane, 593 struct drm_scanout_buffer *sb) 594 { 595 struct ast_plane *ast_plane = to_ast_plane(plane); 596 597 if (plane->state && plane->state->fb && ast_plane->vaddr) { 598 sb->format = plane->state->fb->format; 599 sb->width = plane->state->fb->width; 600 sb->height = plane->state->fb->height; 601 sb->pitch[0] = plane->state->fb->pitches[0]; 602 iosys_map_set_vaddr_iomem(&sb->map[0], ast_plane->vaddr); 603 return 0; 604 } 605 return -ENODEV; 606 } 607 608 static const struct drm_plane_helper_funcs ast_primary_plane_helper_funcs = { 609 DRM_GEM_SHADOW_PLANE_HELPER_FUNCS, 610 .atomic_check = ast_primary_plane_helper_atomic_check, 611 .atomic_update = ast_primary_plane_helper_atomic_update, 612 .atomic_enable = ast_primary_plane_helper_atomic_enable, 613 .atomic_disable = ast_primary_plane_helper_atomic_disable, 614 .get_scanout_buffer = ast_primary_plane_helper_get_scanout_buffer, 615 }; 616 617 static const struct drm_plane_funcs ast_primary_plane_funcs = { 618 .update_plane = drm_atomic_helper_update_plane, 619 .disable_plane = drm_atomic_helper_disable_plane, 620 .destroy = drm_plane_cleanup, 621 DRM_GEM_SHADOW_PLANE_FUNCS, 622 }; 623 624 static int ast_primary_plane_init(struct ast_device *ast) 625 { 626 struct drm_device *dev = &ast->base; 627 struct ast_plane *ast_primary_plane = &ast->primary_plane; 628 struct drm_plane *primary_plane = &ast_primary_plane->base; 629 void __iomem *vaddr = ast->vram; 630 u64 offset = ast_fb_vram_offset(); 631 unsigned long size = ast_fb_vram_size(ast); 632 int ret; 633 634 ret = ast_plane_init(dev, ast_primary_plane, vaddr, offset, size, 635 0x01, &ast_primary_plane_funcs, 636 ast_primary_plane_formats, ARRAY_SIZE(ast_primary_plane_formats), 637 NULL, DRM_PLANE_TYPE_PRIMARY); 638 if (ret) { 639 drm_err(dev, "ast_plane_init() failed: %d\n", ret); 640 return ret; 641 } 642 drm_plane_helper_add(primary_plane, &ast_primary_plane_helper_funcs); 643 drm_plane_enable_fb_damage_clips(primary_plane); 644 645 return 0; 646 } 647 648 /* 649 * CRTC 650 */ 651 652 static enum drm_mode_status 653 ast_crtc_helper_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *mode) 654 { 655 struct ast_device *ast = to_ast_device(crtc->dev); 656 const struct ast_vbios_enhtable *vmode; 657 658 vmode = ast_vbios_find_mode(ast, mode); 659 if (!vmode) 660 return MODE_NOMODE; 661 662 return MODE_OK; 663 } 664 665 static void ast_crtc_helper_mode_set_nofb(struct drm_crtc *crtc) 666 { 667 struct drm_device *dev = crtc->dev; 668 struct ast_device *ast = to_ast_device(dev); 669 struct drm_crtc_state *crtc_state = crtc->state; 670 struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state); 671 const struct ast_vbios_stdtable *std_table = ast_crtc_state->std_table; 672 const struct ast_vbios_enhtable *vmode = ast_crtc_state->vmode; 673 struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode; 674 675 /* 676 * Ensure that no scanout takes place before reprogramming mode 677 * and format registers. 678 * 679 * TODO: Get vblank interrupts working and remove this line. 680 */ 681 ast_wait_for_vretrace(ast); 682 683 ast_set_vbios_mode_reg(ast, adjusted_mode, vmode); 684 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa1, 0x06); 685 ast_set_std_reg(ast, adjusted_mode, std_table); 686 ast_set_crtc_reg(ast, adjusted_mode, vmode); 687 ast_set_dclk_reg(ast, adjusted_mode, vmode); 688 ast_set_crtthd_reg(ast); 689 ast_set_sync_reg(ast, adjusted_mode, vmode); 690 } 691 692 static int ast_crtc_helper_atomic_check(struct drm_crtc *crtc, 693 struct drm_atomic_state *state) 694 { 695 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc); 696 struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode; 697 struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state, crtc); 698 struct ast_crtc_state *old_ast_crtc_state = to_ast_crtc_state(old_crtc_state); 699 struct drm_device *dev = crtc->dev; 700 struct ast_device *ast = to_ast_device(dev); 701 struct ast_crtc_state *ast_state; 702 const struct drm_format_info *format; 703 const struct ast_vbios_enhtable *vmode; 704 unsigned int hborder = 0; 705 unsigned int vborder = 0; 706 int ret; 707 708 if (!crtc_state->enable) 709 return 0; 710 711 ret = drm_atomic_helper_check_crtc_primary_plane(crtc_state); 712 if (ret) 713 return ret; 714 715 ast_state = to_ast_crtc_state(crtc_state); 716 717 format = ast_state->format; 718 if (drm_WARN_ON_ONCE(dev, !format)) 719 return -EINVAL; /* BUG: We didn't set format in primary check(). */ 720 721 /* 722 * The gamma LUT has to be reloaded after changing the primary 723 * plane's color format. 724 */ 725 if (old_ast_crtc_state->format != format) 726 crtc_state->color_mgmt_changed = true; 727 728 if (crtc_state->color_mgmt_changed && crtc_state->gamma_lut) { 729 if (crtc_state->gamma_lut->length != 730 AST_LUT_SIZE * sizeof(struct drm_color_lut)) { 731 drm_err(dev, "Wrong size for gamma_lut %zu\n", 732 crtc_state->gamma_lut->length); 733 return -EINVAL; 734 } 735 } 736 737 /* 738 * Set register tables. 739 * 740 * TODO: These tables mix all kinds of fields and should 741 * probably be resolved into various helper functions. 742 */ 743 switch (format->format) { 744 case DRM_FORMAT_C8: 745 ast_state->std_table = &vbios_stdtable[VGAModeIndex]; 746 break; 747 case DRM_FORMAT_RGB565: 748 ast_state->std_table = &vbios_stdtable[HiCModeIndex]; 749 break; 750 case DRM_FORMAT_RGB888: 751 case DRM_FORMAT_XRGB8888: 752 ast_state->std_table = &vbios_stdtable[TrueCModeIndex]; 753 break; 754 default: 755 return -EINVAL; 756 } 757 758 /* 759 * Find the VBIOS mode and adjust the DRM display mode accordingly 760 * if a full modeset is required. Otherwise keep the existing values. 761 */ 762 if (drm_atomic_crtc_needs_modeset(crtc_state)) { 763 vmode = ast_vbios_find_mode(ast, &crtc_state->mode); 764 if (!vmode) 765 return -EINVAL; 766 ast_state->vmode = vmode; 767 768 if (vmode->flags & HBorder) 769 hborder = 8; 770 if (vmode->flags & VBorder) 771 vborder = 8; 772 773 adjusted_mode->crtc_hdisplay = vmode->hde; 774 adjusted_mode->crtc_hblank_start = vmode->hde + hborder; 775 adjusted_mode->crtc_hblank_end = vmode->ht - hborder; 776 adjusted_mode->crtc_hsync_start = vmode->hde + hborder + vmode->hfp; 777 adjusted_mode->crtc_hsync_end = vmode->hde + hborder + vmode->hfp + vmode->hsync; 778 adjusted_mode->crtc_htotal = vmode->ht; 779 780 adjusted_mode->crtc_vdisplay = vmode->vde; 781 adjusted_mode->crtc_vblank_start = vmode->vde + vborder; 782 adjusted_mode->crtc_vblank_end = vmode->vt - vborder; 783 adjusted_mode->crtc_vsync_start = vmode->vde + vborder + vmode->vfp; 784 adjusted_mode->crtc_vsync_end = vmode->vde + vborder + vmode->vfp + vmode->vsync; 785 adjusted_mode->crtc_vtotal = vmode->vt; 786 } 787 788 return 0; 789 } 790 791 static void 792 ast_crtc_helper_atomic_flush(struct drm_crtc *crtc, 793 struct drm_atomic_state *state) 794 { 795 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, 796 crtc); 797 struct drm_device *dev = crtc->dev; 798 struct ast_device *ast = to_ast_device(dev); 799 struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state); 800 801 /* 802 * The gamma LUT has to be reloaded after changing the primary 803 * plane's color format. 804 */ 805 if (crtc_state->enable && crtc_state->color_mgmt_changed) { 806 if (crtc_state->gamma_lut) 807 ast_crtc_set_gamma(ast, 808 ast_crtc_state->format, 809 crtc_state->gamma_lut->data); 810 else 811 ast_crtc_set_gamma_linear(ast, ast_crtc_state->format); 812 } 813 } 814 815 static void ast_crtc_helper_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_state *state) 816 { 817 struct ast_device *ast = to_ast_device(crtc->dev); 818 819 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0xfc, 0x00); 820 ast_set_index_reg_mask(ast, AST_IO_VGASRI, 0x01, 0xdf, 0x00); 821 } 822 823 static void ast_crtc_helper_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_state *state) 824 { 825 struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state, crtc); 826 struct ast_device *ast = to_ast_device(crtc->dev); 827 u8 vgacrb6; 828 829 ast_set_index_reg_mask(ast, AST_IO_VGASRI, 0x01, 0xdf, AST_IO_VGASR1_SD); 830 831 vgacrb6 = AST_IO_VGACRB6_VSYNC_OFF | 832 AST_IO_VGACRB6_HSYNC_OFF; 833 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0xfc, vgacrb6); 834 835 /* 836 * HW cursors require the underlying primary plane and CRTC to 837 * display a valid mode and image. This is not the case during 838 * full modeset operations. So we temporarily disable any active 839 * plane, including the HW cursor. Each plane's atomic_update() 840 * helper will re-enable it if necessary. 841 * 842 * We only do this during *full* modesets. It does not affect 843 * simple pageflips on the planes. 844 */ 845 drm_atomic_helper_disable_planes_on_crtc(old_crtc_state, false); 846 } 847 848 static const struct drm_crtc_helper_funcs ast_crtc_helper_funcs = { 849 .mode_valid = ast_crtc_helper_mode_valid, 850 .mode_set_nofb = ast_crtc_helper_mode_set_nofb, 851 .atomic_check = ast_crtc_helper_atomic_check, 852 .atomic_flush = ast_crtc_helper_atomic_flush, 853 .atomic_enable = ast_crtc_helper_atomic_enable, 854 .atomic_disable = ast_crtc_helper_atomic_disable, 855 }; 856 857 static void ast_crtc_reset(struct drm_crtc *crtc) 858 { 859 struct ast_crtc_state *ast_state = 860 kzalloc(sizeof(*ast_state), GFP_KERNEL); 861 862 if (crtc->state) 863 crtc->funcs->atomic_destroy_state(crtc, crtc->state); 864 865 if (ast_state) 866 __drm_atomic_helper_crtc_reset(crtc, &ast_state->base); 867 else 868 __drm_atomic_helper_crtc_reset(crtc, NULL); 869 } 870 871 static struct drm_crtc_state * 872 ast_crtc_atomic_duplicate_state(struct drm_crtc *crtc) 873 { 874 struct ast_crtc_state *new_ast_state, *ast_state; 875 struct drm_device *dev = crtc->dev; 876 877 if (drm_WARN_ON(dev, !crtc->state)) 878 return NULL; 879 880 new_ast_state = kmalloc(sizeof(*new_ast_state), GFP_KERNEL); 881 if (!new_ast_state) 882 return NULL; 883 __drm_atomic_helper_crtc_duplicate_state(crtc, &new_ast_state->base); 884 885 ast_state = to_ast_crtc_state(crtc->state); 886 887 new_ast_state->format = ast_state->format; 888 new_ast_state->std_table = ast_state->std_table; 889 new_ast_state->vmode = ast_state->vmode; 890 891 return &new_ast_state->base; 892 } 893 894 static void ast_crtc_atomic_destroy_state(struct drm_crtc *crtc, 895 struct drm_crtc_state *state) 896 { 897 struct ast_crtc_state *ast_state = to_ast_crtc_state(state); 898 899 __drm_atomic_helper_crtc_destroy_state(&ast_state->base); 900 kfree(ast_state); 901 } 902 903 static const struct drm_crtc_funcs ast_crtc_funcs = { 904 .reset = ast_crtc_reset, 905 .destroy = drm_crtc_cleanup, 906 .set_config = drm_atomic_helper_set_config, 907 .page_flip = drm_atomic_helper_page_flip, 908 .atomic_duplicate_state = ast_crtc_atomic_duplicate_state, 909 .atomic_destroy_state = ast_crtc_atomic_destroy_state, 910 }; 911 912 static int ast_crtc_init(struct ast_device *ast) 913 { 914 struct drm_device *dev = &ast->base; 915 struct drm_crtc *crtc = &ast->crtc; 916 int ret; 917 918 ret = drm_crtc_init_with_planes(dev, crtc, &ast->primary_plane.base, 919 &ast->cursor_plane.base.base, &ast_crtc_funcs, 920 NULL); 921 if (ret) 922 return ret; 923 924 drm_mode_crtc_set_gamma_size(crtc, AST_LUT_SIZE); 925 drm_crtc_enable_color_mgmt(crtc, 0, false, AST_LUT_SIZE); 926 927 drm_crtc_helper_add(crtc, &ast_crtc_helper_funcs); 928 929 return 0; 930 } 931 932 /* 933 * Mode config 934 */ 935 936 static void ast_mode_config_helper_atomic_commit_tail(struct drm_atomic_state *state) 937 { 938 struct ast_device *ast = to_ast_device(state->dev); 939 940 /* 941 * Concurrent operations could possibly trigger a call to 942 * drm_connector_helper_funcs.get_modes by trying to read the 943 * display modes. Protect access to I/O registers by acquiring 944 * the I/O-register lock. Released in atomic_flush(). 945 */ 946 mutex_lock(&ast->modeset_lock); 947 drm_atomic_helper_commit_tail(state); 948 mutex_unlock(&ast->modeset_lock); 949 } 950 951 static const struct drm_mode_config_helper_funcs ast_mode_config_helper_funcs = { 952 .atomic_commit_tail = ast_mode_config_helper_atomic_commit_tail, 953 }; 954 955 static enum drm_mode_status ast_mode_config_mode_valid(struct drm_device *dev, 956 const struct drm_display_mode *mode) 957 { 958 static const unsigned long max_bpp = 4; /* DRM_FORMAT_XRGB8888 */ 959 struct ast_device *ast = to_ast_device(dev); 960 unsigned long fbsize, fbpages, max_fbpages; 961 962 max_fbpages = ast_fb_vram_size(ast) >> PAGE_SHIFT; 963 964 fbsize = mode->hdisplay * mode->vdisplay * max_bpp; 965 fbpages = DIV_ROUND_UP(fbsize, PAGE_SIZE); 966 967 if (fbpages > max_fbpages) 968 return MODE_MEM; 969 970 return MODE_OK; 971 } 972 973 static const struct drm_mode_config_funcs ast_mode_config_funcs = { 974 .fb_create = drm_gem_fb_create_with_dirty, 975 .mode_valid = ast_mode_config_mode_valid, 976 .atomic_check = drm_atomic_helper_check, 977 .atomic_commit = drm_atomic_helper_commit, 978 }; 979 980 int ast_mode_config_init(struct ast_device *ast) 981 { 982 struct drm_device *dev = &ast->base; 983 int ret; 984 985 ret = drmm_mutex_init(dev, &ast->modeset_lock); 986 if (ret) 987 return ret; 988 989 ret = drmm_mode_config_init(dev); 990 if (ret) 991 return ret; 992 993 dev->mode_config.funcs = &ast_mode_config_funcs; 994 dev->mode_config.min_width = 0; 995 dev->mode_config.min_height = 0; 996 dev->mode_config.preferred_depth = 24; 997 998 if (ast->support_fullhd) { 999 dev->mode_config.max_width = 1920; 1000 dev->mode_config.max_height = 2048; 1001 } else { 1002 dev->mode_config.max_width = 1600; 1003 dev->mode_config.max_height = 1200; 1004 } 1005 1006 dev->mode_config.helper_private = &ast_mode_config_helper_funcs; 1007 1008 ret = ast_primary_plane_init(ast); 1009 if (ret) 1010 return ret; 1011 1012 ret = ast_cursor_plane_init(ast); 1013 if (ret) 1014 return ret; 1015 1016 ret = ast_crtc_init(ast); 1017 if (ret) 1018 return ret; 1019 1020 switch (ast->tx_chip) { 1021 case AST_TX_NONE: 1022 ret = ast_vga_output_init(ast); 1023 break; 1024 case AST_TX_SIL164: 1025 ret = ast_sil164_output_init(ast); 1026 break; 1027 case AST_TX_DP501: 1028 ret = ast_dp501_output_init(ast); 1029 break; 1030 case AST_TX_ASTDP: 1031 ret = ast_astdp_output_init(ast); 1032 break; 1033 } 1034 if (ret) 1035 return ret; 1036 1037 drm_mode_config_reset(dev); 1038 drmm_kms_helper_poll_init(dev); 1039 1040 return 0; 1041 } 1042