1 /* 2 * Copyright 2012 Red Hat Inc. 3 * Parts based on xf86-video-ast 4 * Copyright (c) 2005 ASPEED Technology Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 18 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 19 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 20 * USE OR OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * The above copyright notice and this permission notice (including the 23 * next paragraph) shall be included in all copies or substantial portions 24 * of the Software. 25 * 26 */ 27 /* 28 * Authors: Dave Airlie <airlied@redhat.com> 29 */ 30 31 #include <linux/delay.h> 32 #include <linux/export.h> 33 #include <linux/pci.h> 34 35 #include <drm/drm_atomic.h> 36 #include <drm/drm_atomic_helper.h> 37 #include <drm/drm_color_mgmt.h> 38 #include <drm/drm_crtc.h> 39 #include <drm/drm_damage_helper.h> 40 #include <drm/drm_format_helper.h> 41 #include <drm/drm_fourcc.h> 42 #include <drm/drm_gem_atomic_helper.h> 43 #include <drm/drm_gem_framebuffer_helper.h> 44 #include <drm/drm_gem_shmem_helper.h> 45 #include <drm/drm_managed.h> 46 #include <drm/drm_panic.h> 47 #include <drm/drm_probe_helper.h> 48 49 #include "ast_drv.h" 50 #include "ast_tables.h" 51 #include "ast_vbios.h" 52 53 #define AST_LUT_SIZE 256 54 55 #define AST_PRIMARY_PLANE_MAX_OFFSET (BIT(16) - 1) 56 57 static unsigned long ast_fb_vram_offset(void) 58 { 59 return 0; // with shmem, the primary plane is always at offset 0 60 } 61 62 static unsigned long ast_fb_vram_size(struct ast_device *ast) 63 { 64 struct drm_device *dev = &ast->base; 65 unsigned long offset = ast_fb_vram_offset(); // starts at offset 66 long cursor_offset = ast_cursor_vram_offset(ast); // ends at cursor offset 67 68 if (cursor_offset < 0) 69 cursor_offset = ast->vram_size; // no cursor; it's all ours 70 if (drm_WARN_ON_ONCE(dev, offset > cursor_offset)) 71 return 0; // cannot legally happen; signal error 72 return cursor_offset - offset; 73 } 74 75 static void ast_set_gamma_lut(struct drm_crtc *crtc, unsigned int index, 76 u16 red, u16 green, u16 blue) 77 { 78 struct drm_device *dev = crtc->dev; 79 struct ast_device *ast = to_ast_device(dev); 80 u8 i8 = index & 0xff; 81 u8 r8 = red >> 8; 82 u8 g8 = green >> 8; 83 u8 b8 = blue >> 8; 84 85 if (drm_WARN_ON_ONCE(dev, index != i8)) 86 return; /* driver bug */ 87 88 ast_io_write8(ast, AST_IO_VGADWR, i8); 89 ast_io_read8(ast, AST_IO_VGASRI); 90 ast_io_write8(ast, AST_IO_VGAPDR, r8); 91 ast_io_read8(ast, AST_IO_VGASRI); 92 ast_io_write8(ast, AST_IO_VGAPDR, g8); 93 ast_io_read8(ast, AST_IO_VGASRI); 94 ast_io_write8(ast, AST_IO_VGAPDR, b8); 95 ast_io_read8(ast, AST_IO_VGASRI); 96 } 97 98 static void ast_crtc_fill_gamma(struct ast_device *ast, 99 const struct drm_format_info *format) 100 { 101 struct drm_crtc *crtc = &ast->crtc; 102 103 switch (format->format) { 104 case DRM_FORMAT_C8: 105 /* gamma table is used as color palette */ 106 drm_crtc_fill_palette_8(crtc, ast_set_gamma_lut); 107 break; 108 case DRM_FORMAT_RGB565: 109 /* also uses 8-bit gamma ramp on low-color modes */ 110 fallthrough; 111 case DRM_FORMAT_XRGB8888: 112 drm_crtc_fill_gamma_888(crtc, ast_set_gamma_lut); 113 break; 114 default: 115 drm_warn_once(&ast->base, "Unsupported format %p4cc for gamma correction\n", 116 &format->format); 117 break; 118 } 119 } 120 121 static void ast_crtc_load_gamma(struct ast_device *ast, 122 const struct drm_format_info *format, 123 struct drm_color_lut *lut) 124 { 125 struct drm_crtc *crtc = &ast->crtc; 126 127 switch (format->format) { 128 case DRM_FORMAT_C8: 129 /* gamma table is used as color palette */ 130 drm_crtc_load_palette_8(crtc, lut, ast_set_gamma_lut); 131 break; 132 case DRM_FORMAT_RGB565: 133 /* also uses 8-bit gamma ramp on low-color modes */ 134 fallthrough; 135 case DRM_FORMAT_XRGB8888: 136 drm_crtc_load_gamma_888(crtc, lut, ast_set_gamma_lut); 137 break; 138 default: 139 drm_warn_once(&ast->base, "Unsupported format %p4cc for gamma correction\n", 140 &format->format); 141 break; 142 } 143 } 144 145 static void ast_set_vbios_color_reg(struct ast_device *ast, 146 const struct drm_format_info *format, 147 const struct ast_vbios_enhtable *vmode) 148 { 149 u32 color_index; 150 151 switch (format->cpp[0]) { 152 case 1: 153 color_index = VGAModeIndex - 1; 154 break; 155 case 2: 156 color_index = HiCModeIndex; 157 break; 158 case 3: 159 case 4: 160 color_index = TrueCModeIndex; 161 break; 162 default: 163 return; 164 } 165 166 ast_set_index_reg(ast, AST_IO_VGACRI, 0x8c, (u8)((color_index & 0x0f) << 4)); 167 168 ast_set_index_reg(ast, AST_IO_VGACRI, 0x91, 0x00); 169 170 if (vmode->flags & NewModeInfo) { 171 ast_set_index_reg(ast, AST_IO_VGACRI, 0x91, 0xa8); 172 ast_set_index_reg(ast, AST_IO_VGACRI, 0x92, format->cpp[0] * 8); 173 } 174 } 175 176 static void ast_set_vbios_mode_reg(struct ast_device *ast, 177 const struct drm_display_mode *adjusted_mode, 178 const struct ast_vbios_enhtable *vmode) 179 { 180 u32 refresh_rate_index, mode_id; 181 182 refresh_rate_index = vmode->refresh_rate_index; 183 mode_id = vmode->mode_id; 184 185 ast_set_index_reg(ast, AST_IO_VGACRI, 0x8d, refresh_rate_index & 0xff); 186 ast_set_index_reg(ast, AST_IO_VGACRI, 0x8e, mode_id & 0xff); 187 188 ast_set_index_reg(ast, AST_IO_VGACRI, 0x91, 0x00); 189 190 if (vmode->flags & NewModeInfo) { 191 ast_set_index_reg(ast, AST_IO_VGACRI, 0x91, 0xa8); 192 ast_set_index_reg(ast, AST_IO_VGACRI, 0x93, adjusted_mode->clock / 1000); 193 ast_set_index_reg(ast, AST_IO_VGACRI, 0x94, adjusted_mode->crtc_hdisplay); 194 ast_set_index_reg(ast, AST_IO_VGACRI, 0x95, adjusted_mode->crtc_hdisplay >> 8); 195 ast_set_index_reg(ast, AST_IO_VGACRI, 0x96, adjusted_mode->crtc_vdisplay); 196 ast_set_index_reg(ast, AST_IO_VGACRI, 0x97, adjusted_mode->crtc_vdisplay >> 8); 197 } 198 } 199 200 static void ast_set_std_reg(struct ast_device *ast, 201 struct drm_display_mode *mode, 202 const struct ast_vbios_stdtable *stdtable) 203 { 204 u32 i; 205 u8 jreg; 206 207 jreg = stdtable->misc; 208 ast_io_write8(ast, AST_IO_VGAMR_W, jreg); 209 210 /* Set SEQ; except Screen Disable field */ 211 ast_set_index_reg(ast, AST_IO_VGASRI, 0x00, 0x03); 212 ast_set_index_reg_mask(ast, AST_IO_VGASRI, 0x01, 0x20, stdtable->seq[0]); 213 for (i = 1; i < 4; i++) { 214 jreg = stdtable->seq[i]; 215 ast_set_index_reg(ast, AST_IO_VGASRI, (i + 1), jreg); 216 } 217 218 /* Set CRTC; except base address and offset */ 219 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x11, 0x7f, 0x00); 220 for (i = 0; i < 12; i++) 221 ast_set_index_reg(ast, AST_IO_VGACRI, i, stdtable->crtc[i]); 222 for (i = 14; i < 19; i++) 223 ast_set_index_reg(ast, AST_IO_VGACRI, i, stdtable->crtc[i]); 224 for (i = 20; i < 25; i++) 225 ast_set_index_reg(ast, AST_IO_VGACRI, i, stdtable->crtc[i]); 226 227 /* set AR */ 228 jreg = ast_io_read8(ast, AST_IO_VGAIR1_R); 229 for (i = 0; i < 20; i++) { 230 jreg = stdtable->ar[i]; 231 ast_io_write8(ast, AST_IO_VGAARI_W, (u8)i); 232 ast_io_write8(ast, AST_IO_VGAARI_W, jreg); 233 } 234 ast_io_write8(ast, AST_IO_VGAARI_W, 0x14); 235 ast_io_write8(ast, AST_IO_VGAARI_W, 0x00); 236 237 jreg = ast_io_read8(ast, AST_IO_VGAIR1_R); 238 ast_io_write8(ast, AST_IO_VGAARI_W, 0x20); 239 240 /* Set GR */ 241 for (i = 0; i < 9; i++) 242 ast_set_index_reg(ast, AST_IO_VGAGRI, i, stdtable->gr[i]); 243 } 244 245 static void ast_set_crtc_reg(struct ast_device *ast, 246 struct drm_display_mode *mode, 247 const struct ast_vbios_enhtable *vmode) 248 { 249 u8 jreg05 = 0, jreg07 = 0, jreg09 = 0, jregAC = 0, jregAD = 0, jregAE = 0; 250 u16 temp, precache = 0; 251 252 if ((IS_AST_GEN6(ast) || IS_AST_GEN7(ast)) && 253 (vmode->flags & AST2500PreCatchCRT)) 254 precache = 40; 255 256 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x11, 0x7f, 0x00); 257 258 temp = (mode->crtc_htotal >> 3) - 5; 259 if (temp & 0x100) 260 jregAC |= 0x01; /* HT D[8] */ 261 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x00, 0x00, temp); 262 263 temp = (mode->crtc_hdisplay >> 3) - 1; 264 if (temp & 0x100) 265 jregAC |= 0x04; /* HDE D[8] */ 266 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x01, 0x00, temp); 267 268 temp = (mode->crtc_hblank_start >> 3) - 1; 269 if (temp & 0x100) 270 jregAC |= 0x10; /* HBS D[8] */ 271 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x02, 0x00, temp); 272 273 temp = ((mode->crtc_hblank_end >> 3) - 1) & 0x7f; 274 if (temp & 0x20) 275 jreg05 |= 0x80; /* HBE D[5] */ 276 if (temp & 0x40) 277 jregAD |= 0x01; /* HBE D[5] */ 278 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x03, 0xE0, (temp & 0x1f)); 279 280 temp = ((mode->crtc_hsync_start-precache) >> 3) - 1; 281 if (temp & 0x100) 282 jregAC |= 0x40; /* HRS D[5] */ 283 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x04, 0x00, temp); 284 285 temp = (((mode->crtc_hsync_end-precache) >> 3) - 1) & 0x3f; 286 if (temp & 0x20) 287 jregAD |= 0x04; /* HRE D[5] */ 288 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x05, 0x60, (u8)((temp & 0x1f) | jreg05)); 289 290 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xAC, 0x00, jregAC); 291 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xAD, 0x00, jregAD); 292 293 // Workaround for HSync Time non octave pixels (1920x1080@60Hz HSync 44 pixels); 294 if (IS_AST_GEN7(ast) && (mode->crtc_vdisplay == 1080)) 295 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xFC, 0xFD, 0x02); 296 else 297 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xFC, 0xFD, 0x00); 298 299 /* vert timings */ 300 temp = (mode->crtc_vtotal) - 2; 301 if (temp & 0x100) 302 jreg07 |= 0x01; 303 if (temp & 0x200) 304 jreg07 |= 0x20; 305 if (temp & 0x400) 306 jregAE |= 0x01; 307 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x06, 0x00, temp); 308 309 temp = (mode->crtc_vsync_start) - 1; 310 if (temp & 0x100) 311 jreg07 |= 0x04; 312 if (temp & 0x200) 313 jreg07 |= 0x80; 314 if (temp & 0x400) 315 jregAE |= 0x08; 316 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x10, 0x00, temp); 317 318 temp = (mode->crtc_vsync_end - 1) & 0x3f; 319 if (temp & 0x10) 320 jregAE |= 0x20; 321 if (temp & 0x20) 322 jregAE |= 0x40; 323 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x11, 0x70, temp & 0xf); 324 325 temp = mode->crtc_vdisplay - 1; 326 if (temp & 0x100) 327 jreg07 |= 0x02; 328 if (temp & 0x200) 329 jreg07 |= 0x40; 330 if (temp & 0x400) 331 jregAE |= 0x02; 332 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x12, 0x00, temp); 333 334 temp = mode->crtc_vblank_start - 1; 335 if (temp & 0x100) 336 jreg07 |= 0x08; 337 if (temp & 0x200) 338 jreg09 |= 0x20; 339 if (temp & 0x400) 340 jregAE |= 0x04; 341 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x15, 0x00, temp); 342 343 temp = mode->crtc_vblank_end - 1; 344 if (temp & 0x100) 345 jregAE |= 0x10; 346 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x16, 0x00, temp); 347 348 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x07, 0x00, jreg07); 349 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x09, 0xdf, jreg09); 350 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xAE, 0x00, (jregAE | 0x80)); 351 352 if (precache) 353 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0x3f, 0x80); 354 else 355 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0x3f, 0x00); 356 357 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x11, 0x7f, 0x80); 358 } 359 360 static void ast_set_offset_reg(struct ast_device *ast, 361 struct drm_framebuffer *fb) 362 { 363 u16 offset; 364 365 offset = fb->pitches[0] >> 3; 366 ast_set_index_reg(ast, AST_IO_VGACRI, 0x13, (offset & 0xff)); 367 ast_set_index_reg(ast, AST_IO_VGACRI, 0xb0, (offset >> 8) & 0x3f); 368 } 369 370 static void ast_set_dclk_reg(struct ast_device *ast, 371 struct drm_display_mode *mode, 372 const struct ast_vbios_enhtable *vmode) 373 { 374 const struct ast_vbios_dclk_info *clk_info; 375 376 if (IS_AST_GEN6(ast) || IS_AST_GEN7(ast)) 377 clk_info = &dclk_table_ast2500[vmode->dclk_index]; 378 else 379 clk_info = &dclk_table[vmode->dclk_index]; 380 381 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xc0, 0x00, clk_info->param1); 382 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xc1, 0x00, clk_info->param2); 383 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xbb, 0x0f, 384 (clk_info->param3 & 0xc0) | 385 ((clk_info->param3 & 0x3) << 4)); 386 } 387 388 static void ast_set_color_reg(struct ast_device *ast, 389 const struct drm_format_info *format) 390 { 391 u8 jregA0 = 0, jregA3 = 0, jregA8 = 0; 392 393 switch (format->cpp[0] * 8) { 394 case 8: 395 jregA0 = 0x70; 396 jregA3 = 0x01; 397 jregA8 = 0x00; 398 break; 399 case 15: 400 case 16: 401 jregA0 = 0x70; 402 jregA3 = 0x04; 403 jregA8 = 0x02; 404 break; 405 case 32: 406 jregA0 = 0x70; 407 jregA3 = 0x08; 408 jregA8 = 0x02; 409 break; 410 } 411 412 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xa0, 0x8f, jregA0); 413 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xa3, 0xf0, jregA3); 414 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xa8, 0xfd, jregA8); 415 } 416 417 static void ast_set_crtthd_reg(struct ast_device *ast) 418 { 419 /* Set Threshold */ 420 if (IS_AST_GEN7(ast)) { 421 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa7, 0xe0); 422 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa6, 0xa0); 423 } else if (IS_AST_GEN6(ast) || IS_AST_GEN5(ast) || IS_AST_GEN4(ast)) { 424 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa7, 0x78); 425 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa6, 0x60); 426 } else if (IS_AST_GEN3(ast) || IS_AST_GEN2(ast)) { 427 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa7, 0x3f); 428 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa6, 0x2f); 429 } else { 430 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa7, 0x2f); 431 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa6, 0x1f); 432 } 433 } 434 435 static void ast_set_sync_reg(struct ast_device *ast, 436 struct drm_display_mode *mode, 437 const struct ast_vbios_enhtable *vmode) 438 { 439 u8 jreg; 440 441 jreg = ast_io_read8(ast, AST_IO_VGAMR_R); 442 jreg &= ~0xC0; 443 if (vmode->flags & NVSync) 444 jreg |= 0x80; 445 if (vmode->flags & NHSync) 446 jreg |= 0x40; 447 ast_io_write8(ast, AST_IO_VGAMR_W, jreg); 448 } 449 450 static void ast_set_start_address_crt1(struct ast_device *ast, 451 unsigned int offset) 452 { 453 u32 addr; 454 455 addr = offset >> 2; 456 ast_set_index_reg(ast, AST_IO_VGACRI, 0x0d, (u8)(addr & 0xff)); 457 ast_set_index_reg(ast, AST_IO_VGACRI, 0x0c, (u8)((addr >> 8) & 0xff)); 458 ast_set_index_reg(ast, AST_IO_VGACRI, 0xaf, (u8)((addr >> 16) & 0xff)); 459 460 } 461 462 static void ast_wait_for_vretrace(struct ast_device *ast) 463 { 464 unsigned long timeout = jiffies + HZ; 465 u8 vgair1; 466 467 do { 468 vgair1 = ast_io_read8(ast, AST_IO_VGAIR1_R); 469 } while (!(vgair1 & AST_IO_VGAIR1_VREFRESH) && time_before(jiffies, timeout)); 470 } 471 472 /* 473 * Planes 474 */ 475 476 int ast_plane_init(struct drm_device *dev, struct ast_plane *ast_plane, 477 u64 offset, unsigned long size, 478 uint32_t possible_crtcs, 479 const struct drm_plane_funcs *funcs, 480 const uint32_t *formats, unsigned int format_count, 481 const uint64_t *format_modifiers, 482 enum drm_plane_type type) 483 { 484 struct drm_plane *plane = &ast_plane->base; 485 486 ast_plane->offset = offset; 487 ast_plane->size = size; 488 489 return drm_universal_plane_init(dev, plane, possible_crtcs, funcs, 490 formats, format_count, format_modifiers, 491 type, NULL); 492 } 493 494 void __iomem *ast_plane_vaddr(struct ast_plane *ast_plane) 495 { 496 struct ast_device *ast = to_ast_device(ast_plane->base.dev); 497 498 return ast->vram + ast_plane->offset; 499 } 500 501 /* 502 * Primary plane 503 */ 504 505 static const uint32_t ast_primary_plane_formats[] = { 506 DRM_FORMAT_XRGB8888, 507 DRM_FORMAT_RGB565, 508 DRM_FORMAT_C8, 509 }; 510 511 static int ast_primary_plane_helper_atomic_check(struct drm_plane *plane, 512 struct drm_atomic_state *state) 513 { 514 struct drm_device *dev = plane->dev; 515 struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane); 516 struct drm_crtc_state *new_crtc_state = NULL; 517 struct ast_crtc_state *new_ast_crtc_state; 518 int ret; 519 520 if (new_plane_state->crtc) 521 new_crtc_state = drm_atomic_get_new_crtc_state(state, new_plane_state->crtc); 522 523 ret = drm_atomic_helper_check_plane_state(new_plane_state, new_crtc_state, 524 DRM_PLANE_NO_SCALING, 525 DRM_PLANE_NO_SCALING, 526 false, true); 527 if (ret) { 528 return ret; 529 } else if (!new_plane_state->visible) { 530 if (drm_WARN_ON(dev, new_plane_state->crtc)) /* cannot legally happen */ 531 return -EINVAL; 532 else 533 return 0; 534 } 535 536 new_ast_crtc_state = to_ast_crtc_state(new_crtc_state); 537 538 new_ast_crtc_state->format = new_plane_state->fb->format; 539 540 return 0; 541 } 542 543 static void ast_handle_damage(struct ast_plane *ast_plane, struct iosys_map *src, 544 struct drm_framebuffer *fb, 545 const struct drm_rect *clip) 546 { 547 struct iosys_map dst = IOSYS_MAP_INIT_VADDR_IOMEM(ast_plane_vaddr(ast_plane)); 548 549 iosys_map_incr(&dst, drm_fb_clip_offset(fb->pitches[0], fb->format, clip)); 550 drm_fb_memcpy(&dst, fb->pitches, src, fb, clip); 551 } 552 553 static void ast_primary_plane_helper_atomic_update(struct drm_plane *plane, 554 struct drm_atomic_state *state) 555 { 556 struct drm_device *dev = plane->dev; 557 struct ast_device *ast = to_ast_device(dev); 558 struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane); 559 struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state); 560 struct drm_framebuffer *fb = plane_state->fb; 561 struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane); 562 struct drm_framebuffer *old_fb = old_plane_state->fb; 563 struct ast_plane *ast_plane = to_ast_plane(plane); 564 struct drm_crtc *crtc = plane_state->crtc; 565 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc); 566 struct drm_rect damage; 567 struct drm_atomic_helper_damage_iter iter; 568 569 if (!old_fb || (fb->format != old_fb->format) || crtc_state->mode_changed) { 570 struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state); 571 572 ast_set_color_reg(ast, fb->format); 573 ast_set_vbios_color_reg(ast, fb->format, ast_crtc_state->vmode); 574 } 575 576 drm_atomic_helper_damage_iter_init(&iter, old_plane_state, plane_state); 577 drm_atomic_for_each_plane_damage(&iter, &damage) { 578 ast_handle_damage(ast_plane, shadow_plane_state->data, fb, &damage); 579 } 580 581 /* 582 * Some BMCs stop scanning out the video signal after the driver 583 * reprogrammed the offset. This stalls display output for several 584 * seconds and makes the display unusable. Therefore only update 585 * the offset if it changes. 586 */ 587 if (!old_fb || old_fb->pitches[0] != fb->pitches[0]) 588 ast_set_offset_reg(ast, fb); 589 } 590 591 static void ast_primary_plane_helper_atomic_enable(struct drm_plane *plane, 592 struct drm_atomic_state *state) 593 { 594 struct ast_device *ast = to_ast_device(plane->dev); 595 struct ast_plane *ast_plane = to_ast_plane(plane); 596 597 /* 598 * Some BMCs stop scanning out the video signal after the driver 599 * reprogrammed the scanout address. This stalls display 600 * output for several seconds and makes the display unusable. 601 * Therefore only reprogram the address after enabling the plane. 602 */ 603 ast_set_start_address_crt1(ast, (u32)ast_plane->offset); 604 } 605 606 static void ast_primary_plane_helper_atomic_disable(struct drm_plane *plane, 607 struct drm_atomic_state *state) 608 { 609 /* 610 * Keep this empty function to avoid calling 611 * atomic_update when disabling the plane. 612 */ 613 } 614 615 static int ast_primary_plane_helper_get_scanout_buffer(struct drm_plane *plane, 616 struct drm_scanout_buffer *sb) 617 { 618 struct ast_plane *ast_plane = to_ast_plane(plane); 619 620 if (plane->state && plane->state->fb) { 621 sb->format = plane->state->fb->format; 622 sb->width = plane->state->fb->width; 623 sb->height = plane->state->fb->height; 624 sb->pitch[0] = plane->state->fb->pitches[0]; 625 iosys_map_set_vaddr_iomem(&sb->map[0], ast_plane_vaddr(ast_plane)); 626 return 0; 627 } 628 return -ENODEV; 629 } 630 631 static const struct drm_plane_helper_funcs ast_primary_plane_helper_funcs = { 632 DRM_GEM_SHADOW_PLANE_HELPER_FUNCS, 633 .atomic_check = ast_primary_plane_helper_atomic_check, 634 .atomic_update = ast_primary_plane_helper_atomic_update, 635 .atomic_enable = ast_primary_plane_helper_atomic_enable, 636 .atomic_disable = ast_primary_plane_helper_atomic_disable, 637 .get_scanout_buffer = ast_primary_plane_helper_get_scanout_buffer, 638 }; 639 640 static const struct drm_plane_funcs ast_primary_plane_funcs = { 641 .update_plane = drm_atomic_helper_update_plane, 642 .disable_plane = drm_atomic_helper_disable_plane, 643 .destroy = drm_plane_cleanup, 644 DRM_GEM_SHADOW_PLANE_FUNCS, 645 }; 646 647 static int ast_primary_plane_init(struct ast_device *ast) 648 { 649 struct drm_device *dev = &ast->base; 650 struct ast_plane *ast_primary_plane = &ast->primary_plane; 651 struct drm_plane *primary_plane = &ast_primary_plane->base; 652 u64 offset = ast_fb_vram_offset(); 653 unsigned long size = ast_fb_vram_size(ast); 654 int ret; 655 656 ret = ast_plane_init(dev, ast_primary_plane, offset, size, 657 0x01, &ast_primary_plane_funcs, 658 ast_primary_plane_formats, ARRAY_SIZE(ast_primary_plane_formats), 659 NULL, DRM_PLANE_TYPE_PRIMARY); 660 if (ret) { 661 drm_err(dev, "ast_plane_init() failed: %d\n", ret); 662 return ret; 663 } 664 drm_plane_helper_add(primary_plane, &ast_primary_plane_helper_funcs); 665 drm_plane_enable_fb_damage_clips(primary_plane); 666 667 return 0; 668 } 669 670 /* 671 * CRTC 672 */ 673 674 static enum drm_mode_status 675 ast_crtc_helper_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *mode) 676 { 677 struct ast_device *ast = to_ast_device(crtc->dev); 678 const struct ast_vbios_enhtable *vmode; 679 680 vmode = ast_vbios_find_mode(ast, mode); 681 if (!vmode) 682 return MODE_NOMODE; 683 684 return MODE_OK; 685 } 686 687 static void ast_crtc_helper_mode_set_nofb(struct drm_crtc *crtc) 688 { 689 struct drm_device *dev = crtc->dev; 690 struct ast_device *ast = to_ast_device(dev); 691 struct drm_crtc_state *crtc_state = crtc->state; 692 struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state); 693 const struct ast_vbios_stdtable *std_table = ast_crtc_state->std_table; 694 const struct ast_vbios_enhtable *vmode = ast_crtc_state->vmode; 695 struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode; 696 697 /* 698 * Ensure that no scanout takes place before reprogramming mode 699 * and format registers. 700 * 701 * TODO: Get vblank interrupts working and remove this line. 702 */ 703 ast_wait_for_vretrace(ast); 704 705 ast_set_vbios_mode_reg(ast, adjusted_mode, vmode); 706 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa1, 0x06); 707 ast_set_std_reg(ast, adjusted_mode, std_table); 708 ast_set_crtc_reg(ast, adjusted_mode, vmode); 709 ast_set_dclk_reg(ast, adjusted_mode, vmode); 710 ast_set_crtthd_reg(ast); 711 ast_set_sync_reg(ast, adjusted_mode, vmode); 712 } 713 714 static int ast_crtc_helper_atomic_check(struct drm_crtc *crtc, 715 struct drm_atomic_state *state) 716 { 717 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc); 718 struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode; 719 struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state, crtc); 720 struct ast_crtc_state *old_ast_crtc_state = to_ast_crtc_state(old_crtc_state); 721 struct drm_device *dev = crtc->dev; 722 struct ast_device *ast = to_ast_device(dev); 723 struct ast_crtc_state *ast_state; 724 const struct drm_format_info *format; 725 const struct ast_vbios_enhtable *vmode; 726 unsigned int hborder = 0; 727 unsigned int vborder = 0; 728 int ret; 729 730 if (!crtc_state->enable) 731 return 0; 732 733 ret = drm_atomic_helper_check_crtc_primary_plane(crtc_state); 734 if (ret) 735 return ret; 736 737 ast_state = to_ast_crtc_state(crtc_state); 738 739 format = ast_state->format; 740 if (drm_WARN_ON_ONCE(dev, !format)) 741 return -EINVAL; /* BUG: We didn't set format in primary check(). */ 742 743 /* 744 * The gamma LUT has to be reloaded after changing the primary 745 * plane's color format. 746 */ 747 if (old_ast_crtc_state->format != format) 748 crtc_state->color_mgmt_changed = true; 749 750 if (crtc_state->color_mgmt_changed && crtc_state->gamma_lut) { 751 if (crtc_state->gamma_lut->length != 752 AST_LUT_SIZE * sizeof(struct drm_color_lut)) { 753 drm_err(dev, "Wrong size for gamma_lut %zu\n", 754 crtc_state->gamma_lut->length); 755 return -EINVAL; 756 } 757 } 758 759 /* 760 * Set register tables. 761 * 762 * TODO: These tables mix all kinds of fields and should 763 * probably be resolved into various helper functions. 764 */ 765 switch (format->format) { 766 case DRM_FORMAT_C8: 767 ast_state->std_table = &vbios_stdtable[VGAModeIndex]; 768 break; 769 case DRM_FORMAT_RGB565: 770 ast_state->std_table = &vbios_stdtable[HiCModeIndex]; 771 break; 772 case DRM_FORMAT_RGB888: 773 case DRM_FORMAT_XRGB8888: 774 ast_state->std_table = &vbios_stdtable[TrueCModeIndex]; 775 break; 776 default: 777 return -EINVAL; 778 } 779 780 /* 781 * Find the VBIOS mode and adjust the DRM display mode accordingly 782 * if a full modeset is required. Otherwise keep the existing values. 783 */ 784 if (drm_atomic_crtc_needs_modeset(crtc_state)) { 785 vmode = ast_vbios_find_mode(ast, &crtc_state->mode); 786 if (!vmode) 787 return -EINVAL; 788 ast_state->vmode = vmode; 789 790 if (vmode->flags & HBorder) 791 hborder = 8; 792 if (vmode->flags & VBorder) 793 vborder = 8; 794 795 adjusted_mode->crtc_hdisplay = vmode->hde; 796 adjusted_mode->crtc_hblank_start = vmode->hde + hborder; 797 adjusted_mode->crtc_hblank_end = vmode->ht - hborder; 798 adjusted_mode->crtc_hsync_start = vmode->hde + hborder + vmode->hfp; 799 adjusted_mode->crtc_hsync_end = vmode->hde + hborder + vmode->hfp + vmode->hsync; 800 adjusted_mode->crtc_htotal = vmode->ht; 801 802 adjusted_mode->crtc_vdisplay = vmode->vde; 803 adjusted_mode->crtc_vblank_start = vmode->vde + vborder; 804 adjusted_mode->crtc_vblank_end = vmode->vt - vborder; 805 adjusted_mode->crtc_vsync_start = vmode->vde + vborder + vmode->vfp; 806 adjusted_mode->crtc_vsync_end = vmode->vde + vborder + vmode->vfp + vmode->vsync; 807 adjusted_mode->crtc_vtotal = vmode->vt; 808 } 809 810 return 0; 811 } 812 813 static void 814 ast_crtc_helper_atomic_flush(struct drm_crtc *crtc, 815 struct drm_atomic_state *state) 816 { 817 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, 818 crtc); 819 struct drm_device *dev = crtc->dev; 820 struct ast_device *ast = to_ast_device(dev); 821 struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state); 822 823 /* 824 * The gamma LUT has to be reloaded after changing the primary 825 * plane's color format. 826 */ 827 if (crtc_state->enable && crtc_state->color_mgmt_changed) { 828 if (crtc_state->gamma_lut) 829 ast_crtc_load_gamma(ast, 830 ast_crtc_state->format, 831 crtc_state->gamma_lut->data); 832 else 833 ast_crtc_fill_gamma(ast, ast_crtc_state->format); 834 } 835 } 836 837 static void ast_crtc_helper_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_state *state) 838 { 839 struct ast_device *ast = to_ast_device(crtc->dev); 840 841 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0xfc, 0x00); 842 ast_set_index_reg_mask(ast, AST_IO_VGASRI, 0x01, 0xdf, 0x00); 843 } 844 845 static void ast_crtc_helper_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_state *state) 846 { 847 struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state, crtc); 848 struct ast_device *ast = to_ast_device(crtc->dev); 849 u8 vgacrb6; 850 851 ast_set_index_reg_mask(ast, AST_IO_VGASRI, 0x01, 0xdf, AST_IO_VGASR1_SD); 852 853 vgacrb6 = AST_IO_VGACRB6_VSYNC_OFF | 854 AST_IO_VGACRB6_HSYNC_OFF; 855 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0xfc, vgacrb6); 856 857 /* 858 * HW cursors require the underlying primary plane and CRTC to 859 * display a valid mode and image. This is not the case during 860 * full modeset operations. So we temporarily disable any active 861 * plane, including the HW cursor. Each plane's atomic_update() 862 * helper will re-enable it if necessary. 863 * 864 * We only do this during *full* modesets. It does not affect 865 * simple pageflips on the planes. 866 */ 867 drm_atomic_helper_disable_planes_on_crtc(old_crtc_state, false); 868 } 869 870 static const struct drm_crtc_helper_funcs ast_crtc_helper_funcs = { 871 .mode_valid = ast_crtc_helper_mode_valid, 872 .mode_set_nofb = ast_crtc_helper_mode_set_nofb, 873 .atomic_check = ast_crtc_helper_atomic_check, 874 .atomic_flush = ast_crtc_helper_atomic_flush, 875 .atomic_enable = ast_crtc_helper_atomic_enable, 876 .atomic_disable = ast_crtc_helper_atomic_disable, 877 }; 878 879 static void ast_crtc_reset(struct drm_crtc *crtc) 880 { 881 struct ast_crtc_state *ast_state = 882 kzalloc(sizeof(*ast_state), GFP_KERNEL); 883 884 if (crtc->state) 885 crtc->funcs->atomic_destroy_state(crtc, crtc->state); 886 887 if (ast_state) 888 __drm_atomic_helper_crtc_reset(crtc, &ast_state->base); 889 else 890 __drm_atomic_helper_crtc_reset(crtc, NULL); 891 } 892 893 static struct drm_crtc_state * 894 ast_crtc_atomic_duplicate_state(struct drm_crtc *crtc) 895 { 896 struct ast_crtc_state *new_ast_state, *ast_state; 897 struct drm_device *dev = crtc->dev; 898 899 if (drm_WARN_ON(dev, !crtc->state)) 900 return NULL; 901 902 new_ast_state = kmalloc(sizeof(*new_ast_state), GFP_KERNEL); 903 if (!new_ast_state) 904 return NULL; 905 __drm_atomic_helper_crtc_duplicate_state(crtc, &new_ast_state->base); 906 907 ast_state = to_ast_crtc_state(crtc->state); 908 909 new_ast_state->format = ast_state->format; 910 new_ast_state->std_table = ast_state->std_table; 911 new_ast_state->vmode = ast_state->vmode; 912 913 return &new_ast_state->base; 914 } 915 916 static void ast_crtc_atomic_destroy_state(struct drm_crtc *crtc, 917 struct drm_crtc_state *state) 918 { 919 struct ast_crtc_state *ast_state = to_ast_crtc_state(state); 920 921 __drm_atomic_helper_crtc_destroy_state(&ast_state->base); 922 kfree(ast_state); 923 } 924 925 static const struct drm_crtc_funcs ast_crtc_funcs = { 926 .reset = ast_crtc_reset, 927 .destroy = drm_crtc_cleanup, 928 .set_config = drm_atomic_helper_set_config, 929 .page_flip = drm_atomic_helper_page_flip, 930 .atomic_duplicate_state = ast_crtc_atomic_duplicate_state, 931 .atomic_destroy_state = ast_crtc_atomic_destroy_state, 932 }; 933 934 static int ast_crtc_init(struct ast_device *ast) 935 { 936 struct drm_device *dev = &ast->base; 937 struct drm_crtc *crtc = &ast->crtc; 938 int ret; 939 940 ret = drm_crtc_init_with_planes(dev, crtc, &ast->primary_plane.base, 941 &ast->cursor_plane.base.base, &ast_crtc_funcs, 942 NULL); 943 if (ret) 944 return ret; 945 946 drm_mode_crtc_set_gamma_size(crtc, AST_LUT_SIZE); 947 drm_crtc_enable_color_mgmt(crtc, 0, false, AST_LUT_SIZE); 948 949 drm_crtc_helper_add(crtc, &ast_crtc_helper_funcs); 950 951 return 0; 952 } 953 954 /* 955 * Mode config 956 */ 957 958 static void ast_mode_config_helper_atomic_commit_tail(struct drm_atomic_state *state) 959 { 960 struct ast_device *ast = to_ast_device(state->dev); 961 962 /* 963 * Concurrent operations could possibly trigger a call to 964 * drm_connector_helper_funcs.get_modes by reading the display 965 * modes. Protect access to registers by acquiring the modeset 966 * lock. 967 */ 968 mutex_lock(&ast->modeset_lock); 969 drm_atomic_helper_commit_tail(state); 970 mutex_unlock(&ast->modeset_lock); 971 } 972 973 static const struct drm_mode_config_helper_funcs ast_mode_config_helper_funcs = { 974 .atomic_commit_tail = ast_mode_config_helper_atomic_commit_tail, 975 }; 976 977 static enum drm_mode_status ast_mode_config_mode_valid(struct drm_device *dev, 978 const struct drm_display_mode *mode) 979 { 980 const struct drm_format_info *info = drm_format_info(DRM_FORMAT_XRGB8888); 981 struct ast_device *ast = to_ast_device(dev); 982 unsigned long max_fb_size = ast_fb_vram_size(ast); 983 u64 pitch; 984 985 if (drm_WARN_ON_ONCE(dev, !info)) 986 return MODE_ERROR; /* driver bug */ 987 988 pitch = drm_format_info_min_pitch(info, 0, mode->hdisplay); 989 if (!pitch) 990 return MODE_BAD_WIDTH; 991 if (pitch > AST_PRIMARY_PLANE_MAX_OFFSET) 992 return MODE_BAD_WIDTH; /* maximum programmable pitch */ 993 if (pitch > max_fb_size / mode->vdisplay) 994 return MODE_MEM; 995 996 return MODE_OK; 997 } 998 999 static const struct drm_mode_config_funcs ast_mode_config_funcs = { 1000 .fb_create = drm_gem_fb_create_with_dirty, 1001 .mode_valid = ast_mode_config_mode_valid, 1002 .atomic_check = drm_atomic_helper_check, 1003 .atomic_commit = drm_atomic_helper_commit, 1004 }; 1005 1006 int ast_mode_config_init(struct ast_device *ast) 1007 { 1008 struct drm_device *dev = &ast->base; 1009 int ret; 1010 1011 ret = drmm_mutex_init(dev, &ast->modeset_lock); 1012 if (ret) 1013 return ret; 1014 1015 ret = drmm_mode_config_init(dev); 1016 if (ret) 1017 return ret; 1018 1019 dev->mode_config.funcs = &ast_mode_config_funcs; 1020 dev->mode_config.min_width = 0; 1021 dev->mode_config.min_height = 0; 1022 dev->mode_config.preferred_depth = 24; 1023 1024 if (ast->support_fullhd) { 1025 dev->mode_config.max_width = 1920; 1026 dev->mode_config.max_height = 2048; 1027 } else { 1028 dev->mode_config.max_width = 1600; 1029 dev->mode_config.max_height = 1200; 1030 } 1031 1032 dev->mode_config.helper_private = &ast_mode_config_helper_funcs; 1033 1034 ret = ast_primary_plane_init(ast); 1035 if (ret) 1036 return ret; 1037 1038 ret = ast_cursor_plane_init(ast); 1039 if (ret) 1040 return ret; 1041 1042 ret = ast_crtc_init(ast); 1043 if (ret) 1044 return ret; 1045 1046 switch (ast->tx_chip) { 1047 case AST_TX_NONE: 1048 ret = ast_vga_output_init(ast); 1049 break; 1050 case AST_TX_SIL164: 1051 ret = ast_sil164_output_init(ast); 1052 break; 1053 case AST_TX_DP501: 1054 ret = ast_dp501_output_init(ast); 1055 break; 1056 case AST_TX_ASTDP: 1057 ret = ast_astdp_output_init(ast); 1058 break; 1059 } 1060 if (ret) 1061 return ret; 1062 1063 drm_mode_config_reset(dev); 1064 drmm_kms_helper_poll_init(dev); 1065 1066 return 0; 1067 } 1068