1 /* 2 * Copyright 2012 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the 6 * "Software"), to deal in the Software without restriction, including 7 * without limitation the rights to use, copy, modify, merge, publish, 8 * distribute, sub license, and/or sell copies of the Software, and to 9 * permit persons to whom the Software is furnished to do so, subject to 10 * the following conditions: 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 13 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 14 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 15 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 16 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 17 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 18 * USE OR OTHER DEALINGS IN THE SOFTWARE. 19 * 20 * The above copyright notice and this permission notice (including the 21 * next paragraph) shall be included in all copies or substantial portions 22 * of the Software. 23 * 24 */ 25 /* 26 * Authors: Dave Airlie <airlied@redhat.com> 27 */ 28 #ifndef __AST_DRV_H__ 29 #define __AST_DRV_H__ 30 31 #include <linux/io.h> 32 #include <linux/types.h> 33 34 #include <drm/drm_connector.h> 35 #include <drm/drm_crtc.h> 36 #include <drm/drm_encoder.h> 37 #include <drm/drm_mode.h> 38 #include <drm/drm_framebuffer.h> 39 40 #include "ast_reg.h" 41 42 struct ast_vbios_enhtable; 43 44 #define DRIVER_AUTHOR "Dave Airlie" 45 46 #define DRIVER_NAME "ast" 47 #define DRIVER_DESC "AST" 48 49 #define DRIVER_MAJOR 0 50 #define DRIVER_MINOR 1 51 #define DRIVER_PATCHLEVEL 0 52 53 #define PCI_CHIP_AST2000 0x2000 54 #define PCI_CHIP_AST2100 0x2010 55 56 #define __AST_CHIP(__gen, __index) ((__gen) << 16 | (__index)) 57 58 enum ast_chip { 59 /* 1st gen */ 60 AST1000 = __AST_CHIP(1, 0), // unused 61 AST2000 = __AST_CHIP(1, 1), 62 /* 2nd gen */ 63 AST1100 = __AST_CHIP(2, 0), 64 AST2100 = __AST_CHIP(2, 1), 65 AST2050 = __AST_CHIP(2, 2), // unused 66 /* 3rd gen */ 67 AST2200 = __AST_CHIP(3, 0), 68 AST2150 = __AST_CHIP(3, 1), 69 /* 4th gen */ 70 AST2300 = __AST_CHIP(4, 0), 71 AST1300 = __AST_CHIP(4, 1), 72 AST1050 = __AST_CHIP(4, 2), // unused 73 /* 5th gen */ 74 AST2400 = __AST_CHIP(5, 0), 75 AST1400 = __AST_CHIP(5, 1), 76 AST1250 = __AST_CHIP(5, 2), // unused 77 /* 6th gen */ 78 AST2500 = __AST_CHIP(6, 0), 79 AST2510 = __AST_CHIP(6, 1), 80 AST2520 = __AST_CHIP(6, 2), // unused 81 /* 7th gen */ 82 AST2600 = __AST_CHIP(7, 0), 83 AST2620 = __AST_CHIP(7, 1), // unused 84 }; 85 86 #define __AST_CHIP_GEN(__chip) (((unsigned long)(__chip)) >> 16) 87 88 enum ast_tx_chip { 89 AST_TX_NONE, 90 AST_TX_SIL164, 91 AST_TX_DP501, 92 AST_TX_ASTDP, 93 }; 94 95 enum ast_config_mode { 96 ast_use_p2a, 97 ast_use_dt, 98 ast_use_defaults 99 }; 100 101 #define AST_DRAM_512Mx16 0 102 #define AST_DRAM_1Gx16 1 103 #define AST_DRAM_512Mx32 2 104 #define AST_DRAM_1Gx32 3 105 #define AST_DRAM_2Gx16 6 106 #define AST_DRAM_4Gx16 7 107 #define AST_DRAM_8Gx16 8 108 109 /* 110 * Hardware cursor 111 */ 112 113 #define AST_MAX_HWC_WIDTH 64 114 #define AST_MAX_HWC_HEIGHT 64 115 116 #define AST_HWC_PITCH (AST_MAX_HWC_WIDTH * SZ_2) 117 #define AST_HWC_SIZE (AST_MAX_HWC_HEIGHT * AST_HWC_PITCH) 118 119 #define AST_HWC_SIGNATURE_SIZE 32 120 121 /* 122 * Planes 123 */ 124 125 struct ast_plane { 126 struct drm_plane base; 127 128 void __iomem *vaddr; 129 u64 offset; 130 unsigned long size; 131 }; 132 133 static inline struct ast_plane *to_ast_plane(struct drm_plane *plane) 134 { 135 return container_of(plane, struct ast_plane, base); 136 } 137 138 struct ast_cursor_plane { 139 struct ast_plane base; 140 141 u8 argb4444[AST_HWC_SIZE]; 142 }; 143 144 static inline struct ast_cursor_plane *to_ast_cursor_plane(struct drm_plane *plane) 145 { 146 return container_of(to_ast_plane(plane), struct ast_cursor_plane, base); 147 } 148 149 /* 150 * Connector 151 */ 152 153 struct ast_connector { 154 struct drm_connector base; 155 156 enum drm_connector_status physical_status; 157 }; 158 159 static inline struct ast_connector * 160 to_ast_connector(struct drm_connector *connector) 161 { 162 return container_of(connector, struct ast_connector, base); 163 } 164 165 /* 166 * Device 167 */ 168 169 struct ast_device { 170 struct drm_device base; 171 172 void __iomem *regs; 173 void __iomem *ioregs; 174 void __iomem *dp501_fw_buf; 175 176 enum ast_config_mode config_mode; 177 enum ast_chip chip; 178 179 uint32_t dram_bus_width; 180 uint32_t dram_type; 181 uint32_t mclk; 182 183 void __iomem *vram; 184 unsigned long vram_base; 185 unsigned long vram_size; 186 unsigned long vram_fb_available; 187 188 struct mutex modeset_lock; /* Protects access to modeset I/O registers in ioregs */ 189 190 enum ast_tx_chip tx_chip; 191 192 struct ast_plane primary_plane; 193 struct ast_cursor_plane cursor_plane; 194 struct drm_crtc crtc; 195 union { 196 struct { 197 struct drm_encoder encoder; 198 struct ast_connector connector; 199 } vga; 200 struct { 201 struct drm_encoder encoder; 202 struct ast_connector connector; 203 } sil164; 204 struct { 205 struct drm_encoder encoder; 206 struct ast_connector connector; 207 } dp501; 208 struct { 209 struct drm_encoder encoder; 210 struct ast_connector connector; 211 } astdp; 212 } output; 213 214 bool support_wsxga_p; /* 1680x1050 */ 215 bool support_fullhd; /* 1920x1080 */ 216 bool support_wuxga; /* 1920x1200 */ 217 218 u8 *dp501_fw_addr; 219 const struct firmware *dp501_fw; /* dp501 fw */ 220 }; 221 222 static inline struct ast_device *to_ast_device(struct drm_device *dev) 223 { 224 return container_of(dev, struct ast_device, base); 225 } 226 227 struct drm_device *ast_device_create(struct pci_dev *pdev, 228 const struct drm_driver *drv, 229 enum ast_chip chip, 230 enum ast_config_mode config_mode, 231 void __iomem *regs, 232 void __iomem *ioregs, 233 bool need_post); 234 235 static inline unsigned long __ast_gen(struct ast_device *ast) 236 { 237 return __AST_CHIP_GEN(ast->chip); 238 } 239 #define AST_GEN(__ast) __ast_gen(__ast) 240 241 static inline bool __ast_gen_is_eq(struct ast_device *ast, unsigned long gen) 242 { 243 return __ast_gen(ast) == gen; 244 } 245 #define IS_AST_GEN1(__ast) __ast_gen_is_eq(__ast, 1) 246 #define IS_AST_GEN2(__ast) __ast_gen_is_eq(__ast, 2) 247 #define IS_AST_GEN3(__ast) __ast_gen_is_eq(__ast, 3) 248 #define IS_AST_GEN4(__ast) __ast_gen_is_eq(__ast, 4) 249 #define IS_AST_GEN5(__ast) __ast_gen_is_eq(__ast, 5) 250 #define IS_AST_GEN6(__ast) __ast_gen_is_eq(__ast, 6) 251 #define IS_AST_GEN7(__ast) __ast_gen_is_eq(__ast, 7) 252 253 static inline u8 __ast_read8(const void __iomem *addr, u32 reg) 254 { 255 return ioread8(addr + reg); 256 } 257 258 static inline u32 __ast_read32(const void __iomem *addr, u32 reg) 259 { 260 return ioread32(addr + reg); 261 } 262 263 static inline void __ast_write8(void __iomem *addr, u32 reg, u8 val) 264 { 265 iowrite8(val, addr + reg); 266 } 267 268 static inline void __ast_write32(void __iomem *addr, u32 reg, u32 val) 269 { 270 iowrite32(val, addr + reg); 271 } 272 273 static inline u8 __ast_read8_i(void __iomem *addr, u32 reg, u8 index) 274 { 275 __ast_write8(addr, reg, index); 276 return __ast_read8(addr, reg + 1); 277 } 278 279 static inline u8 __ast_read8_i_masked(void __iomem *addr, u32 reg, u8 index, u8 read_mask) 280 { 281 u8 val = __ast_read8_i(addr, reg, index); 282 283 return val & read_mask; 284 } 285 286 static inline void __ast_write8_i(void __iomem *addr, u32 reg, u8 index, u8 val) 287 { 288 __ast_write8(addr, reg, index); 289 __ast_write8(addr, reg + 1, val); 290 } 291 292 static inline void __ast_write8_i_masked(void __iomem *addr, u32 reg, u8 index, u8 read_mask, 293 u8 val) 294 { 295 u8 tmp = __ast_read8_i_masked(addr, reg, index, read_mask); 296 297 tmp |= val; 298 __ast_write8_i(addr, reg, index, tmp); 299 } 300 301 static inline u32 ast_read32(struct ast_device *ast, u32 reg) 302 { 303 return __ast_read32(ast->regs, reg); 304 } 305 306 static inline void ast_write32(struct ast_device *ast, u32 reg, u32 val) 307 { 308 __ast_write32(ast->regs, reg, val); 309 } 310 311 static inline u8 ast_io_read8(struct ast_device *ast, u32 reg) 312 { 313 return __ast_read8(ast->ioregs, reg); 314 } 315 316 static inline void ast_io_write8(struct ast_device *ast, u32 reg, u8 val) 317 { 318 __ast_write8(ast->ioregs, reg, val); 319 } 320 321 static inline u8 ast_get_index_reg(struct ast_device *ast, u32 base, u8 index) 322 { 323 return __ast_read8_i(ast->ioregs, base, index); 324 } 325 326 static inline u8 ast_get_index_reg_mask(struct ast_device *ast, u32 base, u8 index, 327 u8 preserve_mask) 328 { 329 return __ast_read8_i_masked(ast->ioregs, base, index, preserve_mask); 330 } 331 332 static inline void ast_set_index_reg(struct ast_device *ast, u32 base, u8 index, u8 val) 333 { 334 __ast_write8_i(ast->ioregs, base, index, val); 335 } 336 337 static inline void ast_set_index_reg_mask(struct ast_device *ast, u32 base, u8 index, 338 u8 preserve_mask, u8 val) 339 { 340 __ast_write8_i_masked(ast->ioregs, base, index, preserve_mask, val); 341 } 342 343 #define AST_VIDMEM_SIZE_8M 0x00800000 344 #define AST_VIDMEM_SIZE_16M 0x01000000 345 #define AST_VIDMEM_SIZE_32M 0x02000000 346 #define AST_VIDMEM_SIZE_64M 0x04000000 347 #define AST_VIDMEM_SIZE_128M 0x08000000 348 349 #define AST_VIDMEM_DEFAULT_SIZE AST_VIDMEM_SIZE_8M 350 351 struct ast_vbios_stdtable { 352 u8 misc; 353 u8 seq[4]; 354 u8 crtc[25]; 355 u8 ar[20]; 356 u8 gr[9]; 357 }; 358 359 struct ast_vbios_dclk_info { 360 u8 param1; 361 u8 param2; 362 u8 param3; 363 }; 364 365 struct ast_crtc_state { 366 struct drm_crtc_state base; 367 368 /* Last known format of primary plane */ 369 const struct drm_format_info *format; 370 371 const struct ast_vbios_stdtable *std_table; 372 const struct ast_vbios_enhtable *vmode; 373 }; 374 375 #define to_ast_crtc_state(state) container_of(state, struct ast_crtc_state, base) 376 377 #define AST_MM_ALIGN_SHIFT 4 378 #define AST_MM_ALIGN_MASK ((1 << AST_MM_ALIGN_SHIFT) - 1) 379 380 #define AST_DP501_FW_VERSION_MASK GENMASK(7, 4) 381 #define AST_DP501_FW_VERSION_1 BIT(4) 382 #define AST_DP501_PNP_CONNECTED BIT(1) 383 384 #define AST_DP501_DEFAULT_DCLK 65 385 386 #define AST_DP501_GBL_VERSION 0xf000 387 #define AST_DP501_PNPMONITOR 0xf010 388 #define AST_DP501_LINKRATE 0xf014 389 #define AST_DP501_EDID_DATA 0xf020 390 391 /* 392 * ASTDP resoultion table: 393 * EX: ASTDP_A_B_C: 394 * A: Resolution 395 * B: Refresh Rate 396 * C: Misc information, such as CVT, Reduce Blanked 397 */ 398 #define ASTDP_640x480_60 0x00 399 #define ASTDP_640x480_72 0x01 400 #define ASTDP_640x480_75 0x02 401 #define ASTDP_640x480_85 0x03 402 #define ASTDP_800x600_56 0x04 403 #define ASTDP_800x600_60 0x05 404 #define ASTDP_800x600_72 0x06 405 #define ASTDP_800x600_75 0x07 406 #define ASTDP_800x600_85 0x08 407 #define ASTDP_1024x768_60 0x09 408 #define ASTDP_1024x768_70 0x0A 409 #define ASTDP_1024x768_75 0x0B 410 #define ASTDP_1024x768_85 0x0C 411 #define ASTDP_1280x1024_60 0x0D 412 #define ASTDP_1280x1024_75 0x0E 413 #define ASTDP_1280x1024_85 0x0F 414 #define ASTDP_1600x1200_60 0x10 415 #define ASTDP_320x240_60 0x11 416 #define ASTDP_400x300_60 0x12 417 #define ASTDP_512x384_60 0x13 418 #define ASTDP_1920x1200_60 0x14 419 #define ASTDP_1920x1080_60 0x15 420 #define ASTDP_1280x800_60 0x16 421 #define ASTDP_1280x800_60_RB 0x17 422 #define ASTDP_1440x900_60 0x18 423 #define ASTDP_1440x900_60_RB 0x19 424 #define ASTDP_1680x1050_60 0x1A 425 #define ASTDP_1680x1050_60_RB 0x1B 426 #define ASTDP_1600x900_60 0x1C 427 #define ASTDP_1600x900_60_RB 0x1D 428 #define ASTDP_1366x768_60 0x1E 429 #define ASTDP_1152x864_75 0x1F 430 431 int ast_mm_init(struct ast_device *ast); 432 433 /* ast post */ 434 int ast_post_gpu(struct ast_device *ast); 435 u32 ast_mindwm(struct ast_device *ast, u32 r); 436 void ast_moutdwm(struct ast_device *ast, u32 r, u32 v); 437 void ast_patch_ahb_2500(void __iomem *regs); 438 439 int ast_vga_output_init(struct ast_device *ast); 440 int ast_sil164_output_init(struct ast_device *ast); 441 442 /* ast_cursor.c */ 443 int ast_cursor_plane_init(struct ast_device *ast); 444 445 /* ast dp501 */ 446 bool ast_backup_fw(struct ast_device *ast, u8 *addr, u32 size); 447 void ast_init_3rdtx(struct ast_device *ast); 448 int ast_dp501_output_init(struct ast_device *ast); 449 450 /* aspeed DP */ 451 int ast_dp_launch(struct ast_device *ast); 452 int ast_astdp_output_init(struct ast_device *ast); 453 454 /* ast_mode.c */ 455 int ast_mode_config_init(struct ast_device *ast); 456 int ast_plane_init(struct drm_device *dev, struct ast_plane *ast_plane, 457 void __iomem *vaddr, u64 offset, unsigned long size, 458 uint32_t possible_crtcs, 459 const struct drm_plane_funcs *funcs, 460 const uint32_t *formats, unsigned int format_count, 461 const uint64_t *format_modifiers, 462 enum drm_plane_type type); 463 464 #endif 465