1 /* 2 * Copyright 2012 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the 6 * "Software"), to deal in the Software without restriction, including 7 * without limitation the rights to use, copy, modify, merge, publish, 8 * distribute, sub license, and/or sell copies of the Software, and to 9 * permit persons to whom the Software is furnished to do so, subject to 10 * the following conditions: 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 13 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 14 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 15 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 16 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 17 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 18 * USE OR OTHER DEALINGS IN THE SOFTWARE. 19 * 20 * The above copyright notice and this permission notice (including the 21 * next paragraph) shall be included in all copies or substantial portions 22 * of the Software. 23 * 24 */ 25 /* 26 * Authors: Dave Airlie <airlied@redhat.com> 27 */ 28 #ifndef __AST_DRV_H__ 29 #define __AST_DRV_H__ 30 31 #include <linux/i2c.h> 32 #include <linux/i2c-algo-bit.h> 33 #include <linux/io.h> 34 #include <linux/types.h> 35 36 #include <drm/drm_connector.h> 37 #include <drm/drm_crtc.h> 38 #include <drm/drm_encoder.h> 39 #include <drm/drm_mode.h> 40 #include <drm/drm_framebuffer.h> 41 #include <drm/drm_fb_helper.h> 42 43 #define DRIVER_AUTHOR "Dave Airlie" 44 45 #define DRIVER_NAME "ast" 46 #define DRIVER_DESC "AST" 47 #define DRIVER_DATE "20120228" 48 49 #define DRIVER_MAJOR 0 50 #define DRIVER_MINOR 1 51 #define DRIVER_PATCHLEVEL 0 52 53 #define PCI_CHIP_AST2000 0x2000 54 #define PCI_CHIP_AST2100 0x2010 55 56 57 enum ast_chip { 58 AST2000, 59 AST2100, 60 AST1100, 61 AST2200, 62 AST2150, 63 AST2300, 64 AST2400, 65 AST2500, 66 AST2600, 67 }; 68 69 enum ast_tx_chip { 70 AST_TX_NONE, 71 AST_TX_SIL164, 72 AST_TX_ITE66121, 73 AST_TX_DP501, 74 }; 75 76 #define AST_DRAM_512Mx16 0 77 #define AST_DRAM_1Gx16 1 78 #define AST_DRAM_512Mx32 2 79 #define AST_DRAM_1Gx32 3 80 #define AST_DRAM_2Gx16 6 81 #define AST_DRAM_4Gx16 7 82 #define AST_DRAM_8Gx16 8 83 84 85 #define AST_MAX_HWC_WIDTH 64 86 #define AST_MAX_HWC_HEIGHT 64 87 88 #define AST_HWC_SIZE (AST_MAX_HWC_WIDTH * AST_MAX_HWC_HEIGHT * 2) 89 #define AST_HWC_SIGNATURE_SIZE 32 90 91 #define AST_DEFAULT_HWC_NUM 2 92 93 /* define for signature structure */ 94 #define AST_HWC_SIGNATURE_CHECKSUM 0x00 95 #define AST_HWC_SIGNATURE_SizeX 0x04 96 #define AST_HWC_SIGNATURE_SizeY 0x08 97 #define AST_HWC_SIGNATURE_X 0x0C 98 #define AST_HWC_SIGNATURE_Y 0x10 99 #define AST_HWC_SIGNATURE_HOTSPOTX 0x14 100 #define AST_HWC_SIGNATURE_HOTSPOTY 0x18 101 102 struct ast_i2c_chan { 103 struct i2c_adapter adapter; 104 struct drm_device *dev; 105 struct i2c_algo_bit_data bit; 106 }; 107 108 struct ast_connector { 109 struct drm_connector base; 110 struct ast_i2c_chan *i2c; 111 }; 112 113 static inline struct ast_connector * 114 to_ast_connector(struct drm_connector *connector) 115 { 116 return container_of(connector, struct ast_connector, base); 117 } 118 119 struct ast_private { 120 struct drm_device base; 121 122 void __iomem *regs; 123 void __iomem *ioregs; 124 125 enum ast_chip chip; 126 bool vga2_clone; 127 uint32_t dram_bus_width; 128 uint32_t dram_type; 129 uint32_t mclk; 130 131 int fb_mtrr; 132 133 struct { 134 struct drm_gem_vram_object *gbo[AST_DEFAULT_HWC_NUM]; 135 unsigned int next_index; 136 } cursor; 137 138 struct drm_plane primary_plane; 139 struct drm_plane cursor_plane; 140 struct drm_crtc crtc; 141 struct drm_encoder encoder; 142 struct ast_connector connector; 143 144 bool support_wide_screen; 145 enum { 146 ast_use_p2a, 147 ast_use_dt, 148 ast_use_defaults 149 } config_mode; 150 151 enum ast_tx_chip tx_chip_type; 152 u8 dp501_maxclk; 153 u8 *dp501_fw_addr; 154 const struct firmware *dp501_fw; /* dp501 fw */ 155 }; 156 157 static inline struct ast_private *to_ast_private(struct drm_device *dev) 158 { 159 return container_of(dev, struct ast_private, base); 160 } 161 162 struct ast_private *ast_device_create(const struct drm_driver *drv, 163 struct pci_dev *pdev, 164 unsigned long flags); 165 166 #define AST_IO_AR_PORT_WRITE (0x40) 167 #define AST_IO_MISC_PORT_WRITE (0x42) 168 #define AST_IO_VGA_ENABLE_PORT (0x43) 169 #define AST_IO_SEQ_PORT (0x44) 170 #define AST_IO_DAC_INDEX_READ (0x47) 171 #define AST_IO_DAC_INDEX_WRITE (0x48) 172 #define AST_IO_DAC_DATA (0x49) 173 #define AST_IO_GR_PORT (0x4E) 174 #define AST_IO_CRTC_PORT (0x54) 175 #define AST_IO_INPUT_STATUS1_READ (0x5A) 176 #define AST_IO_MISC_PORT_READ (0x4C) 177 178 #define AST_IO_MM_OFFSET (0x380) 179 180 #define AST_IO_VGAIR1_VREFRESH BIT(3) 181 182 #define __ast_read(x) \ 183 static inline u##x ast_read##x(struct ast_private *ast, u32 reg) { \ 184 u##x val = 0;\ 185 val = ioread##x(ast->regs + reg); \ 186 return val;\ 187 } 188 189 __ast_read(8); 190 __ast_read(16); 191 __ast_read(32) 192 193 #define __ast_io_read(x) \ 194 static inline u##x ast_io_read##x(struct ast_private *ast, u32 reg) { \ 195 u##x val = 0;\ 196 val = ioread##x(ast->ioregs + reg); \ 197 return val;\ 198 } 199 200 __ast_io_read(8); 201 __ast_io_read(16); 202 __ast_io_read(32); 203 204 #define __ast_write(x) \ 205 static inline void ast_write##x(struct ast_private *ast, u32 reg, u##x val) {\ 206 iowrite##x(val, ast->regs + reg);\ 207 } 208 209 __ast_write(8); 210 __ast_write(16); 211 __ast_write(32); 212 213 #define __ast_io_write(x) \ 214 static inline void ast_io_write##x(struct ast_private *ast, u32 reg, u##x val) {\ 215 iowrite##x(val, ast->ioregs + reg);\ 216 } 217 218 __ast_io_write(8); 219 __ast_io_write(16); 220 #undef __ast_io_write 221 222 static inline void ast_set_index_reg(struct ast_private *ast, 223 uint32_t base, uint8_t index, 224 uint8_t val) 225 { 226 ast_io_write16(ast, base, ((u16)val << 8) | index); 227 } 228 229 void ast_set_index_reg_mask(struct ast_private *ast, 230 uint32_t base, uint8_t index, 231 uint8_t mask, uint8_t val); 232 uint8_t ast_get_index_reg(struct ast_private *ast, 233 uint32_t base, uint8_t index); 234 uint8_t ast_get_index_reg_mask(struct ast_private *ast, 235 uint32_t base, uint8_t index, uint8_t mask); 236 237 static inline void ast_open_key(struct ast_private *ast) 238 { 239 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x80, 0xA8); 240 } 241 242 #define AST_VIDMEM_SIZE_8M 0x00800000 243 #define AST_VIDMEM_SIZE_16M 0x01000000 244 #define AST_VIDMEM_SIZE_32M 0x02000000 245 #define AST_VIDMEM_SIZE_64M 0x04000000 246 #define AST_VIDMEM_SIZE_128M 0x08000000 247 248 #define AST_VIDMEM_DEFAULT_SIZE AST_VIDMEM_SIZE_8M 249 250 struct ast_vbios_stdtable { 251 u8 misc; 252 u8 seq[4]; 253 u8 crtc[25]; 254 u8 ar[20]; 255 u8 gr[9]; 256 }; 257 258 struct ast_vbios_enhtable { 259 u32 ht; 260 u32 hde; 261 u32 hfp; 262 u32 hsync; 263 u32 vt; 264 u32 vde; 265 u32 vfp; 266 u32 vsync; 267 u32 dclk_index; 268 u32 flags; 269 u32 refresh_rate; 270 u32 refresh_rate_index; 271 u32 mode_id; 272 }; 273 274 struct ast_vbios_dclk_info { 275 u8 param1; 276 u8 param2; 277 u8 param3; 278 }; 279 280 struct ast_vbios_mode_info { 281 const struct ast_vbios_stdtable *std_table; 282 const struct ast_vbios_enhtable *enh_table; 283 }; 284 285 struct ast_crtc_state { 286 struct drm_crtc_state base; 287 288 /* Last known format of primary plane */ 289 const struct drm_format_info *format; 290 291 struct ast_vbios_mode_info vbios_mode_info; 292 }; 293 294 #define to_ast_crtc_state(state) container_of(state, struct ast_crtc_state, base) 295 296 int ast_mode_config_init(struct ast_private *ast); 297 298 #define AST_MM_ALIGN_SHIFT 4 299 #define AST_MM_ALIGN_MASK ((1 << AST_MM_ALIGN_SHIFT) - 1) 300 301 int ast_mm_init(struct ast_private *ast); 302 303 /* ast post */ 304 void ast_enable_vga(struct drm_device *dev); 305 void ast_enable_mmio(struct drm_device *dev); 306 bool ast_is_vga_enabled(struct drm_device *dev); 307 void ast_post_gpu(struct drm_device *dev); 308 u32 ast_mindwm(struct ast_private *ast, u32 r); 309 void ast_moutdwm(struct ast_private *ast, u32 r, u32 v); 310 /* ast dp501 */ 311 void ast_set_dp501_video_output(struct drm_device *dev, u8 mode); 312 bool ast_backup_fw(struct drm_device *dev, u8 *addr, u32 size); 313 bool ast_dp501_read_edid(struct drm_device *dev, u8 *ediddata); 314 u8 ast_get_dp501_max_clk(struct drm_device *dev); 315 void ast_init_3rdtx(struct drm_device *dev); 316 317 /* ast_cursor.c */ 318 int ast_cursor_init(struct ast_private *ast); 319 int ast_cursor_blit(struct ast_private *ast, struct drm_framebuffer *fb); 320 void ast_cursor_page_flip(struct ast_private *ast); 321 void ast_cursor_show(struct ast_private *ast, int x, int y, 322 unsigned int offset_x, unsigned int offset_y); 323 void ast_cursor_hide(struct ast_private *ast); 324 325 #endif 326