1 /* 2 * Copyright 2012 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the 6 * "Software"), to deal in the Software without restriction, including 7 * without limitation the rights to use, copy, modify, merge, publish, 8 * distribute, sub license, and/or sell copies of the Software, and to 9 * permit persons to whom the Software is furnished to do so, subject to 10 * the following conditions: 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 13 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 14 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 15 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 16 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 17 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 18 * USE OR OTHER DEALINGS IN THE SOFTWARE. 19 * 20 * The above copyright notice and this permission notice (including the 21 * next paragraph) shall be included in all copies or substantial portions 22 * of the Software. 23 * 24 */ 25 /* 26 * Authors: Dave Airlie <airlied@redhat.com> 27 */ 28 #ifndef __AST_DRV_H__ 29 #define __AST_DRV_H__ 30 31 #include <linux/i2c.h> 32 #include <linux/i2c-algo-bit.h> 33 #include <linux/io.h> 34 #include <linux/types.h> 35 36 #include <drm/drm_connector.h> 37 #include <drm/drm_crtc.h> 38 #include <drm/drm_encoder.h> 39 #include <drm/drm_mode.h> 40 #include <drm/drm_framebuffer.h> 41 42 #include "ast_reg.h" 43 44 #define DRIVER_AUTHOR "Dave Airlie" 45 46 #define DRIVER_NAME "ast" 47 #define DRIVER_DESC "AST" 48 #define DRIVER_DATE "20120228" 49 50 #define DRIVER_MAJOR 0 51 #define DRIVER_MINOR 1 52 #define DRIVER_PATCHLEVEL 0 53 54 #define PCI_CHIP_AST2000 0x2000 55 #define PCI_CHIP_AST2100 0x2010 56 57 #define __AST_CHIP(__gen, __index) ((__gen) << 16 | (__index)) 58 59 enum ast_chip { 60 /* 1st gen */ 61 AST1000 = __AST_CHIP(1, 0), // unused 62 AST2000 = __AST_CHIP(1, 1), 63 /* 2nd gen */ 64 AST1100 = __AST_CHIP(2, 0), 65 AST2100 = __AST_CHIP(2, 1), 66 AST2050 = __AST_CHIP(2, 2), // unused 67 /* 3rd gen */ 68 AST2200 = __AST_CHIP(3, 0), 69 AST2150 = __AST_CHIP(3, 1), 70 /* 4th gen */ 71 AST2300 = __AST_CHIP(4, 0), 72 AST1300 = __AST_CHIP(4, 1), 73 AST1050 = __AST_CHIP(4, 2), // unused 74 /* 5th gen */ 75 AST2400 = __AST_CHIP(5, 0), 76 AST1400 = __AST_CHIP(5, 1), 77 AST1250 = __AST_CHIP(5, 2), // unused 78 /* 6th gen */ 79 AST2500 = __AST_CHIP(6, 0), 80 AST2510 = __AST_CHIP(6, 1), 81 AST2520 = __AST_CHIP(6, 2), // unused 82 /* 7th gen */ 83 AST2600 = __AST_CHIP(7, 0), 84 AST2620 = __AST_CHIP(7, 1), // unused 85 }; 86 87 #define __AST_CHIP_GEN(__chip) (((unsigned long)(__chip)) >> 16) 88 89 enum ast_tx_chip { 90 AST_TX_NONE, 91 AST_TX_SIL164, 92 AST_TX_DP501, 93 AST_TX_ASTDP, 94 }; 95 96 #define AST_TX_NONE_BIT BIT(AST_TX_NONE) 97 #define AST_TX_SIL164_BIT BIT(AST_TX_SIL164) 98 #define AST_TX_DP501_BIT BIT(AST_TX_DP501) 99 #define AST_TX_ASTDP_BIT BIT(AST_TX_ASTDP) 100 101 #define AST_DRAM_512Mx16 0 102 #define AST_DRAM_1Gx16 1 103 #define AST_DRAM_512Mx32 2 104 #define AST_DRAM_1Gx32 3 105 #define AST_DRAM_2Gx16 6 106 #define AST_DRAM_4Gx16 7 107 #define AST_DRAM_8Gx16 8 108 109 /* 110 * Hardware cursor 111 */ 112 113 #define AST_MAX_HWC_WIDTH 64 114 #define AST_MAX_HWC_HEIGHT 64 115 116 #define AST_HWC_SIZE (AST_MAX_HWC_WIDTH * AST_MAX_HWC_HEIGHT * 2) 117 #define AST_HWC_SIGNATURE_SIZE 32 118 119 /* define for signature structure */ 120 #define AST_HWC_SIGNATURE_CHECKSUM 0x00 121 #define AST_HWC_SIGNATURE_SizeX 0x04 122 #define AST_HWC_SIGNATURE_SizeY 0x08 123 #define AST_HWC_SIGNATURE_X 0x0C 124 #define AST_HWC_SIGNATURE_Y 0x10 125 #define AST_HWC_SIGNATURE_HOTSPOTX 0x14 126 #define AST_HWC_SIGNATURE_HOTSPOTY 0x18 127 128 /* 129 * Planes 130 */ 131 132 struct ast_plane { 133 struct drm_plane base; 134 135 void __iomem *vaddr; 136 u64 offset; 137 unsigned long size; 138 }; 139 140 static inline struct ast_plane *to_ast_plane(struct drm_plane *plane) 141 { 142 return container_of(plane, struct ast_plane, base); 143 } 144 145 /* 146 * Connector with i2c channel 147 */ 148 149 struct ast_i2c_chan { 150 struct i2c_adapter adapter; 151 struct drm_device *dev; 152 struct i2c_algo_bit_data bit; 153 }; 154 155 struct ast_vga_connector { 156 struct drm_connector base; 157 struct ast_i2c_chan *i2c; 158 }; 159 160 static inline struct ast_vga_connector * 161 to_ast_vga_connector(struct drm_connector *connector) 162 { 163 return container_of(connector, struct ast_vga_connector, base); 164 } 165 166 struct ast_sil164_connector { 167 struct drm_connector base; 168 struct ast_i2c_chan *i2c; 169 }; 170 171 static inline struct ast_sil164_connector * 172 to_ast_sil164_connector(struct drm_connector *connector) 173 { 174 return container_of(connector, struct ast_sil164_connector, base); 175 } 176 177 struct ast_bmc_connector { 178 struct drm_connector base; 179 struct drm_connector *physical_connector; 180 }; 181 182 static inline struct ast_bmc_connector * 183 to_ast_bmc_connector(struct drm_connector *connector) 184 { 185 return container_of(connector, struct ast_bmc_connector, base); 186 } 187 188 /* 189 * Device 190 */ 191 192 struct ast_device { 193 struct drm_device base; 194 195 struct mutex ioregs_lock; /* Protects access to I/O registers in ioregs */ 196 void __iomem *regs; 197 void __iomem *ioregs; 198 void __iomem *dp501_fw_buf; 199 200 enum ast_chip chip; 201 uint32_t dram_bus_width; 202 uint32_t dram_type; 203 uint32_t mclk; 204 205 void __iomem *vram; 206 unsigned long vram_base; 207 unsigned long vram_size; 208 unsigned long vram_fb_available; 209 210 struct ast_plane primary_plane; 211 struct ast_plane cursor_plane; 212 struct drm_crtc crtc; 213 struct { 214 struct { 215 struct drm_encoder encoder; 216 struct ast_vga_connector vga_connector; 217 } vga; 218 struct { 219 struct drm_encoder encoder; 220 struct ast_sil164_connector sil164_connector; 221 } sil164; 222 struct { 223 struct drm_encoder encoder; 224 struct drm_connector connector; 225 } dp501; 226 struct { 227 struct drm_encoder encoder; 228 struct drm_connector connector; 229 } astdp; 230 struct { 231 struct drm_encoder encoder; 232 struct ast_bmc_connector bmc_connector; 233 } bmc; 234 } output; 235 236 bool support_wide_screen; 237 enum { 238 ast_use_p2a, 239 ast_use_dt, 240 ast_use_defaults 241 } config_mode; 242 243 unsigned long tx_chip_types; /* bitfield of enum ast_chip_type */ 244 u8 *dp501_fw_addr; 245 const struct firmware *dp501_fw; /* dp501 fw */ 246 }; 247 248 static inline struct ast_device *to_ast_device(struct drm_device *dev) 249 { 250 return container_of(dev, struct ast_device, base); 251 } 252 253 struct ast_device *ast_device_create(const struct drm_driver *drv, 254 struct pci_dev *pdev, 255 unsigned long flags); 256 257 static inline unsigned long __ast_gen(struct ast_device *ast) 258 { 259 return __AST_CHIP_GEN(ast->chip); 260 } 261 #define AST_GEN(__ast) __ast_gen(__ast) 262 263 static inline bool __ast_gen_is_eq(struct ast_device *ast, unsigned long gen) 264 { 265 return __ast_gen(ast) == gen; 266 } 267 #define IS_AST_GEN1(__ast) __ast_gen_is_eq(__ast, 1) 268 #define IS_AST_GEN2(__ast) __ast_gen_is_eq(__ast, 2) 269 #define IS_AST_GEN3(__ast) __ast_gen_is_eq(__ast, 3) 270 #define IS_AST_GEN4(__ast) __ast_gen_is_eq(__ast, 4) 271 #define IS_AST_GEN5(__ast) __ast_gen_is_eq(__ast, 5) 272 #define IS_AST_GEN6(__ast) __ast_gen_is_eq(__ast, 6) 273 #define IS_AST_GEN7(__ast) __ast_gen_is_eq(__ast, 7) 274 275 static inline u32 ast_read32(struct ast_device *ast, u32 reg) 276 { 277 return ioread32(ast->regs + reg); 278 } 279 280 static inline void ast_write32(struct ast_device *ast, u32 reg, u32 val) 281 { 282 iowrite32(val, ast->regs + reg); 283 } 284 285 static inline u8 ast_io_read8(struct ast_device *ast, u32 reg) 286 { 287 return ioread8(ast->ioregs + reg); 288 } 289 290 static inline void ast_io_write8(struct ast_device *ast, u32 reg, u8 val) 291 { 292 iowrite8(val, ast->ioregs + reg); 293 } 294 295 static inline u8 ast_get_index_reg(struct ast_device *ast, u32 base, u8 index) 296 { 297 ast_io_write8(ast, base, index); 298 ++base; 299 return ast_io_read8(ast, base); 300 } 301 302 static inline u8 ast_get_index_reg_mask(struct ast_device *ast, u32 base, u8 index, 303 u8 preserve_mask) 304 { 305 u8 val = ast_get_index_reg(ast, base, index); 306 307 return val & preserve_mask; 308 } 309 310 static inline void ast_set_index_reg(struct ast_device *ast, u32 base, u8 index, u8 val) 311 { 312 ast_io_write8(ast, base, index); 313 ++base; 314 ast_io_write8(ast, base, val); 315 } 316 317 static inline void ast_set_index_reg_mask(struct ast_device *ast, u32 base, u8 index, 318 u8 preserve_mask, u8 val) 319 { 320 u8 tmp = ast_get_index_reg_mask(ast, base, index, preserve_mask); 321 322 tmp |= val; 323 ast_set_index_reg(ast, base, index, tmp); 324 } 325 326 #define AST_VIDMEM_SIZE_8M 0x00800000 327 #define AST_VIDMEM_SIZE_16M 0x01000000 328 #define AST_VIDMEM_SIZE_32M 0x02000000 329 #define AST_VIDMEM_SIZE_64M 0x04000000 330 #define AST_VIDMEM_SIZE_128M 0x08000000 331 332 #define AST_VIDMEM_DEFAULT_SIZE AST_VIDMEM_SIZE_8M 333 334 struct ast_vbios_stdtable { 335 u8 misc; 336 u8 seq[4]; 337 u8 crtc[25]; 338 u8 ar[20]; 339 u8 gr[9]; 340 }; 341 342 struct ast_vbios_enhtable { 343 u32 ht; 344 u32 hde; 345 u32 hfp; 346 u32 hsync; 347 u32 vt; 348 u32 vde; 349 u32 vfp; 350 u32 vsync; 351 u32 dclk_index; 352 u32 flags; 353 u32 refresh_rate; 354 u32 refresh_rate_index; 355 u32 mode_id; 356 }; 357 358 struct ast_vbios_dclk_info { 359 u8 param1; 360 u8 param2; 361 u8 param3; 362 }; 363 364 struct ast_vbios_mode_info { 365 const struct ast_vbios_stdtable *std_table; 366 const struct ast_vbios_enhtable *enh_table; 367 }; 368 369 struct ast_crtc_state { 370 struct drm_crtc_state base; 371 372 /* Last known format of primary plane */ 373 const struct drm_format_info *format; 374 375 struct ast_vbios_mode_info vbios_mode_info; 376 }; 377 378 #define to_ast_crtc_state(state) container_of(state, struct ast_crtc_state, base) 379 380 int ast_mode_config_init(struct ast_device *ast); 381 382 #define AST_MM_ALIGN_SHIFT 4 383 #define AST_MM_ALIGN_MASK ((1 << AST_MM_ALIGN_SHIFT) - 1) 384 385 #define AST_DP501_FW_VERSION_MASK GENMASK(7, 4) 386 #define AST_DP501_FW_VERSION_1 BIT(4) 387 #define AST_DP501_PNP_CONNECTED BIT(1) 388 389 #define AST_DP501_DEFAULT_DCLK 65 390 391 #define AST_DP501_GBL_VERSION 0xf000 392 #define AST_DP501_PNPMONITOR 0xf010 393 #define AST_DP501_LINKRATE 0xf014 394 #define AST_DP501_EDID_DATA 0xf020 395 396 #define AST_DP_POWER_ON true 397 #define AST_DP_POWER_OFF false 398 399 /* 400 * ASTDP resoultion table: 401 * EX: ASTDP_A_B_C: 402 * A: Resolution 403 * B: Refresh Rate 404 * C: Misc information, such as CVT, Reduce Blanked 405 */ 406 #define ASTDP_640x480_60 0x00 407 #define ASTDP_640x480_72 0x01 408 #define ASTDP_640x480_75 0x02 409 #define ASTDP_640x480_85 0x03 410 #define ASTDP_800x600_56 0x04 411 #define ASTDP_800x600_60 0x05 412 #define ASTDP_800x600_72 0x06 413 #define ASTDP_800x600_75 0x07 414 #define ASTDP_800x600_85 0x08 415 #define ASTDP_1024x768_60 0x09 416 #define ASTDP_1024x768_70 0x0A 417 #define ASTDP_1024x768_75 0x0B 418 #define ASTDP_1024x768_85 0x0C 419 #define ASTDP_1280x1024_60 0x0D 420 #define ASTDP_1280x1024_75 0x0E 421 #define ASTDP_1280x1024_85 0x0F 422 #define ASTDP_1600x1200_60 0x10 423 #define ASTDP_320x240_60 0x11 424 #define ASTDP_400x300_60 0x12 425 #define ASTDP_512x384_60 0x13 426 #define ASTDP_1920x1200_60 0x14 427 #define ASTDP_1920x1080_60 0x15 428 #define ASTDP_1280x800_60 0x16 429 #define ASTDP_1280x800_60_RB 0x17 430 #define ASTDP_1440x900_60 0x18 431 #define ASTDP_1440x900_60_RB 0x19 432 #define ASTDP_1680x1050_60 0x1A 433 #define ASTDP_1680x1050_60_RB 0x1B 434 #define ASTDP_1600x900_60 0x1C 435 #define ASTDP_1600x900_60_RB 0x1D 436 #define ASTDP_1366x768_60 0x1E 437 #define ASTDP_1152x864_75 0x1F 438 439 int ast_mm_init(struct ast_device *ast); 440 441 /* ast post */ 442 void ast_post_gpu(struct drm_device *dev); 443 u32 ast_mindwm(struct ast_device *ast, u32 r); 444 void ast_moutdwm(struct ast_device *ast, u32 r, u32 v); 445 void ast_patch_ahb_2500(struct ast_device *ast); 446 /* ast dp501 */ 447 void ast_set_dp501_video_output(struct drm_device *dev, u8 mode); 448 bool ast_backup_fw(struct drm_device *dev, u8 *addr, u32 size); 449 bool ast_dp501_is_connected(struct ast_device *ast); 450 bool ast_dp501_read_edid(struct drm_device *dev, u8 *ediddata); 451 u8 ast_get_dp501_max_clk(struct drm_device *dev); 452 void ast_init_3rdtx(struct drm_device *dev); 453 454 /* ast_i2c.c */ 455 struct ast_i2c_chan *ast_i2c_create(struct drm_device *dev); 456 457 /* aspeed DP */ 458 bool ast_astdp_is_connected(struct ast_device *ast); 459 int ast_astdp_read_edid(struct drm_device *dev, u8 *ediddata); 460 void ast_dp_launch(struct drm_device *dev); 461 void ast_dp_power_on_off(struct drm_device *dev, bool no); 462 void ast_dp_set_on_off(struct drm_device *dev, bool no); 463 void ast_dp_set_mode(struct drm_crtc *crtc, struct ast_vbios_mode_info *vbios_mode); 464 465 #endif 466