1 /* 2 * Copyright 2012 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the 6 * "Software"), to deal in the Software without restriction, including 7 * without limitation the rights to use, copy, modify, merge, publish, 8 * distribute, sub license, and/or sell copies of the Software, and to 9 * permit persons to whom the Software is furnished to do so, subject to 10 * the following conditions: 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 13 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 14 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 15 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 16 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 17 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 18 * USE OR OTHER DEALINGS IN THE SOFTWARE. 19 * 20 * The above copyright notice and this permission notice (including the 21 * next paragraph) shall be included in all copies or substantial portions 22 * of the Software. 23 * 24 */ 25 /* 26 * Authors: Dave Airlie <airlied@redhat.com> 27 */ 28 #ifndef __AST_DRV_H__ 29 #define __AST_DRV_H__ 30 31 #include <linux/i2c.h> 32 #include <linux/i2c-algo-bit.h> 33 #include <linux/io.h> 34 #include <linux/types.h> 35 36 #include <drm/drm_connector.h> 37 #include <drm/drm_crtc.h> 38 #include <drm/drm_encoder.h> 39 #include <drm/drm_mode.h> 40 #include <drm/drm_framebuffer.h> 41 42 #include "ast_reg.h" 43 44 #define DRIVER_AUTHOR "Dave Airlie" 45 46 #define DRIVER_NAME "ast" 47 #define DRIVER_DESC "AST" 48 #define DRIVER_DATE "20120228" 49 50 #define DRIVER_MAJOR 0 51 #define DRIVER_MINOR 1 52 #define DRIVER_PATCHLEVEL 0 53 54 #define PCI_CHIP_AST2000 0x2000 55 #define PCI_CHIP_AST2100 0x2010 56 57 #define __AST_CHIP(__gen, __index) ((__gen) << 16 | (__index)) 58 59 enum ast_chip { 60 /* 1st gen */ 61 AST1000 = __AST_CHIP(1, 0), // unused 62 AST2000 = __AST_CHIP(1, 1), 63 /* 2nd gen */ 64 AST1100 = __AST_CHIP(2, 0), 65 AST2100 = __AST_CHIP(2, 1), 66 AST2050 = __AST_CHIP(2, 2), // unused 67 /* 3rd gen */ 68 AST2200 = __AST_CHIP(3, 0), 69 AST2150 = __AST_CHIP(3, 1), 70 /* 4th gen */ 71 AST2300 = __AST_CHIP(4, 0), 72 AST1300 = __AST_CHIP(4, 1), 73 AST1050 = __AST_CHIP(4, 2), // unused 74 /* 5th gen */ 75 AST2400 = __AST_CHIP(5, 0), 76 AST1400 = __AST_CHIP(5, 1), 77 AST1250 = __AST_CHIP(5, 2), // unused 78 /* 6th gen */ 79 AST2500 = __AST_CHIP(6, 0), 80 AST2510 = __AST_CHIP(6, 1), 81 AST2520 = __AST_CHIP(6, 2), // unused 82 /* 7th gen */ 83 AST2600 = __AST_CHIP(7, 0), 84 AST2620 = __AST_CHIP(7, 1), // unused 85 }; 86 87 #define __AST_CHIP_GEN(__chip) (((unsigned long)(__chip)) >> 16) 88 89 enum ast_tx_chip { 90 AST_TX_NONE, 91 AST_TX_SIL164, 92 AST_TX_DP501, 93 AST_TX_ASTDP, 94 }; 95 96 #define AST_TX_NONE_BIT BIT(AST_TX_NONE) 97 #define AST_TX_SIL164_BIT BIT(AST_TX_SIL164) 98 #define AST_TX_DP501_BIT BIT(AST_TX_DP501) 99 #define AST_TX_ASTDP_BIT BIT(AST_TX_ASTDP) 100 101 #define AST_DRAM_512Mx16 0 102 #define AST_DRAM_1Gx16 1 103 #define AST_DRAM_512Mx32 2 104 #define AST_DRAM_1Gx32 3 105 #define AST_DRAM_2Gx16 6 106 #define AST_DRAM_4Gx16 7 107 #define AST_DRAM_8Gx16 8 108 109 /* 110 * Hardware cursor 111 */ 112 113 #define AST_MAX_HWC_WIDTH 64 114 #define AST_MAX_HWC_HEIGHT 64 115 116 #define AST_HWC_SIZE (AST_MAX_HWC_WIDTH * AST_MAX_HWC_HEIGHT * 2) 117 #define AST_HWC_SIGNATURE_SIZE 32 118 119 /* define for signature structure */ 120 #define AST_HWC_SIGNATURE_CHECKSUM 0x00 121 #define AST_HWC_SIGNATURE_SizeX 0x04 122 #define AST_HWC_SIGNATURE_SizeY 0x08 123 #define AST_HWC_SIGNATURE_X 0x0C 124 #define AST_HWC_SIGNATURE_Y 0x10 125 #define AST_HWC_SIGNATURE_HOTSPOTX 0x14 126 #define AST_HWC_SIGNATURE_HOTSPOTY 0x18 127 128 /* 129 * Planes 130 */ 131 132 struct ast_plane { 133 struct drm_plane base; 134 135 void __iomem *vaddr; 136 u64 offset; 137 unsigned long size; 138 }; 139 140 static inline struct ast_plane *to_ast_plane(struct drm_plane *plane) 141 { 142 return container_of(plane, struct ast_plane, base); 143 } 144 145 /* 146 * Connector with i2c channel 147 */ 148 149 struct ast_i2c_chan { 150 struct i2c_adapter adapter; 151 struct drm_device *dev; 152 struct i2c_algo_bit_data bit; 153 }; 154 155 struct ast_vga_connector { 156 struct drm_connector base; 157 struct ast_i2c_chan *i2c; 158 }; 159 160 static inline struct ast_vga_connector * 161 to_ast_vga_connector(struct drm_connector *connector) 162 { 163 return container_of(connector, struct ast_vga_connector, base); 164 } 165 166 struct ast_sil164_connector { 167 struct drm_connector base; 168 struct ast_i2c_chan *i2c; 169 }; 170 171 static inline struct ast_sil164_connector * 172 to_ast_sil164_connector(struct drm_connector *connector) 173 { 174 return container_of(connector, struct ast_sil164_connector, base); 175 } 176 177 /* 178 * Device 179 */ 180 181 struct ast_device { 182 struct drm_device base; 183 184 struct mutex ioregs_lock; /* Protects access to I/O registers in ioregs */ 185 void __iomem *regs; 186 void __iomem *ioregs; 187 void __iomem *dp501_fw_buf; 188 189 enum ast_chip chip; 190 uint32_t dram_bus_width; 191 uint32_t dram_type; 192 uint32_t mclk; 193 194 void __iomem *vram; 195 unsigned long vram_base; 196 unsigned long vram_size; 197 unsigned long vram_fb_available; 198 199 struct ast_plane primary_plane; 200 struct ast_plane cursor_plane; 201 struct drm_crtc crtc; 202 struct { 203 struct { 204 struct drm_encoder encoder; 205 struct ast_vga_connector vga_connector; 206 } vga; 207 struct { 208 struct drm_encoder encoder; 209 struct ast_sil164_connector sil164_connector; 210 } sil164; 211 struct { 212 struct drm_encoder encoder; 213 struct drm_connector connector; 214 } dp501; 215 struct { 216 struct drm_encoder encoder; 217 struct drm_connector connector; 218 } astdp; 219 struct { 220 struct drm_encoder encoder; 221 struct drm_connector connector; 222 } bmc; 223 } output; 224 225 bool support_wide_screen; 226 enum { 227 ast_use_p2a, 228 ast_use_dt, 229 ast_use_defaults 230 } config_mode; 231 232 unsigned long tx_chip_types; /* bitfield of enum ast_chip_type */ 233 u8 *dp501_fw_addr; 234 const struct firmware *dp501_fw; /* dp501 fw */ 235 }; 236 237 static inline struct ast_device *to_ast_device(struct drm_device *dev) 238 { 239 return container_of(dev, struct ast_device, base); 240 } 241 242 struct ast_device *ast_device_create(const struct drm_driver *drv, 243 struct pci_dev *pdev, 244 unsigned long flags); 245 246 static inline unsigned long __ast_gen(struct ast_device *ast) 247 { 248 return __AST_CHIP_GEN(ast->chip); 249 } 250 #define AST_GEN(__ast) __ast_gen(__ast) 251 252 static inline bool __ast_gen_is_eq(struct ast_device *ast, unsigned long gen) 253 { 254 return __ast_gen(ast) == gen; 255 } 256 #define IS_AST_GEN1(__ast) __ast_gen_is_eq(__ast, 1) 257 #define IS_AST_GEN2(__ast) __ast_gen_is_eq(__ast, 2) 258 #define IS_AST_GEN3(__ast) __ast_gen_is_eq(__ast, 3) 259 #define IS_AST_GEN4(__ast) __ast_gen_is_eq(__ast, 4) 260 #define IS_AST_GEN5(__ast) __ast_gen_is_eq(__ast, 5) 261 #define IS_AST_GEN6(__ast) __ast_gen_is_eq(__ast, 6) 262 #define IS_AST_GEN7(__ast) __ast_gen_is_eq(__ast, 7) 263 264 static inline u32 ast_read32(struct ast_device *ast, u32 reg) 265 { 266 return ioread32(ast->regs + reg); 267 } 268 269 static inline void ast_write32(struct ast_device *ast, u32 reg, u32 val) 270 { 271 iowrite32(val, ast->regs + reg); 272 } 273 274 static inline u8 ast_io_read8(struct ast_device *ast, u32 reg) 275 { 276 return ioread8(ast->ioregs + reg); 277 } 278 279 static inline void ast_io_write8(struct ast_device *ast, u32 reg, u8 val) 280 { 281 iowrite8(val, ast->ioregs + reg); 282 } 283 284 static inline u8 ast_get_index_reg(struct ast_device *ast, u32 base, u8 index) 285 { 286 ast_io_write8(ast, base, index); 287 ++base; 288 return ast_io_read8(ast, base); 289 } 290 291 static inline u8 ast_get_index_reg_mask(struct ast_device *ast, u32 base, u8 index, 292 u8 preserve_mask) 293 { 294 u8 val = ast_get_index_reg(ast, base, index); 295 296 return val & preserve_mask; 297 } 298 299 static inline void ast_set_index_reg(struct ast_device *ast, u32 base, u8 index, u8 val) 300 { 301 ast_io_write8(ast, base, index); 302 ++base; 303 ast_io_write8(ast, base, val); 304 } 305 306 static inline void ast_set_index_reg_mask(struct ast_device *ast, u32 base, u8 index, 307 u8 preserve_mask, u8 val) 308 { 309 u8 tmp = ast_get_index_reg_mask(ast, base, index, preserve_mask); 310 311 tmp |= val; 312 ast_set_index_reg(ast, base, index, tmp); 313 } 314 315 #define AST_VIDMEM_SIZE_8M 0x00800000 316 #define AST_VIDMEM_SIZE_16M 0x01000000 317 #define AST_VIDMEM_SIZE_32M 0x02000000 318 #define AST_VIDMEM_SIZE_64M 0x04000000 319 #define AST_VIDMEM_SIZE_128M 0x08000000 320 321 #define AST_VIDMEM_DEFAULT_SIZE AST_VIDMEM_SIZE_8M 322 323 struct ast_vbios_stdtable { 324 u8 misc; 325 u8 seq[4]; 326 u8 crtc[25]; 327 u8 ar[20]; 328 u8 gr[9]; 329 }; 330 331 struct ast_vbios_enhtable { 332 u32 ht; 333 u32 hde; 334 u32 hfp; 335 u32 hsync; 336 u32 vt; 337 u32 vde; 338 u32 vfp; 339 u32 vsync; 340 u32 dclk_index; 341 u32 flags; 342 u32 refresh_rate; 343 u32 refresh_rate_index; 344 u32 mode_id; 345 }; 346 347 struct ast_vbios_dclk_info { 348 u8 param1; 349 u8 param2; 350 u8 param3; 351 }; 352 353 struct ast_vbios_mode_info { 354 const struct ast_vbios_stdtable *std_table; 355 const struct ast_vbios_enhtable *enh_table; 356 }; 357 358 struct ast_crtc_state { 359 struct drm_crtc_state base; 360 361 /* Last known format of primary plane */ 362 const struct drm_format_info *format; 363 364 struct ast_vbios_mode_info vbios_mode_info; 365 }; 366 367 #define to_ast_crtc_state(state) container_of(state, struct ast_crtc_state, base) 368 369 int ast_mode_config_init(struct ast_device *ast); 370 371 #define AST_MM_ALIGN_SHIFT 4 372 #define AST_MM_ALIGN_MASK ((1 << AST_MM_ALIGN_SHIFT) - 1) 373 374 #define AST_DP501_FW_VERSION_MASK GENMASK(7, 4) 375 #define AST_DP501_FW_VERSION_1 BIT(4) 376 #define AST_DP501_PNP_CONNECTED BIT(1) 377 378 #define AST_DP501_DEFAULT_DCLK 65 379 380 #define AST_DP501_GBL_VERSION 0xf000 381 #define AST_DP501_PNPMONITOR 0xf010 382 #define AST_DP501_LINKRATE 0xf014 383 #define AST_DP501_EDID_DATA 0xf020 384 385 #define AST_DP_POWER_ON true 386 #define AST_DP_POWER_OFF false 387 388 /* 389 * ASTDP resoultion table: 390 * EX: ASTDP_A_B_C: 391 * A: Resolution 392 * B: Refresh Rate 393 * C: Misc information, such as CVT, Reduce Blanked 394 */ 395 #define ASTDP_640x480_60 0x00 396 #define ASTDP_640x480_72 0x01 397 #define ASTDP_640x480_75 0x02 398 #define ASTDP_640x480_85 0x03 399 #define ASTDP_800x600_56 0x04 400 #define ASTDP_800x600_60 0x05 401 #define ASTDP_800x600_72 0x06 402 #define ASTDP_800x600_75 0x07 403 #define ASTDP_800x600_85 0x08 404 #define ASTDP_1024x768_60 0x09 405 #define ASTDP_1024x768_70 0x0A 406 #define ASTDP_1024x768_75 0x0B 407 #define ASTDP_1024x768_85 0x0C 408 #define ASTDP_1280x1024_60 0x0D 409 #define ASTDP_1280x1024_75 0x0E 410 #define ASTDP_1280x1024_85 0x0F 411 #define ASTDP_1600x1200_60 0x10 412 #define ASTDP_320x240_60 0x11 413 #define ASTDP_400x300_60 0x12 414 #define ASTDP_512x384_60 0x13 415 #define ASTDP_1920x1200_60 0x14 416 #define ASTDP_1920x1080_60 0x15 417 #define ASTDP_1280x800_60 0x16 418 #define ASTDP_1280x800_60_RB 0x17 419 #define ASTDP_1440x900_60 0x18 420 #define ASTDP_1440x900_60_RB 0x19 421 #define ASTDP_1680x1050_60 0x1A 422 #define ASTDP_1680x1050_60_RB 0x1B 423 #define ASTDP_1600x900_60 0x1C 424 #define ASTDP_1600x900_60_RB 0x1D 425 #define ASTDP_1366x768_60 0x1E 426 #define ASTDP_1152x864_75 0x1F 427 428 int ast_mm_init(struct ast_device *ast); 429 430 /* ast post */ 431 void ast_post_gpu(struct drm_device *dev); 432 u32 ast_mindwm(struct ast_device *ast, u32 r); 433 void ast_moutdwm(struct ast_device *ast, u32 r, u32 v); 434 void ast_patch_ahb_2500(struct ast_device *ast); 435 /* ast dp501 */ 436 void ast_set_dp501_video_output(struct drm_device *dev, u8 mode); 437 bool ast_backup_fw(struct drm_device *dev, u8 *addr, u32 size); 438 bool ast_dp501_is_connected(struct ast_device *ast); 439 bool ast_dp501_read_edid(struct drm_device *dev, u8 *ediddata); 440 u8 ast_get_dp501_max_clk(struct drm_device *dev); 441 void ast_init_3rdtx(struct drm_device *dev); 442 443 /* ast_i2c.c */ 444 struct ast_i2c_chan *ast_i2c_create(struct drm_device *dev); 445 446 /* aspeed DP */ 447 bool ast_astdp_is_connected(struct ast_device *ast); 448 int ast_astdp_read_edid(struct drm_device *dev, u8 *ediddata); 449 void ast_dp_launch(struct drm_device *dev); 450 void ast_dp_power_on_off(struct drm_device *dev, bool no); 451 void ast_dp_set_on_off(struct drm_device *dev, bool no); 452 void ast_dp_set_mode(struct drm_crtc *crtc, struct ast_vbios_mode_info *vbios_mode); 453 454 #endif 455