1 /* 2 * Copyright 2012 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the 6 * "Software"), to deal in the Software without restriction, including 7 * without limitation the rights to use, copy, modify, merge, publish, 8 * distribute, sub license, and/or sell copies of the Software, and to 9 * permit persons to whom the Software is furnished to do so, subject to 10 * the following conditions: 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 13 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 14 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 15 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 16 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 17 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 18 * USE OR OTHER DEALINGS IN THE SOFTWARE. 19 * 20 * The above copyright notice and this permission notice (including the 21 * next paragraph) shall be included in all copies or substantial portions 22 * of the Software. 23 * 24 */ 25 /* 26 * Authors: Dave Airlie <airlied@redhat.com> 27 */ 28 29 #include <linux/aperture.h> 30 #include <linux/module.h> 31 #include <linux/of.h> 32 #include <linux/pci.h> 33 34 #include <drm/clients/drm_client_setup.h> 35 #include <drm/drm_atomic_helper.h> 36 #include <drm/drm_drv.h> 37 #include <drm/drm_fbdev_shmem.h> 38 #include <drm/drm_gem_shmem_helper.h> 39 #include <drm/drm_module.h> 40 #include <drm/drm_probe_helper.h> 41 42 #include "ast_drv.h" 43 44 static int ast_modeset = -1; 45 46 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting"); 47 module_param_named(modeset, ast_modeset, int, 0400); 48 49 /* 50 * DRM driver 51 */ 52 53 DEFINE_DRM_GEM_FOPS(ast_fops); 54 55 static const struct drm_driver ast_driver = { 56 .driver_features = DRIVER_ATOMIC | 57 DRIVER_GEM | 58 DRIVER_MODESET, 59 60 .fops = &ast_fops, 61 .name = DRIVER_NAME, 62 .desc = DRIVER_DESC, 63 .major = DRIVER_MAJOR, 64 .minor = DRIVER_MINOR, 65 .patchlevel = DRIVER_PATCHLEVEL, 66 67 DRM_GEM_SHMEM_DRIVER_OPS, 68 DRM_FBDEV_SHMEM_DRIVER_OPS, 69 }; 70 71 /* 72 * PCI driver 73 */ 74 75 #define PCI_VENDOR_ASPEED 0x1a03 76 77 #define AST_VGA_DEVICE(id, info) { \ 78 .class = PCI_BASE_CLASS_DISPLAY << 16, \ 79 .class_mask = 0xff0000, \ 80 .vendor = PCI_VENDOR_ASPEED, \ 81 .device = id, \ 82 .subvendor = PCI_ANY_ID, \ 83 .subdevice = PCI_ANY_ID, \ 84 .driver_data = (unsigned long) info } 85 86 static const struct pci_device_id ast_pciidlist[] = { 87 AST_VGA_DEVICE(PCI_CHIP_AST2000, NULL), 88 AST_VGA_DEVICE(PCI_CHIP_AST2100, NULL), 89 {0, 0, 0}, 90 }; 91 92 MODULE_DEVICE_TABLE(pci, ast_pciidlist); 93 94 static bool ast_is_vga_enabled(void __iomem *ioregs) 95 { 96 u8 vgaer = __ast_read8(ioregs, AST_IO_VGAER); 97 98 return vgaer & AST_IO_VGAER_VGA_ENABLE; 99 } 100 101 static void ast_enable_vga(void __iomem *ioregs) 102 { 103 __ast_write8(ioregs, AST_IO_VGAER, AST_IO_VGAER_VGA_ENABLE); 104 __ast_write8(ioregs, AST_IO_VGAMR_W, AST_IO_VGAMR_IOSEL); 105 } 106 107 /* 108 * Run this function as part of the HW device cleanup; not 109 * when the DRM device gets released. 110 */ 111 static void ast_enable_mmio_release(void *data) 112 { 113 void __iomem *ioregs = (void __force __iomem *)data; 114 115 /* enable standard VGA decode */ 116 __ast_write8_i(ioregs, AST_IO_VGACRI, 0xa1, AST_IO_VGACRA1_MMIO_ENABLED); 117 } 118 119 static int ast_enable_mmio(struct device *dev, void __iomem *ioregs) 120 { 121 void *data = (void __force *)ioregs; 122 123 __ast_write8_i(ioregs, AST_IO_VGACRI, 0xa1, 124 AST_IO_VGACRA1_MMIO_ENABLED | 125 AST_IO_VGACRA1_VGAIO_DISABLED); 126 127 return devm_add_action_or_reset(dev, ast_enable_mmio_release, data); 128 } 129 130 static void ast_open_key(void __iomem *ioregs) 131 { 132 __ast_write8_i(ioregs, AST_IO_VGACRI, 0x80, AST_IO_VGACR80_PASSWORD); 133 } 134 135 static int ast_detect_chip(struct pci_dev *pdev, 136 void __iomem *regs, void __iomem *ioregs, 137 enum ast_chip *chip_out, 138 enum ast_config_mode *config_mode_out) 139 { 140 struct device *dev = &pdev->dev; 141 struct device_node *np = dev->of_node; 142 enum ast_config_mode config_mode = ast_use_defaults; 143 uint32_t scu_rev = 0xffffffff; 144 enum ast_chip chip; 145 u32 data; 146 u8 vgacrd0, vgacrd1; 147 148 /* 149 * Find configuration mode and read SCU revision 150 */ 151 152 /* Check if we have device-tree properties */ 153 if (np && !of_property_read_u32(np, "aspeed,scu-revision-id", &data)) { 154 /* We do, disable P2A access */ 155 config_mode = ast_use_dt; 156 scu_rev = data; 157 } else if (pdev->device == PCI_CHIP_AST2000) { // Not all families have a P2A bridge 158 /* 159 * The BMC will set SCU 0x40 D[12] to 1 if the P2 bridge 160 * is disabled. We force using P2A if VGA only mode bit 161 * is set D[7] 162 */ 163 vgacrd0 = __ast_read8_i(ioregs, AST_IO_VGACRI, 0xd0); 164 vgacrd1 = __ast_read8_i(ioregs, AST_IO_VGACRI, 0xd1); 165 if (!(vgacrd0 & 0x80) || !(vgacrd1 & 0x10)) { 166 167 /* 168 * We have a P2A bridge and it is enabled. 169 */ 170 171 /* Patch AST2500/AST2510 */ 172 if ((pdev->revision & 0xf0) == 0x40) { 173 if (!(vgacrd0 & AST_VRAM_INIT_STATUS_MASK)) 174 ast_patch_ahb_2500(regs); 175 } 176 177 /* Double check that it's actually working */ 178 data = __ast_read32(regs, 0xf004); 179 if ((data != 0xffffffff) && (data != 0x00)) { 180 config_mode = ast_use_p2a; 181 182 /* Read SCU7c (silicon revision register) */ 183 __ast_write32(regs, 0xf004, 0x1e6e0000); 184 __ast_write32(regs, 0xf000, 0x1); 185 scu_rev = __ast_read32(regs, 0x1207c); 186 } 187 } 188 } 189 190 switch (config_mode) { 191 case ast_use_defaults: 192 dev_info(dev, "Using default configuration\n"); 193 break; 194 case ast_use_dt: 195 dev_info(dev, "Using device-tree for configuration\n"); 196 break; 197 case ast_use_p2a: 198 dev_info(dev, "Using P2A bridge for configuration\n"); 199 break; 200 } 201 202 /* 203 * Identify chipset 204 */ 205 206 if (pdev->revision >= 0x50) { 207 chip = AST2600; 208 dev_info(dev, "AST 2600 detected\n"); 209 } else if (pdev->revision >= 0x40) { 210 switch (scu_rev & 0x300) { 211 case 0x0100: 212 chip = AST2510; 213 dev_info(dev, "AST 2510 detected\n"); 214 break; 215 default: 216 chip = AST2500; 217 dev_info(dev, "AST 2500 detected\n"); 218 break; 219 } 220 } else if (pdev->revision >= 0x30) { 221 switch (scu_rev & 0x300) { 222 case 0x0100: 223 chip = AST1400; 224 dev_info(dev, "AST 1400 detected\n"); 225 break; 226 default: 227 chip = AST2400; 228 dev_info(dev, "AST 2400 detected\n"); 229 break; 230 } 231 } else if (pdev->revision >= 0x20) { 232 switch (scu_rev & 0x300) { 233 case 0x0000: 234 chip = AST1300; 235 dev_info(dev, "AST 1300 detected\n"); 236 break; 237 default: 238 chip = AST2300; 239 dev_info(dev, "AST 2300 detected\n"); 240 break; 241 } 242 } else if (pdev->revision >= 0x10) { 243 switch (scu_rev & 0x0300) { 244 case 0x0200: 245 chip = AST1100; 246 dev_info(dev, "AST 1100 detected\n"); 247 break; 248 case 0x0100: 249 chip = AST2200; 250 dev_info(dev, "AST 2200 detected\n"); 251 break; 252 case 0x0000: 253 chip = AST2150; 254 dev_info(dev, "AST 2150 detected\n"); 255 break; 256 default: 257 chip = AST2100; 258 dev_info(dev, "AST 2100 detected\n"); 259 break; 260 } 261 } else { 262 chip = AST2000; 263 dev_info(dev, "AST 2000 detected\n"); 264 } 265 266 *chip_out = chip; 267 *config_mode_out = config_mode; 268 269 return 0; 270 } 271 272 static int ast_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 273 { 274 struct device *dev = &pdev->dev; 275 int ret; 276 void __iomem *regs; 277 void __iomem *ioregs; 278 enum ast_config_mode config_mode; 279 enum ast_chip chip; 280 struct drm_device *drm; 281 bool need_post = false; 282 283 ret = aperture_remove_conflicting_pci_devices(pdev, ast_driver.name); 284 if (ret) 285 return ret; 286 287 ret = pcim_enable_device(pdev); 288 if (ret) 289 return ret; 290 291 regs = pcim_iomap_region(pdev, 1, "ast"); 292 if (IS_ERR(regs)) 293 return PTR_ERR(regs); 294 295 if (pdev->revision >= 0x40) { 296 /* 297 * On AST2500 and later models, MMIO is enabled by 298 * default. Adopt it to be compatible with ARM. 299 */ 300 resource_size_t len = pci_resource_len(pdev, 1); 301 302 if (len < AST_IO_MM_OFFSET) 303 return -EIO; 304 if ((len - AST_IO_MM_OFFSET) < AST_IO_MM_LENGTH) 305 return -EIO; 306 ioregs = regs + AST_IO_MM_OFFSET; 307 } else if (pci_resource_flags(pdev, 2) & IORESOURCE_IO) { 308 /* 309 * Map I/O registers if we have a PCI BAR for I/O. 310 */ 311 resource_size_t len = pci_resource_len(pdev, 2); 312 313 if (len < AST_IO_MM_LENGTH) 314 return -EIO; 315 ioregs = pcim_iomap_region(pdev, 2, "ast"); 316 if (IS_ERR(ioregs)) 317 return PTR_ERR(ioregs); 318 } else { 319 /* 320 * Anything else is best effort. 321 */ 322 resource_size_t len = pci_resource_len(pdev, 1); 323 324 if (len < AST_IO_MM_OFFSET) 325 return -EIO; 326 if ((len - AST_IO_MM_OFFSET) < AST_IO_MM_LENGTH) 327 return -EIO; 328 ioregs = regs + AST_IO_MM_OFFSET; 329 330 dev_info(dev, "Platform has no I/O space, using MMIO\n"); 331 } 332 333 if (!ast_is_vga_enabled(ioregs)) { 334 dev_info(dev, "VGA not enabled on entry, requesting chip POST\n"); 335 need_post = true; 336 } 337 338 /* 339 * If VGA isn't enabled, we need to enable now or subsequent 340 * access to the scratch registers will fail. 341 */ 342 if (need_post) 343 ast_enable_vga(ioregs); 344 /* Enable extended register access */ 345 ast_open_key(ioregs); 346 347 ret = ast_enable_mmio(dev, ioregs); 348 if (ret) 349 return ret; 350 351 ret = ast_detect_chip(pdev, regs, ioregs, &chip, &config_mode); 352 if (ret) 353 return ret; 354 355 drm = ast_device_create(pdev, &ast_driver, chip, config_mode, regs, ioregs, need_post); 356 if (IS_ERR(drm)) 357 return PTR_ERR(drm); 358 pci_set_drvdata(pdev, drm); 359 360 ret = drm_dev_register(drm, ent->driver_data); 361 if (ret) 362 return ret; 363 364 drm_client_setup(drm, NULL); 365 366 return 0; 367 } 368 369 static void ast_pci_remove(struct pci_dev *pdev) 370 { 371 struct drm_device *dev = pci_get_drvdata(pdev); 372 373 drm_dev_unregister(dev); 374 drm_atomic_helper_shutdown(dev); 375 } 376 377 static void ast_pci_shutdown(struct pci_dev *pdev) 378 { 379 drm_atomic_helper_shutdown(pci_get_drvdata(pdev)); 380 } 381 382 static int ast_drm_freeze(struct drm_device *dev) 383 { 384 int error; 385 386 error = drm_mode_config_helper_suspend(dev); 387 if (error) 388 return error; 389 pci_save_state(to_pci_dev(dev->dev)); 390 return 0; 391 } 392 393 static int ast_drm_thaw(struct drm_device *dev) 394 { 395 struct ast_device *ast = to_ast_device(dev); 396 397 ast_enable_vga(ast->ioregs); 398 ast_open_key(ast->ioregs); 399 ast_enable_mmio(dev->dev, ast->ioregs); 400 ast_post_gpu(ast); 401 402 return drm_mode_config_helper_resume(dev); 403 } 404 405 static int ast_drm_resume(struct drm_device *dev) 406 { 407 if (pci_enable_device(to_pci_dev(dev->dev))) 408 return -EIO; 409 410 return ast_drm_thaw(dev); 411 } 412 413 static int ast_pm_suspend(struct device *dev) 414 { 415 struct pci_dev *pdev = to_pci_dev(dev); 416 struct drm_device *ddev = pci_get_drvdata(pdev); 417 int error; 418 419 error = ast_drm_freeze(ddev); 420 if (error) 421 return error; 422 423 pci_disable_device(pdev); 424 pci_set_power_state(pdev, PCI_D3hot); 425 return 0; 426 } 427 428 static int ast_pm_resume(struct device *dev) 429 { 430 struct pci_dev *pdev = to_pci_dev(dev); 431 struct drm_device *ddev = pci_get_drvdata(pdev); 432 return ast_drm_resume(ddev); 433 } 434 435 static int ast_pm_freeze(struct device *dev) 436 { 437 struct pci_dev *pdev = to_pci_dev(dev); 438 struct drm_device *ddev = pci_get_drvdata(pdev); 439 return ast_drm_freeze(ddev); 440 } 441 442 static int ast_pm_thaw(struct device *dev) 443 { 444 struct pci_dev *pdev = to_pci_dev(dev); 445 struct drm_device *ddev = pci_get_drvdata(pdev); 446 return ast_drm_thaw(ddev); 447 } 448 449 static int ast_pm_poweroff(struct device *dev) 450 { 451 struct pci_dev *pdev = to_pci_dev(dev); 452 struct drm_device *ddev = pci_get_drvdata(pdev); 453 454 return ast_drm_freeze(ddev); 455 } 456 457 static const struct dev_pm_ops ast_pm_ops = { 458 .suspend = ast_pm_suspend, 459 .resume = ast_pm_resume, 460 .freeze = ast_pm_freeze, 461 .thaw = ast_pm_thaw, 462 .poweroff = ast_pm_poweroff, 463 .restore = ast_pm_resume, 464 }; 465 466 static struct pci_driver ast_pci_driver = { 467 .name = DRIVER_NAME, 468 .id_table = ast_pciidlist, 469 .probe = ast_pci_probe, 470 .remove = ast_pci_remove, 471 .shutdown = ast_pci_shutdown, 472 .driver.pm = &ast_pm_ops, 473 }; 474 475 drm_module_pci_driver_if_modeset(ast_pci_driver, ast_modeset); 476 477 MODULE_AUTHOR(DRIVER_AUTHOR); 478 MODULE_DESCRIPTION(DRIVER_DESC); 479 MODULE_LICENSE("GPL and additional rights"); 480