1 /* 2 * Copyright 2012 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the 6 * "Software"), to deal in the Software without restriction, including 7 * without limitation the rights to use, copy, modify, merge, publish, 8 * distribute, sub license, and/or sell copies of the Software, and to 9 * permit persons to whom the Software is furnished to do so, subject to 10 * the following conditions: 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 13 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 14 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 15 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 16 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 17 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 18 * USE OR OTHER DEALINGS IN THE SOFTWARE. 19 * 20 * The above copyright notice and this permission notice (including the 21 * next paragraph) shall be included in all copies or substantial portions 22 * of the Software. 23 * 24 */ 25 /* 26 * Authors: Dave Airlie <airlied@redhat.com> 27 */ 28 29 #include <linux/aperture.h> 30 #include <linux/module.h> 31 #include <linux/of.h> 32 #include <linux/pci.h> 33 34 #include <drm/drm_atomic_helper.h> 35 #include <drm/drm_client_setup.h> 36 #include <drm/drm_drv.h> 37 #include <drm/drm_fbdev_shmem.h> 38 #include <drm/drm_gem_shmem_helper.h> 39 #include <drm/drm_module.h> 40 #include <drm/drm_probe_helper.h> 41 42 #include "ast_drv.h" 43 44 static int ast_modeset = -1; 45 46 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting"); 47 module_param_named(modeset, ast_modeset, int, 0400); 48 49 /* 50 * DRM driver 51 */ 52 53 DEFINE_DRM_GEM_FOPS(ast_fops); 54 55 static const struct drm_driver ast_driver = { 56 .driver_features = DRIVER_ATOMIC | 57 DRIVER_GEM | 58 DRIVER_MODESET, 59 60 .fops = &ast_fops, 61 .name = DRIVER_NAME, 62 .desc = DRIVER_DESC, 63 .date = DRIVER_DATE, 64 .major = DRIVER_MAJOR, 65 .minor = DRIVER_MINOR, 66 .patchlevel = DRIVER_PATCHLEVEL, 67 68 DRM_GEM_SHMEM_DRIVER_OPS, 69 DRM_FBDEV_SHMEM_DRIVER_OPS, 70 }; 71 72 /* 73 * PCI driver 74 */ 75 76 #define PCI_VENDOR_ASPEED 0x1a03 77 78 #define AST_VGA_DEVICE(id, info) { \ 79 .class = PCI_BASE_CLASS_DISPLAY << 16, \ 80 .class_mask = 0xff0000, \ 81 .vendor = PCI_VENDOR_ASPEED, \ 82 .device = id, \ 83 .subvendor = PCI_ANY_ID, \ 84 .subdevice = PCI_ANY_ID, \ 85 .driver_data = (unsigned long) info } 86 87 static const struct pci_device_id ast_pciidlist[] = { 88 AST_VGA_DEVICE(PCI_CHIP_AST2000, NULL), 89 AST_VGA_DEVICE(PCI_CHIP_AST2100, NULL), 90 {0, 0, 0}, 91 }; 92 93 MODULE_DEVICE_TABLE(pci, ast_pciidlist); 94 95 static bool ast_is_vga_enabled(void __iomem *ioregs) 96 { 97 u8 vgaer = __ast_read8(ioregs, AST_IO_VGAER); 98 99 return vgaer & AST_IO_VGAER_VGA_ENABLE; 100 } 101 102 static void ast_enable_vga(void __iomem *ioregs) 103 { 104 __ast_write8(ioregs, AST_IO_VGAER, AST_IO_VGAER_VGA_ENABLE); 105 __ast_write8(ioregs, AST_IO_VGAMR_W, AST_IO_VGAMR_IOSEL); 106 } 107 108 /* 109 * Run this function as part of the HW device cleanup; not 110 * when the DRM device gets released. 111 */ 112 static void ast_enable_mmio_release(void *data) 113 { 114 void __iomem *ioregs = (void __force __iomem *)data; 115 116 /* enable standard VGA decode */ 117 __ast_write8_i(ioregs, AST_IO_VGACRI, 0xa1, AST_IO_VGACRA1_MMIO_ENABLED); 118 } 119 120 static int ast_enable_mmio(struct device *dev, void __iomem *ioregs) 121 { 122 void *data = (void __force *)ioregs; 123 124 __ast_write8_i(ioregs, AST_IO_VGACRI, 0xa1, 125 AST_IO_VGACRA1_MMIO_ENABLED | 126 AST_IO_VGACRA1_VGAIO_DISABLED); 127 128 return devm_add_action_or_reset(dev, ast_enable_mmio_release, data); 129 } 130 131 static void ast_open_key(void __iomem *ioregs) 132 { 133 __ast_write8_i(ioregs, AST_IO_VGACRI, 0x80, AST_IO_VGACR80_PASSWORD); 134 } 135 136 static int ast_detect_chip(struct pci_dev *pdev, 137 void __iomem *regs, void __iomem *ioregs, 138 enum ast_chip *chip_out, 139 enum ast_config_mode *config_mode_out) 140 { 141 struct device *dev = &pdev->dev; 142 struct device_node *np = dev->of_node; 143 enum ast_config_mode config_mode = ast_use_defaults; 144 uint32_t scu_rev = 0xffffffff; 145 enum ast_chip chip; 146 u32 data; 147 u8 vgacrd0, vgacrd1; 148 149 /* 150 * Find configuration mode and read SCU revision 151 */ 152 153 /* Check if we have device-tree properties */ 154 if (np && !of_property_read_u32(np, "aspeed,scu-revision-id", &data)) { 155 /* We do, disable P2A access */ 156 config_mode = ast_use_dt; 157 scu_rev = data; 158 } else if (pdev->device == PCI_CHIP_AST2000) { // Not all families have a P2A bridge 159 /* 160 * The BMC will set SCU 0x40 D[12] to 1 if the P2 bridge 161 * is disabled. We force using P2A if VGA only mode bit 162 * is set D[7] 163 */ 164 vgacrd0 = __ast_read8_i(ioregs, AST_IO_VGACRI, 0xd0); 165 vgacrd1 = __ast_read8_i(ioregs, AST_IO_VGACRI, 0xd1); 166 if (!(vgacrd0 & 0x80) || !(vgacrd1 & 0x10)) { 167 168 /* 169 * We have a P2A bridge and it is enabled. 170 */ 171 172 /* Patch AST2500/AST2510 */ 173 if ((pdev->revision & 0xf0) == 0x40) { 174 if (!(vgacrd0 & AST_VRAM_INIT_STATUS_MASK)) 175 ast_patch_ahb_2500(regs); 176 } 177 178 /* Double check that it's actually working */ 179 data = __ast_read32(regs, 0xf004); 180 if ((data != 0xffffffff) && (data != 0x00)) { 181 config_mode = ast_use_p2a; 182 183 /* Read SCU7c (silicon revision register) */ 184 __ast_write32(regs, 0xf004, 0x1e6e0000); 185 __ast_write32(regs, 0xf000, 0x1); 186 scu_rev = __ast_read32(regs, 0x1207c); 187 } 188 } 189 } 190 191 switch (config_mode) { 192 case ast_use_defaults: 193 dev_info(dev, "Using default configuration\n"); 194 break; 195 case ast_use_dt: 196 dev_info(dev, "Using device-tree for configuration\n"); 197 break; 198 case ast_use_p2a: 199 dev_info(dev, "Using P2A bridge for configuration\n"); 200 break; 201 } 202 203 /* 204 * Identify chipset 205 */ 206 207 if (pdev->revision >= 0x50) { 208 chip = AST2600; 209 dev_info(dev, "AST 2600 detected\n"); 210 } else if (pdev->revision >= 0x40) { 211 switch (scu_rev & 0x300) { 212 case 0x0100: 213 chip = AST2510; 214 dev_info(dev, "AST 2510 detected\n"); 215 break; 216 default: 217 chip = AST2500; 218 dev_info(dev, "AST 2500 detected\n"); 219 break; 220 } 221 } else if (pdev->revision >= 0x30) { 222 switch (scu_rev & 0x300) { 223 case 0x0100: 224 chip = AST1400; 225 dev_info(dev, "AST 1400 detected\n"); 226 break; 227 default: 228 chip = AST2400; 229 dev_info(dev, "AST 2400 detected\n"); 230 break; 231 } 232 } else if (pdev->revision >= 0x20) { 233 switch (scu_rev & 0x300) { 234 case 0x0000: 235 chip = AST1300; 236 dev_info(dev, "AST 1300 detected\n"); 237 break; 238 default: 239 chip = AST2300; 240 dev_info(dev, "AST 2300 detected\n"); 241 break; 242 } 243 } else if (pdev->revision >= 0x10) { 244 switch (scu_rev & 0x0300) { 245 case 0x0200: 246 chip = AST1100; 247 dev_info(dev, "AST 1100 detected\n"); 248 break; 249 case 0x0100: 250 chip = AST2200; 251 dev_info(dev, "AST 2200 detected\n"); 252 break; 253 case 0x0000: 254 chip = AST2150; 255 dev_info(dev, "AST 2150 detected\n"); 256 break; 257 default: 258 chip = AST2100; 259 dev_info(dev, "AST 2100 detected\n"); 260 break; 261 } 262 } else { 263 chip = AST2000; 264 dev_info(dev, "AST 2000 detected\n"); 265 } 266 267 *chip_out = chip; 268 *config_mode_out = config_mode; 269 270 return 0; 271 } 272 273 static int ast_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 274 { 275 struct device *dev = &pdev->dev; 276 int ret; 277 void __iomem *regs; 278 void __iomem *ioregs; 279 enum ast_config_mode config_mode; 280 enum ast_chip chip; 281 struct drm_device *drm; 282 bool need_post = false; 283 284 ret = aperture_remove_conflicting_pci_devices(pdev, ast_driver.name); 285 if (ret) 286 return ret; 287 288 ret = pcim_enable_device(pdev); 289 if (ret) 290 return ret; 291 292 regs = pcim_iomap_region(pdev, 1, "ast"); 293 if (IS_ERR(regs)) 294 return PTR_ERR(regs); 295 296 if (pdev->revision >= 0x40) { 297 /* 298 * On AST2500 and later models, MMIO is enabled by 299 * default. Adopt it to be compatible with ARM. 300 */ 301 resource_size_t len = pci_resource_len(pdev, 1); 302 303 if (len < AST_IO_MM_OFFSET) 304 return -EIO; 305 if ((len - AST_IO_MM_OFFSET) < AST_IO_MM_LENGTH) 306 return -EIO; 307 ioregs = regs + AST_IO_MM_OFFSET; 308 } else if (pci_resource_flags(pdev, 2) & IORESOURCE_IO) { 309 /* 310 * Map I/O registers if we have a PCI BAR for I/O. 311 */ 312 resource_size_t len = pci_resource_len(pdev, 2); 313 314 if (len < AST_IO_MM_LENGTH) 315 return -EIO; 316 ioregs = pcim_iomap_region(pdev, 2, "ast"); 317 if (IS_ERR(ioregs)) 318 return PTR_ERR(ioregs); 319 } else { 320 /* 321 * Anything else is best effort. 322 */ 323 resource_size_t len = pci_resource_len(pdev, 1); 324 325 if (len < AST_IO_MM_OFFSET) 326 return -EIO; 327 if ((len - AST_IO_MM_OFFSET) < AST_IO_MM_LENGTH) 328 return -EIO; 329 ioregs = regs + AST_IO_MM_OFFSET; 330 331 dev_info(dev, "Platform has no I/O space, using MMIO\n"); 332 } 333 334 if (!ast_is_vga_enabled(ioregs)) { 335 dev_info(dev, "VGA not enabled on entry, requesting chip POST\n"); 336 need_post = true; 337 } 338 339 /* 340 * If VGA isn't enabled, we need to enable now or subsequent 341 * access to the scratch registers will fail. 342 */ 343 if (need_post) 344 ast_enable_vga(ioregs); 345 /* Enable extended register access */ 346 ast_open_key(ioregs); 347 348 ret = ast_enable_mmio(dev, ioregs); 349 if (ret) 350 return ret; 351 352 ret = ast_detect_chip(pdev, regs, ioregs, &chip, &config_mode); 353 if (ret) 354 return ret; 355 356 drm = ast_device_create(pdev, &ast_driver, chip, config_mode, regs, ioregs, need_post); 357 if (IS_ERR(drm)) 358 return PTR_ERR(drm); 359 pci_set_drvdata(pdev, drm); 360 361 ret = drm_dev_register(drm, ent->driver_data); 362 if (ret) 363 return ret; 364 365 drm_client_setup(drm, NULL); 366 367 return 0; 368 } 369 370 static void ast_pci_remove(struct pci_dev *pdev) 371 { 372 struct drm_device *dev = pci_get_drvdata(pdev); 373 374 drm_dev_unregister(dev); 375 drm_atomic_helper_shutdown(dev); 376 } 377 378 static void ast_pci_shutdown(struct pci_dev *pdev) 379 { 380 drm_atomic_helper_shutdown(pci_get_drvdata(pdev)); 381 } 382 383 static int ast_drm_freeze(struct drm_device *dev) 384 { 385 int error; 386 387 error = drm_mode_config_helper_suspend(dev); 388 if (error) 389 return error; 390 pci_save_state(to_pci_dev(dev->dev)); 391 return 0; 392 } 393 394 static int ast_drm_thaw(struct drm_device *dev) 395 { 396 struct ast_device *ast = to_ast_device(dev); 397 398 ast_enable_vga(ast->ioregs); 399 ast_open_key(ast->ioregs); 400 ast_enable_mmio(dev->dev, ast->ioregs); 401 ast_post_gpu(ast); 402 403 return drm_mode_config_helper_resume(dev); 404 } 405 406 static int ast_drm_resume(struct drm_device *dev) 407 { 408 if (pci_enable_device(to_pci_dev(dev->dev))) 409 return -EIO; 410 411 return ast_drm_thaw(dev); 412 } 413 414 static int ast_pm_suspend(struct device *dev) 415 { 416 struct pci_dev *pdev = to_pci_dev(dev); 417 struct drm_device *ddev = pci_get_drvdata(pdev); 418 int error; 419 420 error = ast_drm_freeze(ddev); 421 if (error) 422 return error; 423 424 pci_disable_device(pdev); 425 pci_set_power_state(pdev, PCI_D3hot); 426 return 0; 427 } 428 429 static int ast_pm_resume(struct device *dev) 430 { 431 struct pci_dev *pdev = to_pci_dev(dev); 432 struct drm_device *ddev = pci_get_drvdata(pdev); 433 return ast_drm_resume(ddev); 434 } 435 436 static int ast_pm_freeze(struct device *dev) 437 { 438 struct pci_dev *pdev = to_pci_dev(dev); 439 struct drm_device *ddev = pci_get_drvdata(pdev); 440 return ast_drm_freeze(ddev); 441 } 442 443 static int ast_pm_thaw(struct device *dev) 444 { 445 struct pci_dev *pdev = to_pci_dev(dev); 446 struct drm_device *ddev = pci_get_drvdata(pdev); 447 return ast_drm_thaw(ddev); 448 } 449 450 static int ast_pm_poweroff(struct device *dev) 451 { 452 struct pci_dev *pdev = to_pci_dev(dev); 453 struct drm_device *ddev = pci_get_drvdata(pdev); 454 455 return ast_drm_freeze(ddev); 456 } 457 458 static const struct dev_pm_ops ast_pm_ops = { 459 .suspend = ast_pm_suspend, 460 .resume = ast_pm_resume, 461 .freeze = ast_pm_freeze, 462 .thaw = ast_pm_thaw, 463 .poweroff = ast_pm_poweroff, 464 .restore = ast_pm_resume, 465 }; 466 467 static struct pci_driver ast_pci_driver = { 468 .name = DRIVER_NAME, 469 .id_table = ast_pciidlist, 470 .probe = ast_pci_probe, 471 .remove = ast_pci_remove, 472 .shutdown = ast_pci_shutdown, 473 .driver.pm = &ast_pm_ops, 474 }; 475 476 drm_module_pci_driver_if_modeset(ast_pci_driver, ast_modeset); 477 478 MODULE_AUTHOR(DRIVER_AUTHOR); 479 MODULE_DESCRIPTION(DRIVER_DESC); 480 MODULE_LICENSE("GPL and additional rights"); 481