1 // SPDX-License-Identifier: MIT 2 /* 3 * Permission is hereby granted, free of charge, to any person obtaining a 4 * copy of this software and associated documentation files (the 5 * "Software"), to deal in the Software without restriction, including 6 * without limitation the rights to use, copy, modify, merge, publish, 7 * distribute, sub license, and/or sell copies of the Software, and to 8 * permit persons to whom the Software is furnished to do so, subject to 9 * the following conditions: 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 12 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 13 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 14 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 15 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 16 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 17 * USE OR OTHER DEALINGS IN THE SOFTWARE. 18 * 19 * The above copyright notice and this permission notice (including the 20 * next paragraph) shall be included in all copies or substantial portions 21 * of the Software. 22 */ 23 24 #include <linux/bits.h> 25 #include <linux/sizes.h> 26 27 #include <drm/drm_atomic.h> 28 #include <drm/drm_damage_helper.h> 29 #include <drm/drm_format_helper.h> 30 #include <drm/drm_gem_atomic_helper.h> 31 #include <drm/drm_gem_framebuffer_helper.h> 32 #include <drm/drm_print.h> 33 34 #include "ast_drv.h" 35 36 /* 37 * Hardware cursor 38 */ 39 40 /* define for signature structure */ 41 #define AST_HWC_SIGNATURE_SIZE SZ_32 42 #define AST_HWC_SIGNATURE_CHECKSUM 0x00 43 #define AST_HWC_SIGNATURE_SizeX 0x04 44 #define AST_HWC_SIGNATURE_SizeY 0x08 45 #define AST_HWC_SIGNATURE_X 0x0C 46 #define AST_HWC_SIGNATURE_Y 0x10 47 #define AST_HWC_SIGNATURE_HOTSPOTX 0x14 48 #define AST_HWC_SIGNATURE_HOTSPOTY 0x18 49 50 static unsigned long ast_cursor_vram_size(void) 51 { 52 return AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE; 53 } 54 55 long ast_cursor_vram_offset(struct ast_device *ast) 56 { 57 unsigned long size = ast_cursor_vram_size(); 58 59 if (size > ast->vram_size) 60 return -EINVAL; 61 62 return ALIGN_DOWN(ast->vram_size - size, SZ_8); 63 } 64 65 static u32 ast_cursor_calculate_checksum(const void *src, unsigned int width, unsigned int height) 66 { 67 u32 csum = 0; 68 unsigned int one_pixel_copy = width & BIT(0); 69 unsigned int two_pixel_copy = width - one_pixel_copy; 70 unsigned int trailing_bytes = (AST_MAX_HWC_WIDTH - width) * sizeof(u16); 71 unsigned int x, y; 72 73 for (y = 0; y < height; y++) { 74 for (x = 0; x < two_pixel_copy; x += 2) { 75 const u32 *src32 = (const u32 *)src; 76 77 csum += *src32; 78 src += SZ_4; 79 } 80 if (one_pixel_copy) { 81 const u16 *src16 = (const u16 *)src; 82 83 csum += *src16; 84 src += SZ_2; 85 } 86 src += trailing_bytes; 87 } 88 89 return csum; 90 } 91 92 static void ast_set_cursor_image(struct ast_device *ast, const u8 *src, 93 unsigned int width, unsigned int height) 94 { 95 u8 __iomem *dst = ast_plane_vaddr(&ast->cursor_plane.base); 96 u32 csum; 97 98 csum = ast_cursor_calculate_checksum(src, width, height); 99 100 /* write pixel data */ 101 memcpy_toio(dst, src, AST_HWC_SIZE); 102 103 /* write checksum + signature */ 104 dst += AST_HWC_SIZE; 105 writel(csum, dst); 106 writel(width, dst + AST_HWC_SIGNATURE_SizeX); 107 writel(height, dst + AST_HWC_SIGNATURE_SizeY); 108 writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTX); 109 writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTY); 110 } 111 112 static void ast_set_cursor_base(struct ast_device *ast, u64 address) 113 { 114 u8 addr0 = (address >> 3) & 0xff; 115 u8 addr1 = (address >> 11) & 0xff; 116 u8 addr2 = (address >> 19) & 0xff; 117 118 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc8, addr0); 119 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc9, addr1); 120 ast_set_index_reg(ast, AST_IO_VGACRI, 0xca, addr2); 121 } 122 123 static void ast_set_cursor_location(struct ast_device *ast, u16 x, u16 y, 124 u8 x_offset, u8 y_offset) 125 { 126 u8 x0 = (x & 0x00ff); 127 u8 x1 = (x & 0x0f00) >> 8; 128 u8 y0 = (y & 0x00ff); 129 u8 y1 = (y & 0x0700) >> 8; 130 131 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc2, x_offset); 132 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc3, y_offset); 133 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc4, x0); 134 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc5, x1); 135 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc6, y0); 136 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc7, y1); 137 } 138 139 static void ast_set_cursor_enabled(struct ast_device *ast, bool enabled) 140 { 141 static const u8 mask = (u8)~(AST_IO_VGACRCB_HWC_16BPP | 142 AST_IO_VGACRCB_HWC_ENABLED); 143 144 u8 vgacrcb = AST_IO_VGACRCB_HWC_16BPP; 145 146 if (enabled) 147 vgacrcb |= AST_IO_VGACRCB_HWC_ENABLED; 148 149 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xcb, mask, vgacrcb); 150 } 151 152 /* 153 * Cursor plane 154 */ 155 156 static const uint32_t ast_cursor_plane_formats[] = { 157 DRM_FORMAT_ARGB4444, 158 DRM_FORMAT_ARGB8888, 159 }; 160 161 static int ast_cursor_plane_helper_atomic_check(struct drm_plane *plane, 162 struct drm_atomic_state *state) 163 { 164 struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane); 165 struct drm_framebuffer *new_fb = new_plane_state->fb; 166 struct drm_crtc_state *new_crtc_state = NULL; 167 int ret; 168 169 if (new_plane_state->crtc) 170 new_crtc_state = drm_atomic_get_new_crtc_state(state, new_plane_state->crtc); 171 172 ret = drm_atomic_helper_check_plane_state(new_plane_state, new_crtc_state, 173 DRM_PLANE_NO_SCALING, 174 DRM_PLANE_NO_SCALING, 175 true, true); 176 if (ret || !new_plane_state->visible) 177 return ret; 178 179 if (new_fb->width > AST_MAX_HWC_WIDTH || new_fb->height > AST_MAX_HWC_HEIGHT) 180 return -EINVAL; 181 182 return 0; 183 } 184 185 static const u8 *ast_cursor_plane_get_argb4444(struct ast_cursor_plane *ast_cursor_plane, 186 struct drm_shadow_plane_state *shadow_plane_state, 187 const struct drm_rect *clip) 188 { 189 struct drm_plane_state *plane_state = &shadow_plane_state->base; 190 struct drm_framebuffer *fb = plane_state->fb; 191 u8 *argb4444 = NULL; 192 193 if (drm_gem_fb_begin_cpu_access(fb, DMA_FROM_DEVICE) == 0) { 194 switch (fb->format->format) { 195 case DRM_FORMAT_ARGB4444: 196 if (shadow_plane_state->data[0].is_iomem) { 197 struct iosys_map argb4444_dst[DRM_FORMAT_MAX_PLANES] = { 198 IOSYS_MAP_INIT_VADDR(ast_cursor_plane->argb4444), 199 }; 200 unsigned int argb4444_dst_pitch[DRM_FORMAT_MAX_PLANES] = { 201 AST_HWC_PITCH, 202 }; 203 204 drm_fb_memcpy(argb4444_dst, argb4444_dst_pitch, 205 shadow_plane_state->data, fb, clip); 206 argb4444 = argb4444_dst[0].vaddr; 207 } else { 208 argb4444 = shadow_plane_state->data[0].vaddr; 209 } 210 break; 211 case DRM_FORMAT_ARGB8888: 212 { 213 struct iosys_map argb4444_dst[DRM_FORMAT_MAX_PLANES] = { 214 IOSYS_MAP_INIT_VADDR(ast_cursor_plane->argb4444), 215 }; 216 unsigned int argb4444_dst_pitch[DRM_FORMAT_MAX_PLANES] = { 217 AST_HWC_PITCH, 218 }; 219 220 drm_fb_argb8888_to_argb4444(argb4444_dst, argb4444_dst_pitch, 221 shadow_plane_state->data, fb, clip, 222 &shadow_plane_state->fmtcnv_state); 223 argb4444 = argb4444_dst[0].vaddr; 224 } 225 break; 226 } 227 228 drm_gem_fb_end_cpu_access(fb, DMA_FROM_DEVICE); 229 } else { 230 /* 231 * Fall back to white square if GEM object is not ready. Gives 232 * the user an indication where the cursor is located. 233 */ 234 memset(ast_cursor_plane->argb4444, 0xff, sizeof(ast_cursor_plane->argb4444)); 235 argb4444 = ast_cursor_plane->argb4444; 236 } 237 238 return argb4444; 239 } 240 241 static void ast_cursor_plane_helper_atomic_update(struct drm_plane *plane, 242 struct drm_atomic_state *state) 243 { 244 struct ast_cursor_plane *ast_cursor_plane = to_ast_cursor_plane(plane); 245 struct ast_plane *ast_plane = to_ast_plane(plane); 246 struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane); 247 struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state); 248 struct drm_framebuffer *fb = plane_state->fb; 249 struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane); 250 struct ast_device *ast = to_ast_device(plane->dev); 251 struct drm_rect damage; 252 u64 dst_off = ast_plane->offset; 253 u8 __iomem *dst = ast_plane_vaddr(ast_plane); /* TODO: Use mapping abstraction properly */ 254 u8 __iomem *sig = dst + AST_HWC_SIZE; /* TODO: Use mapping abstraction properly */ 255 unsigned int offset_x, offset_y; 256 u16 x, y; 257 u8 x_offset, y_offset; 258 259 /* 260 * Do data transfer to hardware buffer and point the scanout 261 * engine to the offset. 262 */ 263 264 if (drm_atomic_helper_damage_merged(old_plane_state, plane_state, &damage)) { 265 const u8 *argb4444 = ast_cursor_plane_get_argb4444(ast_cursor_plane, 266 shadow_plane_state, 267 &damage); 268 269 if (argb4444) 270 ast_set_cursor_image(ast, argb4444, fb->width, fb->height); 271 272 ast_set_cursor_base(ast, dst_off); 273 } 274 275 /* 276 * Update location in HWC signature and registers. 277 */ 278 279 writel(plane_state->crtc_x, sig + AST_HWC_SIGNATURE_X); 280 writel(plane_state->crtc_y, sig + AST_HWC_SIGNATURE_Y); 281 282 offset_x = AST_MAX_HWC_WIDTH - fb->width; 283 offset_y = AST_MAX_HWC_HEIGHT - fb->height; 284 285 if (plane_state->crtc_x < 0) { 286 x_offset = (-plane_state->crtc_x) + offset_x; 287 x = 0; 288 } else { 289 x_offset = offset_x; 290 x = plane_state->crtc_x; 291 } 292 if (plane_state->crtc_y < 0) { 293 y_offset = (-plane_state->crtc_y) + offset_y; 294 y = 0; 295 } else { 296 y_offset = offset_y; 297 y = plane_state->crtc_y; 298 } 299 300 ast_set_cursor_location(ast, x, y, x_offset, y_offset); 301 302 /* Dummy write to enable HWC and make the HW pick-up the changes. */ 303 ast_set_cursor_enabled(ast, true); 304 } 305 306 static void ast_cursor_plane_helper_atomic_disable(struct drm_plane *plane, 307 struct drm_atomic_state *state) 308 { 309 struct ast_device *ast = to_ast_device(plane->dev); 310 311 ast_set_cursor_enabled(ast, false); 312 } 313 314 static const struct drm_plane_helper_funcs ast_cursor_plane_helper_funcs = { 315 DRM_GEM_SHADOW_PLANE_HELPER_FUNCS, 316 .atomic_check = ast_cursor_plane_helper_atomic_check, 317 .atomic_update = ast_cursor_plane_helper_atomic_update, 318 .atomic_disable = ast_cursor_plane_helper_atomic_disable, 319 }; 320 321 static const struct drm_plane_funcs ast_cursor_plane_funcs = { 322 .update_plane = drm_atomic_helper_update_plane, 323 .disable_plane = drm_atomic_helper_disable_plane, 324 .destroy = drm_plane_cleanup, 325 DRM_GEM_SHADOW_PLANE_FUNCS, 326 }; 327 328 int ast_cursor_plane_init(struct ast_device *ast) 329 { 330 struct drm_device *dev = &ast->base; 331 struct ast_cursor_plane *ast_cursor_plane = &ast->cursor_plane; 332 struct ast_plane *ast_plane = &ast_cursor_plane->base; 333 struct drm_plane *cursor_plane = &ast_plane->base; 334 unsigned long size; 335 long offset; 336 int ret; 337 338 size = ast_cursor_vram_size(); 339 offset = ast_cursor_vram_offset(ast); 340 if (offset < 0) 341 return offset; 342 343 ret = ast_plane_init(dev, ast_plane, offset, size, 344 0x01, &ast_cursor_plane_funcs, 345 ast_cursor_plane_formats, ARRAY_SIZE(ast_cursor_plane_formats), 346 NULL, DRM_PLANE_TYPE_CURSOR); 347 if (ret) { 348 drm_err(dev, "ast_plane_init() failed: %d\n", ret); 349 return ret; 350 } 351 drm_plane_helper_add(cursor_plane, &ast_cursor_plane_helper_funcs); 352 drm_plane_enable_fb_damage_clips(cursor_plane); 353 354 return 0; 355 } 356