1 // SPDX-License-Identifier: MIT 2 /* 3 * Permission is hereby granted, free of charge, to any person obtaining a 4 * copy of this software and associated documentation files (the 5 * "Software"), to deal in the Software without restriction, including 6 * without limitation the rights to use, copy, modify, merge, publish, 7 * distribute, sub license, and/or sell copies of the Software, and to 8 * permit persons to whom the Software is furnished to do so, subject to 9 * the following conditions: 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 12 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 13 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 14 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 15 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 16 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 17 * USE OR OTHER DEALINGS IN THE SOFTWARE. 18 * 19 * The above copyright notice and this permission notice (including the 20 * next paragraph) shall be included in all copies or substantial portions 21 * of the Software. 22 */ 23 24 #include <linux/bits.h> 25 #include <linux/sizes.h> 26 27 #include <drm/drm_atomic.h> 28 #include <drm/drm_blend.h> 29 #include <drm/drm_damage_helper.h> 30 #include <drm/drm_format_helper.h> 31 #include <drm/drm_gem_atomic_helper.h> 32 #include <drm/drm_gem_framebuffer_helper.h> 33 #include <drm/drm_print.h> 34 35 #include "ast_drv.h" 36 37 /* 38 * Hardware cursor 39 */ 40 41 /* define for signature structure */ 42 #define AST_HWC_SIGNATURE_SIZE SZ_32 43 #define AST_HWC_SIGNATURE_CHECKSUM 0x00 44 #define AST_HWC_SIGNATURE_SizeX 0x04 45 #define AST_HWC_SIGNATURE_SizeY 0x08 46 #define AST_HWC_SIGNATURE_X 0x0C 47 #define AST_HWC_SIGNATURE_Y 0x10 48 #define AST_HWC_SIGNATURE_HOTSPOTX 0x14 49 #define AST_HWC_SIGNATURE_HOTSPOTY 0x18 50 51 static unsigned long ast_cursor_vram_size(void) 52 { 53 return AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE; 54 } 55 56 long ast_cursor_vram_offset(struct ast_device *ast) 57 { 58 unsigned long size = ast_cursor_vram_size(); 59 60 if (size > ast->vram_size) 61 return -EINVAL; 62 63 return ALIGN_DOWN(ast->vram_size - size, SZ_8); 64 } 65 66 static u32 ast_cursor_calculate_checksum(const void *src, unsigned int width, unsigned int height) 67 { 68 u32 csum = 0; 69 unsigned int one_pixel_copy = width & BIT(0); 70 unsigned int two_pixel_copy = width - one_pixel_copy; 71 unsigned int trailing_bytes = (AST_MAX_HWC_WIDTH - width) * sizeof(u16); 72 unsigned int x, y; 73 74 for (y = 0; y < height; y++) { 75 for (x = 0; x < two_pixel_copy; x += 2) { 76 const u32 *src32 = (const u32 *)src; 77 78 csum += *src32; 79 src += SZ_4; 80 } 81 if (one_pixel_copy) { 82 const u16 *src16 = (const u16 *)src; 83 84 csum += *src16; 85 src += SZ_2; 86 } 87 src += trailing_bytes; 88 } 89 90 return csum; 91 } 92 93 static void ast_set_cursor_image(struct ast_device *ast, const u8 *src, 94 unsigned int width, unsigned int height) 95 { 96 u8 __iomem *dst = ast_plane_vaddr(&ast->cursor_plane.base); 97 u32 csum = ast_cursor_calculate_checksum(src, width, height); 98 99 /* write pixel data */ 100 #if defined(__BIG_ENDIAN) 101 unsigned int i; 102 103 for (i = 0; i < AST_HWC_SIZE; i += 2) 104 writew(swab16(*(const __u16 *)&src[i]), &dst[i]); 105 #else 106 memcpy_toio(dst, src, AST_HWC_SIZE); 107 #endif 108 109 /* write checksum + signature */ 110 dst += AST_HWC_SIZE; 111 writel(csum, dst); 112 writel(width, dst + AST_HWC_SIGNATURE_SizeX); 113 writel(height, dst + AST_HWC_SIGNATURE_SizeY); 114 writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTX); 115 writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTY); 116 } 117 118 static void ast_set_cursor_base(struct ast_device *ast, u64 address) 119 { 120 u8 addr0 = (address >> 3) & 0xff; 121 u8 addr1 = (address >> 11) & 0xff; 122 u8 addr2 = (address >> 19) & 0xff; 123 124 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc8, addr0); 125 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc9, addr1); 126 ast_set_index_reg(ast, AST_IO_VGACRI, 0xca, addr2); 127 } 128 129 static void ast_set_cursor_location(struct ast_device *ast, u16 x, u16 y, 130 u8 x_offset, u8 y_offset) 131 { 132 u8 x0 = (x & 0x00ff); 133 u8 x1 = (x & 0x0f00) >> 8; 134 u8 y0 = (y & 0x00ff); 135 u8 y1 = (y & 0x0700) >> 8; 136 137 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc2, x_offset); 138 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc3, y_offset); 139 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc4, x0); 140 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc5, x1); 141 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc6, y0); 142 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc7, y1); 143 } 144 145 static void ast_set_cursor_enabled(struct ast_device *ast, bool enabled) 146 { 147 static const u8 mask = (u8)~(AST_IO_VGACRCB_HWC_16BPP | 148 AST_IO_VGACRCB_HWC_ENABLED); 149 150 u8 vgacrcb = AST_IO_VGACRCB_HWC_16BPP; 151 152 if (enabled) 153 vgacrcb |= AST_IO_VGACRCB_HWC_ENABLED; 154 155 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xcb, mask, vgacrcb); 156 } 157 158 /* 159 * Cursor plane 160 */ 161 162 static const uint32_t ast_cursor_plane_formats[] = { 163 DRM_FORMAT_ARGB4444, 164 DRM_FORMAT_ARGB8888, 165 }; 166 167 static int ast_cursor_plane_helper_atomic_check(struct drm_plane *plane, 168 struct drm_atomic_commit *state) 169 { 170 struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane); 171 struct drm_framebuffer *new_fb = new_plane_state->fb; 172 struct drm_crtc_state *new_crtc_state = NULL; 173 int ret; 174 175 if (new_plane_state->crtc) 176 new_crtc_state = drm_atomic_get_new_crtc_state(state, new_plane_state->crtc); 177 178 ret = drm_atomic_helper_check_plane_state(new_plane_state, new_crtc_state, 179 DRM_PLANE_NO_SCALING, 180 DRM_PLANE_NO_SCALING, 181 true, true); 182 if (ret || !new_plane_state->visible) 183 return ret; 184 185 if (new_fb->width > AST_MAX_HWC_WIDTH || new_fb->height > AST_MAX_HWC_HEIGHT) 186 return -EINVAL; 187 188 return 0; 189 } 190 191 static const u8 *ast_cursor_plane_get_argb4444(struct ast_cursor_plane *ast_cursor_plane, 192 struct drm_shadow_plane_state *shadow_plane_state, 193 const struct drm_rect *clip) 194 { 195 struct drm_plane_state *plane_state = &shadow_plane_state->base; 196 struct drm_framebuffer *fb = plane_state->fb; 197 u8 *argb4444 = NULL; 198 199 if (drm_gem_fb_begin_cpu_access(fb, DMA_FROM_DEVICE) == 0) { 200 switch (fb->format->format) { 201 case DRM_FORMAT_ARGB4444: 202 if (shadow_plane_state->data[0].is_iomem) { 203 struct iosys_map argb4444_dst[DRM_FORMAT_MAX_PLANES] = { 204 IOSYS_MAP_INIT_VADDR(ast_cursor_plane->argb4444), 205 }; 206 unsigned int argb4444_dst_pitch[DRM_FORMAT_MAX_PLANES] = { 207 AST_HWC_PITCH, 208 }; 209 210 drm_fb_memcpy(argb4444_dst, argb4444_dst_pitch, 211 shadow_plane_state->data, fb, clip); 212 argb4444 = argb4444_dst[0].vaddr; 213 } else { 214 argb4444 = shadow_plane_state->data[0].vaddr; 215 } 216 break; 217 case DRM_FORMAT_ARGB8888: 218 { 219 struct iosys_map argb4444_dst[DRM_FORMAT_MAX_PLANES] = { 220 IOSYS_MAP_INIT_VADDR(ast_cursor_plane->argb4444), 221 }; 222 unsigned int argb4444_dst_pitch[DRM_FORMAT_MAX_PLANES] = { 223 AST_HWC_PITCH, 224 }; 225 226 drm_fb_argb8888_to_argb4444(argb4444_dst, argb4444_dst_pitch, 227 shadow_plane_state->data, fb, clip, 228 &shadow_plane_state->fmtcnv_state); 229 argb4444 = argb4444_dst[0].vaddr; 230 } 231 break; 232 } 233 234 drm_gem_fb_end_cpu_access(fb, DMA_FROM_DEVICE); 235 } else { 236 /* 237 * Fall back to white square if GEM object is not ready. Gives 238 * the user an indication where the cursor is located. 239 */ 240 memset(ast_cursor_plane->argb4444, 0xff, sizeof(ast_cursor_plane->argb4444)); 241 argb4444 = ast_cursor_plane->argb4444; 242 } 243 244 return argb4444; 245 } 246 247 static void ast_cursor_plane_helper_atomic_update(struct drm_plane *plane, 248 struct drm_atomic_commit *state) 249 { 250 struct ast_cursor_plane *ast_cursor_plane = to_ast_cursor_plane(plane); 251 struct ast_plane *ast_plane = to_ast_plane(plane); 252 struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane); 253 struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state); 254 struct drm_framebuffer *fb = plane_state->fb; 255 struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane); 256 struct ast_device *ast = to_ast_device(plane->dev); 257 struct drm_rect damage; 258 u64 dst_off = ast_plane->offset; 259 u8 __iomem *dst = ast_plane_vaddr(ast_plane); /* TODO: Use mapping abstraction properly */ 260 u8 __iomem *sig = dst + AST_HWC_SIZE; /* TODO: Use mapping abstraction properly */ 261 unsigned int offset_x, offset_y; 262 u16 x, y; 263 u8 x_offset, y_offset; 264 265 /* 266 * Do data transfer to hardware buffer and point the scanout 267 * engine to the offset. 268 */ 269 270 if (drm_atomic_helper_damage_merged(old_plane_state, plane_state, &damage)) { 271 const u8 *argb4444 = ast_cursor_plane_get_argb4444(ast_cursor_plane, 272 shadow_plane_state, 273 &damage); 274 275 if (argb4444) 276 ast_set_cursor_image(ast, argb4444, fb->width, fb->height); 277 278 ast_set_cursor_base(ast, dst_off); 279 } 280 281 /* 282 * Update location in HWC signature and registers. 283 */ 284 285 writel(plane_state->crtc_x, sig + AST_HWC_SIGNATURE_X); 286 writel(plane_state->crtc_y, sig + AST_HWC_SIGNATURE_Y); 287 288 offset_x = AST_MAX_HWC_WIDTH - fb->width; 289 offset_y = AST_MAX_HWC_HEIGHT - fb->height; 290 291 if (plane_state->crtc_x < 0) { 292 x_offset = (-plane_state->crtc_x) + offset_x; 293 x = 0; 294 } else { 295 x_offset = offset_x; 296 x = plane_state->crtc_x; 297 } 298 if (plane_state->crtc_y < 0) { 299 y_offset = (-plane_state->crtc_y) + offset_y; 300 y = 0; 301 } else { 302 y_offset = offset_y; 303 y = plane_state->crtc_y; 304 } 305 306 ast_set_cursor_location(ast, x, y, x_offset, y_offset); 307 308 /* Dummy write to enable HWC and make the HW pick-up the changes. */ 309 ast_set_cursor_enabled(ast, true); 310 } 311 312 static void ast_cursor_plane_helper_atomic_disable(struct drm_plane *plane, 313 struct drm_atomic_commit *state) 314 { 315 struct ast_device *ast = to_ast_device(plane->dev); 316 317 ast_set_cursor_enabled(ast, false); 318 } 319 320 static const struct drm_plane_helper_funcs ast_cursor_plane_helper_funcs = { 321 DRM_GEM_SHADOW_PLANE_HELPER_FUNCS, 322 .atomic_check = ast_cursor_plane_helper_atomic_check, 323 .atomic_update = ast_cursor_plane_helper_atomic_update, 324 .atomic_disable = ast_cursor_plane_helper_atomic_disable, 325 }; 326 327 static const struct drm_plane_funcs ast_cursor_plane_funcs = { 328 .update_plane = drm_atomic_helper_update_plane, 329 .disable_plane = drm_atomic_helper_disable_plane, 330 .destroy = drm_plane_cleanup, 331 DRM_GEM_SHADOW_PLANE_FUNCS, 332 }; 333 334 int ast_cursor_plane_init(struct ast_device *ast) 335 { 336 struct drm_device *dev = &ast->base; 337 struct ast_cursor_plane *ast_cursor_plane = &ast->cursor_plane; 338 struct ast_plane *ast_plane = &ast_cursor_plane->base; 339 struct drm_plane *cursor_plane = &ast_plane->base; 340 unsigned long size; 341 long offset; 342 int ret; 343 344 size = ast_cursor_vram_size(); 345 offset = ast_cursor_vram_offset(ast); 346 if (offset < 0) 347 return offset; 348 349 ret = ast_plane_init(dev, ast_plane, offset, size, 350 0x01, &ast_cursor_plane_funcs, 351 ast_cursor_plane_formats, ARRAY_SIZE(ast_cursor_plane_formats), 352 NULL, DRM_PLANE_TYPE_CURSOR); 353 if (ret) { 354 drm_err(dev, "ast_plane_init() failed: %d\n", ret); 355 return ret; 356 } 357 drm_plane_helper_add(cursor_plane, &ast_cursor_plane_helper_funcs); 358 drm_plane_enable_fb_damage_clips(cursor_plane); 359 drm_plane_create_blend_mode_property(cursor_plane, 360 BIT(DRM_MODE_BLEND_COVERAGE)); 361 362 return 0; 363 } 364