1 // SPDX-License-Identifier: MIT 2 /* 3 * Permission is hereby granted, free of charge, to any person obtaining a 4 * copy of this software and associated documentation files (the 5 * "Software"), to deal in the Software without restriction, including 6 * without limitation the rights to use, copy, modify, merge, publish, 7 * distribute, sub license, and/or sell copies of the Software, and to 8 * permit persons to whom the Software is furnished to do so, subject to 9 * the following conditions: 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 12 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 13 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 14 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 15 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 16 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 17 * USE OR OTHER DEALINGS IN THE SOFTWARE. 18 * 19 * The above copyright notice and this permission notice (including the 20 * next paragraph) shall be included in all copies or substantial portions 21 * of the Software. 22 */ 23 24 #include <linux/bits.h> 25 #include <linux/sizes.h> 26 27 #include <drm/drm_atomic.h> 28 #include <drm/drm_damage_helper.h> 29 #include <drm/drm_format_helper.h> 30 #include <drm/drm_gem_atomic_helper.h> 31 #include <drm/drm_gem_framebuffer_helper.h> 32 #include <drm/drm_print.h> 33 34 #include "ast_drv.h" 35 36 /* 37 * Hardware cursor 38 */ 39 40 /* define for signature structure */ 41 #define AST_HWC_SIGNATURE_SIZE SZ_32 42 #define AST_HWC_SIGNATURE_CHECKSUM 0x00 43 #define AST_HWC_SIGNATURE_SizeX 0x04 44 #define AST_HWC_SIGNATURE_SizeY 0x08 45 #define AST_HWC_SIGNATURE_X 0x0C 46 #define AST_HWC_SIGNATURE_Y 0x10 47 #define AST_HWC_SIGNATURE_HOTSPOTX 0x14 48 #define AST_HWC_SIGNATURE_HOTSPOTY 0x18 49 50 static unsigned long ast_cursor_vram_size(void) 51 { 52 return AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE; 53 } 54 55 long ast_cursor_vram_offset(struct ast_device *ast) 56 { 57 unsigned long size = ast_cursor_vram_size(); 58 59 if (size > ast->vram_size) 60 return -EINVAL; 61 62 return ALIGN_DOWN(ast->vram_size - size, SZ_8); 63 } 64 65 static u32 ast_cursor_calculate_checksum(const void *src, unsigned int width, unsigned int height) 66 { 67 u32 csum = 0; 68 unsigned int one_pixel_copy = width & BIT(0); 69 unsigned int two_pixel_copy = width - one_pixel_copy; 70 unsigned int trailing_bytes = (AST_MAX_HWC_WIDTH - width) * sizeof(u16); 71 unsigned int x, y; 72 73 for (y = 0; y < height; y++) { 74 for (x = 0; x < two_pixel_copy; x += 2) { 75 const u32 *src32 = (const u32 *)src; 76 77 csum += *src32; 78 src += SZ_4; 79 } 80 if (one_pixel_copy) { 81 const u16 *src16 = (const u16 *)src; 82 83 csum += *src16; 84 src += SZ_2; 85 } 86 src += trailing_bytes; 87 } 88 89 return csum; 90 } 91 92 static void ast_set_cursor_image(struct ast_device *ast, const u8 *src, 93 unsigned int width, unsigned int height) 94 { 95 u8 __iomem *dst = ast_plane_vaddr(&ast->cursor_plane.base); 96 u32 csum = ast_cursor_calculate_checksum(src, width, height); 97 98 /* write pixel data */ 99 #if defined(__BIG_ENDIAN) 100 unsigned int i; 101 102 for (i = 0; i < AST_HWC_SIZE; i += 2) 103 writew(swab16(*(const __u16 *)&src[i]), &dst[i]); 104 #else 105 memcpy_toio(dst, src, AST_HWC_SIZE); 106 #endif 107 108 /* write checksum + signature */ 109 dst += AST_HWC_SIZE; 110 writel(csum, dst); 111 writel(width, dst + AST_HWC_SIGNATURE_SizeX); 112 writel(height, dst + AST_HWC_SIGNATURE_SizeY); 113 writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTX); 114 writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTY); 115 } 116 117 static void ast_set_cursor_base(struct ast_device *ast, u64 address) 118 { 119 u8 addr0 = (address >> 3) & 0xff; 120 u8 addr1 = (address >> 11) & 0xff; 121 u8 addr2 = (address >> 19) & 0xff; 122 123 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc8, addr0); 124 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc9, addr1); 125 ast_set_index_reg(ast, AST_IO_VGACRI, 0xca, addr2); 126 } 127 128 static void ast_set_cursor_location(struct ast_device *ast, u16 x, u16 y, 129 u8 x_offset, u8 y_offset) 130 { 131 u8 x0 = (x & 0x00ff); 132 u8 x1 = (x & 0x0f00) >> 8; 133 u8 y0 = (y & 0x00ff); 134 u8 y1 = (y & 0x0700) >> 8; 135 136 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc2, x_offset); 137 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc3, y_offset); 138 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc4, x0); 139 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc5, x1); 140 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc6, y0); 141 ast_set_index_reg(ast, AST_IO_VGACRI, 0xc7, y1); 142 } 143 144 static void ast_set_cursor_enabled(struct ast_device *ast, bool enabled) 145 { 146 static const u8 mask = (u8)~(AST_IO_VGACRCB_HWC_16BPP | 147 AST_IO_VGACRCB_HWC_ENABLED); 148 149 u8 vgacrcb = AST_IO_VGACRCB_HWC_16BPP; 150 151 if (enabled) 152 vgacrcb |= AST_IO_VGACRCB_HWC_ENABLED; 153 154 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xcb, mask, vgacrcb); 155 } 156 157 /* 158 * Cursor plane 159 */ 160 161 static const uint32_t ast_cursor_plane_formats[] = { 162 DRM_FORMAT_ARGB4444, 163 DRM_FORMAT_ARGB8888, 164 }; 165 166 static int ast_cursor_plane_helper_atomic_check(struct drm_plane *plane, 167 struct drm_atomic_state *state) 168 { 169 struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane); 170 struct drm_framebuffer *new_fb = new_plane_state->fb; 171 struct drm_crtc_state *new_crtc_state = NULL; 172 int ret; 173 174 if (new_plane_state->crtc) 175 new_crtc_state = drm_atomic_get_new_crtc_state(state, new_plane_state->crtc); 176 177 ret = drm_atomic_helper_check_plane_state(new_plane_state, new_crtc_state, 178 DRM_PLANE_NO_SCALING, 179 DRM_PLANE_NO_SCALING, 180 true, true); 181 if (ret || !new_plane_state->visible) 182 return ret; 183 184 if (new_fb->width > AST_MAX_HWC_WIDTH || new_fb->height > AST_MAX_HWC_HEIGHT) 185 return -EINVAL; 186 187 return 0; 188 } 189 190 static const u8 *ast_cursor_plane_get_argb4444(struct ast_cursor_plane *ast_cursor_plane, 191 struct drm_shadow_plane_state *shadow_plane_state, 192 const struct drm_rect *clip) 193 { 194 struct drm_plane_state *plane_state = &shadow_plane_state->base; 195 struct drm_framebuffer *fb = plane_state->fb; 196 u8 *argb4444 = NULL; 197 198 if (drm_gem_fb_begin_cpu_access(fb, DMA_FROM_DEVICE) == 0) { 199 switch (fb->format->format) { 200 case DRM_FORMAT_ARGB4444: 201 if (shadow_plane_state->data[0].is_iomem) { 202 struct iosys_map argb4444_dst[DRM_FORMAT_MAX_PLANES] = { 203 IOSYS_MAP_INIT_VADDR(ast_cursor_plane->argb4444), 204 }; 205 unsigned int argb4444_dst_pitch[DRM_FORMAT_MAX_PLANES] = { 206 AST_HWC_PITCH, 207 }; 208 209 drm_fb_memcpy(argb4444_dst, argb4444_dst_pitch, 210 shadow_plane_state->data, fb, clip); 211 argb4444 = argb4444_dst[0].vaddr; 212 } else { 213 argb4444 = shadow_plane_state->data[0].vaddr; 214 } 215 break; 216 case DRM_FORMAT_ARGB8888: 217 { 218 struct iosys_map argb4444_dst[DRM_FORMAT_MAX_PLANES] = { 219 IOSYS_MAP_INIT_VADDR(ast_cursor_plane->argb4444), 220 }; 221 unsigned int argb4444_dst_pitch[DRM_FORMAT_MAX_PLANES] = { 222 AST_HWC_PITCH, 223 }; 224 225 drm_fb_argb8888_to_argb4444(argb4444_dst, argb4444_dst_pitch, 226 shadow_plane_state->data, fb, clip, 227 &shadow_plane_state->fmtcnv_state); 228 argb4444 = argb4444_dst[0].vaddr; 229 } 230 break; 231 } 232 233 drm_gem_fb_end_cpu_access(fb, DMA_FROM_DEVICE); 234 } else { 235 /* 236 * Fall back to white square if GEM object is not ready. Gives 237 * the user an indication where the cursor is located. 238 */ 239 memset(ast_cursor_plane->argb4444, 0xff, sizeof(ast_cursor_plane->argb4444)); 240 argb4444 = ast_cursor_plane->argb4444; 241 } 242 243 return argb4444; 244 } 245 246 static void ast_cursor_plane_helper_atomic_update(struct drm_plane *plane, 247 struct drm_atomic_state *state) 248 { 249 struct ast_cursor_plane *ast_cursor_plane = to_ast_cursor_plane(plane); 250 struct ast_plane *ast_plane = to_ast_plane(plane); 251 struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane); 252 struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state); 253 struct drm_framebuffer *fb = plane_state->fb; 254 struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane); 255 struct ast_device *ast = to_ast_device(plane->dev); 256 struct drm_rect damage; 257 u64 dst_off = ast_plane->offset; 258 u8 __iomem *dst = ast_plane_vaddr(ast_plane); /* TODO: Use mapping abstraction properly */ 259 u8 __iomem *sig = dst + AST_HWC_SIZE; /* TODO: Use mapping abstraction properly */ 260 unsigned int offset_x, offset_y; 261 u16 x, y; 262 u8 x_offset, y_offset; 263 264 /* 265 * Do data transfer to hardware buffer and point the scanout 266 * engine to the offset. 267 */ 268 269 if (drm_atomic_helper_damage_merged(old_plane_state, plane_state, &damage)) { 270 const u8 *argb4444 = ast_cursor_plane_get_argb4444(ast_cursor_plane, 271 shadow_plane_state, 272 &damage); 273 274 if (argb4444) 275 ast_set_cursor_image(ast, argb4444, fb->width, fb->height); 276 277 ast_set_cursor_base(ast, dst_off); 278 } 279 280 /* 281 * Update location in HWC signature and registers. 282 */ 283 284 writel(plane_state->crtc_x, sig + AST_HWC_SIGNATURE_X); 285 writel(plane_state->crtc_y, sig + AST_HWC_SIGNATURE_Y); 286 287 offset_x = AST_MAX_HWC_WIDTH - fb->width; 288 offset_y = AST_MAX_HWC_HEIGHT - fb->height; 289 290 if (plane_state->crtc_x < 0) { 291 x_offset = (-plane_state->crtc_x) + offset_x; 292 x = 0; 293 } else { 294 x_offset = offset_x; 295 x = plane_state->crtc_x; 296 } 297 if (plane_state->crtc_y < 0) { 298 y_offset = (-plane_state->crtc_y) + offset_y; 299 y = 0; 300 } else { 301 y_offset = offset_y; 302 y = plane_state->crtc_y; 303 } 304 305 ast_set_cursor_location(ast, x, y, x_offset, y_offset); 306 307 /* Dummy write to enable HWC and make the HW pick-up the changes. */ 308 ast_set_cursor_enabled(ast, true); 309 } 310 311 static void ast_cursor_plane_helper_atomic_disable(struct drm_plane *plane, 312 struct drm_atomic_state *state) 313 { 314 struct ast_device *ast = to_ast_device(plane->dev); 315 316 ast_set_cursor_enabled(ast, false); 317 } 318 319 static const struct drm_plane_helper_funcs ast_cursor_plane_helper_funcs = { 320 DRM_GEM_SHADOW_PLANE_HELPER_FUNCS, 321 .atomic_check = ast_cursor_plane_helper_atomic_check, 322 .atomic_update = ast_cursor_plane_helper_atomic_update, 323 .atomic_disable = ast_cursor_plane_helper_atomic_disable, 324 }; 325 326 static const struct drm_plane_funcs ast_cursor_plane_funcs = { 327 .update_plane = drm_atomic_helper_update_plane, 328 .disable_plane = drm_atomic_helper_disable_plane, 329 .destroy = drm_plane_cleanup, 330 DRM_GEM_SHADOW_PLANE_FUNCS, 331 }; 332 333 int ast_cursor_plane_init(struct ast_device *ast) 334 { 335 struct drm_device *dev = &ast->base; 336 struct ast_cursor_plane *ast_cursor_plane = &ast->cursor_plane; 337 struct ast_plane *ast_plane = &ast_cursor_plane->base; 338 struct drm_plane *cursor_plane = &ast_plane->base; 339 unsigned long size; 340 long offset; 341 int ret; 342 343 size = ast_cursor_vram_size(); 344 offset = ast_cursor_vram_offset(ast); 345 if (offset < 0) 346 return offset; 347 348 ret = ast_plane_init(dev, ast_plane, offset, size, 349 0x01, &ast_cursor_plane_funcs, 350 ast_cursor_plane_formats, ARRAY_SIZE(ast_cursor_plane_formats), 351 NULL, DRM_PLANE_TYPE_CURSOR); 352 if (ret) { 353 drm_err(dev, "ast_plane_init() failed: %d\n", ret); 354 return ret; 355 } 356 drm_plane_helper_add(cursor_plane, &ast_cursor_plane_helper_funcs); 357 drm_plane_enable_fb_damage_clips(cursor_plane); 358 359 return 0; 360 } 361