1 /* 2 * ARM HDLCD Controller register definition 3 */ 4 5 #ifndef __HDLCD_DRV_H__ 6 #define __HDLCD_DRV_H__ 7 8 struct hdlcd_drm_private { 9 void __iomem *mmio; 10 struct clk *clk; 11 struct drm_fbdev_cma *fbdev; 12 struct drm_crtc crtc; 13 struct drm_plane *plane; 14 struct drm_atomic_state *state; 15 #ifdef CONFIG_DEBUG_FS 16 atomic_t buffer_underrun_count; 17 atomic_t bus_error_count; 18 atomic_t vsync_count; 19 atomic_t dma_end_count; 20 #endif 21 }; 22 23 #define crtc_to_hdlcd_priv(x) container_of(x, struct hdlcd_drm_private, crtc) 24 25 static inline void hdlcd_write(struct hdlcd_drm_private *hdlcd, 26 unsigned int reg, u32 value) 27 { 28 writel(value, hdlcd->mmio + reg); 29 } 30 31 static inline u32 hdlcd_read(struct hdlcd_drm_private *hdlcd, unsigned int reg) 32 { 33 return readl(hdlcd->mmio + reg); 34 } 35 36 int hdlcd_setup_crtc(struct drm_device *dev); 37 void hdlcd_set_scanout(struct hdlcd_drm_private *hdlcd); 38 39 #endif /* __HDLCD_DRV_H__ */ 40