1ffdab7f4SYiPeng Chai /* SPDX-License-Identifier: MIT */ 2ffdab7f4SYiPeng Chai /* 3ffdab7f4SYiPeng Chai * Copyright 2025 Advanced Micro Devices, Inc. 4ffdab7f4SYiPeng Chai * 5ffdab7f4SYiPeng Chai * Permission is hereby granted, free of charge, to any person obtaining a 6ffdab7f4SYiPeng Chai * copy of this software and associated documentation files (the "Software"), 7ffdab7f4SYiPeng Chai * to deal in the Software without restriction, including without limitation 8ffdab7f4SYiPeng Chai * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9ffdab7f4SYiPeng Chai * and/or sell copies of the Software, and to permit persons to whom the 10ffdab7f4SYiPeng Chai * Software is furnished to do so, subject to the following conditions: 11ffdab7f4SYiPeng Chai * 12ffdab7f4SYiPeng Chai * The above copyright notice and this permission notice shall be included in 13ffdab7f4SYiPeng Chai * all copies or substantial portions of the Software. 14ffdab7f4SYiPeng Chai * 15ffdab7f4SYiPeng Chai * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16ffdab7f4SYiPeng Chai * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17ffdab7f4SYiPeng Chai * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18ffdab7f4SYiPeng Chai * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19ffdab7f4SYiPeng Chai * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20ffdab7f4SYiPeng Chai * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21ffdab7f4SYiPeng Chai * OTHER DEALINGS IN THE SOFTWARE. 22ffdab7f4SYiPeng Chai * 23ffdab7f4SYiPeng Chai */ 24ffdab7f4SYiPeng Chai 25ffdab7f4SYiPeng Chai #ifndef __RAS_SYS_H__ 26ffdab7f4SYiPeng Chai #define __RAS_SYS_H__ 27ffdab7f4SYiPeng Chai #include <linux/stdarg.h> 28ffdab7f4SYiPeng Chai #include <linux/printk.h> 29ffdab7f4SYiPeng Chai #include <linux/dev_printk.h> 30*ace232efSYiPeng Chai #include <linux/mempool.h> 31ffdab7f4SYiPeng Chai #include "amdgpu.h" 32ffdab7f4SYiPeng Chai 33ffdab7f4SYiPeng Chai #define RAS_DEV_ERR(device, fmt, ...) \ 34ffdab7f4SYiPeng Chai do { \ 35ffdab7f4SYiPeng Chai if (device) \ 36ffdab7f4SYiPeng Chai dev_err(((struct amdgpu_device *)device)->dev, fmt, ##__VA_ARGS__); \ 37ffdab7f4SYiPeng Chai else \ 38ffdab7f4SYiPeng Chai printk(KERN_ERR fmt, ##__VA_ARGS__); \ 39ffdab7f4SYiPeng Chai } while (0) 40ffdab7f4SYiPeng Chai 41ffdab7f4SYiPeng Chai #define RAS_DEV_WARN(device, fmt, ...) \ 42ffdab7f4SYiPeng Chai do { \ 43ffdab7f4SYiPeng Chai if (device) \ 44ffdab7f4SYiPeng Chai dev_warn(((struct amdgpu_device *)device)->dev, fmt, ##__VA_ARGS__); \ 45ffdab7f4SYiPeng Chai else \ 46ffdab7f4SYiPeng Chai printk(KERN_WARNING fmt, ##__VA_ARGS__); \ 47ffdab7f4SYiPeng Chai } while (0) 48ffdab7f4SYiPeng Chai 49ffdab7f4SYiPeng Chai #define RAS_DEV_INFO(device, fmt, ...) \ 50ffdab7f4SYiPeng Chai do { \ 51ffdab7f4SYiPeng Chai if (device) \ 52ffdab7f4SYiPeng Chai dev_info(((struct amdgpu_device *)device)->dev, fmt, ##__VA_ARGS__); \ 53ffdab7f4SYiPeng Chai else \ 54ffdab7f4SYiPeng Chai printk(KERN_INFO fmt, ##__VA_ARGS__); \ 55ffdab7f4SYiPeng Chai } while (0) 56ffdab7f4SYiPeng Chai 57ffdab7f4SYiPeng Chai #define RAS_DEV_DBG(device, fmt, ...) \ 58ffdab7f4SYiPeng Chai do { \ 59ffdab7f4SYiPeng Chai if (device) \ 60ffdab7f4SYiPeng Chai dev_dbg(((struct amdgpu_device *)device)->dev, fmt, ##__VA_ARGS__); \ 61ffdab7f4SYiPeng Chai else \ 62ffdab7f4SYiPeng Chai printk(KERN_DEBUG fmt, ##__VA_ARGS__); \ 63ffdab7f4SYiPeng Chai } while (0) 64ffdab7f4SYiPeng Chai 65ffdab7f4SYiPeng Chai #define RAS_INFO(fmt, ...) printk(KERN_INFO fmt, ##__VA_ARGS__) 66ffdab7f4SYiPeng Chai 67ffdab7f4SYiPeng Chai #define RAS_DEV_RREG32_SOC15(dev, ip, inst, reg) \ 68ffdab7f4SYiPeng Chai ({ \ 69ffdab7f4SYiPeng Chai struct amdgpu_device *adev = (struct amdgpu_device *)dev; \ 70ffdab7f4SYiPeng Chai __RREG32_SOC15_RLC__(adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg, \ 71ffdab7f4SYiPeng Chai 0, ip##_HWIP, inst); \ 72ffdab7f4SYiPeng Chai }) 73ffdab7f4SYiPeng Chai 74ffdab7f4SYiPeng Chai #define RAS_DEV_WREG32_SOC15(dev, ip, inst, reg, value) \ 75ffdab7f4SYiPeng Chai ({ \ 76ffdab7f4SYiPeng Chai struct amdgpu_device *adev = (struct amdgpu_device *)dev; \ 77ffdab7f4SYiPeng Chai __WREG32_SOC15_RLC__((adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg), \ 78ffdab7f4SYiPeng Chai value, 0, ip##_HWIP, inst); \ 79ffdab7f4SYiPeng Chai }) 80ffdab7f4SYiPeng Chai 81ffdab7f4SYiPeng Chai /* GET_INST returns the physical instance corresponding to a logical instance */ 82ffdab7f4SYiPeng Chai #define RAS_GET_INST(dev, ip, inst) \ 83ffdab7f4SYiPeng Chai ({ \ 84ffdab7f4SYiPeng Chai struct amdgpu_device *adev = (struct amdgpu_device *)dev; \ 85ffdab7f4SYiPeng Chai adev->ip_map.logical_to_dev_inst ? \ 86ffdab7f4SYiPeng Chai adev->ip_map.logical_to_dev_inst(adev, ip##_HWIP, inst) : inst; \ 87ffdab7f4SYiPeng Chai }) 88ffdab7f4SYiPeng Chai 89ffdab7f4SYiPeng Chai #define RAS_GET_MASK(dev, ip, mask) \ 90ffdab7f4SYiPeng Chai ({ \ 91ffdab7f4SYiPeng Chai struct amdgpu_device *adev = (struct amdgpu_device *)dev; \ 92ffdab7f4SYiPeng Chai (adev->ip_map.logical_to_dev_mask ? \ 93ffdab7f4SYiPeng Chai adev->ip_map.logical_to_dev_mask(adev, ip##_HWIP, mask) : mask); \ 94ffdab7f4SYiPeng Chai }) 95ffdab7f4SYiPeng Chai 96ffdab7f4SYiPeng Chai static inline void *ras_radix_tree_delete_iter(struct radix_tree_root *root, void *iter) 97ffdab7f4SYiPeng Chai { 98ffdab7f4SYiPeng Chai return radix_tree_delete(root, ((struct radix_tree_iter *)iter)->index); 99ffdab7f4SYiPeng Chai } 100ffdab7f4SYiPeng Chai 101ffdab7f4SYiPeng Chai static inline long ras_wait_event_interruptible_timeout(void *wq_head, 102ffdab7f4SYiPeng Chai int (*condition)(void *param), void *param, unsigned int timeout) 103ffdab7f4SYiPeng Chai { 104ffdab7f4SYiPeng Chai return wait_event_interruptible_timeout(*(wait_queue_head_t *)wq_head, 105ffdab7f4SYiPeng Chai condition(param), timeout); 106ffdab7f4SYiPeng Chai } 107ffdab7f4SYiPeng Chai 108ffdab7f4SYiPeng Chai extern const struct ras_sys_func amdgpu_ras_sys_fn; 109ffdab7f4SYiPeng Chai 110ffdab7f4SYiPeng Chai #endif 111