xref: /linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/tonga_smumgr.h (revision a4eb44a6435d6d8f9e642407a4a06f65eb90ca04)
1 /*
2  * Copyright 2015 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  */
23 
24 #ifndef _TONGA_SMUMGR_H_
25 #define _TONGA_SMUMGR_H_
26 
27 #include "smu72_discrete.h"
28 #include "smu7_smumgr.h"
29 #include "smu72.h"
30 
31 
32 #define ASICID_IS_TONGA_P(wDID, bRID)	 \
33 	(((wDID == 0x6930) && ((bRID == 0xF0) || (bRID == 0xF1) || (bRID == 0xFF))) \
34 	|| ((wDID == 0x6920) && ((bRID == 0) || (bRID == 1))))
35 
36 struct tonga_pt_defaults {
37 	uint8_t   svi_load_line_en;
38 	uint8_t   svi_load_line_vddC;
39 	uint8_t   tdc_vddc_throttle_release_limit_perc;
40 	uint8_t   tdc_mawt;
41 	uint8_t   tdc_waterfall_ctl;
42 	uint8_t   dte_ambient_temp_base;
43 	uint32_t  display_cac;
44 	uint32_t  bapm_temp_gradient;
45 	uint16_t  bapmti_r[SMU72_DTE_ITERATIONS * SMU72_DTE_SOURCES * SMU72_DTE_SINKS];
46 	uint16_t  bapmti_rc[SMU72_DTE_ITERATIONS * SMU72_DTE_SOURCES * SMU72_DTE_SINKS];
47 };
48 
49 struct tonga_mc_reg_entry {
50 	uint32_t mclk_max;
51 	uint32_t mc_data[SMU72_DISCRETE_MC_REGISTER_ARRAY_SIZE];
52 };
53 
54 struct tonga_mc_reg_table {
55 	uint8_t   last;               /* number of registers*/
56 	uint8_t   num_entries;        /* number of entries in mc_reg_table_entry used*/
57 	uint16_t  validflag;          /* indicate the corresponding register is valid or not. 1: valid, 0: invalid. bit0->address[0], bit1->address[1], etc.*/
58 	struct tonga_mc_reg_entry    mc_reg_table_entry[MAX_AC_TIMING_ENTRIES];
59 	SMU72_Discrete_MCRegisterAddress mc_reg_address[SMU72_DISCRETE_MC_REGISTER_ARRAY_SIZE];
60 };
61 
62 
63 struct tonga_smumgr {
64 
65 	struct smu7_smumgr                   smu7_data;
66 	struct SMU72_Discrete_DpmTable       smc_state_table;
67 	struct SMU72_Discrete_Ulv            ulv_setting;
68 	struct SMU72_Discrete_PmFuses  power_tune_table;
69 	const struct tonga_pt_defaults  *power_tune_defaults;
70 	SMU72_Discrete_MCRegisters      mc_regs;
71 	struct tonga_mc_reg_table mc_reg_table;
72 };
73 
74 #endif
75