xref: /linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/hwmgr_ppt.h (revision 4fd18fc38757217c746aa063ba9e4729814dc737)
1 /*
2  * Copyright 2015 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  */
23 
24 #ifndef PP_HWMGR_PPT_H
25 #define PP_HWMGR_PPT_H
26 
27 #include "hardwaremanager.h"
28 #include "smumgr.h"
29 #include "atom-types.h"
30 
31 struct phm_ppt_v1_clock_voltage_dependency_record {
32 	uint32_t clk;
33 	uint8_t  vddInd;
34 	uint8_t  vddciInd;
35 	uint8_t  mvddInd;
36 	uint16_t vdd_offset;
37 	uint16_t vddc;
38 	uint16_t vddgfx;
39 	uint16_t vddci;
40 	uint16_t mvdd;
41 	uint8_t  phases;
42 	uint8_t  cks_enable;
43 	uint8_t  cks_voffset;
44 	uint32_t sclk_offset;
45 };
46 
47 typedef struct phm_ppt_v1_clock_voltage_dependency_record phm_ppt_v1_clock_voltage_dependency_record;
48 
49 struct phm_ppt_v1_clock_voltage_dependency_table {
50 	uint32_t count;                                            /* Number of entries. */
51 	phm_ppt_v1_clock_voltage_dependency_record entries[];	   /* Dynamically allocate count entries. */
52 };
53 
54 typedef struct phm_ppt_v1_clock_voltage_dependency_table phm_ppt_v1_clock_voltage_dependency_table;
55 
56 
57 /* Multimedia Clock Voltage Dependency records and table */
58 struct phm_ppt_v1_mm_clock_voltage_dependency_record {
59 	uint32_t  dclk;                                              /* UVD D-clock */
60 	uint32_t  vclk;                                              /* UVD V-clock */
61 	uint32_t  eclk;                                              /* VCE clock */
62 	uint32_t  aclk;                                              /* ACP clock */
63 	uint32_t  samclock;                                          /* SAMU clock */
64 	uint8_t	vddcInd;
65 	uint16_t vddgfx_offset;
66 	uint16_t vddc;
67 	uint16_t vddgfx;
68 	uint8_t phases;
69 };
70 typedef struct phm_ppt_v1_mm_clock_voltage_dependency_record phm_ppt_v1_mm_clock_voltage_dependency_record;
71 
72 struct phm_ppt_v1_mm_clock_voltage_dependency_table {
73 	uint32_t count;													/* Number of entries. */
74 	phm_ppt_v1_mm_clock_voltage_dependency_record entries[];		/* Dynamically allocate count entries. */
75 };
76 typedef struct phm_ppt_v1_mm_clock_voltage_dependency_table phm_ppt_v1_mm_clock_voltage_dependency_table;
77 
78 struct phm_ppt_v1_voltage_lookup_record {
79 	uint16_t us_calculated;
80 	uint16_t us_vdd;												/* Base voltage */
81 	uint16_t us_cac_low;
82 	uint16_t us_cac_mid;
83 	uint16_t us_cac_high;
84 };
85 typedef struct phm_ppt_v1_voltage_lookup_record phm_ppt_v1_voltage_lookup_record;
86 
87 struct phm_ppt_v1_voltage_lookup_table {
88 	uint32_t count;
89 	phm_ppt_v1_voltage_lookup_record entries[];    /* Dynamically allocate count entries. */
90 };
91 typedef struct phm_ppt_v1_voltage_lookup_table phm_ppt_v1_voltage_lookup_table;
92 
93 /* PCIE records and Table */
94 
95 struct phm_ppt_v1_pcie_record {
96 	uint8_t gen_speed;
97 	uint8_t lane_width;
98 	uint16_t usreserved;
99 	uint16_t reserved;
100 	uint32_t pcie_sclk;
101 };
102 typedef struct phm_ppt_v1_pcie_record phm_ppt_v1_pcie_record;
103 
104 struct phm_ppt_v1_pcie_table {
105 	uint32_t count;                                            /* Number of entries. */
106 	phm_ppt_v1_pcie_record entries[];			   /* Dynamically allocate count entries. */
107 };
108 typedef struct phm_ppt_v1_pcie_table phm_ppt_v1_pcie_table;
109 
110 struct phm_ppt_v1_gpio_table {
111 	uint8_t vrhot_triggered_sclk_dpm_index;           /* SCLK DPM level index to switch to when VRHot is triggered */
112 };
113 typedef struct phm_ppt_v1_gpio_table phm_ppt_v1_gpio_table;
114 
115 #endif
116 
117