18e9198d0SAlex Deucher /* 28e9198d0SAlex Deucher * Copyright 2013 Advanced Micro Devices, Inc. 38e9198d0SAlex Deucher * 48e9198d0SAlex Deucher * Permission is hereby granted, free of charge, to any person obtaining a 58e9198d0SAlex Deucher * copy of this software and associated documentation files (the "Software"), 68e9198d0SAlex Deucher * to deal in the Software without restriction, including without limitation 78e9198d0SAlex Deucher * the rights to use, copy, modify, merge, publish, distribute, sublicense, 88e9198d0SAlex Deucher * and/or sell copies of the Software, and to permit persons to whom the 98e9198d0SAlex Deucher * Software is furnished to do so, subject to the following conditions: 108e9198d0SAlex Deucher * 118e9198d0SAlex Deucher * The above copyright notice and this permission notice shall be included in 128e9198d0SAlex Deucher * all copies or substantial portions of the Software. 138e9198d0SAlex Deucher * 148e9198d0SAlex Deucher * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 158e9198d0SAlex Deucher * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 168e9198d0SAlex Deucher * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 178e9198d0SAlex Deucher * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 188e9198d0SAlex Deucher * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 198e9198d0SAlex Deucher * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 208e9198d0SAlex Deucher * OTHER DEALINGS IN THE SOFTWARE. 218e9198d0SAlex Deucher */ 228e9198d0SAlex Deucher 238e9198d0SAlex Deucher #ifndef _PPTABLE_H 248e9198d0SAlex Deucher #define _PPTABLE_H 258e9198d0SAlex Deucher 268e9198d0SAlex Deucher #pragma pack(1) 278e9198d0SAlex Deucher 288e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_THERMALCONTROLLER 298e9198d0SAlex Deucher 308e9198d0SAlex Deucher { 318e9198d0SAlex Deucher UCHAR ucType; // one of ATOM_PP_THERMALCONTROLLER_* 328e9198d0SAlex Deucher UCHAR ucI2cLine; // as interpreted by DAL I2C 338e9198d0SAlex Deucher UCHAR ucI2cAddress; 348e9198d0SAlex Deucher UCHAR ucFanParameters; // Fan Control Parameters. 358e9198d0SAlex Deucher UCHAR ucFanMinRPM; // Fan Minimum RPM (hundreds) -- for display purposes only. 368e9198d0SAlex Deucher UCHAR ucFanMaxRPM; // Fan Maximum RPM (hundreds) -- for display purposes only. 378e9198d0SAlex Deucher UCHAR ucReserved; // ---- 388e9198d0SAlex Deucher UCHAR ucFlags; // to be defined 398e9198d0SAlex Deucher } ATOM_PPLIB_THERMALCONTROLLER; 408e9198d0SAlex Deucher 418e9198d0SAlex Deucher #define ATOM_PP_FANPARAMETERS_TACHOMETER_PULSES_PER_REVOLUTION_MASK 0x0f 428e9198d0SAlex Deucher #define ATOM_PP_FANPARAMETERS_NOFAN 0x80 // No fan is connected to this controller. 438e9198d0SAlex Deucher 448e9198d0SAlex Deucher #define ATOM_PP_THERMALCONTROLLER_NONE 0 458e9198d0SAlex Deucher #define ATOM_PP_THERMALCONTROLLER_LM63 1 // Not used by PPLib 468e9198d0SAlex Deucher #define ATOM_PP_THERMALCONTROLLER_ADM1032 2 // Not used by PPLib 478e9198d0SAlex Deucher #define ATOM_PP_THERMALCONTROLLER_ADM1030 3 // Not used by PPLib 488e9198d0SAlex Deucher #define ATOM_PP_THERMALCONTROLLER_MUA6649 4 // Not used by PPLib 498e9198d0SAlex Deucher #define ATOM_PP_THERMALCONTROLLER_LM64 5 508e9198d0SAlex Deucher #define ATOM_PP_THERMALCONTROLLER_F75375 6 // Not used by PPLib 518e9198d0SAlex Deucher #define ATOM_PP_THERMALCONTROLLER_RV6xx 7 528e9198d0SAlex Deucher #define ATOM_PP_THERMALCONTROLLER_RV770 8 538e9198d0SAlex Deucher #define ATOM_PP_THERMALCONTROLLER_ADT7473 9 548e9198d0SAlex Deucher #define ATOM_PP_THERMALCONTROLLER_KONG 10 558e9198d0SAlex Deucher #define ATOM_PP_THERMALCONTROLLER_EXTERNAL_GPIO 11 568e9198d0SAlex Deucher #define ATOM_PP_THERMALCONTROLLER_EVERGREEN 12 578e9198d0SAlex Deucher #define ATOM_PP_THERMALCONTROLLER_EMC2103 13 /* 0x0D */ // Only fan control will be implemented, do NOT show this in PPGen. 588e9198d0SAlex Deucher #define ATOM_PP_THERMALCONTROLLER_SUMO 14 /* 0x0E */ // Sumo type, used internally 598e9198d0SAlex Deucher #define ATOM_PP_THERMALCONTROLLER_NISLANDS 15 608e9198d0SAlex Deucher #define ATOM_PP_THERMALCONTROLLER_SISLANDS 16 618e9198d0SAlex Deucher #define ATOM_PP_THERMALCONTROLLER_LM96163 17 628e9198d0SAlex Deucher #define ATOM_PP_THERMALCONTROLLER_CISLANDS 18 638e9198d0SAlex Deucher #define ATOM_PP_THERMALCONTROLLER_KAVERI 19 64f4afe799SRex Zhu #define ATOM_PP_THERMALCONTROLLER_ICELAND 20 65f4afe799SRex Zhu #define ATOM_PP_THERMALCONTROLLER_TONGA 21 66f4afe799SRex Zhu #define ATOM_PP_THERMALCONTROLLER_FIJI 22 67f4afe799SRex Zhu #define ATOM_PP_THERMALCONTROLLER_POLARIS10 23 68f4afe799SRex Zhu #define ATOM_PP_THERMALCONTROLLER_VEGA10 24 698e9198d0SAlex Deucher 708e9198d0SAlex Deucher 718e9198d0SAlex Deucher // Thermal controller 'combo type' to use an external controller for Fan control and an internal controller for thermal. 728e9198d0SAlex Deucher // We probably should reserve the bit 0x80 for this use. 738e9198d0SAlex Deucher // To keep the number of these types low we should also use the same code for all ASICs (i.e. do not distinguish RV6xx and RV7xx Internal here). 748e9198d0SAlex Deucher // The driver can pick the correct internal controller based on the ASIC. 758e9198d0SAlex Deucher #define ATOM_PP_THERMALCONTROLLER_ADT7473_WITH_INTERNAL 0x89 // ADT7473 Fan Control + Internal Thermal Controller 768e9198d0SAlex Deucher #define ATOM_PP_THERMALCONTROLLER_EMC2103_WITH_INTERNAL 0x8D // EMC2103 Fan Control + Internal Thermal Controller 778e9198d0SAlex Deucher 788e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_STATE 798e9198d0SAlex Deucher { 808e9198d0SAlex Deucher UCHAR ucNonClockStateIndex; 81760efbcaSMario Limonciello UCHAR ucClockStateIndices[]; // variable-sized 828e9198d0SAlex Deucher } ATOM_PPLIB_STATE; 838e9198d0SAlex Deucher 848e9198d0SAlex Deucher 858e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_FANTABLE 868e9198d0SAlex Deucher { 878e9198d0SAlex Deucher UCHAR ucFanTableFormat; // Change this if the table format changes or version changes so that the other fields are not the same. 888e9198d0SAlex Deucher UCHAR ucTHyst; // Temperature hysteresis. Integer. 898e9198d0SAlex Deucher USHORT usTMin; // The temperature, in 0.01 centigrades, below which we just run at a minimal PWM. 908e9198d0SAlex Deucher USHORT usTMed; // The middle temperature where we change slopes. 918e9198d0SAlex Deucher USHORT usTHigh; // The high point above TMed for adjusting the second slope. 928e9198d0SAlex Deucher USHORT usPWMMin; // The minimum PWM value in percent (0.01% increments). 938e9198d0SAlex Deucher USHORT usPWMMed; // The PWM value (in percent) at TMed. 948e9198d0SAlex Deucher USHORT usPWMHigh; // The PWM value at THigh. 958e9198d0SAlex Deucher } ATOM_PPLIB_FANTABLE; 968e9198d0SAlex Deucher 978e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_FANTABLE2 988e9198d0SAlex Deucher { 998e9198d0SAlex Deucher ATOM_PPLIB_FANTABLE basicTable; 1008e9198d0SAlex Deucher USHORT usTMax; // The max temperature 1018e9198d0SAlex Deucher } ATOM_PPLIB_FANTABLE2; 1028e9198d0SAlex Deucher 1038e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_FANTABLE3 1048e9198d0SAlex Deucher { 1058e9198d0SAlex Deucher ATOM_PPLIB_FANTABLE2 basicTable2; 1068e9198d0SAlex Deucher UCHAR ucFanControlMode; 1078e9198d0SAlex Deucher USHORT usFanPWMMax; 1088e9198d0SAlex Deucher USHORT usFanOutputSensitivity; 1098e9198d0SAlex Deucher } ATOM_PPLIB_FANTABLE3; 1108e9198d0SAlex Deucher 111f4afe799SRex Zhu typedef struct _ATOM_PPLIB_FANTABLE4 112f4afe799SRex Zhu { 113f4afe799SRex Zhu ATOM_PPLIB_FANTABLE3 basicTable3; 114f4afe799SRex Zhu USHORT usFanRPMMax; 115f4afe799SRex Zhu } ATOM_PPLIB_FANTABLE4; 116f4afe799SRex Zhu 117f4afe799SRex Zhu typedef struct _ATOM_PPLIB_FANTABLE5 118f4afe799SRex Zhu { 119f4afe799SRex Zhu ATOM_PPLIB_FANTABLE4 basicTable4; 120f4afe799SRex Zhu USHORT usFanCurrentLow; 121f4afe799SRex Zhu USHORT usFanCurrentHigh; 122f4afe799SRex Zhu USHORT usFanRPMLow; 123f4afe799SRex Zhu USHORT usFanRPMHigh; 124f4afe799SRex Zhu } ATOM_PPLIB_FANTABLE5; 125f4afe799SRex Zhu 1268e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_EXTENDEDHEADER 1278e9198d0SAlex Deucher { 1288e9198d0SAlex Deucher USHORT usSize; 1298e9198d0SAlex Deucher ULONG ulMaxEngineClock; // For Overdrive. 1308e9198d0SAlex Deucher ULONG ulMaxMemoryClock; // For Overdrive. 1318e9198d0SAlex Deucher // Add extra system parameters here, always adjust size to include all fields. 1328e9198d0SAlex Deucher USHORT usVCETableOffset; //points to ATOM_PPLIB_VCE_Table 1338e9198d0SAlex Deucher USHORT usUVDTableOffset; //points to ATOM_PPLIB_UVD_Table 1348e9198d0SAlex Deucher USHORT usSAMUTableOffset; //points to ATOM_PPLIB_SAMU_Table 1358e9198d0SAlex Deucher USHORT usPPMTableOffset; //points to ATOM_PPLIB_PPM_Table 1368e9198d0SAlex Deucher USHORT usACPTableOffset; //points to ATOM_PPLIB_ACP_Table 1378e9198d0SAlex Deucher /* points to ATOM_PPLIB_POWERTUNE_Table */ 1388e9198d0SAlex Deucher USHORT usPowerTuneTableOffset; 1398e9198d0SAlex Deucher /* points to ATOM_PPLIB_CLOCK_Voltage_Dependency_Table for sclkVddgfxTable */ 1408e9198d0SAlex Deucher USHORT usSclkVddgfxTableOffset; 141f4afe799SRex Zhu USHORT usVQBudgetingTableOffset; /* points to the vqBudgetingTable; */ 1428e9198d0SAlex Deucher } ATOM_PPLIB_EXTENDEDHEADER; 1438e9198d0SAlex Deucher 1448e9198d0SAlex Deucher //// ATOM_PPLIB_POWERPLAYTABLE::ulPlatformCaps 1458e9198d0SAlex Deucher #define ATOM_PP_PLATFORM_CAP_BACKBIAS 1 1468e9198d0SAlex Deucher #define ATOM_PP_PLATFORM_CAP_POWERPLAY 2 1478e9198d0SAlex Deucher #define ATOM_PP_PLATFORM_CAP_SBIOSPOWERSOURCE 4 1488e9198d0SAlex Deucher #define ATOM_PP_PLATFORM_CAP_ASPM_L0s 8 1498e9198d0SAlex Deucher #define ATOM_PP_PLATFORM_CAP_ASPM_L1 16 1508e9198d0SAlex Deucher #define ATOM_PP_PLATFORM_CAP_HARDWAREDC 32 1518e9198d0SAlex Deucher #define ATOM_PP_PLATFORM_CAP_GEMINIPRIMARY 64 1528e9198d0SAlex Deucher #define ATOM_PP_PLATFORM_CAP_STEPVDDC 128 1538e9198d0SAlex Deucher #define ATOM_PP_PLATFORM_CAP_VOLTAGECONTROL 256 1548e9198d0SAlex Deucher #define ATOM_PP_PLATFORM_CAP_SIDEPORTCONTROL 512 1558e9198d0SAlex Deucher #define ATOM_PP_PLATFORM_CAP_TURNOFFPLL_ASPML1 1024 1568e9198d0SAlex Deucher #define ATOM_PP_PLATFORM_CAP_HTLINKCONTROL 2048 1578e9198d0SAlex Deucher #define ATOM_PP_PLATFORM_CAP_MVDDCONTROL 4096 1588e9198d0SAlex Deucher #define ATOM_PP_PLATFORM_CAP_GOTO_BOOT_ON_ALERT 0x2000 // Go to boot state on alerts, e.g. on an AC->DC transition. 1598e9198d0SAlex Deucher #define ATOM_PP_PLATFORM_CAP_DONT_WAIT_FOR_VBLANK_ON_ALERT 0x4000 // Do NOT wait for VBLANK during an alert (e.g. AC->DC transition). 1608e9198d0SAlex Deucher #define ATOM_PP_PLATFORM_CAP_VDDCI_CONTROL 0x8000 // Does the driver control VDDCI independently from VDDC. 1618e9198d0SAlex Deucher #define ATOM_PP_PLATFORM_CAP_REGULATOR_HOT 0x00010000 // Enable the 'regulator hot' feature. 1628e9198d0SAlex Deucher #define ATOM_PP_PLATFORM_CAP_BACO 0x00020000 // Does the driver supports BACO state. 1638e9198d0SAlex Deucher #define ATOM_PP_PLATFORM_CAP_NEW_CAC_VOLTAGE 0x00040000 // Does the driver supports new CAC voltage table. 1648e9198d0SAlex Deucher #define ATOM_PP_PLATFORM_CAP_REVERT_GPIO5_POLARITY 0x00080000 // Does the driver supports revert GPIO5 polarity. 1658e9198d0SAlex Deucher #define ATOM_PP_PLATFORM_CAP_OUTPUT_THERMAL2GPIO17 0x00100000 // Does the driver supports thermal2GPIO17. 1668e9198d0SAlex Deucher #define ATOM_PP_PLATFORM_CAP_VRHOT_GPIO_CONFIGURABLE 0x00200000 // Does the driver supports VR HOT GPIO Configurable. 1678e9198d0SAlex Deucher #define ATOM_PP_PLATFORM_CAP_TEMP_INVERSION 0x00400000 // Does the driver supports Temp Inversion feature. 1688e9198d0SAlex Deucher #define ATOM_PP_PLATFORM_CAP_EVV 0x00800000 169fa9f1d4eSJammy Zhou #define ATOM_PP_PLATFORM_COMBINE_PCC_WITH_THERMAL_SIGNAL 0x01000000 170fa9f1d4eSJammy Zhou #define ATOM_PP_PLATFORM_LOAD_POST_PRODUCTION_FIRMWARE 0x02000000 171fa9f1d4eSJammy Zhou #define ATOM_PP_PLATFORM_CAP_DISABLE_USING_ACTUAL_TEMPERATURE_FOR_POWER_CALC 0x04000000 172f4afe799SRex Zhu #define ATOM_PP_PLATFORM_CAP_VRHOT_POLARITY_HIGH 0x08000000 1738e9198d0SAlex Deucher 1748e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_POWERPLAYTABLE 1758e9198d0SAlex Deucher { 1768e9198d0SAlex Deucher ATOM_COMMON_TABLE_HEADER sHeader; 1778e9198d0SAlex Deucher 1788e9198d0SAlex Deucher UCHAR ucDataRevision; 1798e9198d0SAlex Deucher 1808e9198d0SAlex Deucher UCHAR ucNumStates; 1818e9198d0SAlex Deucher UCHAR ucStateEntrySize; 1828e9198d0SAlex Deucher UCHAR ucClockInfoSize; 1838e9198d0SAlex Deucher UCHAR ucNonClockSize; 1848e9198d0SAlex Deucher 1858e9198d0SAlex Deucher // offset from start of this table to array of ucNumStates ATOM_PPLIB_STATE structures 1868e9198d0SAlex Deucher USHORT usStateArrayOffset; 1878e9198d0SAlex Deucher 1888e9198d0SAlex Deucher // offset from start of this table to array of ASIC-specific structures, 1898e9198d0SAlex Deucher // currently ATOM_PPLIB_CLOCK_INFO. 1908e9198d0SAlex Deucher USHORT usClockInfoArrayOffset; 1918e9198d0SAlex Deucher 1928e9198d0SAlex Deucher // offset from start of this table to array of ATOM_PPLIB_NONCLOCK_INFO 1938e9198d0SAlex Deucher USHORT usNonClockInfoArrayOffset; 1948e9198d0SAlex Deucher 1958e9198d0SAlex Deucher USHORT usBackbiasTime; // in microseconds 1968e9198d0SAlex Deucher USHORT usVoltageTime; // in microseconds 1978e9198d0SAlex Deucher USHORT usTableSize; //the size of this structure, or the extended structure 1988e9198d0SAlex Deucher 1998e9198d0SAlex Deucher ULONG ulPlatformCaps; // See ATOM_PPLIB_CAPS_* 2008e9198d0SAlex Deucher 2018e9198d0SAlex Deucher ATOM_PPLIB_THERMALCONTROLLER sThermalController; 2028e9198d0SAlex Deucher 2038e9198d0SAlex Deucher USHORT usBootClockInfoOffset; 2048e9198d0SAlex Deucher USHORT usBootNonClockInfoOffset; 2058e9198d0SAlex Deucher 2068e9198d0SAlex Deucher } ATOM_PPLIB_POWERPLAYTABLE; 2078e9198d0SAlex Deucher 2088e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_POWERPLAYTABLE2 2098e9198d0SAlex Deucher { 2108e9198d0SAlex Deucher ATOM_PPLIB_POWERPLAYTABLE basicTable; 2118e9198d0SAlex Deucher UCHAR ucNumCustomThermalPolicy; 2128e9198d0SAlex Deucher USHORT usCustomThermalPolicyArrayOffset; 2138e9198d0SAlex Deucher }ATOM_PPLIB_POWERPLAYTABLE2, *LPATOM_PPLIB_POWERPLAYTABLE2; 2148e9198d0SAlex Deucher 2158e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_POWERPLAYTABLE3 2168e9198d0SAlex Deucher { 2178e9198d0SAlex Deucher ATOM_PPLIB_POWERPLAYTABLE2 basicTable2; 2188e9198d0SAlex Deucher USHORT usFormatID; // To be used ONLY by PPGen. 2198e9198d0SAlex Deucher USHORT usFanTableOffset; 2208e9198d0SAlex Deucher USHORT usExtendendedHeaderOffset; 2218e9198d0SAlex Deucher } ATOM_PPLIB_POWERPLAYTABLE3, *LPATOM_PPLIB_POWERPLAYTABLE3; 2228e9198d0SAlex Deucher 2238e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_POWERPLAYTABLE4 2248e9198d0SAlex Deucher { 2258e9198d0SAlex Deucher ATOM_PPLIB_POWERPLAYTABLE3 basicTable3; 2268e9198d0SAlex Deucher ULONG ulGoldenPPID; // PPGen use only 2278e9198d0SAlex Deucher ULONG ulGoldenRevision; // PPGen use only 2288e9198d0SAlex Deucher USHORT usVddcDependencyOnSCLKOffset; 2298e9198d0SAlex Deucher USHORT usVddciDependencyOnMCLKOffset; 2308e9198d0SAlex Deucher USHORT usVddcDependencyOnMCLKOffset; 2318e9198d0SAlex Deucher USHORT usMaxClockVoltageOnDCOffset; 2328e9198d0SAlex Deucher USHORT usVddcPhaseShedLimitsTableOffset; // Points to ATOM_PPLIB_PhaseSheddingLimits_Table 2338e9198d0SAlex Deucher USHORT usMvddDependencyOnMCLKOffset; 2348e9198d0SAlex Deucher } ATOM_PPLIB_POWERPLAYTABLE4, *LPATOM_PPLIB_POWERPLAYTABLE4; 2358e9198d0SAlex Deucher 2368e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_POWERPLAYTABLE5 2378e9198d0SAlex Deucher { 2388e9198d0SAlex Deucher ATOM_PPLIB_POWERPLAYTABLE4 basicTable4; 2398e9198d0SAlex Deucher ULONG ulTDPLimit; 2408e9198d0SAlex Deucher ULONG ulNearTDPLimit; 2418e9198d0SAlex Deucher ULONG ulSQRampingThreshold; 2428e9198d0SAlex Deucher USHORT usCACLeakageTableOffset; // Points to ATOM_PPLIB_CAC_Leakage_Table 2438e9198d0SAlex Deucher ULONG ulCACLeakage; // The iLeakage for driver calculated CAC leakage table 2448e9198d0SAlex Deucher USHORT usTDPODLimit; 2458e9198d0SAlex Deucher USHORT usLoadLineSlope; // in milliOhms * 100 2468e9198d0SAlex Deucher } ATOM_PPLIB_POWERPLAYTABLE5, *LPATOM_PPLIB_POWERPLAYTABLE5; 2478e9198d0SAlex Deucher 2488e9198d0SAlex Deucher //// ATOM_PPLIB_NONCLOCK_INFO::usClassification 2498e9198d0SAlex Deucher #define ATOM_PPLIB_CLASSIFICATION_UI_MASK 0x0007 2508e9198d0SAlex Deucher #define ATOM_PPLIB_CLASSIFICATION_UI_SHIFT 0 2518e9198d0SAlex Deucher #define ATOM_PPLIB_CLASSIFICATION_UI_NONE 0 2528e9198d0SAlex Deucher #define ATOM_PPLIB_CLASSIFICATION_UI_BATTERY 1 2538e9198d0SAlex Deucher #define ATOM_PPLIB_CLASSIFICATION_UI_BALANCED 3 2548e9198d0SAlex Deucher #define ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE 5 2558e9198d0SAlex Deucher // 2, 4, 6, 7 are reserved 2568e9198d0SAlex Deucher 2578e9198d0SAlex Deucher #define ATOM_PPLIB_CLASSIFICATION_BOOT 0x0008 2588e9198d0SAlex Deucher #define ATOM_PPLIB_CLASSIFICATION_THERMAL 0x0010 2598e9198d0SAlex Deucher #define ATOM_PPLIB_CLASSIFICATION_LIMITEDPOWERSOURCE 0x0020 2608e9198d0SAlex Deucher #define ATOM_PPLIB_CLASSIFICATION_REST 0x0040 2618e9198d0SAlex Deucher #define ATOM_PPLIB_CLASSIFICATION_FORCED 0x0080 2628e9198d0SAlex Deucher #define ATOM_PPLIB_CLASSIFICATION_3DPERFORMANCE 0x0100 2638e9198d0SAlex Deucher #define ATOM_PPLIB_CLASSIFICATION_OVERDRIVETEMPLATE 0x0200 2648e9198d0SAlex Deucher #define ATOM_PPLIB_CLASSIFICATION_UVDSTATE 0x0400 2658e9198d0SAlex Deucher #define ATOM_PPLIB_CLASSIFICATION_3DLOW 0x0800 2668e9198d0SAlex Deucher #define ATOM_PPLIB_CLASSIFICATION_ACPI 0x1000 2678e9198d0SAlex Deucher #define ATOM_PPLIB_CLASSIFICATION_HD2STATE 0x2000 2688e9198d0SAlex Deucher #define ATOM_PPLIB_CLASSIFICATION_HDSTATE 0x4000 2698e9198d0SAlex Deucher #define ATOM_PPLIB_CLASSIFICATION_SDSTATE 0x8000 2708e9198d0SAlex Deucher 2718e9198d0SAlex Deucher //// ATOM_PPLIB_NONCLOCK_INFO::usClassification2 2728e9198d0SAlex Deucher #define ATOM_PPLIB_CLASSIFICATION2_LIMITEDPOWERSOURCE_2 0x0001 2738e9198d0SAlex Deucher #define ATOM_PPLIB_CLASSIFICATION2_ULV 0x0002 2748e9198d0SAlex Deucher #define ATOM_PPLIB_CLASSIFICATION2_MVC 0x0004 //Multi-View Codec (BD-3D) 2758e9198d0SAlex Deucher 2768e9198d0SAlex Deucher //// ATOM_PPLIB_NONCLOCK_INFO::ulCapsAndSettings 2778e9198d0SAlex Deucher #define ATOM_PPLIB_SINGLE_DISPLAY_ONLY 0x00000001 2788e9198d0SAlex Deucher #define ATOM_PPLIB_SUPPORTS_VIDEO_PLAYBACK 0x00000002 2798e9198d0SAlex Deucher 2808e9198d0SAlex Deucher // 0 is 2.5Gb/s, 1 is 5Gb/s 2818e9198d0SAlex Deucher #define ATOM_PPLIB_PCIE_LINK_SPEED_MASK 0x00000004 2828e9198d0SAlex Deucher #define ATOM_PPLIB_PCIE_LINK_SPEED_SHIFT 2 2838e9198d0SAlex Deucher 2848e9198d0SAlex Deucher // lanes - 1: 1, 2, 4, 8, 12, 16 permitted by PCIE spec 2858e9198d0SAlex Deucher #define ATOM_PPLIB_PCIE_LINK_WIDTH_MASK 0x000000F8 2868e9198d0SAlex Deucher #define ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT 3 2878e9198d0SAlex Deucher 2888e9198d0SAlex Deucher // lookup into reduced refresh-rate table 2898e9198d0SAlex Deucher #define ATOM_PPLIB_LIMITED_REFRESHRATE_VALUE_MASK 0x00000F00 2908e9198d0SAlex Deucher #define ATOM_PPLIB_LIMITED_REFRESHRATE_VALUE_SHIFT 8 2918e9198d0SAlex Deucher 2928e9198d0SAlex Deucher #define ATOM_PPLIB_LIMITED_REFRESHRATE_UNLIMITED 0 2938e9198d0SAlex Deucher #define ATOM_PPLIB_LIMITED_REFRESHRATE_50HZ 1 2948e9198d0SAlex Deucher // 2-15 TBD as needed. 2958e9198d0SAlex Deucher 2968e9198d0SAlex Deucher #define ATOM_PPLIB_SOFTWARE_DISABLE_LOADBALANCING 0x00001000 2978e9198d0SAlex Deucher #define ATOM_PPLIB_SOFTWARE_ENABLE_SLEEP_FOR_TIMESTAMPS 0x00002000 2988e9198d0SAlex Deucher 2998e9198d0SAlex Deucher #define ATOM_PPLIB_DISALLOW_ON_DC 0x00004000 3008e9198d0SAlex Deucher 3018e9198d0SAlex Deucher #define ATOM_PPLIB_ENABLE_VARIBRIGHT 0x00008000 3028e9198d0SAlex Deucher 3038e9198d0SAlex Deucher //memory related flags 3048e9198d0SAlex Deucher #define ATOM_PPLIB_SWSTATE_MEMORY_DLL_OFF 0x000010000 3058e9198d0SAlex Deucher 3068e9198d0SAlex Deucher //M3 Arb //2bits, current 3 sets of parameters in total 3078e9198d0SAlex Deucher #define ATOM_PPLIB_M3ARB_MASK 0x00060000 3088e9198d0SAlex Deucher #define ATOM_PPLIB_M3ARB_SHIFT 17 3098e9198d0SAlex Deucher 3108e9198d0SAlex Deucher #define ATOM_PPLIB_ENABLE_DRR 0x00080000 3118e9198d0SAlex Deucher 3128e9198d0SAlex Deucher // remaining 16 bits are reserved 3138e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_THERMAL_STATE 3148e9198d0SAlex Deucher { 3158e9198d0SAlex Deucher UCHAR ucMinTemperature; 3168e9198d0SAlex Deucher UCHAR ucMaxTemperature; 3178e9198d0SAlex Deucher UCHAR ucThermalAction; 3188e9198d0SAlex Deucher }ATOM_PPLIB_THERMAL_STATE, *LPATOM_PPLIB_THERMAL_STATE; 3198e9198d0SAlex Deucher 3208e9198d0SAlex Deucher // Contained in an array starting at the offset 3218e9198d0SAlex Deucher // in ATOM_PPLIB_POWERPLAYTABLE::usNonClockInfoArrayOffset. 3228e9198d0SAlex Deucher // referenced from ATOM_PPLIB_STATE_INFO::ucNonClockStateIndex 3238e9198d0SAlex Deucher #define ATOM_PPLIB_NONCLOCKINFO_VER1 12 3248e9198d0SAlex Deucher #define ATOM_PPLIB_NONCLOCKINFO_VER2 24 3258e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_NONCLOCK_INFO 3268e9198d0SAlex Deucher { 3278e9198d0SAlex Deucher USHORT usClassification; 3288e9198d0SAlex Deucher UCHAR ucMinTemperature; 3298e9198d0SAlex Deucher UCHAR ucMaxTemperature; 3308e9198d0SAlex Deucher ULONG ulCapsAndSettings; 3318e9198d0SAlex Deucher UCHAR ucRequiredPower; 3328e9198d0SAlex Deucher USHORT usClassification2; 3338e9198d0SAlex Deucher ULONG ulVCLK; 3348e9198d0SAlex Deucher ULONG ulDCLK; 3358e9198d0SAlex Deucher UCHAR ucUnused[5]; 3368e9198d0SAlex Deucher } ATOM_PPLIB_NONCLOCK_INFO; 3378e9198d0SAlex Deucher 3388e9198d0SAlex Deucher // Contained in an array starting at the offset 3398e9198d0SAlex Deucher // in ATOM_PPLIB_POWERPLAYTABLE::usClockInfoArrayOffset. 3408e9198d0SAlex Deucher // referenced from ATOM_PPLIB_STATE::ucClockStateIndices 3418e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_R600_CLOCK_INFO 3428e9198d0SAlex Deucher { 3438e9198d0SAlex Deucher USHORT usEngineClockLow; 3448e9198d0SAlex Deucher UCHAR ucEngineClockHigh; 3458e9198d0SAlex Deucher 3468e9198d0SAlex Deucher USHORT usMemoryClockLow; 3478e9198d0SAlex Deucher UCHAR ucMemoryClockHigh; 3488e9198d0SAlex Deucher 3498e9198d0SAlex Deucher USHORT usVDDC; 3508e9198d0SAlex Deucher USHORT usUnused1; 3518e9198d0SAlex Deucher USHORT usUnused2; 3528e9198d0SAlex Deucher 3538e9198d0SAlex Deucher ULONG ulFlags; // ATOM_PPLIB_R600_FLAGS_* 3548e9198d0SAlex Deucher 3558e9198d0SAlex Deucher } ATOM_PPLIB_R600_CLOCK_INFO; 3568e9198d0SAlex Deucher 3578e9198d0SAlex Deucher // ulFlags in ATOM_PPLIB_R600_CLOCK_INFO 3588e9198d0SAlex Deucher #define ATOM_PPLIB_R600_FLAGS_PCIEGEN2 1 3598e9198d0SAlex Deucher #define ATOM_PPLIB_R600_FLAGS_UVDSAFE 2 3608e9198d0SAlex Deucher #define ATOM_PPLIB_R600_FLAGS_BACKBIASENABLE 4 3618e9198d0SAlex Deucher #define ATOM_PPLIB_R600_FLAGS_MEMORY_ODT_OFF 8 3628e9198d0SAlex Deucher #define ATOM_PPLIB_R600_FLAGS_MEMORY_DLL_OFF 16 3638e9198d0SAlex Deucher #define ATOM_PPLIB_R600_FLAGS_LOWPOWER 32 // On the RV770 use 'low power' setting (sequencer S0). 3648e9198d0SAlex Deucher 3658e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_RS780_CLOCK_INFO 3668e9198d0SAlex Deucher 3678e9198d0SAlex Deucher { 3688e9198d0SAlex Deucher USHORT usLowEngineClockLow; // Low Engine clock in MHz (the same way as on the R600). 3698e9198d0SAlex Deucher UCHAR ucLowEngineClockHigh; 3708e9198d0SAlex Deucher USHORT usHighEngineClockLow; // High Engine clock in MHz. 3718e9198d0SAlex Deucher UCHAR ucHighEngineClockHigh; 3728e9198d0SAlex Deucher USHORT usMemoryClockLow; // For now one of the ATOM_PPLIB_RS780_SPMCLK_XXXX constants. 3738e9198d0SAlex Deucher UCHAR ucMemoryClockHigh; // Currentyl unused. 3748e9198d0SAlex Deucher UCHAR ucPadding; // For proper alignment and size. 3758e9198d0SAlex Deucher USHORT usVDDC; // For the 780, use: None, Low, High, Variable 3768e9198d0SAlex Deucher UCHAR ucMaxHTLinkWidth; // From SBIOS - {2, 4, 8, 16} 3778e9198d0SAlex Deucher UCHAR ucMinHTLinkWidth; // From SBIOS - {2, 4, 8, 16}. Effective only if CDLW enabled. Minimum down stream width could 3788e9198d0SAlex Deucher USHORT usHTLinkFreq; // See definition ATOM_PPLIB_RS780_HTLINKFREQ_xxx or in MHz(>=200). 3798e9198d0SAlex Deucher ULONG ulFlags; 3808e9198d0SAlex Deucher } ATOM_PPLIB_RS780_CLOCK_INFO; 3818e9198d0SAlex Deucher 3828e9198d0SAlex Deucher #define ATOM_PPLIB_RS780_VOLTAGE_NONE 0 3838e9198d0SAlex Deucher #define ATOM_PPLIB_RS780_VOLTAGE_LOW 1 3848e9198d0SAlex Deucher #define ATOM_PPLIB_RS780_VOLTAGE_HIGH 2 3858e9198d0SAlex Deucher #define ATOM_PPLIB_RS780_VOLTAGE_VARIABLE 3 3868e9198d0SAlex Deucher 3878e9198d0SAlex Deucher #define ATOM_PPLIB_RS780_SPMCLK_NONE 0 // We cannot change the side port memory clock, leave it as it is. 3888e9198d0SAlex Deucher #define ATOM_PPLIB_RS780_SPMCLK_LOW 1 3898e9198d0SAlex Deucher #define ATOM_PPLIB_RS780_SPMCLK_HIGH 2 3908e9198d0SAlex Deucher 3918e9198d0SAlex Deucher #define ATOM_PPLIB_RS780_HTLINKFREQ_NONE 0 3928e9198d0SAlex Deucher #define ATOM_PPLIB_RS780_HTLINKFREQ_LOW 1 3938e9198d0SAlex Deucher #define ATOM_PPLIB_RS780_HTLINKFREQ_HIGH 2 3948e9198d0SAlex Deucher 3958e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_EVERGREEN_CLOCK_INFO 3968e9198d0SAlex Deucher { 3978e9198d0SAlex Deucher USHORT usEngineClockLow; 3988e9198d0SAlex Deucher UCHAR ucEngineClockHigh; 3998e9198d0SAlex Deucher 4008e9198d0SAlex Deucher USHORT usMemoryClockLow; 4018e9198d0SAlex Deucher UCHAR ucMemoryClockHigh; 4028e9198d0SAlex Deucher 4038e9198d0SAlex Deucher USHORT usVDDC; 4048e9198d0SAlex Deucher USHORT usVDDCI; 4058e9198d0SAlex Deucher USHORT usUnused; 4068e9198d0SAlex Deucher 4078e9198d0SAlex Deucher ULONG ulFlags; // ATOM_PPLIB_R600_FLAGS_* 4088e9198d0SAlex Deucher 4098e9198d0SAlex Deucher } ATOM_PPLIB_EVERGREEN_CLOCK_INFO; 4108e9198d0SAlex Deucher 4118e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_SI_CLOCK_INFO 4128e9198d0SAlex Deucher { 4138e9198d0SAlex Deucher USHORT usEngineClockLow; 4148e9198d0SAlex Deucher UCHAR ucEngineClockHigh; 4158e9198d0SAlex Deucher 4168e9198d0SAlex Deucher USHORT usMemoryClockLow; 4178e9198d0SAlex Deucher UCHAR ucMemoryClockHigh; 4188e9198d0SAlex Deucher 4198e9198d0SAlex Deucher USHORT usVDDC; 4208e9198d0SAlex Deucher USHORT usVDDCI; 4218e9198d0SAlex Deucher UCHAR ucPCIEGen; 4228e9198d0SAlex Deucher UCHAR ucUnused1; 4238e9198d0SAlex Deucher 4248e9198d0SAlex Deucher ULONG ulFlags; // ATOM_PPLIB_SI_FLAGS_*, no flag is necessary for now 4258e9198d0SAlex Deucher 4268e9198d0SAlex Deucher } ATOM_PPLIB_SI_CLOCK_INFO; 4278e9198d0SAlex Deucher 4288e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_CI_CLOCK_INFO 4298e9198d0SAlex Deucher { 4308e9198d0SAlex Deucher USHORT usEngineClockLow; 4318e9198d0SAlex Deucher UCHAR ucEngineClockHigh; 4328e9198d0SAlex Deucher 4338e9198d0SAlex Deucher USHORT usMemoryClockLow; 4348e9198d0SAlex Deucher UCHAR ucMemoryClockHigh; 4358e9198d0SAlex Deucher 4368e9198d0SAlex Deucher UCHAR ucPCIEGen; 4378e9198d0SAlex Deucher USHORT usPCIELane; 4388e9198d0SAlex Deucher } ATOM_PPLIB_CI_CLOCK_INFO; 4398e9198d0SAlex Deucher 4408e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_SUMO_CLOCK_INFO{ 4418e9198d0SAlex Deucher USHORT usEngineClockLow; //clockfrequency & 0xFFFF. The unit is in 10khz 4428e9198d0SAlex Deucher UCHAR ucEngineClockHigh; //clockfrequency >> 16. 4438e9198d0SAlex Deucher UCHAR vddcIndex; //2-bit vddc index; 4448e9198d0SAlex Deucher USHORT tdpLimit; 4458e9198d0SAlex Deucher //please initalize to 0 4468e9198d0SAlex Deucher USHORT rsv1; 4478e9198d0SAlex Deucher //please initialize to 0s 4488e9198d0SAlex Deucher ULONG rsv2[2]; 4498e9198d0SAlex Deucher }ATOM_PPLIB_SUMO_CLOCK_INFO; 4508e9198d0SAlex Deucher 451f4afe799SRex Zhu typedef struct _ATOM_PPLIB_KV_CLOCK_INFO { 452f4afe799SRex Zhu USHORT usEngineClockLow; 453f4afe799SRex Zhu UCHAR ucEngineClockHigh; 454f4afe799SRex Zhu UCHAR vddcIndex; 455f4afe799SRex Zhu USHORT tdpLimit; 456f4afe799SRex Zhu USHORT rsv1; 457f4afe799SRex Zhu ULONG rsv2[2]; 458f4afe799SRex Zhu } ATOM_PPLIB_KV_CLOCK_INFO; 459f4afe799SRex Zhu 4608e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_CZ_CLOCK_INFO { 4618e9198d0SAlex Deucher UCHAR index; 4628e9198d0SAlex Deucher UCHAR rsv[3]; 4638e9198d0SAlex Deucher } ATOM_PPLIB_CZ_CLOCK_INFO; 4648e9198d0SAlex Deucher 4658e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_STATE_V2 4668e9198d0SAlex Deucher { 4678e9198d0SAlex Deucher //number of valid dpm levels in this state; Driver uses it to calculate the whole 4688e9198d0SAlex Deucher //size of the state: sizeof(ATOM_PPLIB_STATE_V2) + (ucNumDPMLevels - 1) * sizeof(UCHAR) 4698e9198d0SAlex Deucher UCHAR ucNumDPMLevels; 4708e9198d0SAlex Deucher 4718e9198d0SAlex Deucher //a index to the array of nonClockInfos 4728e9198d0SAlex Deucher UCHAR nonClockInfoIndex; 4738e9198d0SAlex Deucher /** 4748e9198d0SAlex Deucher * Driver will read the first ucNumDPMLevels in this array 4758e9198d0SAlex Deucher */ 476760efbcaSMario Limonciello UCHAR clockInfoIndex[]; 4778e9198d0SAlex Deucher } ATOM_PPLIB_STATE_V2; 4788e9198d0SAlex Deucher 4798e9198d0SAlex Deucher typedef struct _StateArray{ 4808e9198d0SAlex Deucher //how many states we have 4818e9198d0SAlex Deucher UCHAR ucNumEntries; 4828e9198d0SAlex Deucher 483*c6c4dd54STasos Sahanidis ATOM_PPLIB_STATE_V2 states[] /* __counted_by(ucNumEntries) */; 4848e9198d0SAlex Deucher }StateArray; 4858e9198d0SAlex Deucher 4868e9198d0SAlex Deucher 4878e9198d0SAlex Deucher typedef struct _ClockInfoArray{ 4888e9198d0SAlex Deucher //how many clock levels we have 4898e9198d0SAlex Deucher UCHAR ucNumEntries; 4908e9198d0SAlex Deucher 4918e9198d0SAlex Deucher //sizeof(ATOM_PPLIB_CLOCK_INFO) 4928e9198d0SAlex Deucher UCHAR ucEntrySize; 4938e9198d0SAlex Deucher 4944953be13SAlex Deucher UCHAR clockInfo[]; 4958e9198d0SAlex Deucher }ClockInfoArray; 4968e9198d0SAlex Deucher 4978e9198d0SAlex Deucher typedef struct _NonClockInfoArray{ 4988e9198d0SAlex Deucher //how many non-clock levels we have. normally should be same as number of states 4998e9198d0SAlex Deucher UCHAR ucNumEntries; 5008e9198d0SAlex Deucher //sizeof(ATOM_PPLIB_NONCLOCK_INFO) 5018e9198d0SAlex Deucher UCHAR ucEntrySize; 5028e9198d0SAlex Deucher 503*c6c4dd54STasos Sahanidis ATOM_PPLIB_NONCLOCK_INFO nonClockInfo[] __counted_by(ucNumEntries); 5048e9198d0SAlex Deucher }NonClockInfoArray; 5058e9198d0SAlex Deucher 5068e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_Clock_Voltage_Dependency_Record 5078e9198d0SAlex Deucher { 5088e9198d0SAlex Deucher USHORT usClockLow; 5098e9198d0SAlex Deucher UCHAR ucClockHigh; 5108e9198d0SAlex Deucher USHORT usVoltage; 5118e9198d0SAlex Deucher }ATOM_PPLIB_Clock_Voltage_Dependency_Record; 5128e9198d0SAlex Deucher 5138e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_Clock_Voltage_Dependency_Table 5148e9198d0SAlex Deucher { 515*c6c4dd54STasos Sahanidis // Number of entries. 516*c6c4dd54STasos Sahanidis UCHAR ucNumEntries; 517*c6c4dd54STasos Sahanidis // Dynamically allocate entries. 518*c6c4dd54STasos Sahanidis ATOM_PPLIB_Clock_Voltage_Dependency_Record entries[] __counted_by(ucNumEntries); 5198e9198d0SAlex Deucher }ATOM_PPLIB_Clock_Voltage_Dependency_Table; 5208e9198d0SAlex Deucher 5218e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_Clock_Voltage_Limit_Record 5228e9198d0SAlex Deucher { 5238e9198d0SAlex Deucher USHORT usSclkLow; 5248e9198d0SAlex Deucher UCHAR ucSclkHigh; 5258e9198d0SAlex Deucher USHORT usMclkLow; 5268e9198d0SAlex Deucher UCHAR ucMclkHigh; 5278e9198d0SAlex Deucher USHORT usVddc; 5288e9198d0SAlex Deucher USHORT usVddci; 5298e9198d0SAlex Deucher }ATOM_PPLIB_Clock_Voltage_Limit_Record; 5308e9198d0SAlex Deucher 5318e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_Clock_Voltage_Limit_Table 5328e9198d0SAlex Deucher { 533*c6c4dd54STasos Sahanidis // Number of entries. 534*c6c4dd54STasos Sahanidis UCHAR ucNumEntries; 535*c6c4dd54STasos Sahanidis // Dynamically allocate entries. 536*c6c4dd54STasos Sahanidis ATOM_PPLIB_Clock_Voltage_Limit_Record entries[] __counted_by(ucNumEntries); 5378e9198d0SAlex Deucher }ATOM_PPLIB_Clock_Voltage_Limit_Table; 5388e9198d0SAlex Deucher 5398e9198d0SAlex Deucher union _ATOM_PPLIB_CAC_Leakage_Record 5408e9198d0SAlex Deucher { 5418e9198d0SAlex Deucher struct 5428e9198d0SAlex Deucher { 5438e9198d0SAlex Deucher USHORT usVddc; // We use this field for the "fake" standardized VDDC for power calculations; For CI and newer, we use this as the real VDDC value. in CI we read it as StdVoltageHiSidd 5448e9198d0SAlex Deucher ULONG ulLeakageValue; // For CI and newer we use this as the "fake" standar VDDC value. in CI we read it as StdVoltageLoSidd 5458e9198d0SAlex Deucher 5468e9198d0SAlex Deucher }; 5478e9198d0SAlex Deucher struct 5488e9198d0SAlex Deucher { 5498e9198d0SAlex Deucher USHORT usVddc1; 5508e9198d0SAlex Deucher USHORT usVddc2; 5518e9198d0SAlex Deucher USHORT usVddc3; 5528e9198d0SAlex Deucher }; 5538e9198d0SAlex Deucher }; 5548e9198d0SAlex Deucher 5558e9198d0SAlex Deucher typedef union _ATOM_PPLIB_CAC_Leakage_Record ATOM_PPLIB_CAC_Leakage_Record; 5568e9198d0SAlex Deucher 5578e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_CAC_Leakage_Table 5588e9198d0SAlex Deucher { 559*c6c4dd54STasos Sahanidis // Number of entries. 560*c6c4dd54STasos Sahanidis UCHAR ucNumEntries; 561*c6c4dd54STasos Sahanidis // Dynamically allocate entries. 562*c6c4dd54STasos Sahanidis ATOM_PPLIB_CAC_Leakage_Record entries[] __counted_by(ucNumEntries); 5638e9198d0SAlex Deucher }ATOM_PPLIB_CAC_Leakage_Table; 5648e9198d0SAlex Deucher 5658e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_PhaseSheddingLimits_Record 5668e9198d0SAlex Deucher { 5678e9198d0SAlex Deucher USHORT usVoltage; 5688e9198d0SAlex Deucher USHORT usSclkLow; 5698e9198d0SAlex Deucher UCHAR ucSclkHigh; 5708e9198d0SAlex Deucher USHORT usMclkLow; 5718e9198d0SAlex Deucher UCHAR ucMclkHigh; 5728e9198d0SAlex Deucher }ATOM_PPLIB_PhaseSheddingLimits_Record; 5738e9198d0SAlex Deucher 5748e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_PhaseSheddingLimits_Table 5758e9198d0SAlex Deucher { 576*c6c4dd54STasos Sahanidis // Number of entries. 577*c6c4dd54STasos Sahanidis UCHAR ucNumEntries; 578*c6c4dd54STasos Sahanidis // Dynamically allocate entries. 579*c6c4dd54STasos Sahanidis ATOM_PPLIB_PhaseSheddingLimits_Record entries[] __counted_by(ucNumEntries); 5808e9198d0SAlex Deucher }ATOM_PPLIB_PhaseSheddingLimits_Table; 5818e9198d0SAlex Deucher 5828e9198d0SAlex Deucher typedef struct _VCEClockInfo{ 5838e9198d0SAlex Deucher USHORT usEVClkLow; 5848e9198d0SAlex Deucher UCHAR ucEVClkHigh; 5858e9198d0SAlex Deucher USHORT usECClkLow; 5868e9198d0SAlex Deucher UCHAR ucECClkHigh; 5878e9198d0SAlex Deucher }VCEClockInfo; 5888e9198d0SAlex Deucher 5898e9198d0SAlex Deucher typedef struct _VCEClockInfoArray{ 5908e9198d0SAlex Deucher UCHAR ucNumEntries; 591*c6c4dd54STasos Sahanidis VCEClockInfo entries[] __counted_by(ucNumEntries); 5928e9198d0SAlex Deucher }VCEClockInfoArray; 5938e9198d0SAlex Deucher 5948e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record 5958e9198d0SAlex Deucher { 5968e9198d0SAlex Deucher USHORT usVoltage; 5978e9198d0SAlex Deucher UCHAR ucVCEClockInfoIndex; 5988e9198d0SAlex Deucher }ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record; 5998e9198d0SAlex Deucher 6008e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table 6018e9198d0SAlex Deucher { 6028e9198d0SAlex Deucher UCHAR numEntries; 603*c6c4dd54STasos Sahanidis ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record entries[] __counted_by(numEntries); 6048e9198d0SAlex Deucher }ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table; 6058e9198d0SAlex Deucher 6068e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_VCE_State_Record 6078e9198d0SAlex Deucher { 6088e9198d0SAlex Deucher UCHAR ucVCEClockInfoIndex; 6098e9198d0SAlex Deucher UCHAR ucClockInfoIndex; //highest 2 bits indicates memory p-states, lower 6bits indicates index to ClockInfoArrary 6108e9198d0SAlex Deucher }ATOM_PPLIB_VCE_State_Record; 6118e9198d0SAlex Deucher 6128e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_VCE_State_Table 6138e9198d0SAlex Deucher { 6148e9198d0SAlex Deucher UCHAR numEntries; 615*c6c4dd54STasos Sahanidis ATOM_PPLIB_VCE_State_Record entries[] __counted_by(numEntries); 6168e9198d0SAlex Deucher }ATOM_PPLIB_VCE_State_Table; 6178e9198d0SAlex Deucher 6188e9198d0SAlex Deucher 6198e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_VCE_Table 6208e9198d0SAlex Deucher { 6218e9198d0SAlex Deucher UCHAR revid; 6228e9198d0SAlex Deucher // VCEClockInfoArray array; 6238e9198d0SAlex Deucher // ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table limits; 6248e9198d0SAlex Deucher // ATOM_PPLIB_VCE_State_Table states; 6258e9198d0SAlex Deucher }ATOM_PPLIB_VCE_Table; 6268e9198d0SAlex Deucher 6278e9198d0SAlex Deucher 6288e9198d0SAlex Deucher typedef struct _UVDClockInfo{ 6298e9198d0SAlex Deucher USHORT usVClkLow; 6308e9198d0SAlex Deucher UCHAR ucVClkHigh; 6318e9198d0SAlex Deucher USHORT usDClkLow; 6328e9198d0SAlex Deucher UCHAR ucDClkHigh; 6338e9198d0SAlex Deucher }UVDClockInfo; 6348e9198d0SAlex Deucher 6358e9198d0SAlex Deucher typedef struct _UVDClockInfoArray{ 6368e9198d0SAlex Deucher UCHAR ucNumEntries; 637*c6c4dd54STasos Sahanidis UVDClockInfo entries[] __counted_by(ucNumEntries); 6388e9198d0SAlex Deucher }UVDClockInfoArray; 6398e9198d0SAlex Deucher 6408e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_UVD_Clock_Voltage_Limit_Record 6418e9198d0SAlex Deucher { 6428e9198d0SAlex Deucher USHORT usVoltage; 6438e9198d0SAlex Deucher UCHAR ucUVDClockInfoIndex; 6448e9198d0SAlex Deucher }ATOM_PPLIB_UVD_Clock_Voltage_Limit_Record; 6458e9198d0SAlex Deucher 6468e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table 6478e9198d0SAlex Deucher { 6488e9198d0SAlex Deucher UCHAR numEntries; 649*c6c4dd54STasos Sahanidis ATOM_PPLIB_UVD_Clock_Voltage_Limit_Record entries[] __counted_by(numEntries); 6508e9198d0SAlex Deucher }ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table; 6518e9198d0SAlex Deucher 6528e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_UVD_Table 6538e9198d0SAlex Deucher { 6548e9198d0SAlex Deucher UCHAR revid; 6558e9198d0SAlex Deucher // UVDClockInfoArray array; 6568e9198d0SAlex Deucher // ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table limits; 6578e9198d0SAlex Deucher }ATOM_PPLIB_UVD_Table; 6588e9198d0SAlex Deucher 6598e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_SAMClk_Voltage_Limit_Record 6608e9198d0SAlex Deucher { 6618e9198d0SAlex Deucher USHORT usVoltage; 6628e9198d0SAlex Deucher USHORT usSAMClockLow; 6638e9198d0SAlex Deucher UCHAR ucSAMClockHigh; 6648e9198d0SAlex Deucher }ATOM_PPLIB_SAMClk_Voltage_Limit_Record; 6658e9198d0SAlex Deucher 6668e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_SAMClk_Voltage_Limit_Table{ 6678e9198d0SAlex Deucher UCHAR numEntries; 668*c6c4dd54STasos Sahanidis ATOM_PPLIB_SAMClk_Voltage_Limit_Record entries[] __counted_by(numEntries); 6698e9198d0SAlex Deucher }ATOM_PPLIB_SAMClk_Voltage_Limit_Table; 6708e9198d0SAlex Deucher 6718e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_SAMU_Table 6728e9198d0SAlex Deucher { 6738e9198d0SAlex Deucher UCHAR revid; 6748e9198d0SAlex Deucher ATOM_PPLIB_SAMClk_Voltage_Limit_Table limits; 6758e9198d0SAlex Deucher }ATOM_PPLIB_SAMU_Table; 6768e9198d0SAlex Deucher 6778e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_ACPClk_Voltage_Limit_Record 6788e9198d0SAlex Deucher { 6798e9198d0SAlex Deucher USHORT usVoltage; 6808e9198d0SAlex Deucher USHORT usACPClockLow; 6818e9198d0SAlex Deucher UCHAR ucACPClockHigh; 6828e9198d0SAlex Deucher }ATOM_PPLIB_ACPClk_Voltage_Limit_Record; 6838e9198d0SAlex Deucher 6848e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_ACPClk_Voltage_Limit_Table{ 6858e9198d0SAlex Deucher UCHAR numEntries; 686*c6c4dd54STasos Sahanidis ATOM_PPLIB_ACPClk_Voltage_Limit_Record entries[] __counted_by(numEntries); 6878e9198d0SAlex Deucher }ATOM_PPLIB_ACPClk_Voltage_Limit_Table; 6888e9198d0SAlex Deucher 6898e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_ACP_Table 6908e9198d0SAlex Deucher { 6918e9198d0SAlex Deucher UCHAR revid; 6928e9198d0SAlex Deucher ATOM_PPLIB_ACPClk_Voltage_Limit_Table limits; 6938e9198d0SAlex Deucher }ATOM_PPLIB_ACP_Table; 6948e9198d0SAlex Deucher 6958e9198d0SAlex Deucher typedef struct _ATOM_PowerTune_Table{ 6968e9198d0SAlex Deucher USHORT usTDP; 6978e9198d0SAlex Deucher USHORT usConfigurableTDP; 6988e9198d0SAlex Deucher USHORT usTDC; 6998e9198d0SAlex Deucher USHORT usBatteryPowerLimit; 7008e9198d0SAlex Deucher USHORT usSmallPowerLimit; 7018e9198d0SAlex Deucher USHORT usLowCACLeakage; 7028e9198d0SAlex Deucher USHORT usHighCACLeakage; 7038e9198d0SAlex Deucher }ATOM_PowerTune_Table; 7048e9198d0SAlex Deucher 7058e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_POWERTUNE_Table 7068e9198d0SAlex Deucher { 7078e9198d0SAlex Deucher UCHAR revid; 7088e9198d0SAlex Deucher ATOM_PowerTune_Table power_tune_table; 7098e9198d0SAlex Deucher }ATOM_PPLIB_POWERTUNE_Table; 7108e9198d0SAlex Deucher 7118e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_POWERTUNE_Table_V1 7128e9198d0SAlex Deucher { 7138e9198d0SAlex Deucher UCHAR revid; 7148e9198d0SAlex Deucher ATOM_PowerTune_Table power_tune_table; 7158e9198d0SAlex Deucher USHORT usMaximumPowerDeliveryLimit; 716fa9f1d4eSJammy Zhou USHORT usTjMax; 717fa9f1d4eSJammy Zhou USHORT usReserve[6]; 7188e9198d0SAlex Deucher } ATOM_PPLIB_POWERTUNE_Table_V1; 7198e9198d0SAlex Deucher 7208e9198d0SAlex Deucher #define ATOM_PPM_A_A 1 7218e9198d0SAlex Deucher #define ATOM_PPM_A_I 2 7228e9198d0SAlex Deucher typedef struct _ATOM_PPLIB_PPM_Table 7238e9198d0SAlex Deucher { 7248e9198d0SAlex Deucher UCHAR ucRevId; 7258e9198d0SAlex Deucher UCHAR ucPpmDesign; //A+I or A+A 7268e9198d0SAlex Deucher USHORT usCpuCoreNumber; 7278e9198d0SAlex Deucher ULONG ulPlatformTDP; 7288e9198d0SAlex Deucher ULONG ulSmallACPlatformTDP; 7298e9198d0SAlex Deucher ULONG ulPlatformTDC; 7308e9198d0SAlex Deucher ULONG ulSmallACPlatformTDC; 7318e9198d0SAlex Deucher ULONG ulApuTDP; 7328e9198d0SAlex Deucher ULONG ulDGpuTDP; 7338e9198d0SAlex Deucher ULONG ulDGpuUlvPower; 7348e9198d0SAlex Deucher ULONG ulTjmax; 7358e9198d0SAlex Deucher } ATOM_PPLIB_PPM_Table; 7368e9198d0SAlex Deucher 737f4afe799SRex Zhu #define VQ_DisplayConfig_NoneAWD 1 738f4afe799SRex Zhu #define VQ_DisplayConfig_AWD 2 739f4afe799SRex Zhu 740f4afe799SRex Zhu typedef struct ATOM_PPLIB_VQ_Budgeting_Record{ 741f4afe799SRex Zhu ULONG ulDeviceID; 742f4afe799SRex Zhu ULONG ulSustainableSOCPowerLimitLow; /* in mW */ 743f4afe799SRex Zhu ULONG ulSustainableSOCPowerLimitHigh; /* in mW */ 744f4afe799SRex Zhu 745f4afe799SRex Zhu ULONG ulDClk; 746f4afe799SRex Zhu ULONG ulEClk; 747f4afe799SRex Zhu ULONG ulDispSclk; 748f4afe799SRex Zhu UCHAR ucDispConfig; 749f4afe799SRex Zhu 750f4afe799SRex Zhu } ATOM_PPLIB_VQ_Budgeting_Record; 751f4afe799SRex Zhu 752f4afe799SRex Zhu typedef struct ATOM_PPLIB_VQ_Budgeting_Table { 753f4afe799SRex Zhu UCHAR revid; 754f4afe799SRex Zhu UCHAR numEntries; 755*c6c4dd54STasos Sahanidis ATOM_PPLIB_VQ_Budgeting_Record entries[] __counted_by(numEntries); 756f4afe799SRex Zhu } ATOM_PPLIB_VQ_Budgeting_Table; 757f4afe799SRex Zhu 7588e9198d0SAlex Deucher #pragma pack() 7598e9198d0SAlex Deucher 7608e9198d0SAlex Deucher #endif 761