1 /* 2 * Copyright 2023 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 24 #ifndef __MES_API_DEF_H__ 25 #define __MES_API_DEF_H__ 26 27 #pragma pack(push, 8) 28 29 #define MES_API_VERSION 0x14 30 31 /* Driver submits one API(cmd) as a single Frame and this command size is same for all API 32 * to ease the debugging and parsing of ring buffer. 33 */ 34 enum {API_FRAME_SIZE_IN_DWORDS = 64}; 35 36 /* To avoid command in scheduler context to be overwritten whenenver mutilple interrupts come in, 37 * this creates another queue 38 */ 39 enum {API_NUMBER_OF_COMMAND_MAX = 32}; 40 41 enum MES_API_TYPE { 42 MES_API_TYPE_SCHEDULER = 1, 43 MES_API_TYPE_MAX 44 }; 45 46 enum MES_SCH_API_OPCODE { 47 MES_SCH_API_SET_HW_RSRC = 0, 48 MES_SCH_API_SET_SCHEDULING_CONFIG = 1, /* agreegated db, quantums, etc */ 49 MES_SCH_API_ADD_QUEUE = 2, 50 MES_SCH_API_REMOVE_QUEUE = 3, 51 MES_SCH_API_PERFORM_YIELD = 4, 52 MES_SCH_API_SET_GANG_PRIORITY_LEVEL = 5, /* For windows GANG = Context */ 53 MES_SCH_API_SUSPEND = 6, 54 MES_SCH_API_RESUME = 7, 55 MES_SCH_API_RESET = 8, 56 MES_SCH_API_SET_LOG_BUFFER = 9, 57 MES_SCH_API_CHANGE_GANG_PRORITY = 10, 58 MES_SCH_API_QUERY_SCHEDULER_STATUS = 11, 59 MES_SCH_API_SET_DEBUG_VMID = 13, 60 MES_SCH_API_MISC = 14, 61 MES_SCH_API_UPDATE_ROOT_PAGE_TABLE = 15, 62 MES_SCH_API_AMD_LOG = 16, 63 MES_SCH_API_SET_SE_MODE = 17, 64 MES_SCH_API_SET_GANG_SUBMIT = 18, 65 MES_SCH_API_SET_HW_RSRC_1 = 19, 66 67 MES_SCH_API_MAX = 0xFF 68 }; 69 70 union MES_API_HEADER { 71 struct { 72 uint32_t type : 4; /* 0 - Invalid; 1 - Scheduling; 2 - TBD */ 73 uint32_t opcode : 8; 74 uint32_t dwsize : 8; /* including header */ 75 uint32_t reserved : 12; 76 }; 77 78 uint32_t u32All; 79 }; 80 81 enum MES_AMD_PRIORITY_LEVEL { 82 AMD_PRIORITY_LEVEL_LOW = 0, 83 AMD_PRIORITY_LEVEL_NORMAL = 1, 84 AMD_PRIORITY_LEVEL_MEDIUM = 2, 85 AMD_PRIORITY_LEVEL_HIGH = 3, 86 AMD_PRIORITY_LEVEL_REALTIME = 4, 87 88 AMD_PRIORITY_NUM_LEVELS 89 }; 90 91 enum MES_QUEUE_TYPE { 92 MES_QUEUE_TYPE_GFX, 93 MES_QUEUE_TYPE_COMPUTE, 94 MES_QUEUE_TYPE_SDMA, 95 96 MES_QUEUE_TYPE_MAX, 97 }; 98 99 struct MES_API_STATUS { 100 uint64_t api_completion_fence_addr; 101 uint64_t api_completion_fence_value; 102 }; 103 104 105 enum { MAX_COMPUTE_PIPES = 8 }; 106 enum { MAX_GFX_PIPES = 2 }; 107 enum { MAX_SDMA_PIPES = 2 }; 108 109 enum { MAX_COMPUTE_HQD_PER_PIPE = 8 }; 110 enum { MAX_GFX_HQD_PER_PIPE = 8 }; 111 enum { MAX_SDMA_HQD_PER_PIPE = 10 }; 112 enum { MAX_SDMA_HQD_PER_PIPE_11_0 = 8 }; 113 114 115 enum { MAX_QUEUES_IN_A_GANG = 8 }; 116 117 enum VM_HUB_TYPE { 118 VM_HUB_TYPE_GC = 0, 119 VM_HUB_TYPE_MM = 1, 120 121 VM_HUB_TYPE_MAX, 122 }; 123 124 enum { VMID_INVALID = 0xffff }; 125 126 enum { MAX_VMID_GCHUB = 16 }; 127 enum { MAX_VMID_MMHUB = 16 }; 128 129 enum SET_DEBUG_VMID_OPERATIONS { 130 DEBUG_VMID_OP_PROGRAM = 0, 131 DEBUG_VMID_OP_ALLOCATE = 1, 132 DEBUG_VMID_OP_RELEASE = 2, 133 DEBUG_VMID_OP_VM_SETUP = 3 // used to set up the debug vmid page table in the kernel queue case (mode 1) 134 }; 135 136 enum MES_MS_LOG_CONTEXT_STATE { 137 MES_LOG_CONTEXT_STATE_IDLE = 0, 138 MES_LOG_CONTEXT_STATE_RUNNING = 1, 139 MES_LOG_CONTEXT_STATE_READY = 2, 140 MES_LOG_CONTEXT_STATE_READY_STANDBY = 3, 141 MES_LOG_CONTEXT_STATE_INVALID = 0xF, 142 }; 143 144 enum MES_MS_LOG_OPERATION { 145 MES_LOG_OPERATION_CONTEXT_STATE_CHANGE = 0, 146 MES_LOG_OPERATION_QUEUE_NEW_WORK = 1, 147 MES_LOG_OPERATION_QUEUE_UNWAIT_SYNC_OBJECT = 2, 148 MES_LOG_OPERATION_QUEUE_NO_MORE_WORK = 3, 149 MES_LOG_OPERATION_QUEUE_WAIT_SYNC_OBJECT = 4, 150 MES_LOG_OPERATION_QUEUE_INVALID = 0xF, 151 }; 152 153 struct MES_LOG_CONTEXT_STATE_CHANGE { 154 uint64_t h_context; 155 enum MES_MS_LOG_CONTEXT_STATE new_context_state; 156 }; 157 158 struct MES_LOG_QUEUE_NEW_WORK { 159 uint64_t h_queue; 160 uint64_t reserved; 161 }; 162 163 struct MES_LOG_QUEUE_UNWAIT_SYNC_OBJECT { 164 uint64_t h_queue; 165 uint64_t h_sync_object; 166 }; 167 168 struct MES_LOG_QUEUE_NO_MORE_WORK { 169 uint64_t h_queue; 170 uint64_t reserved; 171 }; 172 173 struct MES_LOG_QUEUE_WAIT_SYNC_OBJECT { 174 uint64_t h_queue; 175 uint64_t h_sync_object; 176 }; 177 178 struct MES_LOG_ENTRY_HEADER { 179 uint32_t first_free_entry_index; 180 uint32_t wraparound_count; 181 uint64_t number_of_entries; 182 uint64_t reserved[2]; 183 }; 184 185 struct MES_LOG_ENTRY_DATA { 186 uint64_t gpu_time_stamp; 187 uint32_t operation_type; /* operation_type is of MES_LOG_OPERATION type */ 188 uint32_t reserved_operation_type_bits; 189 union { 190 struct MES_LOG_CONTEXT_STATE_CHANGE context_state_change; 191 struct MES_LOG_QUEUE_NEW_WORK queue_new_work; 192 struct MES_LOG_QUEUE_UNWAIT_SYNC_OBJECT queue_unwait_sync_object; 193 struct MES_LOG_QUEUE_NO_MORE_WORK queue_no_more_work; 194 struct MES_LOG_QUEUE_WAIT_SYNC_OBJECT queue_wait_sync_object; 195 uint64_t all[2]; 196 }; 197 }; 198 199 struct MES_LOG_BUFFER { 200 struct MES_LOG_ENTRY_HEADER header; 201 struct MES_LOG_ENTRY_DATA entries[]; 202 }; 203 204 enum MES_SWIP_TO_HWIP_DEF { 205 MES_MAX_HWIP_SEGMENT = 8, 206 }; 207 208 union MESAPI_SET_HW_RESOURCES { 209 struct { 210 union MES_API_HEADER header; 211 uint32_t vmid_mask_mmhub; 212 uint32_t vmid_mask_gfxhub; 213 uint32_t gds_size; 214 uint32_t paging_vmid; 215 uint32_t compute_hqd_mask[MAX_COMPUTE_PIPES]; 216 uint32_t gfx_hqd_mask[MAX_GFX_PIPES]; 217 uint32_t sdma_hqd_mask[MAX_SDMA_PIPES]; 218 uint32_t aggregated_doorbells[AMD_PRIORITY_NUM_LEVELS]; 219 uint64_t g_sch_ctx_gpu_mc_ptr; 220 uint64_t query_status_fence_gpu_mc_ptr; 221 uint32_t gc_base[MES_MAX_HWIP_SEGMENT]; 222 uint32_t mmhub_base[MES_MAX_HWIP_SEGMENT]; 223 uint32_t osssys_base[MES_MAX_HWIP_SEGMENT]; 224 struct MES_API_STATUS api_status; 225 union { 226 struct { 227 uint32_t disable_reset : 1; 228 uint32_t use_different_vmid_compute : 1; 229 uint32_t disable_mes_log : 1; 230 uint32_t apply_mmhub_pgvm_invalidate_ack_loss_wa : 1; 231 uint32_t apply_grbm_remote_register_dummy_read_wa : 1; 232 uint32_t second_gfx_pipe_enabled : 1; 233 uint32_t enable_level_process_quantum_check : 1; 234 uint32_t legacy_sch_mode : 1; 235 uint32_t disable_add_queue_wptr_mc_addr : 1; 236 uint32_t enable_mes_event_int_logging : 1; 237 uint32_t enable_reg_active_poll : 1; 238 uint32_t use_disable_queue_in_legacy_uq_preemption : 1; 239 uint32_t send_write_data : 1; 240 uint32_t os_tdr_timeout_override : 1; 241 uint32_t use_rs64mem_for_proc_gang_ctx : 1; 242 uint32_t unmapped_doorbell_handling: 2; 243 uint32_t reserved : 15; 244 }; 245 uint32_t uint32_all; 246 }; 247 uint32_t oversubscription_timer; 248 uint64_t doorbell_info; 249 uint64_t event_intr_history_gpu_mc_ptr; 250 uint64_t timestamp; 251 uint32_t os_tdr_timeout_in_sec; 252 }; 253 254 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS]; 255 }; 256 257 union MESAPI_SET_HW_RESOURCES_1 { 258 struct { 259 union MES_API_HEADER header; 260 struct MES_API_STATUS api_status; 261 uint64_t timestamp; 262 union { 263 struct { 264 uint32_t enable_mes_debug_ctx : 1; 265 uint32_t reserved : 31; 266 }; 267 uint32_t uint32_all; 268 }; 269 uint64_t mes_debug_ctx_mc_addr; 270 uint32_t mes_debug_ctx_size; 271 /* unit is 100ms */ 272 uint32_t mes_kiq_unmap_timeout; 273 }; 274 275 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS]; 276 }; 277 278 union MESAPI__ADD_QUEUE { 279 struct { 280 union MES_API_HEADER header; 281 uint32_t process_id; 282 uint64_t page_table_base_addr; 283 uint64_t process_va_start; 284 uint64_t process_va_end; 285 uint64_t process_quantum; 286 uint64_t process_context_addr; 287 uint64_t gang_quantum; 288 uint64_t gang_context_addr; 289 uint32_t inprocess_gang_priority; 290 enum MES_AMD_PRIORITY_LEVEL gang_global_priority_level; 291 uint32_t doorbell_offset; 292 uint64_t mqd_addr; 293 /* From MES_API_VERSION 2, mc addr is expected for wptr_addr */ 294 uint64_t wptr_addr; 295 uint64_t h_context; 296 uint64_t h_queue; 297 enum MES_QUEUE_TYPE queue_type; 298 uint32_t gds_base; 299 union { 300 /* backwards compatibility with Linux, remove union once they use kfd_queue_size */ 301 uint32_t gds_size; 302 uint32_t kfd_queue_size; 303 }; 304 uint32_t gws_base; 305 uint32_t gws_size; 306 uint32_t oa_mask; 307 uint64_t trap_handler_addr; 308 uint32_t vm_context_cntl; 309 310 struct { 311 uint32_t paging : 1; 312 uint32_t debug_vmid : 4; 313 uint32_t program_gds : 1; 314 uint32_t is_gang_suspended : 1; 315 uint32_t is_tmz_queue : 1; 316 uint32_t map_kiq_utility_queue : 1; 317 uint32_t is_kfd_process : 1; 318 uint32_t trap_en : 1; 319 uint32_t is_aql_queue : 1; 320 uint32_t skip_process_ctx_clear : 1; 321 uint32_t map_legacy_kq : 1; 322 uint32_t exclusively_scheduled : 1; 323 uint32_t is_long_running : 1; 324 uint32_t is_dwm_queue : 1; 325 uint32_t reserved : 15; 326 }; 327 struct MES_API_STATUS api_status; 328 uint64_t tma_addr; 329 uint32_t sch_id; 330 uint64_t timestamp; 331 uint32_t process_context_array_index; 332 uint32_t gang_context_array_index; 333 uint32_t pipe_id; //used for mapping legacy kernel queue 334 uint32_t queue_id; 335 uint32_t alignment_mode_setting; 336 }; 337 338 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS]; 339 }; 340 341 union MESAPI__REMOVE_QUEUE { 342 struct { 343 union MES_API_HEADER header; 344 uint32_t doorbell_offset; 345 uint64_t gang_context_addr; 346 347 struct { 348 uint32_t reserved01 : 1; 349 uint32_t unmap_kiq_utility_queue : 1; 350 uint32_t preempt_legacy_gfx_queue : 1; 351 uint32_t unmap_legacy_queue : 1; 352 uint32_t reserved : 28; 353 }; 354 struct MES_API_STATUS api_status; 355 356 uint32_t pipe_id; 357 uint32_t queue_id; 358 359 uint64_t tf_addr; 360 uint32_t tf_data; 361 362 enum MES_QUEUE_TYPE queue_type; 363 uint64_t timestamp; 364 uint32_t gang_context_array_index; 365 }; 366 367 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS]; 368 }; 369 370 union MESAPI__SET_SCHEDULING_CONFIG { 371 struct { 372 union MES_API_HEADER header; 373 /* Grace period when preempting another priority band for this priority band. 374 * The value for idle priority band is ignored, as it never preempts other bands. 375 */ 376 uint64_t grace_period_other_levels[AMD_PRIORITY_NUM_LEVELS]; 377 378 /* Default quantum for scheduling across processes within a priority band. */ 379 uint64_t process_quantum_for_level[AMD_PRIORITY_NUM_LEVELS]; 380 381 /* Default grace period for processes that preempt each other within a priority band.*/ 382 uint64_t process_grace_period_same_level[AMD_PRIORITY_NUM_LEVELS]; 383 384 /* For normal level this field specifies the target GPU percentage in situations when it's starved by the high level. 385 * Valid values are between 0 and 50, with the default being 10. 386 */ 387 uint32_t normal_yield_percent; 388 389 struct MES_API_STATUS api_status; 390 uint64_t timestamp; 391 }; 392 393 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS]; 394 }; 395 396 union MESAPI__PERFORM_YIELD { 397 struct { 398 union MES_API_HEADER header; 399 uint32_t dummy; 400 struct MES_API_STATUS api_status; 401 uint64_t timestamp; 402 }; 403 404 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS]; 405 }; 406 407 union MESAPI__CHANGE_GANG_PRIORITY_LEVEL { 408 struct { 409 union MES_API_HEADER header; 410 uint32_t inprocess_gang_priority; 411 enum MES_AMD_PRIORITY_LEVEL gang_global_priority_level; 412 uint64_t gang_quantum; 413 uint64_t gang_context_addr; 414 struct MES_API_STATUS api_status; 415 uint32_t doorbell_offset; 416 uint64_t timestamp; 417 uint32_t gang_context_array_index; 418 struct { 419 uint32_t queue_quantum_scale : 2; 420 uint32_t queue_quantum_duration : 8; 421 uint32_t apply_quantum_all_processes : 1; 422 uint32_t reserved : 21; 423 }; 424 }; 425 426 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS]; 427 }; 428 429 union MESAPI__SUSPEND { 430 struct { 431 union MES_API_HEADER header; 432 /* false - suspend all gangs; true - specific gang */ 433 struct { 434 uint32_t suspend_all_gangs : 1; 435 uint32_t reserved : 31; 436 }; 437 /* gang_context_addr is valid only if suspend_all = false */ 438 439 uint64_t gang_context_addr; 440 441 uint64_t suspend_fence_addr; 442 uint32_t suspend_fence_value; 443 444 struct MES_API_STATUS api_status; 445 446 union { 447 uint32_t return_value; // to be removed 448 uint32_t sch_id; //keep the old return_value temporarily for compatibility 449 }; 450 uint32_t doorbell_offset; 451 uint64_t timestamp; 452 enum MES_QUEUE_TYPE legacy_uq_type; 453 enum MES_AMD_PRIORITY_LEVEL legacy_uq_priority_level; 454 uint32_t gang_context_array_index; 455 }; 456 457 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS]; 458 }; 459 460 union MESAPI__RESUME { 461 struct { 462 union MES_API_HEADER header; 463 /* false - resume all gangs; true - specified gang */ 464 struct { 465 uint32_t resume_all_gangs : 1; 466 uint32_t reserved : 31; 467 }; 468 /* valid only if resume_all_gangs = false */ 469 uint64_t gang_context_addr; 470 471 struct MES_API_STATUS api_status; 472 uint32_t doorbell_offset; 473 uint64_t timestamp; 474 uint32_t gang_context_array_index; 475 }; 476 477 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS]; 478 }; 479 480 union MESAPI__RESET { 481 struct { 482 union MES_API_HEADER header; 483 484 struct { 485 /* Only reset the queue given by doorbell_offset (not entire gang) */ 486 uint32_t reset_queue_only : 1; 487 /* Hang detection first then reset any queues that are hung */ 488 uint32_t hang_detect_then_reset : 1; 489 /* Only do hang detection (no reset) */ 490 uint32_t hang_detect_only : 1; 491 /* Reset HP and LP kernel queues not managed by MES */ 492 uint32_t reset_legacy_gfx : 1; 493 /* Fallback to use conneceted queue index when CP_CNTX_STAT method fails (gfx pipe 0) */ 494 uint32_t use_connected_queue_index : 1; 495 /* For gfx pipe 1 */ 496 uint32_t use_connected_queue_index_p1 : 1; 497 uint32_t reserved : 26; 498 }; 499 500 uint64_t gang_context_addr; 501 502 /* valid only if reset_queue_only = true */ 503 uint32_t doorbell_offset; 504 505 /* valid only if hang_detect_then_reset = true */ 506 uint64_t doorbell_offset_addr; 507 enum MES_QUEUE_TYPE queue_type; 508 509 /* valid only if reset_legacy_gfx = true */ 510 uint32_t pipe_id_lp; 511 uint32_t queue_id_lp; 512 uint32_t vmid_id_lp; 513 uint64_t mqd_mc_addr_lp; 514 uint32_t doorbell_offset_lp; 515 uint64_t wptr_addr_lp; 516 517 uint32_t pipe_id_hp; 518 uint32_t queue_id_hp; 519 uint32_t vmid_id_hp; 520 uint64_t mqd_mc_addr_hp; 521 uint32_t doorbell_offset_hp; 522 uint64_t wptr_addr_hp; 523 524 struct MES_API_STATUS api_status; 525 uint32_t active_vmids; 526 uint64_t timestamp; 527 528 uint32_t gang_context_array_index; 529 530 uint32_t connected_queue_index; 531 uint32_t connected_queue_index_p1; 532 }; 533 534 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS]; 535 }; 536 537 union MESAPI__SET_LOGGING_BUFFER { 538 struct { 539 union MES_API_HEADER header; 540 /* There are separate log buffers for each queue type */ 541 enum MES_QUEUE_TYPE log_type; 542 /* Log buffer GPU Address */ 543 uint64_t logging_buffer_addr; 544 /* number of entries in the log buffer */ 545 uint32_t number_of_entries; 546 /* Entry index at which CPU interrupt needs to be signalled */ 547 uint32_t interrupt_entry; 548 549 struct MES_API_STATUS api_status; 550 uint64_t timestamp; 551 uint32_t vmid; 552 }; 553 554 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS]; 555 }; 556 557 enum MES_API_QUERY_MES_OPCODE { 558 MES_API_QUERY_MES__GET_CTX_ARRAY_SIZE, 559 MES_API_QUERY_MES__CHECK_HEALTHY, 560 MES_API_QUERY_MES__MAX, 561 }; 562 563 enum { QUERY_MES_MAX_SIZE_IN_DWORDS = 20 }; 564 565 struct MES_API_QUERY_MES__CTX_ARRAY_SIZE { 566 uint64_t proc_ctx_array_size_addr; 567 uint64_t gang_ctx_array_size_addr; 568 }; 569 570 struct MES_API_QUERY_MES__HEALTHY_CHECK { 571 uint64_t healthy_addr; 572 }; 573 574 union MESAPI__QUERY_MES_STATUS { 575 struct { 576 union MES_API_HEADER header; 577 enum MES_API_QUERY_MES_OPCODE subopcode; 578 struct MES_API_STATUS api_status; 579 uint64_t timestamp; 580 union { 581 struct MES_API_QUERY_MES__CTX_ARRAY_SIZE ctx_array_size; 582 struct MES_API_QUERY_MES__HEALTHY_CHECK healthy_check; 583 uint32_t data[QUERY_MES_MAX_SIZE_IN_DWORDS]; 584 }; 585 }; 586 587 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS]; 588 }; 589 590 union MESAPI__SET_DEBUG_VMID { 591 struct { 592 union MES_API_HEADER header; 593 struct MES_API_STATUS api_status; 594 union { 595 struct { 596 uint32_t use_gds : 1; 597 uint32_t operation : 2; 598 uint32_t reserved : 29; 599 } flags; 600 uint32_t u32All; 601 }; 602 uint32_t reserved; 603 uint32_t debug_vmid; 604 uint64_t process_context_addr; 605 uint64_t page_table_base_addr; 606 uint64_t process_va_start; 607 uint64_t process_va_end; 608 uint32_t gds_base; 609 uint32_t gds_size; 610 uint32_t gws_base; 611 uint32_t gws_size; 612 uint32_t oa_mask; 613 614 uint64_t output_addr; // output addr of the acquired vmid value 615 616 uint64_t timestamp; 617 618 uint32_t process_vm_cntl; 619 enum MES_QUEUE_TYPE queue_type; 620 621 uint32_t process_context_array_index; 622 623 uint32_t alignment_mode_setting; 624 }; 625 626 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS]; 627 }; 628 629 enum MESAPI_MISC_OPCODE { 630 MESAPI_MISC__WRITE_REG, 631 MESAPI_MISC__INV_GART, 632 MESAPI_MISC__QUERY_STATUS, 633 MESAPI_MISC__READ_REG, 634 MESAPI_MISC__WAIT_REG_MEM, 635 MESAPI_MISC__SET_SHADER_DEBUGGER, 636 MESAPI_MISC__NOTIFY_WORK_ON_UNMAPPED_QUEUE, 637 MESAPI_MISC__NOTIFY_TO_UNMAP_PROCESSES, 638 639 MESAPI_MISC__MAX, 640 }; 641 642 enum {MISC_DATA_MAX_SIZE_IN_DWORDS = 20}; 643 644 struct WRITE_REG { 645 uint32_t reg_offset; 646 uint32_t reg_value; 647 }; 648 649 struct READ_REG { 650 uint32_t reg_offset; 651 uint64_t buffer_addr; 652 union { 653 struct { 654 uint32_t read64Bits : 1; 655 uint32_t reserved : 31; 656 } bits; 657 uint32_t all; 658 } option; 659 }; 660 661 struct INV_GART { 662 uint64_t inv_range_va_start; 663 uint64_t inv_range_size; 664 }; 665 666 struct QUERY_STATUS { 667 uint32_t context_id; 668 }; 669 670 enum WRM_OPERATION { 671 WRM_OPERATION__WAIT_REG_MEM, 672 WRM_OPERATION__WR_WAIT_WR_REG, 673 674 WRM_OPERATION__MAX, 675 }; 676 677 struct WAIT_REG_MEM { 678 enum WRM_OPERATION op; 679 /* only function = equal_to_the_reference_value and mem_space = register_space supported for now */ 680 uint32_t reference; 681 uint32_t mask; 682 uint32_t reg_offset1; 683 uint32_t reg_offset2; 684 }; 685 686 struct SET_SHADER_DEBUGGER { 687 uint64_t process_context_addr; 688 union { 689 struct { 690 uint32_t single_memop : 1; // SQ_DEBUG.single_memop 691 uint32_t single_alu_op : 1; // SQ_DEBUG.single_alu_op 692 uint32_t reserved : 30; 693 }; 694 uint32_t u32all; 695 } flags; 696 uint32_t spi_gdbg_per_vmid_cntl; 697 uint32_t tcp_watch_cntl[4]; // TCP_WATCHx_CNTL 698 uint32_t trap_en; 699 }; 700 701 struct SET_GANG_SUBMIT { 702 uint64_t gang_context_addr; 703 uint64_t slave_gang_context_addr; 704 uint32_t gang_context_array_index; 705 uint32_t slave_gang_context_array_index; 706 }; 707 708 union MESAPI__MISC { 709 struct { 710 union MES_API_HEADER header; 711 enum MESAPI_MISC_OPCODE opcode; 712 struct MES_API_STATUS api_status; 713 union { 714 struct WRITE_REG write_reg; 715 struct INV_GART inv_gart; 716 struct QUERY_STATUS query_status; 717 struct READ_REG read_reg; 718 struct WAIT_REG_MEM wait_reg_mem; 719 struct SET_SHADER_DEBUGGER set_shader_debugger; 720 enum MES_AMD_PRIORITY_LEVEL queue_sch_level; 721 722 uint32_t data[MISC_DATA_MAX_SIZE_IN_DWORDS]; 723 }; 724 uint64_t timestamp; 725 uint32_t doorbell_offset; 726 uint32_t os_fence; 727 }; 728 729 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS]; 730 }; 731 732 union MESAPI__UPDATE_ROOT_PAGE_TABLE { 733 struct { 734 union MES_API_HEADER header; 735 uint64_t page_table_base_addr; 736 uint64_t process_context_addr; 737 struct MES_API_STATUS api_status; 738 uint64_t timestamp; 739 uint32_t process_context_array_index; 740 }; 741 742 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS]; 743 }; 744 745 union MESAPI_AMD_LOG { 746 struct { 747 union MES_API_HEADER header; 748 uint64_t p_buffer_memory; 749 uint64_t p_buffer_size_used; 750 struct MES_API_STATUS api_status; 751 uint64_t timestamp; 752 }; 753 754 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS]; 755 }; 756 757 enum MES_SE_MODE { 758 MES_SE_MODE_INVALID = 0, 759 MES_SE_MODE_SINGLE_SE = 1, 760 MES_SE_MODE_DUAL_SE = 2, 761 MES_SE_MODE_LOWER_POWER = 3, 762 }; 763 764 union MESAPI__SET_SE_MODE { 765 struct { 766 union MES_API_HEADER header; 767 /* the new SE mode to apply*/ 768 enum MES_SE_MODE new_se_mode; 769 /* the fence to make sure the ItCpgCtxtSync packet is completed */ 770 uint64_t cpg_ctxt_sync_fence_addr; 771 uint32_t cpg_ctxt_sync_fence_value; 772 /* log_seq_time - Scheduler logs the switch seq start/end ts in the IH cookies */ 773 union { 774 struct { 775 uint32_t log_seq_time : 1; 776 uint32_t reserved : 31; 777 }; 778 uint32_t uint32_all; 779 }; 780 struct MES_API_STATUS api_status; 781 }; 782 783 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS]; 784 }; 785 786 union MESAPI__SET_GANG_SUBMIT { 787 struct { 788 union MES_API_HEADER header; 789 struct MES_API_STATUS api_status; 790 struct SET_GANG_SUBMIT set_gang_submit; 791 }; 792 793 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS]; 794 }; 795 796 #pragma pack(pop) 797 798 #endif 799