1*8ce9c731SPerry Yuan /* 2*8ce9c731SPerry Yuan * Copyright 2026 Advanced Micro Devices, Inc. 3*8ce9c731SPerry Yuan * 4*8ce9c731SPerry Yuan * Permission is hereby granted, free of charge, to any person obtaining a 5*8ce9c731SPerry Yuan * copy of this software and associated documentation files (the "Software"), 6*8ce9c731SPerry Yuan * to deal in the Software without restriction, including without limitation 7*8ce9c731SPerry Yuan * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8*8ce9c731SPerry Yuan * and/or sell copies of the Software, and to permit persons to whom the 9*8ce9c731SPerry Yuan * Software is furnished to do so, subject to the following conditions: 10*8ce9c731SPerry Yuan * 11*8ce9c731SPerry Yuan * The above copyright notice and this permission notice shall be included in 12*8ce9c731SPerry Yuan * all copies or substantial portions of the Software. 13*8ce9c731SPerry Yuan * 14*8ce9c731SPerry Yuan * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15*8ce9c731SPerry Yuan * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16*8ce9c731SPerry Yuan * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17*8ce9c731SPerry Yuan * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18*8ce9c731SPerry Yuan * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19*8ce9c731SPerry Yuan * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20*8ce9c731SPerry Yuan * OTHER DEALINGS IN THE SOFTWARE. 21*8ce9c731SPerry Yuan */ 22*8ce9c731SPerry Yuan 23*8ce9c731SPerry Yuan #ifndef __AMDGPU_PTL_H__ 24*8ce9c731SPerry Yuan #define __AMDGPU_PTL_H__ 25*8ce9c731SPerry Yuan 26*8ce9c731SPerry Yuan enum amdgpu_ptl_fmt { 27*8ce9c731SPerry Yuan AMDGPU_PTL_FMT_I8 = 0, 28*8ce9c731SPerry Yuan AMDGPU_PTL_FMT_F16 = 1, 29*8ce9c731SPerry Yuan AMDGPU_PTL_FMT_BF16 = 2, 30*8ce9c731SPerry Yuan AMDGPU_PTL_FMT_F32 = 3, 31*8ce9c731SPerry Yuan AMDGPU_PTL_FMT_F64 = 4, 32*8ce9c731SPerry Yuan AMDGPU_PTL_FMT_F8 = 5, 33*8ce9c731SPerry Yuan AMDGPU_PTL_FMT_VECTOR = 6, 34*8ce9c731SPerry Yuan AMDGPU_PTL_FMT_INVALID = 7, 35*8ce9c731SPerry Yuan }; 36*8ce9c731SPerry Yuan 37*8ce9c731SPerry Yuan struct amdgpu_ptl { 38*8ce9c731SPerry Yuan enum amdgpu_ptl_fmt fmt1; 39*8ce9c731SPerry Yuan enum amdgpu_ptl_fmt fmt2; 40*8ce9c731SPerry Yuan bool enabled; 41*8ce9c731SPerry Yuan bool hw_supported; 42*8ce9c731SPerry Yuan struct mutex mutex; 43*8ce9c731SPerry Yuan }; 44*8ce9c731SPerry Yuan 45*8ce9c731SPerry Yuan int amdgpu_ptl_perf_monitor_ctrl(struct amdgpu_device *adev, u32 req_code, 46*8ce9c731SPerry Yuan u32 *ptl_state, 47*8ce9c731SPerry Yuan enum amdgpu_ptl_fmt *fmt1, 48*8ce9c731SPerry Yuan enum amdgpu_ptl_fmt *fmt2); 49*8ce9c731SPerry Yuan 50*8ce9c731SPerry Yuan #endif /* __AMDGPU_PTL_H__ */ 51