xref: /linux/drivers/gpu/drm/amd/display/dmub/dmub_srv.h (revision c94cd9508b1335b949fd13ebd269313c65492df0)
1 /*
2  * Copyright 2019 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #ifndef _DMUB_SRV_H_
27 #define _DMUB_SRV_H_
28 
29 /**
30  * DOC: DMUB interface and operation
31  *
32  * DMUB is the interface to the display DMCUB microcontroller on DCN hardware.
33  * It delegates hardware initialization and command submission to the
34  * microcontroller. DMUB is the shortname for DMCUB.
35  *
36  * This interface is not thread-safe. Ensure that all access to the interface
37  * is properly synchronized by the caller.
38  *
39  * Initialization and usage of the DMUB service should be done in the
40  * steps given below:
41  *
42  * 1. dmub_srv_create()
43  * 2. dmub_srv_has_hw_support()
44  * 3. dmub_srv_calc_region_info()
45  * 4. dmub_srv_hw_init()
46  *
47  * The call to dmub_srv_create() is required to use the server.
48  *
49  * The calls to dmub_srv_has_hw_support() and dmub_srv_calc_region_info()
50  * are helpers to query cache window size and allocate framebuffer(s)
51  * for the cache windows.
52  *
53  * The call to dmub_srv_hw_init() programs the DMCUB registers to prepare
54  * for command submission. Commands can be queued via dmub_srv_cmd_queue()
55  * and executed via dmub_srv_cmd_execute().
56  *
57  * If the queue is full the dmub_srv_wait_for_idle() call can be used to
58  * wait until the queue has been cleared.
59  *
60  * Destroying the DMUB service can be done by calling dmub_srv_destroy().
61  * This does not clear DMUB hardware state, only software state.
62  *
63  * The interface is intended to be standalone and should not depend on any
64  * other component within DAL.
65  */
66 
67 #include "inc/dmub_cmd.h"
68 #include "dc/dc_types.h"
69 
70 #define DMUB_PC_SNAPSHOT_COUNT 10
71 
72 /* Forward declarations */
73 struct dmub_srv;
74 struct dmub_srv_common_regs;
75 struct dmub_srv_dcn31_regs;
76 
77 struct dmcub_trace_buf_entry;
78 
79 /* enum dmub_window_memory_type - memory location type specification for windows */
80 enum dmub_window_memory_type {
81 	DMUB_WINDOW_MEMORY_TYPE_FB = 0,
82 	DMUB_WINDOW_MEMORY_TYPE_GART
83 };
84 
85 /* enum dmub_status - return code for dmcub functions */
86 enum dmub_status {
87 	DMUB_STATUS_OK = 0,
88 	DMUB_STATUS_NO_CTX,
89 	DMUB_STATUS_QUEUE_FULL,
90 	DMUB_STATUS_TIMEOUT,
91 	DMUB_STATUS_INVALID,
92 	DMUB_STATUS_HW_FAILURE,
93 	DMUB_STATUS_POWER_STATE_D3
94 };
95 
96 /* enum dmub_asic - dmub asic identifier */
97 enum dmub_asic {
98 	DMUB_ASIC_NONE = 0,
99 	DMUB_ASIC_DCN20,
100 	DMUB_ASIC_DCN21,
101 	DMUB_ASIC_DCN30,
102 	DMUB_ASIC_DCN301,
103 	DMUB_ASIC_DCN302,
104 	DMUB_ASIC_DCN303,
105 	DMUB_ASIC_DCN31,
106 	DMUB_ASIC_DCN31B,
107 	DMUB_ASIC_DCN314,
108 	DMUB_ASIC_DCN315,
109 	DMUB_ASIC_DCN316,
110 	DMUB_ASIC_DCN32,
111 	DMUB_ASIC_DCN321,
112 	DMUB_ASIC_DCN35,
113 	DMUB_ASIC_DCN351,
114 	DMUB_ASIC_DCN401,
115 	DMUB_ASIC_MAX,
116 };
117 
118 /* enum dmub_window_id - dmub window identifier */
119 enum dmub_window_id {
120 	DMUB_WINDOW_0_INST_CONST = 0,
121 	DMUB_WINDOW_1_STACK,
122 	DMUB_WINDOW_2_BSS_DATA,
123 	DMUB_WINDOW_3_VBIOS,
124 	DMUB_WINDOW_4_MAILBOX,
125 	DMUB_WINDOW_5_TRACEBUFF,
126 	DMUB_WINDOW_6_FW_STATE,
127 	DMUB_WINDOW_7_SCRATCH_MEM,
128 	DMUB_WINDOW_SHARED_STATE,
129 	DMUB_WINDOW_TOTAL,
130 };
131 
132 /* enum dmub_notification_type - dmub outbox notification identifier */
133 enum dmub_notification_type {
134 	DMUB_NOTIFICATION_NO_DATA = 0,
135 	DMUB_NOTIFICATION_AUX_REPLY,
136 	DMUB_NOTIFICATION_HPD,
137 	DMUB_NOTIFICATION_HPD_IRQ,
138 	DMUB_NOTIFICATION_SET_CONFIG_REPLY,
139 	DMUB_NOTIFICATION_DPIA_NOTIFICATION,
140 	DMUB_NOTIFICATION_HPD_SENSE_NOTIFY,
141 	DMUB_NOTIFICATION_MAX
142 };
143 
144 /**
145  * DPIA NOTIFICATION Response Type
146  */
147 enum dpia_notify_bw_alloc_status {
148 
149 	DPIA_BW_REQ_FAILED = 0,
150 	DPIA_BW_REQ_SUCCESS,
151 	DPIA_EST_BW_CHANGED,
152 	DPIA_BW_ALLOC_CAPS_CHANGED
153 };
154 
155 /* enum dmub_memory_access_type - memory access method */
156 enum dmub_memory_access_type {
157 	DMUB_MEMORY_ACCESS_DEFAULT,
158 	DMUB_MEMORY_ACCESS_CPU = DMUB_MEMORY_ACCESS_DEFAULT,
159 	DMUB_MEMORY_ACCESS_DMA
160 };
161 
162 /* enum dmub_power_state type - to track DC power state in dmub_srv */
163 enum dmub_srv_power_state_type {
164 	DMUB_POWER_STATE_UNDEFINED = 0,
165 	DMUB_POWER_STATE_D0 = 1,
166 	DMUB_POWER_STATE_D3 = 8
167 };
168 
169 /**
170  * struct dmub_region - dmub hw memory region
171  * @base: base address for region, must be 256 byte aligned
172  * @top: top address for region
173  */
174 struct dmub_region {
175 	uint32_t base;
176 	uint32_t top;
177 };
178 
179 /**
180  * struct dmub_window - dmub hw cache window
181  * @off: offset to the fb memory in gpu address space
182  * @r: region in uc address space for cache window
183  */
184 struct dmub_window {
185 	union dmub_addr offset;
186 	struct dmub_region region;
187 };
188 
189 /**
190  * struct dmub_fb - defines a dmub framebuffer memory region
191  * @cpu_addr: cpu virtual address for the region, NULL if invalid
192  * @gpu_addr: gpu virtual address for the region, NULL if invalid
193  * @size: size of the region in bytes, zero if invalid
194  */
195 struct dmub_fb {
196 	void *cpu_addr;
197 	uint64_t gpu_addr;
198 	uint32_t size;
199 };
200 
201 /**
202  * struct dmub_srv_region_params - params used for calculating dmub regions
203  * @inst_const_size: size of the fw inst const section
204  * @bss_data_size: size of the fw bss data section
205  * @vbios_size: size of the vbios data
206  * @fw_bss_data: raw firmware bss data section
207  */
208 struct dmub_srv_region_params {
209 	uint32_t inst_const_size;
210 	uint32_t bss_data_size;
211 	uint32_t vbios_size;
212 	const uint8_t *fw_inst_const;
213 	const uint8_t *fw_bss_data;
214 	const enum dmub_window_memory_type *window_memory_type;
215 };
216 
217 /**
218  * struct dmub_srv_region_info - output region info from the dmub service
219  * @fb_size: required minimum fb size for all regions, aligned to 4096 bytes
220  * @num_regions: number of regions used by the dmub service
221  * @regions: region info
222  *
223  * The regions are aligned such that they can be all placed within the
224  * same framebuffer but they can also be placed into different framebuffers.
225  *
226  * The size of each region can be calculated by the caller:
227  * size = reg.top - reg.base
228  *
229  * Care must be taken when performing custom allocations to ensure that each
230  * region base address is 256 byte aligned.
231  */
232 struct dmub_srv_region_info {
233 	uint32_t fb_size;
234 	uint32_t gart_size;
235 	uint8_t num_regions;
236 	struct dmub_region regions[DMUB_WINDOW_TOTAL];
237 };
238 
239 /**
240  * struct dmub_srv_memory_params - parameters used for driver fb setup
241  * @region_info: region info calculated by dmub service
242  * @cpu_fb_addr: base cpu address for the framebuffer
243  * @cpu_inbox_addr: base cpu address for the gart
244  * @gpu_fb_addr: base gpu virtual address for the framebuffer
245  * @gpu_inbox_addr: base gpu virtual address for the gart
246  */
247 struct dmub_srv_memory_params {
248 	const struct dmub_srv_region_info *region_info;
249 	void *cpu_fb_addr;
250 	void *cpu_gart_addr;
251 	uint64_t gpu_fb_addr;
252 	uint64_t gpu_gart_addr;
253 	const enum dmub_window_memory_type *window_memory_type;
254 };
255 
256 /**
257  * struct dmub_srv_fb_info - output fb info from the dmub service
258  * @num_fbs: number of required dmub framebuffers
259  * @fbs: fb data for each region
260  *
261  * Output from the dmub service helper that can be used by the
262  * driver to prepare dmub_fb that can be passed into the dmub
263  * hw init service.
264  *
265  * Assumes that all regions are within the same framebuffer
266  * and have been setup according to the region_info generated
267  * by the dmub service.
268  */
269 struct dmub_srv_fb_info {
270 	uint8_t num_fb;
271 	struct dmub_fb fb[DMUB_WINDOW_TOTAL];
272 };
273 
274 /*
275  * struct dmub_srv_hw_params - params for dmub hardware initialization
276  * @fb: framebuffer info for each region
277  * @fb_base: base of the framebuffer aperture
278  * @fb_offset: offset of the framebuffer aperture
279  * @psp_version: psp version to pass for DMCU init
280  * @load_inst_const: true if DMUB should load inst const fw
281  */
282 struct dmub_srv_hw_params {
283 	struct dmub_fb *fb[DMUB_WINDOW_TOTAL];
284 	uint64_t fb_base;
285 	uint64_t fb_offset;
286 	uint32_t psp_version;
287 	bool load_inst_const;
288 	bool skip_panel_power_sequence;
289 	bool disable_z10;
290 	bool power_optimization;
291 	bool dpia_supported;
292 	bool disable_dpia;
293 	bool usb4_cm_version;
294 	bool fw_in_system_memory;
295 	bool dpia_hpd_int_enable_supported;
296 	bool disable_clock_gate;
297 	bool disallow_dispclk_dppclk_ds;
298 	bool ips_sequential_ono;
299 	enum dmub_memory_access_type mem_access_type;
300 	enum dmub_ips_disable_type disable_ips;
301 	bool disallow_phy_access;
302 	bool disable_sldo_opt;
303 };
304 
305 /**
306  * struct dmub_srv_debug - Debug info for dmub_srv
307  * @timeout_occured: Indicates a timeout occured on any message from driver to dmub
308  * @timeout_cmd: first cmd sent from driver that timed out - subsequent timeouts are not stored
309  */
310 struct dmub_srv_debug {
311 	bool timeout_occured;
312 	union dmub_rb_cmd timeout_cmd;
313 	unsigned long long timestamp;
314 };
315 
316 /**
317  * struct dmub_diagnostic_data - Diagnostic data retrieved from DMCUB for
318  * debugging purposes, including logging, crash analysis, etc.
319  */
320 struct dmub_diagnostic_data {
321 	uint32_t dmcub_version;
322 	uint32_t scratch[17];
323 	uint32_t pc[DMUB_PC_SNAPSHOT_COUNT];
324 	uint32_t undefined_address_fault_addr;
325 	uint32_t inst_fetch_fault_addr;
326 	uint32_t data_write_fault_addr;
327 	uint32_t inbox1_rptr;
328 	uint32_t inbox1_wptr;
329 	uint32_t inbox1_size;
330 	uint32_t inbox0_rptr;
331 	uint32_t inbox0_wptr;
332 	uint32_t inbox0_size;
333 	uint32_t outbox1_rptr;
334 	uint32_t outbox1_wptr;
335 	uint32_t outbox1_size;
336 	uint32_t gpint_datain0;
337 	struct dmub_srv_debug timeout_info;
338 	uint8_t is_dmcub_enabled : 1;
339 	uint8_t is_dmcub_soft_reset : 1;
340 	uint8_t is_dmcub_secure_reset : 1;
341 	uint8_t is_traceport_en : 1;
342 	uint8_t is_cw0_enabled : 1;
343 	uint8_t is_cw6_enabled : 1;
344 };
345 
346 /**
347  * struct dmub_srv_base_funcs - Driver specific base callbacks
348  */
349 struct dmub_srv_base_funcs {
350 	/**
351 	 * @reg_read:
352 	 *
353 	 * Hook for reading a register.
354 	 *
355 	 * Return: The 32-bit register value from the given address.
356 	 */
357 	uint32_t (*reg_read)(void *ctx, uint32_t address);
358 
359 	/**
360 	 * @reg_write:
361 	 *
362 	 * Hook for writing a value to the register specified by address.
363 	 */
364 	void (*reg_write)(void *ctx, uint32_t address, uint32_t value);
365 };
366 
367 /**
368  * struct dmub_srv_hw_funcs - hardware sequencer funcs for dmub
369  */
370 struct dmub_srv_hw_funcs {
371 	/* private: internal use only */
372 
373 	void (*init)(struct dmub_srv *dmub);
374 
375 	void (*reset)(struct dmub_srv *dmub);
376 
377 	void (*reset_release)(struct dmub_srv *dmub);
378 
379 	void (*backdoor_load)(struct dmub_srv *dmub,
380 			      const struct dmub_window *cw0,
381 			      const struct dmub_window *cw1);
382 
383 	void (*backdoor_load_zfb_mode)(struct dmub_srv *dmub,
384 			      const struct dmub_window *cw0,
385 			      const struct dmub_window *cw1);
386 	void (*setup_windows)(struct dmub_srv *dmub,
387 			      const struct dmub_window *cw2,
388 			      const struct dmub_window *cw3,
389 			      const struct dmub_window *cw4,
390 			      const struct dmub_window *cw5,
391 			      const struct dmub_window *cw6,
392 			      const struct dmub_window *region6);
393 
394 	void (*setup_mailbox)(struct dmub_srv *dmub,
395 			      const struct dmub_region *inbox1);
396 
397 	uint32_t (*get_inbox1_wptr)(struct dmub_srv *dmub);
398 
399 	uint32_t (*get_inbox1_rptr)(struct dmub_srv *dmub);
400 
401 	void (*set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset);
402 
403 	void (*setup_out_mailbox)(struct dmub_srv *dmub,
404 			      const struct dmub_region *outbox1);
405 
406 	uint32_t (*get_outbox1_wptr)(struct dmub_srv *dmub);
407 
408 	void (*set_outbox1_rptr)(struct dmub_srv *dmub, uint32_t rptr_offset);
409 
410 	void (*setup_outbox0)(struct dmub_srv *dmub,
411 			      const struct dmub_region *outbox0);
412 
413 	uint32_t (*get_outbox0_wptr)(struct dmub_srv *dmub);
414 
415 	void (*set_outbox0_rptr)(struct dmub_srv *dmub, uint32_t rptr_offset);
416 
417 	uint32_t (*emul_get_inbox1_rptr)(struct dmub_srv *dmub);
418 
419 	void (*emul_set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset);
420 
421 	bool (*is_supported)(struct dmub_srv *dmub);
422 
423 	bool (*is_psrsu_supported)(struct dmub_srv *dmub);
424 
425 	bool (*is_hw_init)(struct dmub_srv *dmub);
426 	bool (*is_hw_powered_up)(struct dmub_srv *dmub);
427 
428 	void (*enable_dmub_boot_options)(struct dmub_srv *dmub,
429 				const struct dmub_srv_hw_params *params);
430 
431 	void (*skip_dmub_panel_power_sequence)(struct dmub_srv *dmub, bool skip);
432 
433 	union dmub_fw_boot_status (*get_fw_status)(struct dmub_srv *dmub);
434 
435 	union dmub_fw_boot_options (*get_fw_boot_option)(struct dmub_srv *dmub);
436 
437 	void (*set_gpint)(struct dmub_srv *dmub,
438 			  union dmub_gpint_data_register reg);
439 
440 	bool (*is_gpint_acked)(struct dmub_srv *dmub,
441 			       union dmub_gpint_data_register reg);
442 
443 	uint32_t (*get_gpint_response)(struct dmub_srv *dmub);
444 
445 	uint32_t (*get_gpint_dataout)(struct dmub_srv *dmub);
446 
447 	void (*configure_dmub_in_system_memory)(struct dmub_srv *dmub);
448 	void (*clear_inbox0_ack_register)(struct dmub_srv *dmub);
449 	uint32_t (*read_inbox0_ack_register)(struct dmub_srv *dmub);
450 	void (*send_inbox0_cmd)(struct dmub_srv *dmub, union dmub_inbox0_data_register data);
451 	uint32_t (*get_current_time)(struct dmub_srv *dmub);
452 
453 	void (*get_diagnostic_data)(struct dmub_srv *dmub, struct dmub_diagnostic_data *dmub_oca);
454 
455 	bool (*should_detect)(struct dmub_srv *dmub);
456 	void (*init_reg_offsets)(struct dmub_srv *dmub, struct dc_context *ctx);
457 
458 	void (*subvp_save_surf_addr)(struct dmub_srv *dmub, const struct dc_plane_address *addr, uint8_t subvp_index);
459 	void (*send_reg_inbox0_cmd_msg)(struct dmub_srv *dmub,
460 			union dmub_rb_cmd *cmd);
461 	uint32_t (*read_reg_inbox0_rsp_int_status)(struct dmub_srv *dmub);
462 	void (*read_reg_inbox0_cmd_rsp)(struct dmub_srv *dmub,
463 			union dmub_rb_cmd *cmd);
464 	void (*write_reg_inbox0_rsp_int_ack)(struct dmub_srv *dmub);
465 	uint32_t (*read_reg_outbox0_rdy_int_status)(struct dmub_srv *dmub);
466 	void (*write_reg_outbox0_rdy_int_ack)(struct dmub_srv *dmub);
467 	void (*read_reg_outbox0_msg)(struct dmub_srv *dmub, uint32_t *msg);
468 	void (*write_reg_outbox0_rsp)(struct dmub_srv *dmub, uint32_t *rsp);
469 	uint32_t (*read_reg_outbox0_rsp_int_status)(struct dmub_srv *dmub);
470 	void (*enable_reg_inbox0_rsp_int)(struct dmub_srv *dmub, bool enable);
471 	void (*enable_reg_outbox0_rdy_int)(struct dmub_srv *dmub, bool enable);
472 };
473 
474 /**
475  * struct dmub_srv_create_params - params for dmub service creation
476  * @base_funcs: driver supplied base routines
477  * @hw_funcs: optional overrides for hw funcs
478  * @user_ctx: context data for callback funcs
479  * @asic: driver supplied asic
480  * @fw_version: the current firmware version, if any
481  * @is_virtual: false for hw support only
482  */
483 struct dmub_srv_create_params {
484 	struct dmub_srv_base_funcs funcs;
485 	struct dmub_srv_hw_funcs *hw_funcs;
486 	void *user_ctx;
487 	enum dmub_asic asic;
488 	uint32_t fw_version;
489 	bool is_virtual;
490 };
491 
492 /**
493  * struct dmub_srv - software state for dmcub
494  * @asic: dmub asic identifier
495  * @user_ctx: user provided context for the dmub_srv
496  * @fw_version: the current firmware version, if any
497  * @is_virtual: false if hardware support only
498  * @shared_state: dmub shared state between firmware and driver
499  * @fw_state: dmub firmware state pointer
500  */
501 struct dmub_srv {
502 	enum dmub_asic asic;
503 	void *user_ctx;
504 	uint32_t fw_version;
505 	bool is_virtual;
506 	struct dmub_fb scratch_mem_fb;
507 	volatile struct dmub_shared_state_feature_block *shared_state;
508 	volatile const struct dmub_fw_state *fw_state;
509 
510 	/* private: internal use only */
511 	const struct dmub_srv_common_regs *regs;
512 	const struct dmub_srv_dcn31_regs *regs_dcn31;
513 	struct dmub_srv_dcn32_regs *regs_dcn32;
514 	struct dmub_srv_dcn35_regs *regs_dcn35;
515 	const struct dmub_srv_dcn401_regs *regs_dcn401;
516 
517 	struct dmub_srv_base_funcs funcs;
518 	struct dmub_srv_hw_funcs hw_funcs;
519 	struct dmub_rb inbox1_rb;
520 	uint32_t inbox1_last_wptr;
521 	/**
522 	 * outbox1_rb is accessed without locks (dal & dc)
523 	 * and to be used only in dmub_srv_stat_get_notification()
524 	 */
525 	struct dmub_rb outbox1_rb;
526 
527 	struct dmub_rb outbox0_rb;
528 
529 	bool sw_init;
530 	bool hw_init;
531 
532 	uint64_t fb_base;
533 	uint64_t fb_offset;
534 	uint32_t psp_version;
535 
536 	/* Feature capabilities reported by fw */
537 	struct dmub_fw_meta_info meta_info;
538 	struct dmub_feature_caps feature_caps;
539 	struct dmub_visual_confirm_color visual_confirm_color;
540 
541 	enum dmub_srv_power_state_type power_state;
542 	struct dmub_srv_debug debug;
543 };
544 
545 /**
546  * struct dmub_notification - dmub notification data
547  * @type: dmub notification type
548  * @link_index: link index to identify aux connection
549  * @result: USB4 status returned from dmub
550  * @pending_notification: Indicates there are other pending notifications
551  * @aux_reply: aux reply
552  * @hpd_status: hpd status
553  * @bw_alloc_reply: BW Allocation reply from CM/DPIA
554  */
555 struct dmub_notification {
556 	enum dmub_notification_type type;
557 	uint8_t link_index;
558 	uint8_t result;
559 	bool pending_notification;
560 	union {
561 		struct aux_reply_data aux_reply;
562 		enum dp_hpd_status hpd_status;
563 		enum set_config_status sc_status;
564 		/**
565 		 * DPIA notification command.
566 		 */
567 		struct dmub_rb_cmd_dpia_notification dpia_notification;
568 		struct dmub_rb_cmd_hpd_sense_notify_data hpd_sense_notify;
569 	};
570 };
571 
572 /**
573  * DMUB firmware version helper macro - useful for checking if the version
574  * of a firmware to know if feature or functionality is supported or present.
575  */
576 #define DMUB_FW_VERSION(major, minor, revision) \
577 	((((major) & 0xFF) << 24) | (((minor) & 0xFF) << 16) | (((revision) & 0xFF) << 8))
578 
579 /**
580  * dmub_srv_create() - creates the DMUB service.
581  * @dmub: the dmub service
582  * @params: creation parameters for the service
583  *
584  * Return:
585  *   DMUB_STATUS_OK - success
586  *   DMUB_STATUS_INVALID - unspecified error
587  */
588 enum dmub_status dmub_srv_create(struct dmub_srv *dmub,
589 				 const struct dmub_srv_create_params *params);
590 
591 /**
592  * dmub_srv_destroy() - destroys the DMUB service.
593  * @dmub: the dmub service
594  */
595 void dmub_srv_destroy(struct dmub_srv *dmub);
596 
597 /**
598  * dmub_srv_calc_region_info() - retreives region info from the dmub service
599  * @dmub: the dmub service
600  * @params: parameters used to calculate region locations
601  * @info_out: the output region info from dmub
602  *
603  * Calculates the base and top address for all relevant dmub regions
604  * using the parameters given (if any).
605  *
606  * Return:
607  *   DMUB_STATUS_OK - success
608  *   DMUB_STATUS_INVALID - unspecified error
609  */
610 enum dmub_status
611 dmub_srv_calc_region_info(struct dmub_srv *dmub,
612 			  const struct dmub_srv_region_params *params,
613 			  struct dmub_srv_region_info *out);
614 
615 /**
616  * dmub_srv_calc_region_info() - retreives fb info from the dmub service
617  * @dmub: the dmub service
618  * @params: parameters used to calculate fb locations
619  * @info_out: the output fb info from dmub
620  *
621  * Calculates the base and top address for all relevant dmub regions
622  * using the parameters given (if any).
623  *
624  * Return:
625  *   DMUB_STATUS_OK - success
626  *   DMUB_STATUS_INVALID - unspecified error
627  */
628 enum dmub_status dmub_srv_calc_mem_info(struct dmub_srv *dmub,
629 				       const struct dmub_srv_memory_params *params,
630 				       struct dmub_srv_fb_info *out);
631 
632 /**
633  * dmub_srv_has_hw_support() - returns hw support state for dmcub
634  * @dmub: the dmub service
635  * @is_supported: hw support state
636  *
637  * Queries the hardware for DMCUB support and returns the result.
638  *
639  * Can be called before dmub_srv_hw_init().
640  *
641  * Return:
642  *   DMUB_STATUS_OK - success
643  *   DMUB_STATUS_INVALID - unspecified error
644  */
645 enum dmub_status dmub_srv_has_hw_support(struct dmub_srv *dmub,
646 					 bool *is_supported);
647 
648 /**
649  * dmub_srv_is_hw_init() - returns hardware init state
650  *
651  * Return:
652  *   DMUB_STATUS_OK - success
653  *   DMUB_STATUS_INVALID - unspecified error
654  */
655 enum dmub_status dmub_srv_is_hw_init(struct dmub_srv *dmub, bool *is_hw_init);
656 
657 /**
658  * dmub_srv_hw_init() - initializes the underlying DMUB hardware
659  * @dmub: the dmub service
660  * @params: params for hardware initialization
661  *
662  * Resets the DMUB hardware and performs backdoor loading of the
663  * required cache regions based on the input framebuffer regions.
664  *
665  * Return:
666  *   DMUB_STATUS_OK - success
667  *   DMUB_STATUS_NO_CTX - dmcub context not initialized
668  *   DMUB_STATUS_INVALID - unspecified error
669  */
670 enum dmub_status dmub_srv_hw_init(struct dmub_srv *dmub,
671 				  const struct dmub_srv_hw_params *params);
672 
673 /**
674  * dmub_srv_hw_reset() - puts the DMUB hardware in reset state if initialized
675  * @dmub: the dmub service
676  *
677  * Before destroying the DMUB service or releasing the backing framebuffer
678  * memory we'll need to put the DMCUB into reset first.
679  *
680  * A subsequent call to dmub_srv_hw_init() will re-enable the DMCUB.
681  *
682  * Return:
683  *   DMUB_STATUS_OK - success
684  *   DMUB_STATUS_INVALID - unspecified error
685  */
686 enum dmub_status dmub_srv_hw_reset(struct dmub_srv *dmub);
687 
688 /**
689  * dmub_srv_sync_inbox1() - sync sw state with hw state
690  * @dmub: the dmub service
691  *
692  * Sync sw state with hw state when resume from S0i3
693  *
694  * Return:
695  *   DMUB_STATUS_OK - success
696  *   DMUB_STATUS_INVALID - unspecified error
697  */
698 enum dmub_status dmub_srv_sync_inbox1(struct dmub_srv *dmub);
699 
700 /**
701  * dmub_srv_cmd_queue() - queues a command to the DMUB
702  * @dmub: the dmub service
703  * @cmd: the command to queue
704  *
705  * Queues a command to the DMUB service but does not begin execution
706  * immediately.
707  *
708  * Return:
709  *   DMUB_STATUS_OK - success
710  *   DMUB_STATUS_QUEUE_FULL - no remaining room in queue
711  *   DMUB_STATUS_INVALID - unspecified error
712  */
713 enum dmub_status dmub_srv_cmd_queue(struct dmub_srv *dmub,
714 				    const union dmub_rb_cmd *cmd);
715 
716 /**
717  * dmub_srv_cmd_execute() - Executes a queued sequence to the dmub
718  * @dmub: the dmub service
719  *
720  * Begins execution of queued commands on the dmub.
721  *
722  * Return:
723  *   DMUB_STATUS_OK - success
724  *   DMUB_STATUS_INVALID - unspecified error
725  */
726 enum dmub_status dmub_srv_cmd_execute(struct dmub_srv *dmub);
727 
728 /**
729  * dmub_srv_wait_for_hw_pwr_up() - Waits for firmware hardware power up is completed
730  * @dmub: the dmub service
731  * @timeout_us: the maximum number of microseconds to wait
732  *
733  * Waits until firmware hardware is powered up. The maximum
734  * wait time is given in microseconds to prevent spinning forever.
735  *
736  * Return:
737  *   DMUB_STATUS_OK - success
738  *   DMUB_STATUS_TIMEOUT - timed out
739  *   DMUB_STATUS_INVALID - unspecified error
740  */
741 enum dmub_status dmub_srv_wait_for_hw_pwr_up(struct dmub_srv *dmub,
742 					     uint32_t timeout_us);
743 
744 bool dmub_srv_is_hw_pwr_up(struct dmub_srv *dmub);
745 
746 /**
747  * dmub_srv_wait_for_auto_load() - Waits for firmware auto load to complete
748  * @dmub: the dmub service
749  * @timeout_us: the maximum number of microseconds to wait
750  *
751  * Waits until firmware has been autoloaded by the DMCUB. The maximum
752  * wait time is given in microseconds to prevent spinning forever.
753  *
754  * On ASICs without firmware autoload support this function will return
755  * immediately.
756  *
757  * Return:
758  *   DMUB_STATUS_OK - success
759  *   DMUB_STATUS_TIMEOUT - wait for phy init timed out
760  *   DMUB_STATUS_INVALID - unspecified error
761  */
762 enum dmub_status dmub_srv_wait_for_auto_load(struct dmub_srv *dmub,
763 					     uint32_t timeout_us);
764 
765 /**
766  * dmub_srv_wait_for_phy_init() - Waits for DMUB PHY init to complete
767  * @dmub: the dmub service
768  * @timeout_us: the maximum number of microseconds to wait
769  *
770  * Waits until the PHY has been initialized by the DMUB. The maximum
771  * wait time is given in microseconds to prevent spinning forever.
772  *
773  * On ASICs without PHY init support this function will return
774  * immediately.
775  *
776  * Return:
777  *   DMUB_STATUS_OK - success
778  *   DMUB_STATUS_TIMEOUT - wait for phy init timed out
779  *   DMUB_STATUS_INVALID - unspecified error
780  */
781 enum dmub_status dmub_srv_wait_for_phy_init(struct dmub_srv *dmub,
782 					    uint32_t timeout_us);
783 
784 /**
785  * dmub_srv_wait_for_idle() - Waits for the DMUB to be idle
786  * @dmub: the dmub service
787  * @timeout_us: the maximum number of microseconds to wait
788  *
789  * Waits until the DMUB buffer is empty and all commands have
790  * finished processing. The maximum wait time is given in
791  * microseconds to prevent spinning forever.
792  *
793  * Return:
794  *   DMUB_STATUS_OK - success
795  *   DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out
796  *   DMUB_STATUS_INVALID - unspecified error
797  */
798 enum dmub_status dmub_srv_wait_for_idle(struct dmub_srv *dmub,
799 					uint32_t timeout_us);
800 
801 /**
802  * dmub_srv_send_gpint_command() - Sends a GPINT based command.
803  * @dmub: the dmub service
804  * @command_code: the command code to send
805  * @param: the command parameter to send
806  * @timeout_us: the maximum number of microseconds to wait
807  *
808  * Sends a command via the general purpose interrupt (GPINT).
809  * Waits for the number of microseconds specified by timeout_us
810  * for the command ACK before returning.
811  *
812  * Can be called after software initialization.
813  *
814  * Return:
815  *   DMUB_STATUS_OK - success
816  *   DMUB_STATUS_TIMEOUT - wait for ACK timed out
817  *   DMUB_STATUS_INVALID - unspecified error
818  */
819 enum dmub_status
820 dmub_srv_send_gpint_command(struct dmub_srv *dmub,
821 			    enum dmub_gpint_command command_code,
822 			    uint16_t param, uint32_t timeout_us);
823 
824 /**
825  * dmub_srv_get_gpint_response() - Queries the GPINT response.
826  * @dmub: the dmub service
827  * @response: the response for the last GPINT
828  *
829  * Returns the response code for the last GPINT interrupt.
830  *
831  * Can be called after software initialization.
832  *
833  * Return:
834  *   DMUB_STATUS_OK - success
835  *   DMUB_STATUS_INVALID - unspecified error
836  */
837 enum dmub_status dmub_srv_get_gpint_response(struct dmub_srv *dmub,
838 					     uint32_t *response);
839 
840 /**
841  * dmub_srv_get_gpint_dataout() - Queries the GPINT DATAOUT.
842  * @dmub: the dmub service
843  * @dataout: the data for the GPINT DATAOUT
844  *
845  * Returns the response code for the last GPINT DATAOUT interrupt.
846  *
847  * Can be called after software initialization.
848  *
849  * Return:
850  *   DMUB_STATUS_OK - success
851  *   DMUB_STATUS_INVALID - unspecified error
852  */
853 enum dmub_status dmub_srv_get_gpint_dataout(struct dmub_srv *dmub,
854 					     uint32_t *dataout);
855 
856 /**
857  * dmub_flush_buffer_mem() - Read back entire frame buffer region.
858  * This ensures that the write from x86 has been flushed and will not
859  * hang the DMCUB.
860  * @fb: frame buffer to flush
861  *
862  * Can be called after software initialization.
863  */
864 void dmub_flush_buffer_mem(const struct dmub_fb *fb);
865 
866 /**
867  * dmub_srv_get_fw_boot_status() - Returns the DMUB boot status bits.
868  *
869  * @dmub: the dmub service
870  * @status: out pointer for firmware status
871  *
872  * Return:
873  *   DMUB_STATUS_OK - success
874  *   DMUB_STATUS_INVALID - unspecified error, unsupported
875  */
876 enum dmub_status dmub_srv_get_fw_boot_status(struct dmub_srv *dmub,
877 					     union dmub_fw_boot_status *status);
878 
879 enum dmub_status dmub_srv_get_fw_boot_option(struct dmub_srv *dmub,
880 					     union dmub_fw_boot_options *option);
881 
882 enum dmub_status dmub_srv_cmd_with_reply_data(struct dmub_srv *dmub,
883 					      union dmub_rb_cmd *cmd);
884 
885 enum dmub_status dmub_srv_set_skip_panel_power_sequence(struct dmub_srv *dmub,
886 					     bool skip);
887 
888 bool dmub_srv_get_outbox0_msg(struct dmub_srv *dmub, struct dmcub_trace_buf_entry *entry);
889 
890 bool dmub_srv_get_diagnostic_data(struct dmub_srv *dmub, struct dmub_diagnostic_data *diag_data);
891 
892 bool dmub_srv_should_detect(struct dmub_srv *dmub);
893 
894 /**
895  * dmub_srv_send_inbox0_cmd() - Send command to DMUB using INBOX0
896  * @dmub: the dmub service
897  * @data: the data to be sent in the INBOX0 command
898  *
899  * Send command by writing directly to INBOX0 WPTR
900  *
901  * Return:
902  *   DMUB_STATUS_OK - success
903  *   DMUB_STATUS_INVALID - hw_init false or hw function does not exist
904  */
905 enum dmub_status dmub_srv_send_inbox0_cmd(struct dmub_srv *dmub, union dmub_inbox0_data_register data);
906 
907 /**
908  * dmub_srv_wait_for_inbox0_ack() - wait for DMUB to ACK INBOX0 command
909  * @dmub: the dmub service
910  * @timeout_us: the maximum number of microseconds to wait
911  *
912  * Wait for DMUB to ACK the INBOX0 message
913  *
914  * Return:
915  *   DMUB_STATUS_OK - success
916  *   DMUB_STATUS_INVALID - hw_init false or hw function does not exist
917  *   DMUB_STATUS_TIMEOUT - wait for ack timed out
918  */
919 enum dmub_status dmub_srv_wait_for_inbox0_ack(struct dmub_srv *dmub, uint32_t timeout_us);
920 
921 /**
922  * dmub_srv_wait_for_inbox0_ack() - clear ACK register for INBOX0
923  * @dmub: the dmub service
924  *
925  * Clear ACK register for INBOX0
926  *
927  * Return:
928  *   DMUB_STATUS_OK - success
929  *   DMUB_STATUS_INVALID - hw_init false or hw function does not exist
930  */
931 enum dmub_status dmub_srv_clear_inbox0_ack(struct dmub_srv *dmub);
932 
933 /**
934  * dmub_srv_subvp_save_surf_addr() - Save primary and meta address for subvp on each flip
935  * @dmub: The dmub service
936  * @addr: The surface address to be programmed on the current flip
937  * @subvp_index: Index of subvp pipe, indicates which subvp pipe the address should be saved for
938  *
939  * Function to save the surface flip addr into scratch registers. This is to fix a race condition
940  * between FW and driver reading / writing to the surface address at the same time. This is
941  * required because there is no EARLIEST_IN_USE_META.
942  *
943  * Return:
944  *   void
945  */
946 void dmub_srv_subvp_save_surf_addr(struct dmub_srv *dmub, const struct dc_plane_address *addr, uint8_t subvp_index);
947 
948 /**
949  * dmub_srv_send_reg_inbox0_cmd() - send a dmub command and wait for the command
950  * being processed by DMUB.
951  * @dmub: The dmub service
952  * @cmd: The dmub command being sent. If with_replay is true, the function will
953  * update cmd with replied data.
954  * @with_reply: true if DMUB reply needs to be copied back to cmd. false if the
955  * cmd doesn't need to be replied.
956  * @timeout_us: timeout in microseconds.
957  *
958  * Return:
959  * DMUB_STATUS_OK - success
960  * DMUB_STATUS_TIMEOUT - DMUB fails to process the command within the timeout
961  * interval.
962  */
963 enum dmub_status dmub_srv_send_reg_inbox0_cmd(
964 		struct dmub_srv *dmub,
965 		union dmub_rb_cmd *cmd,
966 		bool with_reply, uint32_t timeout_us);
967 
968 /**
969  * dmub_srv_set_power_state() - Track DC power state in dmub_srv
970  * @dmub: The dmub service
971  * @power_state: DC power state setting
972  *
973  * Store DC power state in dmub_srv.  If dmub_srv is in D3, then don't send messages to DMUB
974  *
975  * Return:
976  *   void
977  */
978 void dmub_srv_set_power_state(struct dmub_srv *dmub, enum dmub_srv_power_state_type dmub_srv_power_state);
979 
980 #endif /* _DMUB_SRV_H_ */
981