xref: /linux/drivers/gpu/drm/amd/display/dmub/dmub_srv.h (revision a4a755c422242c27cb0f7900ac00cf33ac17b1ce)
1 /*
2  * Copyright 2019 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #ifndef _DMUB_SRV_H_
27 #define _DMUB_SRV_H_
28 
29 /**
30  * DOC: DMUB interface and operation
31  *
32  * DMUB is the interface to the display DMCUB microcontroller on DCN hardware.
33  * It delegates hardware initialization and command submission to the
34  * microcontroller. DMUB is the shortname for DMCUB.
35  *
36  * This interface is not thread-safe. Ensure that all access to the interface
37  * is properly synchronized by the caller.
38  *
39  * Initialization and usage of the DMUB service should be done in the
40  * steps given below:
41  *
42  * 1. dmub_srv_create()
43  * 2. dmub_srv_has_hw_support()
44  * 3. dmub_srv_calc_region_info()
45  * 4. dmub_srv_hw_init()
46  *
47  * The call to dmub_srv_create() is required to use the server.
48  *
49  * The calls to dmub_srv_has_hw_support() and dmub_srv_calc_region_info()
50  * are helpers to query cache window size and allocate framebuffer(s)
51  * for the cache windows.
52  *
53  * The call to dmub_srv_hw_init() programs the DMCUB registers to prepare
54  * for command submission. Commands can be queued via dmub_srv_cmd_queue()
55  * and executed via dmub_srv_cmd_execute().
56  *
57  * If the queue is full the dmub_srv_wait_for_idle() call can be used to
58  * wait until the queue has been cleared.
59  *
60  * Destroying the DMUB service can be done by calling dmub_srv_destroy().
61  * This does not clear DMUB hardware state, only software state.
62  *
63  * The interface is intended to be standalone and should not depend on any
64  * other component within DAL.
65  */
66 
67 #include "inc/dmub_cmd.h"
68 #include "dc/dc_types.h"
69 
70 #define DMUB_PC_SNAPSHOT_COUNT 10
71 
72 /* Forward declarations */
73 struct dmub_srv;
74 struct dmub_srv_common_regs;
75 struct dmub_srv_dcn31_regs;
76 
77 struct dmcub_trace_buf_entry;
78 
79 /* enum dmub_window_memory_type - memory location type specification for windows */
80 enum dmub_window_memory_type {
81 	DMUB_WINDOW_MEMORY_TYPE_FB = 0,
82 	DMUB_WINDOW_MEMORY_TYPE_GART
83 };
84 
85 /* enum dmub_status - return code for dmcub functions */
86 enum dmub_status {
87 	DMUB_STATUS_OK = 0,
88 	DMUB_STATUS_NO_CTX,
89 	DMUB_STATUS_QUEUE_FULL,
90 	DMUB_STATUS_TIMEOUT,
91 	DMUB_STATUS_INVALID,
92 	DMUB_STATUS_HW_FAILURE,
93 	DMUB_STATUS_POWER_STATE_D3
94 };
95 
96 /* enum dmub_asic - dmub asic identifier */
97 enum dmub_asic {
98 	DMUB_ASIC_NONE = 0,
99 	DMUB_ASIC_DCN20,
100 	DMUB_ASIC_DCN21,
101 	DMUB_ASIC_DCN30,
102 	DMUB_ASIC_DCN301,
103 	DMUB_ASIC_DCN302,
104 	DMUB_ASIC_DCN303,
105 	DMUB_ASIC_DCN31,
106 	DMUB_ASIC_DCN31B,
107 	DMUB_ASIC_DCN314,
108 	DMUB_ASIC_DCN315,
109 	DMUB_ASIC_DCN316,
110 	DMUB_ASIC_DCN32,
111 	DMUB_ASIC_DCN321,
112 	DMUB_ASIC_DCN35,
113 	DMUB_ASIC_DCN351,
114 	DMUB_ASIC_DCN401,
115 	DMUB_ASIC_MAX,
116 };
117 
118 /* enum dmub_window_id - dmub window identifier */
119 enum dmub_window_id {
120 	DMUB_WINDOW_0_INST_CONST = 0,
121 	DMUB_WINDOW_1_STACK,
122 	DMUB_WINDOW_2_BSS_DATA,
123 	DMUB_WINDOW_3_VBIOS,
124 	DMUB_WINDOW_4_MAILBOX,
125 	DMUB_WINDOW_5_TRACEBUFF,
126 	DMUB_WINDOW_6_FW_STATE,
127 	DMUB_WINDOW_7_SCRATCH_MEM,
128 	DMUB_WINDOW_SHARED_STATE,
129 	DMUB_WINDOW_TOTAL,
130 };
131 
132 /* enum dmub_notification_type - dmub outbox notification identifier */
133 enum dmub_notification_type {
134 	DMUB_NOTIFICATION_NO_DATA = 0,
135 	DMUB_NOTIFICATION_AUX_REPLY,
136 	DMUB_NOTIFICATION_HPD,
137 	DMUB_NOTIFICATION_HPD_IRQ,
138 	DMUB_NOTIFICATION_SET_CONFIG_REPLY,
139 	DMUB_NOTIFICATION_DPIA_NOTIFICATION,
140 	DMUB_NOTIFICATION_MAX
141 };
142 
143 /**
144  * DPIA NOTIFICATION Response Type
145  */
146 enum dpia_notify_bw_alloc_status {
147 
148 	DPIA_BW_REQ_FAILED = 0,
149 	DPIA_BW_REQ_SUCCESS,
150 	DPIA_EST_BW_CHANGED,
151 	DPIA_BW_ALLOC_CAPS_CHANGED
152 };
153 
154 /* enum dmub_memory_access_type - memory access method */
155 enum dmub_memory_access_type {
156 	DMUB_MEMORY_ACCESS_DEFAULT,
157 	DMUB_MEMORY_ACCESS_CPU = DMUB_MEMORY_ACCESS_DEFAULT,
158 	DMUB_MEMORY_ACCESS_DMA
159 };
160 
161 /* enum dmub_power_state type - to track DC power state in dmub_srv */
162 enum dmub_srv_power_state_type {
163 	DMUB_POWER_STATE_UNDEFINED = 0,
164 	DMUB_POWER_STATE_D0 = 1,
165 	DMUB_POWER_STATE_D3 = 8
166 };
167 
168 /**
169  * struct dmub_region - dmub hw memory region
170  * @base: base address for region, must be 256 byte aligned
171  * @top: top address for region
172  */
173 struct dmub_region {
174 	uint32_t base;
175 	uint32_t top;
176 };
177 
178 /**
179  * struct dmub_window - dmub hw cache window
180  * @off: offset to the fb memory in gpu address space
181  * @r: region in uc address space for cache window
182  */
183 struct dmub_window {
184 	union dmub_addr offset;
185 	struct dmub_region region;
186 };
187 
188 /**
189  * struct dmub_fb - defines a dmub framebuffer memory region
190  * @cpu_addr: cpu virtual address for the region, NULL if invalid
191  * @gpu_addr: gpu virtual address for the region, NULL if invalid
192  * @size: size of the region in bytes, zero if invalid
193  */
194 struct dmub_fb {
195 	void *cpu_addr;
196 	uint64_t gpu_addr;
197 	uint32_t size;
198 };
199 
200 /**
201  * struct dmub_srv_region_params - params used for calculating dmub regions
202  * @inst_const_size: size of the fw inst const section
203  * @bss_data_size: size of the fw bss data section
204  * @vbios_size: size of the vbios data
205  * @fw_bss_data: raw firmware bss data section
206  */
207 struct dmub_srv_region_params {
208 	uint32_t inst_const_size;
209 	uint32_t bss_data_size;
210 	uint32_t vbios_size;
211 	const uint8_t *fw_inst_const;
212 	const uint8_t *fw_bss_data;
213 	const enum dmub_window_memory_type *window_memory_type;
214 };
215 
216 /**
217  * struct dmub_srv_region_info - output region info from the dmub service
218  * @fb_size: required minimum fb size for all regions, aligned to 4096 bytes
219  * @num_regions: number of regions used by the dmub service
220  * @regions: region info
221  *
222  * The regions are aligned such that they can be all placed within the
223  * same framebuffer but they can also be placed into different framebuffers.
224  *
225  * The size of each region can be calculated by the caller:
226  * size = reg.top - reg.base
227  *
228  * Care must be taken when performing custom allocations to ensure that each
229  * region base address is 256 byte aligned.
230  */
231 struct dmub_srv_region_info {
232 	uint32_t fb_size;
233 	uint32_t gart_size;
234 	uint8_t num_regions;
235 	struct dmub_region regions[DMUB_WINDOW_TOTAL];
236 };
237 
238 /**
239  * struct dmub_srv_memory_params - parameters used for driver fb setup
240  * @region_info: region info calculated by dmub service
241  * @cpu_fb_addr: base cpu address for the framebuffer
242  * @cpu_inbox_addr: base cpu address for the gart
243  * @gpu_fb_addr: base gpu virtual address for the framebuffer
244  * @gpu_inbox_addr: base gpu virtual address for the gart
245  */
246 struct dmub_srv_memory_params {
247 	const struct dmub_srv_region_info *region_info;
248 	void *cpu_fb_addr;
249 	void *cpu_gart_addr;
250 	uint64_t gpu_fb_addr;
251 	uint64_t gpu_gart_addr;
252 	const enum dmub_window_memory_type *window_memory_type;
253 };
254 
255 /**
256  * struct dmub_srv_fb_info - output fb info from the dmub service
257  * @num_fbs: number of required dmub framebuffers
258  * @fbs: fb data for each region
259  *
260  * Output from the dmub service helper that can be used by the
261  * driver to prepare dmub_fb that can be passed into the dmub
262  * hw init service.
263  *
264  * Assumes that all regions are within the same framebuffer
265  * and have been setup according to the region_info generated
266  * by the dmub service.
267  */
268 struct dmub_srv_fb_info {
269 	uint8_t num_fb;
270 	struct dmub_fb fb[DMUB_WINDOW_TOTAL];
271 };
272 
273 /*
274  * struct dmub_srv_hw_params - params for dmub hardware initialization
275  * @fb: framebuffer info for each region
276  * @fb_base: base of the framebuffer aperture
277  * @fb_offset: offset of the framebuffer aperture
278  * @psp_version: psp version to pass for DMCU init
279  * @load_inst_const: true if DMUB should load inst const fw
280  */
281 struct dmub_srv_hw_params {
282 	struct dmub_fb *fb[DMUB_WINDOW_TOTAL];
283 	uint64_t fb_base;
284 	uint64_t fb_offset;
285 	uint32_t psp_version;
286 	bool load_inst_const;
287 	bool skip_panel_power_sequence;
288 	bool disable_z10;
289 	bool power_optimization;
290 	bool dpia_supported;
291 	bool disable_dpia;
292 	bool usb4_cm_version;
293 	bool fw_in_system_memory;
294 	bool dpia_hpd_int_enable_supported;
295 	bool disable_clock_gate;
296 	bool disallow_dispclk_dppclk_ds;
297 	bool ips_sequential_ono;
298 	enum dmub_memory_access_type mem_access_type;
299 	enum dmub_ips_disable_type disable_ips;
300 	bool disallow_phy_access;
301 };
302 
303 /**
304  * struct dmub_srv_debug - Debug info for dmub_srv
305  * @timeout_occured: Indicates a timeout occured on any message from driver to dmub
306  * @timeout_cmd: first cmd sent from driver that timed out - subsequent timeouts are not stored
307  */
308 struct dmub_srv_debug {
309 	bool timeout_occured;
310 	union dmub_rb_cmd timeout_cmd;
311 	unsigned long long timestamp;
312 };
313 
314 /**
315  * struct dmub_diagnostic_data - Diagnostic data retrieved from DMCUB for
316  * debugging purposes, including logging, crash analysis, etc.
317  */
318 struct dmub_diagnostic_data {
319 	uint32_t dmcub_version;
320 	uint32_t scratch[17];
321 	uint32_t pc[DMUB_PC_SNAPSHOT_COUNT];
322 	uint32_t undefined_address_fault_addr;
323 	uint32_t inst_fetch_fault_addr;
324 	uint32_t data_write_fault_addr;
325 	uint32_t inbox1_rptr;
326 	uint32_t inbox1_wptr;
327 	uint32_t inbox1_size;
328 	uint32_t inbox0_rptr;
329 	uint32_t inbox0_wptr;
330 	uint32_t inbox0_size;
331 	uint32_t gpint_datain0;
332 	struct dmub_srv_debug timeout_info;
333 	uint8_t is_dmcub_enabled : 1;
334 	uint8_t is_dmcub_soft_reset : 1;
335 	uint8_t is_dmcub_secure_reset : 1;
336 	uint8_t is_traceport_en : 1;
337 	uint8_t is_cw0_enabled : 1;
338 	uint8_t is_cw6_enabled : 1;
339 };
340 
341 /**
342  * struct dmub_srv_base_funcs - Driver specific base callbacks
343  */
344 struct dmub_srv_base_funcs {
345 	/**
346 	 * @reg_read:
347 	 *
348 	 * Hook for reading a register.
349 	 *
350 	 * Return: The 32-bit register value from the given address.
351 	 */
352 	uint32_t (*reg_read)(void *ctx, uint32_t address);
353 
354 	/**
355 	 * @reg_write:
356 	 *
357 	 * Hook for writing a value to the register specified by address.
358 	 */
359 	void (*reg_write)(void *ctx, uint32_t address, uint32_t value);
360 };
361 
362 /**
363  * struct dmub_srv_hw_funcs - hardware sequencer funcs for dmub
364  */
365 struct dmub_srv_hw_funcs {
366 	/* private: internal use only */
367 
368 	void (*init)(struct dmub_srv *dmub);
369 
370 	void (*reset)(struct dmub_srv *dmub);
371 
372 	void (*reset_release)(struct dmub_srv *dmub);
373 
374 	void (*backdoor_load)(struct dmub_srv *dmub,
375 			      const struct dmub_window *cw0,
376 			      const struct dmub_window *cw1);
377 
378 	void (*backdoor_load_zfb_mode)(struct dmub_srv *dmub,
379 			      const struct dmub_window *cw0,
380 			      const struct dmub_window *cw1);
381 	void (*setup_windows)(struct dmub_srv *dmub,
382 			      const struct dmub_window *cw2,
383 			      const struct dmub_window *cw3,
384 			      const struct dmub_window *cw4,
385 			      const struct dmub_window *cw5,
386 			      const struct dmub_window *cw6,
387 			      const struct dmub_window *region6);
388 
389 	void (*setup_mailbox)(struct dmub_srv *dmub,
390 			      const struct dmub_region *inbox1);
391 
392 	uint32_t (*get_inbox1_wptr)(struct dmub_srv *dmub);
393 
394 	uint32_t (*get_inbox1_rptr)(struct dmub_srv *dmub);
395 
396 	void (*set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset);
397 
398 	void (*setup_out_mailbox)(struct dmub_srv *dmub,
399 			      const struct dmub_region *outbox1);
400 
401 	uint32_t (*get_outbox1_wptr)(struct dmub_srv *dmub);
402 
403 	void (*set_outbox1_rptr)(struct dmub_srv *dmub, uint32_t rptr_offset);
404 
405 	void (*setup_outbox0)(struct dmub_srv *dmub,
406 			      const struct dmub_region *outbox0);
407 
408 	uint32_t (*get_outbox0_wptr)(struct dmub_srv *dmub);
409 
410 	void (*set_outbox0_rptr)(struct dmub_srv *dmub, uint32_t rptr_offset);
411 
412 	uint32_t (*emul_get_inbox1_rptr)(struct dmub_srv *dmub);
413 
414 	void (*emul_set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset);
415 
416 	bool (*is_supported)(struct dmub_srv *dmub);
417 
418 	bool (*is_psrsu_supported)(struct dmub_srv *dmub);
419 
420 	bool (*is_hw_init)(struct dmub_srv *dmub);
421 	bool (*is_hw_powered_up)(struct dmub_srv *dmub);
422 
423 	void (*enable_dmub_boot_options)(struct dmub_srv *dmub,
424 				const struct dmub_srv_hw_params *params);
425 
426 	void (*skip_dmub_panel_power_sequence)(struct dmub_srv *dmub, bool skip);
427 
428 	union dmub_fw_boot_status (*get_fw_status)(struct dmub_srv *dmub);
429 
430 	union dmub_fw_boot_options (*get_fw_boot_option)(struct dmub_srv *dmub);
431 
432 	void (*set_gpint)(struct dmub_srv *dmub,
433 			  union dmub_gpint_data_register reg);
434 
435 	bool (*is_gpint_acked)(struct dmub_srv *dmub,
436 			       union dmub_gpint_data_register reg);
437 
438 	uint32_t (*get_gpint_response)(struct dmub_srv *dmub);
439 
440 	uint32_t (*get_gpint_dataout)(struct dmub_srv *dmub);
441 
442 	void (*configure_dmub_in_system_memory)(struct dmub_srv *dmub);
443 	void (*clear_inbox0_ack_register)(struct dmub_srv *dmub);
444 	uint32_t (*read_inbox0_ack_register)(struct dmub_srv *dmub);
445 	void (*send_inbox0_cmd)(struct dmub_srv *dmub, union dmub_inbox0_data_register data);
446 	uint32_t (*get_current_time)(struct dmub_srv *dmub);
447 
448 	void (*get_diagnostic_data)(struct dmub_srv *dmub, struct dmub_diagnostic_data *dmub_oca);
449 
450 	bool (*should_detect)(struct dmub_srv *dmub);
451 	void (*init_reg_offsets)(struct dmub_srv *dmub, struct dc_context *ctx);
452 
453 	void (*subvp_save_surf_addr)(struct dmub_srv *dmub, const struct dc_plane_address *addr, uint8_t subvp_index);
454 	void (*send_reg_inbox0_cmd_msg)(struct dmub_srv *dmub,
455 			union dmub_rb_cmd *cmd);
456 	uint32_t (*read_reg_inbox0_rsp_int_status)(struct dmub_srv *dmub);
457 	void (*read_reg_inbox0_cmd_rsp)(struct dmub_srv *dmub,
458 			union dmub_rb_cmd *cmd);
459 	void (*write_reg_inbox0_rsp_int_ack)(struct dmub_srv *dmub);
460 	uint32_t (*read_reg_outbox0_rdy_int_status)(struct dmub_srv *dmub);
461 	void (*write_reg_outbox0_rdy_int_ack)(struct dmub_srv *dmub);
462 	void (*read_reg_outbox0_msg)(struct dmub_srv *dmub, uint32_t *msg);
463 	void (*write_reg_outbox0_rsp)(struct dmub_srv *dmub, uint32_t *rsp);
464 	uint32_t (*read_reg_outbox0_rsp_int_status)(struct dmub_srv *dmub);
465 	void (*enable_reg_inbox0_rsp_int)(struct dmub_srv *dmub, bool enable);
466 	void (*enable_reg_outbox0_rdy_int)(struct dmub_srv *dmub, bool enable);
467 };
468 
469 /**
470  * struct dmub_srv_create_params - params for dmub service creation
471  * @base_funcs: driver supplied base routines
472  * @hw_funcs: optional overrides for hw funcs
473  * @user_ctx: context data for callback funcs
474  * @asic: driver supplied asic
475  * @fw_version: the current firmware version, if any
476  * @is_virtual: false for hw support only
477  */
478 struct dmub_srv_create_params {
479 	struct dmub_srv_base_funcs funcs;
480 	struct dmub_srv_hw_funcs *hw_funcs;
481 	void *user_ctx;
482 	enum dmub_asic asic;
483 	uint32_t fw_version;
484 	bool is_virtual;
485 };
486 
487 /**
488  * struct dmub_srv - software state for dmcub
489  * @asic: dmub asic identifier
490  * @user_ctx: user provided context for the dmub_srv
491  * @fw_version: the current firmware version, if any
492  * @is_virtual: false if hardware support only
493  * @shared_state: dmub shared state between firmware and driver
494  * @fw_state: dmub firmware state pointer
495  */
496 struct dmub_srv {
497 	enum dmub_asic asic;
498 	void *user_ctx;
499 	uint32_t fw_version;
500 	bool is_virtual;
501 	struct dmub_fb scratch_mem_fb;
502 	volatile struct dmub_shared_state_feature_block *shared_state;
503 	volatile const struct dmub_fw_state *fw_state;
504 
505 	/* private: internal use only */
506 	const struct dmub_srv_common_regs *regs;
507 	const struct dmub_srv_dcn31_regs *regs_dcn31;
508 	struct dmub_srv_dcn32_regs *regs_dcn32;
509 	struct dmub_srv_dcn35_regs *regs_dcn35;
510 	const struct dmub_srv_dcn401_regs *regs_dcn401;
511 
512 	struct dmub_srv_base_funcs funcs;
513 	struct dmub_srv_hw_funcs hw_funcs;
514 	struct dmub_rb inbox1_rb;
515 	uint32_t inbox1_last_wptr;
516 	/**
517 	 * outbox1_rb is accessed without locks (dal & dc)
518 	 * and to be used only in dmub_srv_stat_get_notification()
519 	 */
520 	struct dmub_rb outbox1_rb;
521 
522 	struct dmub_rb outbox0_rb;
523 
524 	bool sw_init;
525 	bool hw_init;
526 
527 	uint64_t fb_base;
528 	uint64_t fb_offset;
529 	uint32_t psp_version;
530 
531 	/* Feature capabilities reported by fw */
532 	struct dmub_feature_caps feature_caps;
533 	struct dmub_visual_confirm_color visual_confirm_color;
534 
535 	enum dmub_srv_power_state_type power_state;
536 	struct dmub_srv_debug debug;
537 };
538 
539 /**
540  * struct dmub_notification - dmub notification data
541  * @type: dmub notification type
542  * @link_index: link index to identify aux connection
543  * @result: USB4 status returned from dmub
544  * @pending_notification: Indicates there are other pending notifications
545  * @aux_reply: aux reply
546  * @hpd_status: hpd status
547  * @bw_alloc_reply: BW Allocation reply from CM/DPIA
548  */
549 struct dmub_notification {
550 	enum dmub_notification_type type;
551 	uint8_t link_index;
552 	uint8_t result;
553 	bool pending_notification;
554 	union {
555 		struct aux_reply_data aux_reply;
556 		enum dp_hpd_status hpd_status;
557 		enum set_config_status sc_status;
558 		/**
559 		 * DPIA notification command.
560 		 */
561 		struct dmub_rb_cmd_dpia_notification dpia_notification;
562 	};
563 };
564 
565 /**
566  * DMUB firmware version helper macro - useful for checking if the version
567  * of a firmware to know if feature or functionality is supported or present.
568  */
569 #define DMUB_FW_VERSION(major, minor, revision) \
570 	((((major) & 0xFF) << 24) | (((minor) & 0xFF) << 16) | (((revision) & 0xFF) << 8))
571 
572 /**
573  * dmub_srv_create() - creates the DMUB service.
574  * @dmub: the dmub service
575  * @params: creation parameters for the service
576  *
577  * Return:
578  *   DMUB_STATUS_OK - success
579  *   DMUB_STATUS_INVALID - unspecified error
580  */
581 enum dmub_status dmub_srv_create(struct dmub_srv *dmub,
582 				 const struct dmub_srv_create_params *params);
583 
584 /**
585  * dmub_srv_destroy() - destroys the DMUB service.
586  * @dmub: the dmub service
587  */
588 void dmub_srv_destroy(struct dmub_srv *dmub);
589 
590 /**
591  * dmub_srv_calc_region_info() - retreives region info from the dmub service
592  * @dmub: the dmub service
593  * @params: parameters used to calculate region locations
594  * @info_out: the output region info from dmub
595  *
596  * Calculates the base and top address for all relevant dmub regions
597  * using the parameters given (if any).
598  *
599  * Return:
600  *   DMUB_STATUS_OK - success
601  *   DMUB_STATUS_INVALID - unspecified error
602  */
603 enum dmub_status
604 dmub_srv_calc_region_info(struct dmub_srv *dmub,
605 			  const struct dmub_srv_region_params *params,
606 			  struct dmub_srv_region_info *out);
607 
608 /**
609  * dmub_srv_calc_region_info() - retreives fb info from the dmub service
610  * @dmub: the dmub service
611  * @params: parameters used to calculate fb locations
612  * @info_out: the output fb info from dmub
613  *
614  * Calculates the base and top address for all relevant dmub regions
615  * using the parameters given (if any).
616  *
617  * Return:
618  *   DMUB_STATUS_OK - success
619  *   DMUB_STATUS_INVALID - unspecified error
620  */
621 enum dmub_status dmub_srv_calc_mem_info(struct dmub_srv *dmub,
622 				       const struct dmub_srv_memory_params *params,
623 				       struct dmub_srv_fb_info *out);
624 
625 /**
626  * dmub_srv_has_hw_support() - returns hw support state for dmcub
627  * @dmub: the dmub service
628  * @is_supported: hw support state
629  *
630  * Queries the hardware for DMCUB support and returns the result.
631  *
632  * Can be called before dmub_srv_hw_init().
633  *
634  * Return:
635  *   DMUB_STATUS_OK - success
636  *   DMUB_STATUS_INVALID - unspecified error
637  */
638 enum dmub_status dmub_srv_has_hw_support(struct dmub_srv *dmub,
639 					 bool *is_supported);
640 
641 /**
642  * dmub_srv_is_hw_init() - returns hardware init state
643  *
644  * Return:
645  *   DMUB_STATUS_OK - success
646  *   DMUB_STATUS_INVALID - unspecified error
647  */
648 enum dmub_status dmub_srv_is_hw_init(struct dmub_srv *dmub, bool *is_hw_init);
649 
650 /**
651  * dmub_srv_hw_init() - initializes the underlying DMUB hardware
652  * @dmub: the dmub service
653  * @params: params for hardware initialization
654  *
655  * Resets the DMUB hardware and performs backdoor loading of the
656  * required cache regions based on the input framebuffer regions.
657  *
658  * Return:
659  *   DMUB_STATUS_OK - success
660  *   DMUB_STATUS_NO_CTX - dmcub context not initialized
661  *   DMUB_STATUS_INVALID - unspecified error
662  */
663 enum dmub_status dmub_srv_hw_init(struct dmub_srv *dmub,
664 				  const struct dmub_srv_hw_params *params);
665 
666 /**
667  * dmub_srv_hw_reset() - puts the DMUB hardware in reset state if initialized
668  * @dmub: the dmub service
669  *
670  * Before destroying the DMUB service or releasing the backing framebuffer
671  * memory we'll need to put the DMCUB into reset first.
672  *
673  * A subsequent call to dmub_srv_hw_init() will re-enable the DMCUB.
674  *
675  * Return:
676  *   DMUB_STATUS_OK - success
677  *   DMUB_STATUS_INVALID - unspecified error
678  */
679 enum dmub_status dmub_srv_hw_reset(struct dmub_srv *dmub);
680 
681 /**
682  * dmub_srv_sync_inbox1() - sync sw state with hw state
683  * @dmub: the dmub service
684  *
685  * Sync sw state with hw state when resume from S0i3
686  *
687  * Return:
688  *   DMUB_STATUS_OK - success
689  *   DMUB_STATUS_INVALID - unspecified error
690  */
691 enum dmub_status dmub_srv_sync_inbox1(struct dmub_srv *dmub);
692 
693 /**
694  * dmub_srv_cmd_queue() - queues a command to the DMUB
695  * @dmub: the dmub service
696  * @cmd: the command to queue
697  *
698  * Queues a command to the DMUB service but does not begin execution
699  * immediately.
700  *
701  * Return:
702  *   DMUB_STATUS_OK - success
703  *   DMUB_STATUS_QUEUE_FULL - no remaining room in queue
704  *   DMUB_STATUS_INVALID - unspecified error
705  */
706 enum dmub_status dmub_srv_cmd_queue(struct dmub_srv *dmub,
707 				    const union dmub_rb_cmd *cmd);
708 
709 /**
710  * dmub_srv_cmd_execute() - Executes a queued sequence to the dmub
711  * @dmub: the dmub service
712  *
713  * Begins execution of queued commands on the dmub.
714  *
715  * Return:
716  *   DMUB_STATUS_OK - success
717  *   DMUB_STATUS_INVALID - unspecified error
718  */
719 enum dmub_status dmub_srv_cmd_execute(struct dmub_srv *dmub);
720 
721 /**
722  * dmub_srv_wait_for_hw_pwr_up() - Waits for firmware hardware power up is completed
723  * @dmub: the dmub service
724  * @timeout_us: the maximum number of microseconds to wait
725  *
726  * Waits until firmware hardware is powered up. The maximum
727  * wait time is given in microseconds to prevent spinning forever.
728  *
729  * Return:
730  *   DMUB_STATUS_OK - success
731  *   DMUB_STATUS_TIMEOUT - timed out
732  *   DMUB_STATUS_INVALID - unspecified error
733  */
734 enum dmub_status dmub_srv_wait_for_hw_pwr_up(struct dmub_srv *dmub,
735 					     uint32_t timeout_us);
736 
737 bool dmub_srv_is_hw_pwr_up(struct dmub_srv *dmub);
738 
739 /**
740  * dmub_srv_wait_for_auto_load() - Waits for firmware auto load to complete
741  * @dmub: the dmub service
742  * @timeout_us: the maximum number of microseconds to wait
743  *
744  * Waits until firmware has been autoloaded by the DMCUB. The maximum
745  * wait time is given in microseconds to prevent spinning forever.
746  *
747  * On ASICs without firmware autoload support this function will return
748  * immediately.
749  *
750  * Return:
751  *   DMUB_STATUS_OK - success
752  *   DMUB_STATUS_TIMEOUT - wait for phy init timed out
753  *   DMUB_STATUS_INVALID - unspecified error
754  */
755 enum dmub_status dmub_srv_wait_for_auto_load(struct dmub_srv *dmub,
756 					     uint32_t timeout_us);
757 
758 /**
759  * dmub_srv_wait_for_phy_init() - Waits for DMUB PHY init to complete
760  * @dmub: the dmub service
761  * @timeout_us: the maximum number of microseconds to wait
762  *
763  * Waits until the PHY has been initialized by the DMUB. The maximum
764  * wait time is given in microseconds to prevent spinning forever.
765  *
766  * On ASICs without PHY init support this function will return
767  * immediately.
768  *
769  * Return:
770  *   DMUB_STATUS_OK - success
771  *   DMUB_STATUS_TIMEOUT - wait for phy init timed out
772  *   DMUB_STATUS_INVALID - unspecified error
773  */
774 enum dmub_status dmub_srv_wait_for_phy_init(struct dmub_srv *dmub,
775 					    uint32_t timeout_us);
776 
777 /**
778  * dmub_srv_wait_for_idle() - Waits for the DMUB to be idle
779  * @dmub: the dmub service
780  * @timeout_us: the maximum number of microseconds to wait
781  *
782  * Waits until the DMUB buffer is empty and all commands have
783  * finished processing. The maximum wait time is given in
784  * microseconds to prevent spinning forever.
785  *
786  * Return:
787  *   DMUB_STATUS_OK - success
788  *   DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out
789  *   DMUB_STATUS_INVALID - unspecified error
790  */
791 enum dmub_status dmub_srv_wait_for_idle(struct dmub_srv *dmub,
792 					uint32_t timeout_us);
793 
794 /**
795  * dmub_srv_send_gpint_command() - Sends a GPINT based command.
796  * @dmub: the dmub service
797  * @command_code: the command code to send
798  * @param: the command parameter to send
799  * @timeout_us: the maximum number of microseconds to wait
800  *
801  * Sends a command via the general purpose interrupt (GPINT).
802  * Waits for the number of microseconds specified by timeout_us
803  * for the command ACK before returning.
804  *
805  * Can be called after software initialization.
806  *
807  * Return:
808  *   DMUB_STATUS_OK - success
809  *   DMUB_STATUS_TIMEOUT - wait for ACK timed out
810  *   DMUB_STATUS_INVALID - unspecified error
811  */
812 enum dmub_status
813 dmub_srv_send_gpint_command(struct dmub_srv *dmub,
814 			    enum dmub_gpint_command command_code,
815 			    uint16_t param, uint32_t timeout_us);
816 
817 /**
818  * dmub_srv_get_gpint_response() - Queries the GPINT response.
819  * @dmub: the dmub service
820  * @response: the response for the last GPINT
821  *
822  * Returns the response code for the last GPINT interrupt.
823  *
824  * Can be called after software initialization.
825  *
826  * Return:
827  *   DMUB_STATUS_OK - success
828  *   DMUB_STATUS_INVALID - unspecified error
829  */
830 enum dmub_status dmub_srv_get_gpint_response(struct dmub_srv *dmub,
831 					     uint32_t *response);
832 
833 /**
834  * dmub_srv_get_gpint_dataout() - Queries the GPINT DATAOUT.
835  * @dmub: the dmub service
836  * @dataout: the data for the GPINT DATAOUT
837  *
838  * Returns the response code for the last GPINT DATAOUT interrupt.
839  *
840  * Can be called after software initialization.
841  *
842  * Return:
843  *   DMUB_STATUS_OK - success
844  *   DMUB_STATUS_INVALID - unspecified error
845  */
846 enum dmub_status dmub_srv_get_gpint_dataout(struct dmub_srv *dmub,
847 					     uint32_t *dataout);
848 
849 /**
850  * dmub_flush_buffer_mem() - Read back entire frame buffer region.
851  * This ensures that the write from x86 has been flushed and will not
852  * hang the DMCUB.
853  * @fb: frame buffer to flush
854  *
855  * Can be called after software initialization.
856  */
857 void dmub_flush_buffer_mem(const struct dmub_fb *fb);
858 
859 /**
860  * dmub_srv_get_fw_boot_status() - Returns the DMUB boot status bits.
861  *
862  * @dmub: the dmub service
863  * @status: out pointer for firmware status
864  *
865  * Return:
866  *   DMUB_STATUS_OK - success
867  *   DMUB_STATUS_INVALID - unspecified error, unsupported
868  */
869 enum dmub_status dmub_srv_get_fw_boot_status(struct dmub_srv *dmub,
870 					     union dmub_fw_boot_status *status);
871 
872 enum dmub_status dmub_srv_get_fw_boot_option(struct dmub_srv *dmub,
873 					     union dmub_fw_boot_options *option);
874 
875 enum dmub_status dmub_srv_cmd_with_reply_data(struct dmub_srv *dmub,
876 					      union dmub_rb_cmd *cmd);
877 
878 enum dmub_status dmub_srv_set_skip_panel_power_sequence(struct dmub_srv *dmub,
879 					     bool skip);
880 
881 bool dmub_srv_get_outbox0_msg(struct dmub_srv *dmub, struct dmcub_trace_buf_entry *entry);
882 
883 bool dmub_srv_get_diagnostic_data(struct dmub_srv *dmub, struct dmub_diagnostic_data *diag_data);
884 
885 bool dmub_srv_should_detect(struct dmub_srv *dmub);
886 
887 /**
888  * dmub_srv_send_inbox0_cmd() - Send command to DMUB using INBOX0
889  * @dmub: the dmub service
890  * @data: the data to be sent in the INBOX0 command
891  *
892  * Send command by writing directly to INBOX0 WPTR
893  *
894  * Return:
895  *   DMUB_STATUS_OK - success
896  *   DMUB_STATUS_INVALID - hw_init false or hw function does not exist
897  */
898 enum dmub_status dmub_srv_send_inbox0_cmd(struct dmub_srv *dmub, union dmub_inbox0_data_register data);
899 
900 /**
901  * dmub_srv_wait_for_inbox0_ack() - wait for DMUB to ACK INBOX0 command
902  * @dmub: the dmub service
903  * @timeout_us: the maximum number of microseconds to wait
904  *
905  * Wait for DMUB to ACK the INBOX0 message
906  *
907  * Return:
908  *   DMUB_STATUS_OK - success
909  *   DMUB_STATUS_INVALID - hw_init false or hw function does not exist
910  *   DMUB_STATUS_TIMEOUT - wait for ack timed out
911  */
912 enum dmub_status dmub_srv_wait_for_inbox0_ack(struct dmub_srv *dmub, uint32_t timeout_us);
913 
914 /**
915  * dmub_srv_wait_for_inbox0_ack() - clear ACK register for INBOX0
916  * @dmub: the dmub service
917  *
918  * Clear ACK register for INBOX0
919  *
920  * Return:
921  *   DMUB_STATUS_OK - success
922  *   DMUB_STATUS_INVALID - hw_init false or hw function does not exist
923  */
924 enum dmub_status dmub_srv_clear_inbox0_ack(struct dmub_srv *dmub);
925 
926 /**
927  * dmub_srv_subvp_save_surf_addr() - Save primary and meta address for subvp on each flip
928  * @dmub: The dmub service
929  * @addr: The surface address to be programmed on the current flip
930  * @subvp_index: Index of subvp pipe, indicates which subvp pipe the address should be saved for
931  *
932  * Function to save the surface flip addr into scratch registers. This is to fix a race condition
933  * between FW and driver reading / writing to the surface address at the same time. This is
934  * required because there is no EARLIEST_IN_USE_META.
935  *
936  * Return:
937  *   void
938  */
939 void dmub_srv_subvp_save_surf_addr(struct dmub_srv *dmub, const struct dc_plane_address *addr, uint8_t subvp_index);
940 
941 /**
942  * dmub_srv_send_reg_inbox0_cmd() - send a dmub command and wait for the command
943  * being processed by DMUB.
944  * @dmub: The dmub service
945  * @cmd: The dmub command being sent. If with_replay is true, the function will
946  * update cmd with replied data.
947  * @with_reply: true if DMUB reply needs to be copied back to cmd. false if the
948  * cmd doesn't need to be replied.
949  * @timeout_us: timeout in microseconds.
950  *
951  * Return:
952  * DMUB_STATUS_OK - success
953  * DMUB_STATUS_TIMEOUT - DMUB fails to process the command within the timeout
954  * interval.
955  */
956 enum dmub_status dmub_srv_send_reg_inbox0_cmd(
957 		struct dmub_srv *dmub,
958 		union dmub_rb_cmd *cmd,
959 		bool with_reply, uint32_t timeout_us);
960 
961 /**
962  * dmub_srv_set_power_state() - Track DC power state in dmub_srv
963  * @dmub: The dmub service
964  * @power_state: DC power state setting
965  *
966  * Store DC power state in dmub_srv.  If dmub_srv is in D3, then don't send messages to DMUB
967  *
968  * Return:
969  *   void
970  */
971 void dmub_srv_set_power_state(struct dmub_srv *dmub, enum dmub_srv_power_state_type dmub_srv_power_state);
972 
973 #endif /* _DMUB_SRV_H_ */
974