1 /* 2 * Copyright 2019 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef _DMUB_SRV_H_ 27 #define _DMUB_SRV_H_ 28 29 /** 30 * DOC: DMUB interface and operation 31 * 32 * DMUB is the interface to the display DMCUB microcontroller on DCN hardware. 33 * It delegates hardware initialization and command submission to the 34 * microcontroller. DMUB is the shortname for DMCUB. 35 * 36 * This interface is not thread-safe. Ensure that all access to the interface 37 * is properly synchronized by the caller. 38 * 39 * Initialization and usage of the DMUB service should be done in the 40 * steps given below: 41 * 42 * 1. dmub_srv_create() 43 * 2. dmub_srv_has_hw_support() 44 * 3. dmub_srv_calc_region_info() 45 * 4. dmub_srv_hw_init() 46 * 47 * The call to dmub_srv_create() is required to use the server. 48 * 49 * The calls to dmub_srv_has_hw_support() and dmub_srv_calc_region_info() 50 * are helpers to query cache window size and allocate framebuffer(s) 51 * for the cache windows. 52 * 53 * The call to dmub_srv_hw_init() programs the DMCUB registers to prepare 54 * for command submission. Commands can be queued via dmub_srv_cmd_queue() 55 * and executed via dmub_srv_cmd_execute(). 56 * 57 * If the queue is full the dmub_srv_wait_for_idle() call can be used to 58 * wait until the queue has been cleared. 59 * 60 * Destroying the DMUB service can be done by calling dmub_srv_destroy(). 61 * This does not clear DMUB hardware state, only software state. 62 * 63 * The interface is intended to be standalone and should not depend on any 64 * other component within DAL. 65 */ 66 67 #include "inc/dmub_cmd.h" 68 #include "dc/dc_types.h" 69 70 #define DMUB_PC_SNAPSHOT_COUNT 10 71 72 /* Default tracebuffer size if meta is absent. */ 73 #define DMUB_TRACE_BUFFER_SIZE (64 * 1024) 74 75 /* Forward declarations */ 76 struct dmub_srv; 77 struct dmub_srv_common_regs; 78 struct dmub_srv_dcn31_regs; 79 80 struct dmcub_trace_buf_entry; 81 82 /* enum dmub_window_memory_type - memory location type specification for windows */ 83 enum dmub_window_memory_type { 84 DMUB_WINDOW_MEMORY_TYPE_FB = 0, 85 DMUB_WINDOW_MEMORY_TYPE_GART 86 }; 87 88 /* enum dmub_status - return code for dmcub functions */ 89 enum dmub_status { 90 DMUB_STATUS_OK = 0, 91 DMUB_STATUS_NO_CTX, 92 DMUB_STATUS_QUEUE_FULL, 93 DMUB_STATUS_TIMEOUT, 94 DMUB_STATUS_INVALID, 95 DMUB_STATUS_HW_FAILURE, 96 DMUB_STATUS_POWER_STATE_D3 97 }; 98 99 /* enum dmub_asic - dmub asic identifier */ 100 enum dmub_asic { 101 DMUB_ASIC_NONE = 0, 102 DMUB_ASIC_DCN20, 103 DMUB_ASIC_DCN21, 104 DMUB_ASIC_DCN30, 105 DMUB_ASIC_DCN301, 106 DMUB_ASIC_DCN302, 107 DMUB_ASIC_DCN303, 108 DMUB_ASIC_DCN31, 109 DMUB_ASIC_DCN31B, 110 DMUB_ASIC_DCN314, 111 DMUB_ASIC_DCN315, 112 DMUB_ASIC_DCN316, 113 DMUB_ASIC_DCN32, 114 DMUB_ASIC_DCN321, 115 DMUB_ASIC_DCN35, 116 DMUB_ASIC_DCN351, 117 DMUB_ASIC_DCN36, 118 DMUB_ASIC_DCN401, 119 DMUB_ASIC_MAX, 120 }; 121 122 /* enum dmub_window_id - dmub window identifier */ 123 enum dmub_window_id { 124 DMUB_WINDOW_0_INST_CONST = 0, 125 DMUB_WINDOW_1_STACK, 126 DMUB_WINDOW_2_BSS_DATA, 127 DMUB_WINDOW_3_VBIOS, 128 DMUB_WINDOW_4_MAILBOX, 129 DMUB_WINDOW_5_TRACEBUFF, 130 DMUB_WINDOW_6_FW_STATE, 131 DMUB_WINDOW_7_SCRATCH_MEM, 132 DMUB_WINDOW_SHARED_STATE, 133 DMUB_WINDOW_TOTAL, 134 }; 135 136 /* enum dmub_notification_type - dmub outbox notification identifier */ 137 enum dmub_notification_type { 138 DMUB_NOTIFICATION_NO_DATA = 0, 139 DMUB_NOTIFICATION_AUX_REPLY, 140 DMUB_NOTIFICATION_HPD, 141 DMUB_NOTIFICATION_HPD_IRQ, 142 DMUB_NOTIFICATION_SET_CONFIG_REPLY, 143 DMUB_NOTIFICATION_DPIA_NOTIFICATION, 144 DMUB_NOTIFICATION_HPD_SENSE_NOTIFY, 145 DMUB_NOTIFICATION_MAX 146 }; 147 148 /** 149 * DPIA NOTIFICATION Response Type 150 */ 151 enum dpia_notify_bw_alloc_status { 152 153 DPIA_BW_REQ_FAILED = 0, 154 DPIA_BW_REQ_SUCCESS, 155 DPIA_EST_BW_CHANGED, 156 DPIA_BW_ALLOC_CAPS_CHANGED 157 }; 158 159 /* enum dmub_memory_access_type - memory access method */ 160 enum dmub_memory_access_type { 161 DMUB_MEMORY_ACCESS_DEFAULT, 162 DMUB_MEMORY_ACCESS_CPU = DMUB_MEMORY_ACCESS_DEFAULT, 163 DMUB_MEMORY_ACCESS_DMA 164 }; 165 166 /* enum dmub_power_state type - to track DC power state in dmub_srv */ 167 enum dmub_srv_power_state_type { 168 DMUB_POWER_STATE_UNDEFINED = 0, 169 DMUB_POWER_STATE_D0 = 1, 170 DMUB_POWER_STATE_D3 = 8 171 }; 172 173 /** 174 * struct dmub_region - dmub hw memory region 175 * @base: base address for region, must be 256 byte aligned 176 * @top: top address for region 177 */ 178 struct dmub_region { 179 uint32_t base; 180 uint32_t top; 181 }; 182 183 /** 184 * struct dmub_window - dmub hw cache window 185 * @off: offset to the fb memory in gpu address space 186 * @r: region in uc address space for cache window 187 */ 188 struct dmub_window { 189 union dmub_addr offset; 190 struct dmub_region region; 191 }; 192 193 /** 194 * struct dmub_fb - defines a dmub framebuffer memory region 195 * @cpu_addr: cpu virtual address for the region, NULL if invalid 196 * @gpu_addr: gpu virtual address for the region, NULL if invalid 197 * @size: size of the region in bytes, zero if invalid 198 */ 199 struct dmub_fb { 200 void *cpu_addr; 201 uint64_t gpu_addr; 202 uint32_t size; 203 }; 204 205 /** 206 * struct dmub_srv_region_params - params used for calculating dmub regions 207 * @inst_const_size: size of the fw inst const section 208 * @bss_data_size: size of the fw bss data section 209 * @vbios_size: size of the vbios data 210 * @fw_bss_data: raw firmware bss data section 211 */ 212 struct dmub_srv_region_params { 213 uint32_t inst_const_size; 214 uint32_t bss_data_size; 215 uint32_t vbios_size; 216 const uint8_t *fw_inst_const; 217 const uint8_t *fw_bss_data; 218 const enum dmub_window_memory_type *window_memory_type; 219 }; 220 221 /** 222 * struct dmub_srv_region_info - output region info from the dmub service 223 * @fb_size: required minimum fb size for all regions, aligned to 4096 bytes 224 * @num_regions: number of regions used by the dmub service 225 * @regions: region info 226 * 227 * The regions are aligned such that they can be all placed within the 228 * same framebuffer but they can also be placed into different framebuffers. 229 * 230 * The size of each region can be calculated by the caller: 231 * size = reg.top - reg.base 232 * 233 * Care must be taken when performing custom allocations to ensure that each 234 * region base address is 256 byte aligned. 235 */ 236 struct dmub_srv_region_info { 237 uint32_t fb_size; 238 uint32_t gart_size; 239 uint8_t num_regions; 240 struct dmub_region regions[DMUB_WINDOW_TOTAL]; 241 }; 242 243 /** 244 * struct dmub_srv_memory_params - parameters used for driver fb setup 245 * @region_info: region info calculated by dmub service 246 * @cpu_fb_addr: base cpu address for the framebuffer 247 * @cpu_inbox_addr: base cpu address for the gart 248 * @gpu_fb_addr: base gpu virtual address for the framebuffer 249 * @gpu_inbox_addr: base gpu virtual address for the gart 250 */ 251 struct dmub_srv_memory_params { 252 const struct dmub_srv_region_info *region_info; 253 void *cpu_fb_addr; 254 void *cpu_gart_addr; 255 uint64_t gpu_fb_addr; 256 uint64_t gpu_gart_addr; 257 const enum dmub_window_memory_type *window_memory_type; 258 }; 259 260 /** 261 * struct dmub_srv_fb_info - output fb info from the dmub service 262 * @num_fbs: number of required dmub framebuffers 263 * @fbs: fb data for each region 264 * 265 * Output from the dmub service helper that can be used by the 266 * driver to prepare dmub_fb that can be passed into the dmub 267 * hw init service. 268 * 269 * Assumes that all regions are within the same framebuffer 270 * and have been setup according to the region_info generated 271 * by the dmub service. 272 */ 273 struct dmub_srv_fb_info { 274 uint8_t num_fb; 275 struct dmub_fb fb[DMUB_WINDOW_TOTAL]; 276 }; 277 278 /* 279 * struct dmub_srv_hw_params - params for dmub hardware initialization 280 * @fb: framebuffer info for each region 281 * @fb_base: base of the framebuffer aperture 282 * @fb_offset: offset of the framebuffer aperture 283 * @psp_version: psp version to pass for DMCU init 284 * @load_inst_const: true if DMUB should load inst const fw 285 */ 286 struct dmub_srv_hw_params { 287 struct dmub_fb *fb[DMUB_WINDOW_TOTAL]; 288 uint64_t fb_base; 289 uint64_t fb_offset; 290 uint32_t psp_version; 291 bool load_inst_const; 292 bool skip_panel_power_sequence; 293 bool disable_z10; 294 bool power_optimization; 295 bool dpia_supported; 296 bool disable_dpia; 297 bool usb4_cm_version; 298 bool fw_in_system_memory; 299 bool dpia_hpd_int_enable_supported; 300 bool disable_clock_gate; 301 bool disallow_dispclk_dppclk_ds; 302 bool ips_sequential_ono; 303 enum dmub_memory_access_type mem_access_type; 304 enum dmub_ips_disable_type disable_ips; 305 bool disallow_phy_access; 306 bool disable_sldo_opt; 307 bool enable_non_transparent_setconfig; 308 bool lower_hbr3_phy_ssc; 309 }; 310 311 /** 312 * struct dmub_srv_debug - Debug info for dmub_srv 313 * @timeout_occured: Indicates a timeout occured on any message from driver to dmub 314 * @timeout_cmd: first cmd sent from driver that timed out - subsequent timeouts are not stored 315 */ 316 struct dmub_timeout_info { 317 bool timeout_occured; 318 union dmub_rb_cmd timeout_cmd; 319 unsigned long long timestamp; 320 }; 321 322 /** 323 * struct dmub_diagnostic_data - Diagnostic data retrieved from DMCUB for 324 * debugging purposes, including logging, crash analysis, etc. 325 */ 326 struct dmub_diagnostic_data { 327 uint32_t dmcub_version; 328 uint32_t scratch[17]; 329 uint32_t pc[DMUB_PC_SNAPSHOT_COUNT]; 330 uint32_t undefined_address_fault_addr; 331 uint32_t inst_fetch_fault_addr; 332 uint32_t data_write_fault_addr; 333 uint32_t inbox1_rptr; 334 uint32_t inbox1_wptr; 335 uint32_t inbox1_size; 336 uint32_t inbox0_rptr; 337 uint32_t inbox0_wptr; 338 uint32_t inbox0_size; 339 uint32_t outbox1_rptr; 340 uint32_t outbox1_wptr; 341 uint32_t outbox1_size; 342 uint32_t gpint_datain0; 343 struct dmub_timeout_info timeout_info; 344 uint8_t is_dmcub_enabled : 1; 345 uint8_t is_dmcub_soft_reset : 1; 346 uint8_t is_dmcub_secure_reset : 1; 347 uint8_t is_traceport_en : 1; 348 uint8_t is_cw0_enabled : 1; 349 uint8_t is_cw6_enabled : 1; 350 }; 351 352 /** 353 * struct dmub_srv_base_funcs - Driver specific base callbacks 354 */ 355 struct dmub_srv_base_funcs { 356 /** 357 * @reg_read: 358 * 359 * Hook for reading a register. 360 * 361 * Return: The 32-bit register value from the given address. 362 */ 363 uint32_t (*reg_read)(void *ctx, uint32_t address); 364 365 /** 366 * @reg_write: 367 * 368 * Hook for writing a value to the register specified by address. 369 */ 370 void (*reg_write)(void *ctx, uint32_t address, uint32_t value); 371 }; 372 373 /** 374 * struct dmub_srv_hw_funcs - hardware sequencer funcs for dmub 375 */ 376 struct dmub_srv_hw_funcs { 377 /* private: internal use only */ 378 379 void (*init)(struct dmub_srv *dmub); 380 381 void (*reset)(struct dmub_srv *dmub); 382 383 void (*reset_release)(struct dmub_srv *dmub); 384 385 void (*backdoor_load)(struct dmub_srv *dmub, 386 const struct dmub_window *cw0, 387 const struct dmub_window *cw1); 388 389 void (*backdoor_load_zfb_mode)(struct dmub_srv *dmub, 390 const struct dmub_window *cw0, 391 const struct dmub_window *cw1); 392 void (*setup_windows)(struct dmub_srv *dmub, 393 const struct dmub_window *cw2, 394 const struct dmub_window *cw3, 395 const struct dmub_window *cw4, 396 const struct dmub_window *cw5, 397 const struct dmub_window *cw6, 398 const struct dmub_window *region6); 399 400 void (*setup_mailbox)(struct dmub_srv *dmub, 401 const struct dmub_region *inbox1); 402 403 uint32_t (*get_inbox1_wptr)(struct dmub_srv *dmub); 404 405 uint32_t (*get_inbox1_rptr)(struct dmub_srv *dmub); 406 407 void (*set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset); 408 409 void (*setup_out_mailbox)(struct dmub_srv *dmub, 410 const struct dmub_region *outbox1); 411 412 uint32_t (*get_outbox1_wptr)(struct dmub_srv *dmub); 413 414 void (*set_outbox1_rptr)(struct dmub_srv *dmub, uint32_t rptr_offset); 415 416 void (*setup_outbox0)(struct dmub_srv *dmub, 417 const struct dmub_region *outbox0); 418 419 uint32_t (*get_outbox0_wptr)(struct dmub_srv *dmub); 420 421 void (*set_outbox0_rptr)(struct dmub_srv *dmub, uint32_t rptr_offset); 422 423 uint32_t (*emul_get_inbox1_rptr)(struct dmub_srv *dmub); 424 425 void (*emul_set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset); 426 427 bool (*is_supported)(struct dmub_srv *dmub); 428 429 bool (*is_psrsu_supported)(struct dmub_srv *dmub); 430 431 bool (*is_hw_init)(struct dmub_srv *dmub); 432 bool (*is_hw_powered_up)(struct dmub_srv *dmub); 433 434 void (*enable_dmub_boot_options)(struct dmub_srv *dmub, 435 const struct dmub_srv_hw_params *params); 436 437 void (*skip_dmub_panel_power_sequence)(struct dmub_srv *dmub, bool skip); 438 439 union dmub_fw_boot_status (*get_fw_status)(struct dmub_srv *dmub); 440 441 union dmub_fw_boot_options (*get_fw_boot_option)(struct dmub_srv *dmub); 442 443 void (*set_gpint)(struct dmub_srv *dmub, 444 union dmub_gpint_data_register reg); 445 446 bool (*is_gpint_acked)(struct dmub_srv *dmub, 447 union dmub_gpint_data_register reg); 448 449 uint32_t (*get_gpint_response)(struct dmub_srv *dmub); 450 451 uint32_t (*get_gpint_dataout)(struct dmub_srv *dmub); 452 453 void (*configure_dmub_in_system_memory)(struct dmub_srv *dmub); 454 void (*clear_inbox0_ack_register)(struct dmub_srv *dmub); 455 uint32_t (*read_inbox0_ack_register)(struct dmub_srv *dmub); 456 void (*send_inbox0_cmd)(struct dmub_srv *dmub, union dmub_inbox0_data_register data); 457 uint32_t (*get_current_time)(struct dmub_srv *dmub); 458 459 void (*get_diagnostic_data)(struct dmub_srv *dmub); 460 461 bool (*should_detect)(struct dmub_srv *dmub); 462 void (*init_reg_offsets)(struct dmub_srv *dmub, struct dc_context *ctx); 463 464 void (*subvp_save_surf_addr)(struct dmub_srv *dmub, const struct dc_plane_address *addr, uint8_t subvp_index); 465 void (*send_reg_inbox0_cmd_msg)(struct dmub_srv *dmub, 466 union dmub_rb_cmd *cmd); 467 uint32_t (*read_reg_inbox0_rsp_int_status)(struct dmub_srv *dmub); 468 void (*read_reg_inbox0_cmd_rsp)(struct dmub_srv *dmub, 469 union dmub_rb_cmd *cmd); 470 void (*write_reg_inbox0_rsp_int_ack)(struct dmub_srv *dmub); 471 uint32_t (*read_reg_outbox0_rdy_int_status)(struct dmub_srv *dmub); 472 void (*write_reg_outbox0_rdy_int_ack)(struct dmub_srv *dmub); 473 void (*read_reg_outbox0_msg)(struct dmub_srv *dmub, uint32_t *msg); 474 void (*write_reg_outbox0_rsp)(struct dmub_srv *dmub, uint32_t *rsp); 475 uint32_t (*read_reg_outbox0_rsp_int_status)(struct dmub_srv *dmub); 476 void (*enable_reg_inbox0_rsp_int)(struct dmub_srv *dmub, bool enable); 477 void (*enable_reg_outbox0_rdy_int)(struct dmub_srv *dmub, bool enable); 478 }; 479 480 /** 481 * struct dmub_srv_create_params - params for dmub service creation 482 * @base_funcs: driver supplied base routines 483 * @hw_funcs: optional overrides for hw funcs 484 * @user_ctx: context data for callback funcs 485 * @asic: driver supplied asic 486 * @fw_version: the current firmware version, if any 487 * @is_virtual: false for hw support only 488 */ 489 struct dmub_srv_create_params { 490 struct dmub_srv_base_funcs funcs; 491 struct dmub_srv_hw_funcs *hw_funcs; 492 void *user_ctx; 493 enum dmub_asic asic; 494 uint32_t fw_version; 495 bool is_virtual; 496 }; 497 498 /** 499 * struct dmub_srv - software state for dmcub 500 * @asic: dmub asic identifier 501 * @user_ctx: user provided context for the dmub_srv 502 * @fw_version: the current firmware version, if any 503 * @is_virtual: false if hardware support only 504 * @shared_state: dmub shared state between firmware and driver 505 * @fw_state: dmub firmware state pointer 506 */ 507 struct dmub_srv { 508 enum dmub_asic asic; 509 void *user_ctx; 510 uint32_t fw_version; 511 bool is_virtual; 512 struct dmub_fb scratch_mem_fb; 513 volatile struct dmub_shared_state_feature_block *shared_state; 514 volatile const struct dmub_fw_state *fw_state; 515 516 /* private: internal use only */ 517 const struct dmub_srv_common_regs *regs; 518 const struct dmub_srv_dcn31_regs *regs_dcn31; 519 struct dmub_srv_dcn32_regs *regs_dcn32; 520 struct dmub_srv_dcn35_regs *regs_dcn35; 521 const struct dmub_srv_dcn401_regs *regs_dcn401; 522 struct dmub_srv_base_funcs funcs; 523 struct dmub_srv_hw_funcs hw_funcs; 524 struct dmub_rb inbox1_rb; 525 uint32_t inbox1_last_wptr; 526 /** 527 * outbox1_rb is accessed without locks (dal & dc) 528 * and to be used only in dmub_srv_stat_get_notification() 529 */ 530 struct dmub_rb outbox1_rb; 531 532 struct dmub_rb outbox0_rb; 533 534 bool sw_init; 535 bool hw_init; 536 537 uint64_t fb_base; 538 uint64_t fb_offset; 539 uint32_t psp_version; 540 541 /* Feature capabilities reported by fw */ 542 struct dmub_fw_meta_info meta_info; 543 struct dmub_feature_caps feature_caps; 544 struct dmub_visual_confirm_color visual_confirm_color; 545 546 enum dmub_srv_power_state_type power_state; 547 struct dmub_diagnostic_data debug; 548 }; 549 550 /** 551 * struct dmub_notification - dmub notification data 552 * @type: dmub notification type 553 * @link_index: link index to identify aux connection 554 * @result: USB4 status returned from dmub 555 * @pending_notification: Indicates there are other pending notifications 556 * @aux_reply: aux reply 557 * @hpd_status: hpd status 558 * @bw_alloc_reply: BW Allocation reply from CM/DPIA 559 */ 560 struct dmub_notification { 561 enum dmub_notification_type type; 562 uint8_t link_index; 563 uint8_t result; 564 bool pending_notification; 565 union { 566 struct aux_reply_data aux_reply; 567 enum dp_hpd_status hpd_status; 568 enum set_config_status sc_status; 569 struct dmub_rb_cmd_hpd_sense_notify_data hpd_sense_notify; 570 }; 571 }; 572 573 /* enum dmub_ips_mode - IPS mode identifier */ 574 enum dmub_ips_mode { 575 DMUB_IPS_MODE_IPS1_MAX = 0, 576 DMUB_IPS_MODE_IPS2, 577 DMUB_IPS_MODE_IPS1_RCG, 578 DMUB_IPS_MODE_IPS1_ONO2_ON 579 }; 580 581 /** 582 * DMUB firmware version helper macro - useful for checking if the version 583 * of a firmware to know if feature or functionality is supported or present. 584 */ 585 #define DMUB_FW_VERSION(major, minor, revision) \ 586 ((((major) & 0xFF) << 24) | (((minor) & 0xFF) << 16) | (((revision) & 0xFF) << 8)) 587 588 /** 589 * dmub_srv_create() - creates the DMUB service. 590 * @dmub: the dmub service 591 * @params: creation parameters for the service 592 * 593 * Return: 594 * DMUB_STATUS_OK - success 595 * DMUB_STATUS_INVALID - unspecified error 596 */ 597 enum dmub_status dmub_srv_create(struct dmub_srv *dmub, 598 const struct dmub_srv_create_params *params); 599 600 /** 601 * dmub_srv_destroy() - destroys the DMUB service. 602 * @dmub: the dmub service 603 */ 604 void dmub_srv_destroy(struct dmub_srv *dmub); 605 606 /** 607 * dmub_srv_calc_region_info() - retreives region info from the dmub service 608 * @dmub: the dmub service 609 * @params: parameters used to calculate region locations 610 * @info_out: the output region info from dmub 611 * 612 * Calculates the base and top address for all relevant dmub regions 613 * using the parameters given (if any). 614 * 615 * Return: 616 * DMUB_STATUS_OK - success 617 * DMUB_STATUS_INVALID - unspecified error 618 */ 619 enum dmub_status 620 dmub_srv_calc_region_info(struct dmub_srv *dmub, 621 const struct dmub_srv_region_params *params, 622 struct dmub_srv_region_info *out); 623 624 /** 625 * dmub_srv_calc_region_info() - retreives fb info from the dmub service 626 * @dmub: the dmub service 627 * @params: parameters used to calculate fb locations 628 * @info_out: the output fb info from dmub 629 * 630 * Calculates the base and top address for all relevant dmub regions 631 * using the parameters given (if any). 632 * 633 * Return: 634 * DMUB_STATUS_OK - success 635 * DMUB_STATUS_INVALID - unspecified error 636 */ 637 enum dmub_status dmub_srv_calc_mem_info(struct dmub_srv *dmub, 638 const struct dmub_srv_memory_params *params, 639 struct dmub_srv_fb_info *out); 640 641 /** 642 * dmub_srv_has_hw_support() - returns hw support state for dmcub 643 * @dmub: the dmub service 644 * @is_supported: hw support state 645 * 646 * Queries the hardware for DMCUB support and returns the result. 647 * 648 * Can be called before dmub_srv_hw_init(). 649 * 650 * Return: 651 * DMUB_STATUS_OK - success 652 * DMUB_STATUS_INVALID - unspecified error 653 */ 654 enum dmub_status dmub_srv_has_hw_support(struct dmub_srv *dmub, 655 bool *is_supported); 656 657 /** 658 * dmub_srv_is_hw_init() - returns hardware init state 659 * 660 * Return: 661 * DMUB_STATUS_OK - success 662 * DMUB_STATUS_INVALID - unspecified error 663 */ 664 enum dmub_status dmub_srv_is_hw_init(struct dmub_srv *dmub, bool *is_hw_init); 665 666 /** 667 * dmub_srv_hw_init() - initializes the underlying DMUB hardware 668 * @dmub: the dmub service 669 * @params: params for hardware initialization 670 * 671 * Resets the DMUB hardware and performs backdoor loading of the 672 * required cache regions based on the input framebuffer regions. 673 * 674 * Return: 675 * DMUB_STATUS_OK - success 676 * DMUB_STATUS_NO_CTX - dmcub context not initialized 677 * DMUB_STATUS_INVALID - unspecified error 678 */ 679 enum dmub_status dmub_srv_hw_init(struct dmub_srv *dmub, 680 const struct dmub_srv_hw_params *params); 681 682 /** 683 * dmub_srv_hw_reset() - puts the DMUB hardware in reset state if initialized 684 * @dmub: the dmub service 685 * 686 * Before destroying the DMUB service or releasing the backing framebuffer 687 * memory we'll need to put the DMCUB into reset first. 688 * 689 * A subsequent call to dmub_srv_hw_init() will re-enable the DMCUB. 690 * 691 * Return: 692 * DMUB_STATUS_OK - success 693 * DMUB_STATUS_INVALID - unspecified error 694 */ 695 enum dmub_status dmub_srv_hw_reset(struct dmub_srv *dmub); 696 697 /** 698 * dmub_srv_sync_inbox1() - sync sw state with hw state 699 * @dmub: the dmub service 700 * 701 * Sync sw state with hw state when resume from S0i3 702 * 703 * Return: 704 * DMUB_STATUS_OK - success 705 * DMUB_STATUS_INVALID - unspecified error 706 */ 707 enum dmub_status dmub_srv_sync_inbox1(struct dmub_srv *dmub); 708 709 /** 710 * dmub_srv_cmd_queue() - queues a command to the DMUB 711 * @dmub: the dmub service 712 * @cmd: the command to queue 713 * 714 * Queues a command to the DMUB service but does not begin execution 715 * immediately. 716 * 717 * Return: 718 * DMUB_STATUS_OK - success 719 * DMUB_STATUS_QUEUE_FULL - no remaining room in queue 720 * DMUB_STATUS_INVALID - unspecified error 721 */ 722 enum dmub_status dmub_srv_cmd_queue(struct dmub_srv *dmub, 723 const union dmub_rb_cmd *cmd); 724 725 /** 726 * dmub_srv_cmd_execute() - Executes a queued sequence to the dmub 727 * @dmub: the dmub service 728 * 729 * Begins execution of queued commands on the dmub. 730 * 731 * Return: 732 * DMUB_STATUS_OK - success 733 * DMUB_STATUS_INVALID - unspecified error 734 */ 735 enum dmub_status dmub_srv_cmd_execute(struct dmub_srv *dmub); 736 737 /** 738 * dmub_srv_wait_for_hw_pwr_up() - Waits for firmware hardware power up is completed 739 * @dmub: the dmub service 740 * @timeout_us: the maximum number of microseconds to wait 741 * 742 * Waits until firmware hardware is powered up. The maximum 743 * wait time is given in microseconds to prevent spinning forever. 744 * 745 * Return: 746 * DMUB_STATUS_OK - success 747 * DMUB_STATUS_TIMEOUT - timed out 748 * DMUB_STATUS_INVALID - unspecified error 749 */ 750 enum dmub_status dmub_srv_wait_for_hw_pwr_up(struct dmub_srv *dmub, 751 uint32_t timeout_us); 752 753 bool dmub_srv_is_hw_pwr_up(struct dmub_srv *dmub); 754 755 /** 756 * dmub_srv_wait_for_auto_load() - Waits for firmware auto load to complete 757 * @dmub: the dmub service 758 * @timeout_us: the maximum number of microseconds to wait 759 * 760 * Waits until firmware has been autoloaded by the DMCUB. The maximum 761 * wait time is given in microseconds to prevent spinning forever. 762 * 763 * On ASICs without firmware autoload support this function will return 764 * immediately. 765 * 766 * Return: 767 * DMUB_STATUS_OK - success 768 * DMUB_STATUS_TIMEOUT - wait for phy init timed out 769 * DMUB_STATUS_INVALID - unspecified error 770 */ 771 enum dmub_status dmub_srv_wait_for_auto_load(struct dmub_srv *dmub, 772 uint32_t timeout_us); 773 774 /** 775 * dmub_srv_wait_for_phy_init() - Waits for DMUB PHY init to complete 776 * @dmub: the dmub service 777 * @timeout_us: the maximum number of microseconds to wait 778 * 779 * Waits until the PHY has been initialized by the DMUB. The maximum 780 * wait time is given in microseconds to prevent spinning forever. 781 * 782 * On ASICs without PHY init support this function will return 783 * immediately. 784 * 785 * Return: 786 * DMUB_STATUS_OK - success 787 * DMUB_STATUS_TIMEOUT - wait for phy init timed out 788 * DMUB_STATUS_INVALID - unspecified error 789 */ 790 enum dmub_status dmub_srv_wait_for_phy_init(struct dmub_srv *dmub, 791 uint32_t timeout_us); 792 793 /** 794 * dmub_srv_wait_for_idle() - Waits for the DMUB to be idle 795 * @dmub: the dmub service 796 * @timeout_us: the maximum number of microseconds to wait 797 * 798 * Waits until the DMUB buffer is empty and all commands have 799 * finished processing. The maximum wait time is given in 800 * microseconds to prevent spinning forever. 801 * 802 * Return: 803 * DMUB_STATUS_OK - success 804 * DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out 805 * DMUB_STATUS_INVALID - unspecified error 806 */ 807 enum dmub_status dmub_srv_wait_for_idle(struct dmub_srv *dmub, 808 uint32_t timeout_us); 809 810 /** 811 * dmub_srv_send_gpint_command() - Sends a GPINT based command. 812 * @dmub: the dmub service 813 * @command_code: the command code to send 814 * @param: the command parameter to send 815 * @timeout_us: the maximum number of microseconds to wait 816 * 817 * Sends a command via the general purpose interrupt (GPINT). 818 * Waits for the number of microseconds specified by timeout_us 819 * for the command ACK before returning. 820 * 821 * Can be called after software initialization. 822 * 823 * Return: 824 * DMUB_STATUS_OK - success 825 * DMUB_STATUS_TIMEOUT - wait for ACK timed out 826 * DMUB_STATUS_INVALID - unspecified error 827 */ 828 enum dmub_status 829 dmub_srv_send_gpint_command(struct dmub_srv *dmub, 830 enum dmub_gpint_command command_code, 831 uint16_t param, uint32_t timeout_us); 832 833 /** 834 * dmub_srv_get_gpint_response() - Queries the GPINT response. 835 * @dmub: the dmub service 836 * @response: the response for the last GPINT 837 * 838 * Returns the response code for the last GPINT interrupt. 839 * 840 * Can be called after software initialization. 841 * 842 * Return: 843 * DMUB_STATUS_OK - success 844 * DMUB_STATUS_INVALID - unspecified error 845 */ 846 enum dmub_status dmub_srv_get_gpint_response(struct dmub_srv *dmub, 847 uint32_t *response); 848 849 /** 850 * dmub_srv_get_gpint_dataout() - Queries the GPINT DATAOUT. 851 * @dmub: the dmub service 852 * @dataout: the data for the GPINT DATAOUT 853 * 854 * Returns the response code for the last GPINT DATAOUT interrupt. 855 * 856 * Can be called after software initialization. 857 * 858 * Return: 859 * DMUB_STATUS_OK - success 860 * DMUB_STATUS_INVALID - unspecified error 861 */ 862 enum dmub_status dmub_srv_get_gpint_dataout(struct dmub_srv *dmub, 863 uint32_t *dataout); 864 865 /** 866 * dmub_flush_buffer_mem() - Read back entire frame buffer region. 867 * This ensures that the write from x86 has been flushed and will not 868 * hang the DMCUB. 869 * @fb: frame buffer to flush 870 * 871 * Can be called after software initialization. 872 */ 873 void dmub_flush_buffer_mem(const struct dmub_fb *fb); 874 875 /** 876 * dmub_srv_get_fw_boot_status() - Returns the DMUB boot status bits. 877 * 878 * @dmub: the dmub service 879 * @status: out pointer for firmware status 880 * 881 * Return: 882 * DMUB_STATUS_OK - success 883 * DMUB_STATUS_INVALID - unspecified error, unsupported 884 */ 885 enum dmub_status dmub_srv_get_fw_boot_status(struct dmub_srv *dmub, 886 union dmub_fw_boot_status *status); 887 888 enum dmub_status dmub_srv_get_fw_boot_option(struct dmub_srv *dmub, 889 union dmub_fw_boot_options *option); 890 891 enum dmub_status dmub_srv_cmd_with_reply_data(struct dmub_srv *dmub, 892 union dmub_rb_cmd *cmd); 893 894 enum dmub_status dmub_srv_set_skip_panel_power_sequence(struct dmub_srv *dmub, 895 bool skip); 896 897 bool dmub_srv_get_outbox0_msg(struct dmub_srv *dmub, struct dmcub_trace_buf_entry *entry); 898 899 bool dmub_srv_get_diagnostic_data(struct dmub_srv *dmub); 900 901 bool dmub_srv_should_detect(struct dmub_srv *dmub); 902 903 /** 904 * dmub_srv_send_inbox0_cmd() - Send command to DMUB using INBOX0 905 * @dmub: the dmub service 906 * @data: the data to be sent in the INBOX0 command 907 * 908 * Send command by writing directly to INBOX0 WPTR 909 * 910 * Return: 911 * DMUB_STATUS_OK - success 912 * DMUB_STATUS_INVALID - hw_init false or hw function does not exist 913 */ 914 enum dmub_status dmub_srv_send_inbox0_cmd(struct dmub_srv *dmub, union dmub_inbox0_data_register data); 915 916 /** 917 * dmub_srv_wait_for_inbox0_ack() - wait for DMUB to ACK INBOX0 command 918 * @dmub: the dmub service 919 * @timeout_us: the maximum number of microseconds to wait 920 * 921 * Wait for DMUB to ACK the INBOX0 message 922 * 923 * Return: 924 * DMUB_STATUS_OK - success 925 * DMUB_STATUS_INVALID - hw_init false or hw function does not exist 926 * DMUB_STATUS_TIMEOUT - wait for ack timed out 927 */ 928 enum dmub_status dmub_srv_wait_for_inbox0_ack(struct dmub_srv *dmub, uint32_t timeout_us); 929 930 /** 931 * dmub_srv_wait_for_inbox0_ack() - clear ACK register for INBOX0 932 * @dmub: the dmub service 933 * 934 * Clear ACK register for INBOX0 935 * 936 * Return: 937 * DMUB_STATUS_OK - success 938 * DMUB_STATUS_INVALID - hw_init false or hw function does not exist 939 */ 940 enum dmub_status dmub_srv_clear_inbox0_ack(struct dmub_srv *dmub); 941 942 /** 943 * dmub_srv_subvp_save_surf_addr() - Save primary and meta address for subvp on each flip 944 * @dmub: The dmub service 945 * @addr: The surface address to be programmed on the current flip 946 * @subvp_index: Index of subvp pipe, indicates which subvp pipe the address should be saved for 947 * 948 * Function to save the surface flip addr into scratch registers. This is to fix a race condition 949 * between FW and driver reading / writing to the surface address at the same time. This is 950 * required because there is no EARLIEST_IN_USE_META. 951 * 952 * Return: 953 * void 954 */ 955 void dmub_srv_subvp_save_surf_addr(struct dmub_srv *dmub, const struct dc_plane_address *addr, uint8_t subvp_index); 956 957 /** 958 * dmub_srv_send_reg_inbox0_cmd() - send a dmub command and wait for the command 959 * being processed by DMUB. 960 * @dmub: The dmub service 961 * @cmd: The dmub command being sent. If with_replay is true, the function will 962 * update cmd with replied data. 963 * @with_reply: true if DMUB reply needs to be copied back to cmd. false if the 964 * cmd doesn't need to be replied. 965 * @timeout_us: timeout in microseconds. 966 * 967 * Return: 968 * DMUB_STATUS_OK - success 969 * DMUB_STATUS_TIMEOUT - DMUB fails to process the command within the timeout 970 * interval. 971 */ 972 enum dmub_status dmub_srv_send_reg_inbox0_cmd( 973 struct dmub_srv *dmub, 974 union dmub_rb_cmd *cmd, 975 bool with_reply, uint32_t timeout_us); 976 977 /** 978 * dmub_srv_set_power_state() - Track DC power state in dmub_srv 979 * @dmub: The dmub service 980 * @power_state: DC power state setting 981 * 982 * Store DC power state in dmub_srv. If dmub_srv is in D3, then don't send messages to DMUB 983 * 984 * Return: 985 * void 986 */ 987 void dmub_srv_set_power_state(struct dmub_srv *dmub, enum dmub_srv_power_state_type dmub_srv_power_state); 988 989 #endif /* _DMUB_SRV_H_ */ 990