xref: /linux/drivers/gpu/drm/amd/display/dmub/dmub_srv.h (revision 53597deca0e38c30e6cd4ba2114fa42d2bcd85bb)
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Copyright 2019-2026 Advanced Micro Devices, Inc.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice shall be included in
13  * all copies or substantial portions of the Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21  * OTHER DEALINGS IN THE SOFTWARE.
22  *
23  * Authors: AMD
24  *
25  */
26 
27 #ifndef _DMUB_SRV_H_
28 #define _DMUB_SRV_H_
29 
30 /**
31  * DOC: DMUB interface and operation
32  *
33  * DMUB is the interface to the display DMCUB microcontroller on DCN hardware.
34  * It delegates hardware initialization and command submission to the
35  * microcontroller. DMUB is the shortname for DMCUB.
36  *
37  * This interface is not thread-safe. Ensure that all access to the interface
38  * is properly synchronized by the caller.
39  *
40  * Initialization and usage of the DMUB service should be done in the
41  * steps given below:
42  *
43  * 1. dmub_srv_create()
44  * 2. dmub_srv_has_hw_support()
45  * 3. dmub_srv_calc_region_info()
46  * 4. dmub_srv_hw_init()
47  *
48  * The call to dmub_srv_create() is required to use the server.
49  *
50  * The calls to dmub_srv_has_hw_support() and dmub_srv_calc_region_info()
51  * are helpers to query cache window size and allocate framebuffer(s)
52  * for the cache windows.
53  *
54  * The call to dmub_srv_hw_init() programs the DMCUB registers to prepare
55  * for command submission. Commands can be queued via dmub_srv_fb_cmd_queue()
56  * and executed via dmub_srv_fb_cmd_execute().
57  *
58  * If the queue is full the dmub_srv_wait_for_idle() call can be used to
59  * wait until the queue has been cleared.
60  *
61  * Destroying the DMUB service can be done by calling dmub_srv_destroy().
62  * This does not clear DMUB hardware state, only software state.
63  *
64  * The interface is intended to be standalone and should not depend on any
65  * other component within DAL.
66  */
67 
68 #include "inc/dmub_cmd.h"
69 #include "dc/dc_types.h"
70 
71 #define DMUB_PC_SNAPSHOT_COUNT 10
72 
73 /* Default tracebuffer size if meta is absent. */
74 #define DMUB_TRACE_BUFFER_SIZE (64 * 1024)
75 
76 #define PSP_HEADER_BYTES_256 0x100 // 256 bytes
77 #define PSP_FOOTER_BYTES_256 0x100 // 256 bytes
78 
79 /* Forward declarations */
80 struct dmub_srv;
81 struct dmub_srv_common_regs;
82 struct dmub_srv_dcn31_regs;
83 
84 struct dmcub_trace_buf_entry;
85 
86 /* enum dmub_window_memory_type - memory location type specification for windows */
87 enum dmub_window_memory_type {
88 	DMUB_WINDOW_MEMORY_TYPE_FB = 0,
89 	DMUB_WINDOW_MEMORY_TYPE_GART
90 };
91 
92 /* enum dmub_status - return code for dmcub functions */
93 enum dmub_status {
94 	DMUB_STATUS_OK = 0,
95 	DMUB_STATUS_NO_CTX,
96 	DMUB_STATUS_QUEUE_FULL,
97 	DMUB_STATUS_TIMEOUT,
98 	DMUB_STATUS_INVALID,
99 	DMUB_STATUS_HW_FAILURE,
100 	DMUB_STATUS_POWER_STATE_D3
101 };
102 
103 /* enum dmub_asic - dmub asic identifier */
104 enum dmub_asic {
105 	DMUB_ASIC_NONE = 0,
106 	DMUB_ASIC_DCN20,
107 	DMUB_ASIC_DCN21,
108 	DMUB_ASIC_DCN30,
109 	DMUB_ASIC_DCN301,
110 	DMUB_ASIC_DCN302,
111 	DMUB_ASIC_DCN303,
112 	DMUB_ASIC_DCN31,
113 	DMUB_ASIC_DCN31B,
114 	DMUB_ASIC_DCN314,
115 	DMUB_ASIC_DCN315,
116 	DMUB_ASIC_DCN316,
117 	DMUB_ASIC_DCN32,
118 	DMUB_ASIC_DCN321,
119 	DMUB_ASIC_DCN35,
120 	DMUB_ASIC_DCN351,
121 	DMUB_ASIC_DCN36,
122 	DMUB_ASIC_DCN401,
123 	DMUB_ASIC_DCN42,
124 	DMUB_ASIC_MAX,
125 };
126 
127 /* enum dmub_window_id - dmub window identifier */
128 enum dmub_window_id {
129 	DMUB_WINDOW_0_INST_CONST = 0,
130 	DMUB_WINDOW_1_STACK,
131 	DMUB_WINDOW_2_BSS_DATA,
132 	DMUB_WINDOW_3_VBIOS,
133 	DMUB_WINDOW_4_MAILBOX,
134 	DMUB_WINDOW_5_TRACEBUFF,
135 	DMUB_WINDOW_6_FW_STATE,
136 	DMUB_WINDOW_7_SCRATCH_MEM,
137 	DMUB_WINDOW_IB_MEM,
138 	DMUB_WINDOW_SHARED_STATE,
139 	DMUB_WINDOW_LSDMA_BUFFER,
140 	DMUB_WINDOW_CURSOR_OFFLOAD,
141 	DMUB_WINDOW_TOTAL,
142 };
143 
144 /* enum dmub_notification_type - dmub outbox notification identifier */
145 enum dmub_notification_type {
146 	DMUB_NOTIFICATION_NO_DATA = 0,
147 	DMUB_NOTIFICATION_AUX_REPLY,
148 	DMUB_NOTIFICATION_HPD,
149 	DMUB_NOTIFICATION_HPD_IRQ,
150 	DMUB_NOTIFICATION_SET_CONFIG_REPLY,
151 	DMUB_NOTIFICATION_DPIA_NOTIFICATION,
152 	DMUB_NOTIFICATION_HPD_SENSE_NOTIFY,
153 	DMUB_NOTIFICATION_FUSED_IO,
154 	DMUB_NOTIFICATION_MAX
155 };
156 
157 /**
158  * DPIA NOTIFICATION Response Type
159  */
160 enum dpia_notify_bw_alloc_status {
161 
162 	DPIA_BW_REQ_FAILED = 0,
163 	DPIA_BW_REQ_SUCCESS,
164 	DPIA_EST_BW_CHANGED,
165 	DPIA_BW_ALLOC_CAPS_CHANGED
166 };
167 
168 /* enum dmub_memory_access_type - memory access method */
169 enum dmub_memory_access_type {
170 	DMUB_MEMORY_ACCESS_DEFAULT,
171 	DMUB_MEMORY_ACCESS_CPU = DMUB_MEMORY_ACCESS_DEFAULT,
172 	DMUB_MEMORY_ACCESS_DMA
173 };
174 
175 /* enum dmub_power_state type - to track DC power state in dmub_srv */
176 enum dmub_srv_power_state_type {
177 	DMUB_POWER_STATE_UNDEFINED = 0,
178 	DMUB_POWER_STATE_D0 = 1,
179 	DMUB_POWER_STATE_D3 = 8
180 };
181 
182 /* enum dmub_inbox_cmd_interface type - defines default interface for host->dmub commands */
183 enum dmub_inbox_cmd_interface_type {
184 	DMUB_CMD_INTERFACE_DEFAULT = 0,
185 	DMUB_CMD_INTERFACE_FB = 1,
186 	DMUB_CMD_INTERFACE_REG = 2,
187 };
188 
189 /**
190  * struct dmub_region - dmub hw memory region
191  * @base: base address for region, must be 256 byte aligned
192  * @top: top address for region
193  */
194 struct dmub_region {
195 	uint32_t base;
196 	uint32_t top;
197 };
198 
199 /**
200  * struct dmub_window - dmub hw cache window
201  * @off: offset to the fb memory in gpu address space
202  * @r: region in uc address space for cache window
203  */
204 struct dmub_window {
205 	union dmub_addr offset;
206 	struct dmub_region region;
207 };
208 
209 /**
210  * struct dmub_fb - defines a dmub framebuffer memory region
211  * @cpu_addr: cpu virtual address for the region, NULL if invalid
212  * @gpu_addr: gpu virtual address for the region, NULL if invalid
213  * @size: size of the region in bytes, zero if invalid
214  */
215 struct dmub_fb {
216 	void *cpu_addr;
217 	uint64_t gpu_addr;
218 	uint32_t size;
219 };
220 
221 /**
222  * struct dmub_srv_region_params - params used for calculating dmub regions
223  * @inst_const_size: size of the fw inst const section
224  * @bss_data_size: size of the fw bss data section
225  * @vbios_size: size of the vbios data
226  * @fw_bss_data: raw firmware bss data section
227  */
228 struct dmub_srv_region_params {
229 	uint32_t inst_const_size;
230 	uint32_t bss_data_size;
231 	uint32_t vbios_size;
232 	const uint8_t *fw_inst_const;
233 	const uint8_t *fw_bss_data;
234 	const enum dmub_window_memory_type *window_memory_type;
235 	const struct dmub_fw_meta_info *fw_info;
236 };
237 
238 /**
239  * struct dmub_srv_fw_meta_info_params - params used for fetching fw meta info from fw_image
240  * @inst_const_size: size of the fw inst const section
241  * @bss_data_size: size of the fw bss data section
242  * @fw_inst_const: raw firmware inst const section
243  * @fw_bss_data: raw firmware bss data section
244  * @custom_psp_footer_size: custom psp footer size to use when indexing for fw meta info
245  */
246 struct dmub_srv_fw_meta_info_params {
247 	uint32_t inst_const_size;
248 	uint32_t bss_data_size;
249 	const uint8_t *fw_inst_const;
250 	const uint8_t *fw_bss_data;
251 	uint32_t custom_psp_footer_size;
252 };
253 
254 /**
255  * struct dmub_srv_region_info - output region info from the dmub service
256  * @fb_size: required minimum fb size for all regions, aligned to 4096 bytes
257  * @num_regions: number of regions used by the dmub service
258  * @regions: region info
259  *
260  * The regions are aligned such that they can be all placed within the
261  * same framebuffer but they can also be placed into different framebuffers.
262  *
263  * The size of each region can be calculated by the caller:
264  * size = reg.top - reg.base
265  *
266  * Care must be taken when performing custom allocations to ensure that each
267  * region base address is 256 byte aligned.
268  */
269 struct dmub_srv_region_info {
270 	uint32_t fb_size;
271 	uint32_t gart_size;
272 	uint8_t num_regions;
273 	struct dmub_region regions[DMUB_WINDOW_TOTAL];
274 	uint32_t verified_psp_footer_size;
275 };
276 
277 /**
278  * struct dmub_srv_memory_params - parameters used for driver fb setup
279  * @region_info: region info calculated by dmub service
280  * @cpu_fb_addr: base cpu address for the framebuffer
281  * @cpu_inbox_addr: base cpu address for the gart
282  * @gpu_fb_addr: base gpu virtual address for the framebuffer
283  * @gpu_inbox_addr: base gpu virtual address for the gart
284  */
285 struct dmub_srv_memory_params {
286 	const struct dmub_srv_region_info *region_info;
287 	void *cpu_fb_addr;
288 	void *cpu_gart_addr;
289 	uint64_t gpu_fb_addr;
290 	uint64_t gpu_gart_addr;
291 	const enum dmub_window_memory_type *window_memory_type;
292 };
293 
294 /**
295  * struct dmub_srv_fb_info - output fb info from the dmub service
296  * @num_fbs: number of required dmub framebuffers
297  * @fbs: fb data for each region
298  *
299  * Output from the dmub service helper that can be used by the
300  * driver to prepare dmub_fb that can be passed into the dmub
301  * hw init service.
302  *
303  * Assumes that all regions are within the same framebuffer
304  * and have been setup according to the region_info generated
305  * by the dmub service.
306  */
307 struct dmub_srv_fb_info {
308 	uint8_t num_fb;
309 	struct dmub_fb fb[DMUB_WINDOW_TOTAL];
310 };
311 
312 /**
313  * struct dmub_soc_fb_info - relevant addresses from the frame buffer
314  * @fb_base: base of the framebuffer aperture
315  * @fb_offset: offset of the framebuffer aperture
316  */
317 struct dmub_soc_fb_info {
318 	uint64_t fb_base;
319 	uint64_t fb_offset;
320 };
321 
322 /*
323  * struct dmub_srv_hw_params - params for dmub hardware initialization
324  * @fb: framebuffer info for each region
325  * @fb_base: base of the framebuffer aperture
326  * @fb_offset: offset of the framebuffer aperture
327  * @psp_version: psp version to pass for DMCU init
328  * @load_inst_const: true if DMUB should load inst const fw
329  */
330 struct dmub_srv_hw_params {
331 	struct dmub_fb *fb[DMUB_WINDOW_TOTAL];
332 	struct dmub_soc_fb_info soc_fb_info;
333 	uint32_t psp_version;
334 	bool load_inst_const;
335 	bool skip_panel_power_sequence;
336 	bool disable_z10;
337 	bool power_optimization;
338 	bool dpia_supported;
339 	bool disable_dpia;
340 	bool usb4_cm_version;
341 	bool fw_in_system_memory;
342 	bool dpia_hpd_int_enable_supported;
343 	bool disable_clock_gate;
344 	bool disallow_dispclk_dppclk_ds;
345 	bool ips_sequential_ono;
346 	enum dmub_memory_access_type mem_access_type;
347 	enum dmub_ips_disable_type disable_ips;
348 	bool disallow_phy_access;
349 	bool disable_sldo_opt;
350 	bool enable_non_transparent_setconfig;
351 	bool lower_hbr3_phy_ssc;
352 	bool override_hbr3_pll_vco;
353 	bool disable_dpia_bw_allocation;
354 };
355 
356 /**
357  * struct dmub_srv_debug - Debug info for dmub_srv
358  * @timeout_occured: Indicates a timeout occured on any message from driver to dmub
359  * @timeout_cmd: first cmd sent from driver that timed out - subsequent timeouts are not stored
360  */
361 struct dmub_timeout_info {
362 	bool timeout_occured;
363 	union dmub_rb_cmd timeout_cmd;
364 	unsigned long long timestamp;
365 };
366 
367 /**
368  * struct dmub_diagnostic_data - Diagnostic data retrieved from DMCUB for
369  * debugging purposes, including logging, crash analysis, etc.
370  */
371 struct dmub_diagnostic_data {
372 	uint32_t dmcub_version;
373 	uint32_t scratch[17];
374 	uint32_t pc[DMUB_PC_SNAPSHOT_COUNT];
375 	uint32_t undefined_address_fault_addr;
376 	uint32_t inst_fetch_fault_addr;
377 	uint32_t data_write_fault_addr;
378 	uint32_t inbox1_rptr;
379 	uint32_t inbox1_wptr;
380 	uint32_t inbox1_size;
381 	uint32_t inbox0_rptr;
382 	uint32_t inbox0_wptr;
383 	uint32_t inbox0_size;
384 	uint32_t outbox1_rptr;
385 	uint32_t outbox1_wptr;
386 	uint32_t outbox1_size;
387 	uint32_t gpint_datain0;
388 	struct dmub_timeout_info timeout_info;
389 	uint8_t is_dmcub_enabled : 1;
390 	uint8_t is_dmcub_soft_reset : 1;
391 	uint8_t is_dmcub_secure_reset : 1;
392 	uint8_t is_traceport_en : 1;
393 	uint8_t is_cw0_enabled : 1;
394 	uint8_t is_cw6_enabled : 1;
395 	uint8_t is_pwait : 1;
396 };
397 
398 /**
399  * struct dmub_preos_info - preos fw info before loading post os fw.
400  */
401 struct dmub_preos_info {
402 	uint64_t fb_base;
403 	uint64_t fb_offset;
404 	uint64_t trace_buffer_phy_addr;
405 	uint32_t trace_buffer_size;
406 	uint32_t fw_version;
407 	uint32_t boot_status;
408 	uint32_t boot_options;
409 };
410 
411 struct dmub_srv_inbox {
412 	/* generic status */
413 	uint64_t num_submitted;
414 	uint64_t num_reported;
415 	union {
416 		/* frame buffer mailbox status */
417 		struct dmub_rb rb;
418 		/* register mailbox status */
419 		struct {
420 			bool is_pending;
421 			bool is_multi_pending;
422 		};
423 	};
424 };
425 
426 /**
427  * struct dmub_srv_base_funcs - Driver specific base callbacks
428  */
429 struct dmub_srv_base_funcs {
430 	/**
431 	 * @reg_read:
432 	 *
433 	 * Hook for reading a register.
434 	 *
435 	 * Return: The 32-bit register value from the given address.
436 	 */
437 	uint32_t (*reg_read)(void *ctx, uint32_t address);
438 
439 	/**
440 	 * @reg_write:
441 	 *
442 	 * Hook for writing a value to the register specified by address.
443 	 */
444 	void (*reg_write)(void *ctx, uint32_t address, uint32_t value);
445 };
446 
447 /**
448  * struct dmub_srv_hw_funcs - hardware sequencer funcs for dmub
449  */
450 struct dmub_srv_hw_funcs {
451 	/* private: internal use only */
452 
453 	void (*init)(struct dmub_srv *dmub);
454 
455 	void (*reset)(struct dmub_srv *dmub);
456 
457 	void (*reset_release)(struct dmub_srv *dmub);
458 
459 	void (*backdoor_load)(struct dmub_srv *dmub,
460 			      const struct dmub_window *cw0,
461 			      const struct dmub_window *cw1);
462 
463 	void (*backdoor_load_zfb_mode)(struct dmub_srv *dmub,
464 			      const struct dmub_window *cw0,
465 			      const struct dmub_window *cw1);
466 	void (*setup_windows)(struct dmub_srv *dmub,
467 			      const struct dmub_window *cw2,
468 			      const struct dmub_window *cw3,
469 			      const struct dmub_window *cw4,
470 			      const struct dmub_window *cw5,
471 			      const struct dmub_window *cw6,
472 			      const struct dmub_window *region6);
473 
474 	void (*setup_mailbox)(struct dmub_srv *dmub,
475 			      const struct dmub_region *inbox1);
476 
477 	uint32_t (*get_inbox1_wptr)(struct dmub_srv *dmub);
478 
479 	uint32_t (*get_inbox1_rptr)(struct dmub_srv *dmub);
480 
481 	void (*set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset);
482 
483 	void (*setup_out_mailbox)(struct dmub_srv *dmub,
484 			      const struct dmub_region *outbox1);
485 
486 	uint32_t (*get_outbox1_wptr)(struct dmub_srv *dmub);
487 
488 	void (*set_outbox1_rptr)(struct dmub_srv *dmub, uint32_t rptr_offset);
489 
490 	void (*setup_outbox0)(struct dmub_srv *dmub,
491 			      const struct dmub_region *outbox0);
492 
493 	uint32_t (*get_outbox0_wptr)(struct dmub_srv *dmub);
494 
495 	void (*set_outbox0_rptr)(struct dmub_srv *dmub, uint32_t rptr_offset);
496 
497 	uint32_t (*emul_get_inbox1_rptr)(struct dmub_srv *dmub);
498 
499 	uint32_t (*emul_get_inbox1_wptr)(struct dmub_srv *dmub);
500 
501 	void (*emul_set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset);
502 
503 	bool (*is_supported)(struct dmub_srv *dmub);
504 
505 	bool (*is_psrsu_supported)(struct dmub_srv *dmub);
506 
507 	bool (*is_hw_init)(struct dmub_srv *dmub);
508 	bool (*is_hw_powered_up)(struct dmub_srv *dmub);
509 
510 	void (*enable_dmub_boot_options)(struct dmub_srv *dmub,
511 				const struct dmub_srv_hw_params *params);
512 
513 	void (*skip_dmub_panel_power_sequence)(struct dmub_srv *dmub, bool skip);
514 
515 	union dmub_fw_boot_status (*get_fw_status)(struct dmub_srv *dmub);
516 
517 	union dmub_fw_boot_options (*get_fw_boot_option)(struct dmub_srv *dmub);
518 
519 	void (*set_gpint)(struct dmub_srv *dmub,
520 			  union dmub_gpint_data_register reg);
521 
522 	bool (*is_gpint_acked)(struct dmub_srv *dmub,
523 			       union dmub_gpint_data_register reg);
524 
525 	uint32_t (*get_gpint_response)(struct dmub_srv *dmub);
526 
527 	uint32_t (*get_gpint_dataout)(struct dmub_srv *dmub);
528 
529 	void (*configure_dmub_in_system_memory)(struct dmub_srv *dmub);
530 	void (*clear_inbox0_ack_register)(struct dmub_srv *dmub);
531 	uint32_t (*read_inbox0_ack_register)(struct dmub_srv *dmub);
532 	void (*send_inbox0_cmd)(struct dmub_srv *dmub, union dmub_inbox0_data_register data);
533 	uint32_t (*get_current_time)(struct dmub_srv *dmub);
534 
535 	void (*get_diagnostic_data)(struct dmub_srv *dmub);
536 	bool (*get_preos_fw_info)(struct dmub_srv *dmub);
537 
538 	bool (*should_detect)(struct dmub_srv *dmub);
539 	void (*init_reg_offsets)(struct dmub_srv *dmub, struct dc_context *ctx);
540 
541 	void (*subvp_save_surf_addr)(struct dmub_srv *dmub, const struct dc_plane_address *addr, uint8_t subvp_index);
542 
543 	void (*send_reg_inbox0_cmd_msg)(struct dmub_srv *dmub,
544 			union dmub_rb_cmd *cmd);
545 	uint32_t (*read_reg_inbox0_rsp_int_status)(struct dmub_srv *dmub);
546 	void (*read_reg_inbox0_cmd_rsp)(struct dmub_srv *dmub,
547 			union dmub_rb_cmd *cmd);
548 	void (*write_reg_inbox0_rsp_int_ack)(struct dmub_srv *dmub);
549 	void (*clear_reg_inbox0_rsp_int_ack)(struct dmub_srv *dmub);
550 	void (*enable_reg_inbox0_rsp_int)(struct dmub_srv *dmub, bool enable);
551 
552 	uint32_t (*read_reg_outbox0_rdy_int_status)(struct dmub_srv *dmub);
553 	void (*write_reg_outbox0_rdy_int_ack)(struct dmub_srv *dmub);
554 	void (*read_reg_outbox0_msg)(struct dmub_srv *dmub, uint32_t *msg);
555 	void (*write_reg_outbox0_rsp)(struct dmub_srv *dmub, uint32_t *rsp);
556 	uint32_t (*read_reg_outbox0_rsp_int_status)(struct dmub_srv *dmub);
557 	void (*enable_reg_outbox0_rdy_int)(struct dmub_srv *dmub, bool enable);
558 };
559 
560 /**
561  * struct dmub_srv_create_params - params for dmub service creation
562  * @base_funcs: driver supplied base routines
563  * @hw_funcs: optional overrides for hw funcs
564  * @user_ctx: context data for callback funcs
565  * @asic: driver supplied asic
566  * @fw_version: the current firmware version, if any
567  * @is_virtual: false for hw support only
568  */
569 struct dmub_srv_create_params {
570 	struct dmub_srv_base_funcs funcs;
571 	struct dmub_srv_hw_funcs *hw_funcs;
572 	void *user_ctx;
573 	enum dmub_asic asic;
574 	uint32_t fw_version;
575 	bool is_virtual;
576 	enum dmub_inbox_cmd_interface_type inbox_type;
577 };
578 
579 /**
580  * struct dmub_srv - software state for dmcub
581  * @asic: dmub asic identifier
582  * @user_ctx: user provided context for the dmub_srv
583  * @fw_version: the current firmware version, if any
584  * @is_virtual: false if hardware support only
585  * @shared_state: dmub shared state between firmware and driver
586  * @cursor_offload_v1: Cursor offload state
587  * @fw_state: dmub firmware state pointer (debug purpose only)
588  */
589 struct dmub_srv {
590 	enum dmub_asic asic;
591 	void *user_ctx;
592 	uint32_t fw_version;
593 	bool is_virtual;
594 	struct dmub_fb scratch_mem_fb;
595 	struct dmub_fb ib_mem_gart;
596 	struct dmub_fb cursor_offload_fb;
597 	volatile struct dmub_shared_state_feature_block *shared_state;
598 	volatile struct dmub_cursor_offload_v1 *cursor_offload_v1;
599 	volatile const struct dmub_fw_state *fw_state;
600 
601 	/* private: internal use only */
602 	const struct dmub_srv_common_regs *regs;
603 	const struct dmub_srv_dcn31_regs *regs_dcn31;
604 	struct dmub_srv_dcn32_regs *regs_dcn32;
605 	struct dmub_srv_dcn35_regs *regs_dcn35;
606 	const struct dmub_srv_dcn401_regs *regs_dcn401;
607 	struct dmub_srv_dcn42_regs *regs_dcn42;
608 	struct dmub_srv_base_funcs funcs;
609 	struct dmub_srv_hw_funcs hw_funcs;
610 	struct dmub_srv_inbox inbox1;
611 	uint32_t inbox1_last_wptr;
612 	struct dmub_srv_inbox reg_inbox0;
613 	/**
614 	 * outbox1_rb is accessed without locks (dal & dc)
615 	 * and to be used only in dmub_srv_stat_get_notification()
616 	 */
617 	struct dmub_rb outbox1_rb;
618 
619 	struct dmub_rb outbox0_rb;
620 
621 	bool sw_init;
622 	bool hw_init;
623 	bool dpia_supported;
624 
625 	struct dmub_soc_fb_info soc_fb_info;
626 	uint32_t psp_version;
627 
628 	/* Feature capabilities reported by fw */
629 	struct dmub_fw_meta_info meta_info;
630 	struct dmub_feature_caps feature_caps;
631 	struct dmub_visual_confirm_color visual_confirm_color;
632 	enum dmub_inbox_cmd_interface_type inbox_type;
633 
634 	enum dmub_srv_power_state_type power_state;
635 	struct dmub_diagnostic_data debug;
636 	struct dmub_fb lsdma_rb_fb;
637 	struct dmub_preos_info preos_info;
638 };
639 
640 /**
641  * struct dmub_notification - dmub notification data
642  * @type: dmub notification type
643  * @link_index: link index to identify aux connection
644  * @result: USB4 status returned from dmub
645  * @pending_notification: Indicates there are other pending notifications
646  * @aux_reply: aux reply
647  * @hpd_status: hpd status
648  * @bw_alloc_reply: BW Allocation reply from CM/DPIA
649  */
650 struct dmub_notification {
651 	enum dmub_notification_type type;
652 	uint8_t link_index;
653 	uint8_t result;
654 	/* notify instance from DMUB */
655 	uint8_t instance;
656 	bool pending_notification;
657 	union {
658 		struct aux_reply_data aux_reply;
659 		enum dp_hpd_status hpd_status;
660 		enum set_config_status sc_status;
661 		struct dmub_rb_cmd_hpd_sense_notify_data hpd_sense_notify;
662 		struct dmub_cmd_fused_request fused_request;
663 	};
664 };
665 
666 /**
667  * DMUB firmware version helper macro - useful for checking if the version
668  * of a firmware to know if feature or functionality is supported or present.
669  */
670 #define DMUB_FW_VERSION(major, minor, revision) \
671 	((((major) & 0xFF) << 24) | (((minor) & 0xFF) << 16) | (((revision) & 0xFF) << 8))
672 
673 /**
674  * dmub_srv_create() - creates the DMUB service.
675  * @dmub: the dmub service
676  * @params: creation parameters for the service
677  *
678  * Return:
679  *   DMUB_STATUS_OK - success
680  *   DMUB_STATUS_INVALID - unspecified error
681  */
682 enum dmub_status dmub_srv_create(struct dmub_srv *dmub,
683 				 const struct dmub_srv_create_params *params);
684 
685 /**
686  * dmub_srv_destroy() - destroys the DMUB service.
687  * @dmub: the dmub service
688  */
689 void dmub_srv_destroy(struct dmub_srv *dmub);
690 
691 /**
692  * dmub_srv_calc_region_info() - retreives region info from the dmub service
693  * @dmub: the dmub service
694  * @params: parameters used to calculate region locations
695  * @info_out: the output region info from dmub
696  *
697  * Calculates the base and top address for all relevant dmub regions
698  * using the parameters given (if any).
699  *
700  * Return:
701  *   DMUB_STATUS_OK - success
702  *   DMUB_STATUS_INVALID - unspecified error
703  */
704 enum dmub_status
705 dmub_srv_calc_region_info(struct dmub_srv *dmub,
706 			  const struct dmub_srv_region_params *params,
707 			  struct dmub_srv_region_info *out);
708 
709 /**
710  * dmub_srv_calc_region_info() - retreives fb info from the dmub service
711  * @dmub: the dmub service
712  * @params: parameters used to calculate fb locations
713  * @info_out: the output fb info from dmub
714  *
715  * Calculates the base and top address for all relevant dmub regions
716  * using the parameters given (if any).
717  *
718  * Return:
719  *   DMUB_STATUS_OK - success
720  *   DMUB_STATUS_INVALID - unspecified error
721  */
722 enum dmub_status dmub_srv_calc_mem_info(struct dmub_srv *dmub,
723 				       const struct dmub_srv_memory_params *params,
724 				       struct dmub_srv_fb_info *out);
725 
726 /**
727  * dmub_srv_has_hw_support() - returns hw support state for dmcub
728  * @dmub: the dmub service
729  * @is_supported: hw support state
730  *
731  * Queries the hardware for DMCUB support and returns the result.
732  *
733  * Can be called before dmub_srv_hw_init().
734  *
735  * Return:
736  *   DMUB_STATUS_OK - success
737  *   DMUB_STATUS_INVALID - unspecified error
738  */
739 enum dmub_status dmub_srv_has_hw_support(struct dmub_srv *dmub,
740 					 bool *is_supported);
741 
742 /**
743  * dmub_srv_is_hw_init() - returns hardware init state
744  *
745  * Return:
746  *   DMUB_STATUS_OK - success
747  *   DMUB_STATUS_INVALID - unspecified error
748  */
749 enum dmub_status dmub_srv_is_hw_init(struct dmub_srv *dmub, bool *is_hw_init);
750 
751 /**
752  * dmub_srv_hw_init() - initializes the underlying DMUB hardware
753  * @dmub: the dmub service
754  * @params: params for hardware initialization
755  *
756  * Resets the DMUB hardware and performs backdoor loading of the
757  * required cache regions based on the input framebuffer regions.
758  *
759  * Return:
760  *   DMUB_STATUS_OK - success
761  *   DMUB_STATUS_NO_CTX - dmcub context not initialized
762  *   DMUB_STATUS_INVALID - unspecified error
763  */
764 enum dmub_status dmub_srv_hw_init(struct dmub_srv *dmub,
765 				  const struct dmub_srv_hw_params *params);
766 
767 /**
768  * dmub_srv_hw_reset() - puts the DMUB hardware in reset state if initialized
769  * @dmub: the dmub service
770  *
771  * Before destroying the DMUB service or releasing the backing framebuffer
772  * memory we'll need to put the DMCUB into reset first.
773  *
774  * A subsequent call to dmub_srv_hw_init() will re-enable the DMCUB.
775  *
776  * Return:
777  *   DMUB_STATUS_OK - success
778  *   DMUB_STATUS_INVALID - unspecified error
779  */
780 enum dmub_status dmub_srv_hw_reset(struct dmub_srv *dmub);
781 
782 /**
783  * dmub_srv_fb_cmd_queue() - queues a command to the DMUB
784  * @dmub: the dmub service
785  * @cmd: the command to queue
786  *
787  * Queues a command to the DMUB service but does not begin execution
788  * immediately.
789  *
790  * Return:
791  *   DMUB_STATUS_OK - success
792  *   DMUB_STATUS_QUEUE_FULL - no remaining room in queue
793  *   DMUB_STATUS_INVALID - unspecified error
794  */
795 enum dmub_status dmub_srv_fb_cmd_queue(struct dmub_srv *dmub,
796 				    const union dmub_rb_cmd *cmd);
797 
798 /**
799  * dmub_srv_fb_cmd_execute() - Executes a queued sequence to the dmub
800  * @dmub: the dmub service
801  *
802  * Begins execution of queued commands on the dmub.
803  *
804  * Return:
805  *   DMUB_STATUS_OK - success
806  *   DMUB_STATUS_INVALID - unspecified error
807  */
808 enum dmub_status dmub_srv_fb_cmd_execute(struct dmub_srv *dmub);
809 
810 /**
811  * dmub_srv_wait_for_hw_pwr_up() - Waits for firmware hardware power up is completed
812  * @dmub: the dmub service
813  * @timeout_us: the maximum number of microseconds to wait
814  *
815  * Waits until firmware hardware is powered up. The maximum
816  * wait time is given in microseconds to prevent spinning forever.
817  *
818  * Return:
819  *   DMUB_STATUS_OK - success
820  *   DMUB_STATUS_TIMEOUT - timed out
821  *   DMUB_STATUS_INVALID - unspecified error
822  */
823 enum dmub_status dmub_srv_wait_for_hw_pwr_up(struct dmub_srv *dmub,
824 					     uint32_t timeout_us);
825 
826 bool dmub_srv_is_hw_pwr_up(struct dmub_srv *dmub);
827 
828 /**
829  * dmub_srv_wait_for_auto_load() - Waits for firmware auto load to complete
830  * @dmub: the dmub service
831  * @timeout_us: the maximum number of microseconds to wait
832  *
833  * Waits until firmware has been autoloaded by the DMCUB. The maximum
834  * wait time is given in microseconds to prevent spinning forever.
835  *
836  * On ASICs without firmware autoload support this function will return
837  * immediately.
838  *
839  * Return:
840  *   DMUB_STATUS_OK - success
841  *   DMUB_STATUS_TIMEOUT - wait for phy init timed out
842  *   DMUB_STATUS_INVALID - unspecified error
843  */
844 enum dmub_status dmub_srv_wait_for_auto_load(struct dmub_srv *dmub,
845 					     uint32_t timeout_us);
846 
847 /**
848  * dmub_srv_wait_for_phy_init() - Waits for DMUB PHY init to complete
849  * @dmub: the dmub service
850  * @timeout_us: the maximum number of microseconds to wait
851  *
852  * Waits until the PHY has been initialized by the DMUB. The maximum
853  * wait time is given in microseconds to prevent spinning forever.
854  *
855  * On ASICs without PHY init support this function will return
856  * immediately.
857  *
858  * Return:
859  *   DMUB_STATUS_OK - success
860  *   DMUB_STATUS_TIMEOUT - wait for phy init timed out
861  *   DMUB_STATUS_INVALID - unspecified error
862  */
863 enum dmub_status dmub_srv_wait_for_phy_init(struct dmub_srv *dmub,
864 					    uint32_t timeout_us);
865 
866 /**
867  * dmub_srv_wait_for_pending() - Re-entrant wait for messages currently pending
868  * @dmub: the dmub service
869  * @timeout_us: the maximum number of microseconds to wait
870  *
871  * Waits until the commands queued prior to this call are complete.
872  * If interfaces remain busy due to additional work being submitted
873  * concurrently, this function will not continue to wait.
874  *
875  * Return:
876  *   DMUB_STATUS_OK - success
877  *   DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out
878  *   DMUB_STATUS_INVALID - unspecified error
879  */
880 enum dmub_status dmub_srv_wait_for_pending(struct dmub_srv *dmub,
881 					uint32_t timeout_us);
882 
883 /**
884  * dmub_srv_wait_for_idle() - Waits for the DMUB to be idle
885  * @dmub: the dmub service
886  * @timeout_us: the maximum number of microseconds to wait
887  *
888  * Waits until the DMUB buffer is empty and all commands have
889  * finished processing. The maximum wait time is given in
890  * microseconds to prevent spinning forever.
891  *
892  * Return:
893  *   DMUB_STATUS_OK - success
894  *   DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out
895  *   DMUB_STATUS_INVALID - unspecified error
896  */
897 enum dmub_status dmub_srv_wait_for_idle(struct dmub_srv *dmub,
898 					uint32_t timeout_us);
899 
900 /**
901  * dmub_srv_send_gpint_command() - Sends a GPINT based command.
902  * @dmub: the dmub service
903  * @command_code: the command code to send
904  * @param: the command parameter to send
905  * @timeout_us: the maximum number of microseconds to wait
906  *
907  * Sends a command via the general purpose interrupt (GPINT).
908  * Waits for the number of microseconds specified by timeout_us
909  * for the command ACK before returning.
910  *
911  * Can be called after software initialization.
912  *
913  * Return:
914  *   DMUB_STATUS_OK - success
915  *   DMUB_STATUS_TIMEOUT - wait for ACK timed out
916  *   DMUB_STATUS_INVALID - unspecified error
917  */
918 enum dmub_status
919 dmub_srv_send_gpint_command(struct dmub_srv *dmub,
920 			    enum dmub_gpint_command command_code,
921 			    uint16_t param, uint32_t timeout_us);
922 
923 /**
924  * dmub_srv_get_gpint_response() - Queries the GPINT response.
925  * @dmub: the dmub service
926  * @response: the response for the last GPINT
927  *
928  * Returns the response code for the last GPINT interrupt.
929  *
930  * Can be called after software initialization.
931  *
932  * Return:
933  *   DMUB_STATUS_OK - success
934  *   DMUB_STATUS_INVALID - unspecified error
935  */
936 enum dmub_status dmub_srv_get_gpint_response(struct dmub_srv *dmub,
937 					     uint32_t *response);
938 
939 /**
940  * dmub_srv_get_gpint_dataout() - Queries the GPINT DATAOUT.
941  * @dmub: the dmub service
942  * @dataout: the data for the GPINT DATAOUT
943  *
944  * Returns the response code for the last GPINT DATAOUT interrupt.
945  *
946  * Can be called after software initialization.
947  *
948  * Return:
949  *   DMUB_STATUS_OK - success
950  *   DMUB_STATUS_INVALID - unspecified error
951  */
952 enum dmub_status dmub_srv_get_gpint_dataout(struct dmub_srv *dmub,
953 					     uint32_t *dataout);
954 
955 /**
956  * dmub_flush_buffer_mem() - Read back entire frame buffer region.
957  * This ensures that the write from x86 has been flushed and will not
958  * hang the DMCUB.
959  * @fb: frame buffer to flush
960  *
961  * Can be called after software initialization.
962  */
963 void dmub_flush_buffer_mem(const struct dmub_fb *fb);
964 
965 /**
966  * dmub_srv_get_fw_boot_status() - Returns the DMUB boot status bits.
967  *
968  * @dmub: the dmub service
969  * @status: out pointer for firmware status
970  *
971  * Return:
972  *   DMUB_STATUS_OK - success
973  *   DMUB_STATUS_INVALID - unspecified error, unsupported
974  */
975 enum dmub_status dmub_srv_get_fw_boot_status(struct dmub_srv *dmub,
976 					     union dmub_fw_boot_status *status);
977 
978 enum dmub_status dmub_srv_get_fw_boot_option(struct dmub_srv *dmub,
979 					     union dmub_fw_boot_options *option);
980 
981 enum dmub_status dmub_srv_set_skip_panel_power_sequence(struct dmub_srv *dmub,
982 					     bool skip);
983 
984 bool dmub_srv_get_outbox0_msg(struct dmub_srv *dmub, struct dmcub_trace_buf_entry *entry);
985 
986 bool dmub_srv_get_diagnostic_data(struct dmub_srv *dmub);
987 
988 bool dmub_srv_should_detect(struct dmub_srv *dmub);
989 
990 /**
991  * dmub_srv_send_inbox0_cmd() - Send command to DMUB using INBOX0
992  * @dmub: the dmub service
993  * @data: the data to be sent in the INBOX0 command
994  *
995  * Send command by writing directly to INBOX0 WPTR
996  *
997  * Return:
998  *   DMUB_STATUS_OK - success
999  *   DMUB_STATUS_INVALID - hw_init false or hw function does not exist
1000  */
1001 enum dmub_status dmub_srv_send_inbox0_cmd(struct dmub_srv *dmub, union dmub_inbox0_data_register data);
1002 
1003 /**
1004  * dmub_srv_wait_for_inbox0_ack() - wait for DMUB to ACK INBOX0 command
1005  * @dmub: the dmub service
1006  * @timeout_us: the maximum number of microseconds to wait
1007  *
1008  * Wait for DMUB to ACK the INBOX0 message
1009  *
1010  * Return:
1011  *   DMUB_STATUS_OK - success
1012  *   DMUB_STATUS_INVALID - hw_init false or hw function does not exist
1013  *   DMUB_STATUS_TIMEOUT - wait for ack timed out
1014  */
1015 enum dmub_status dmub_srv_wait_for_inbox0_ack(struct dmub_srv *dmub, uint32_t timeout_us);
1016 
1017 /**
1018  * dmub_srv_wait_for_inbox0_ack() - clear ACK register for INBOX0
1019  * @dmub: the dmub service
1020  *
1021  * Clear ACK register for INBOX0
1022  *
1023  * Return:
1024  *   DMUB_STATUS_OK - success
1025  *   DMUB_STATUS_INVALID - hw_init false or hw function does not exist
1026  */
1027 enum dmub_status dmub_srv_clear_inbox0_ack(struct dmub_srv *dmub);
1028 
1029 /**
1030  * dmub_srv_subvp_save_surf_addr() - Save primary and meta address for subvp on each flip
1031  * @dmub: The dmub service
1032  * @addr: The surface address to be programmed on the current flip
1033  * @subvp_index: Index of subvp pipe, indicates which subvp pipe the address should be saved for
1034  *
1035  * Function to save the surface flip addr into scratch registers. This is to fix a race condition
1036  * between FW and driver reading / writing to the surface address at the same time. This is
1037  * required because there is no EARLIEST_IN_USE_META.
1038  *
1039  * Return:
1040  *   void
1041  */
1042 void dmub_srv_subvp_save_surf_addr(struct dmub_srv *dmub, const struct dc_plane_address *addr, uint8_t subvp_index);
1043 
1044 /**
1045  * dmub_srv_set_power_state() - Track DC power state in dmub_srv
1046  * @dmub: The dmub service
1047  * @power_state: DC power state setting
1048  *
1049  * Store DC power state in dmub_srv.  If dmub_srv is in D3, then don't send messages to DMUB
1050  *
1051  * Return:
1052  *   void
1053  */
1054 void dmub_srv_set_power_state(struct dmub_srv *dmub, enum dmub_srv_power_state_type dmub_srv_power_state);
1055 
1056 /**
1057  * dmub_srv_reg_cmd_execute() - Executes provided command to the dmub
1058  * @dmub: the dmub service
1059  * @cmd: the command packet to be executed
1060  *
1061  * Executes a single command for the dmub.
1062  *
1063  * Return:
1064  *   DMUB_STATUS_OK - success
1065  *   DMUB_STATUS_INVALID - unspecified error
1066  */
1067 enum dmub_status dmub_srv_reg_cmd_execute(struct dmub_srv *dmub, union dmub_rb_cmd *cmd);
1068 
1069 
1070 /**
1071  * dmub_srv_cmd_get_response() - Copies return data for command into buffer
1072  * @dmub: the dmub service
1073  * @cmd_rsp: response buffer
1074  *
1075  * Copies return data for command into buffer
1076  */
1077 void dmub_srv_cmd_get_response(struct dmub_srv *dmub,
1078 		union dmub_rb_cmd *cmd_rsp);
1079 
1080 /**
1081  * dmub_srv_sync_inboxes() - Sync inbox state
1082  * @dmub: the dmub service
1083  *
1084  * Sync inbox state
1085  *
1086  * Return:
1087  *   DMUB_STATUS_OK - success
1088  *   DMUB_STATUS_INVALID - unspecified error
1089  */
1090 enum dmub_status dmub_srv_sync_inboxes(struct dmub_srv *dmub);
1091 
1092 /**
1093  * dmub_srv_wait_for_inbox_free() - Waits for space in the DMUB inbox to free up
1094  * @dmub: the dmub service
1095  * @timeout_us: the maximum number of microseconds to wait
1096  * @num_free_required: number of free entries required
1097  *
1098  * Waits until the DMUB buffer is freed to the specified number.
1099  *  The maximum wait time is given in microseconds to prevent spinning
1100  * forever.
1101  *
1102  * Return:
1103  *   DMUB_STATUS_OK - success
1104  *   DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out
1105  *   DMUB_STATUS_INVALID - unspecified error
1106  */
1107 enum dmub_status dmub_srv_wait_for_inbox_free(struct dmub_srv *dmub,
1108 		uint32_t timeout_us,
1109 		uint32_t num_free_required);
1110 
1111 /**
1112  * dmub_srv_update_inbox_status() - Updates pending status for inbox & reg inbox0
1113  * @dmub: the dmub service
1114  *
1115  * Return:
1116  *   DMUB_STATUS_OK - success
1117  *   DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out
1118  *   DMUB_STATUS_HW_FAILURE - issue with HW programming
1119  *   DMUB_STATUS_INVALID - unspecified error
1120  */
1121 enum dmub_status dmub_srv_update_inbox_status(struct dmub_srv *dmub);
1122 
1123 /**
1124  * dmub_srv_get_preos_info() - retrieves preos fw info
1125  * @dmub: the dmub service
1126  *
1127  * Return:
1128  *   true - preos fw info retrieved successfully
1129  *   false - preos fw info not retrieved successfully
1130  */
1131 bool dmub_srv_get_preos_info(struct dmub_srv *dmub);
1132 
1133 /**
1134  * dmub_srv_get_fw_meta_info_from_raw_fw() - Fetch firmware metadata info from raw firmware image
1135  * @params: parameters for fetching firmware metadata info
1136  * @fw_info_out: output buffer for firmware metadata info
1137  *
1138  * Return:
1139  *   DMUB_STATUS_OK - success
1140  *   DMUB_STATUS_INVALID - no FW meta info found
1141  */
1142 enum dmub_status dmub_srv_get_fw_meta_info_from_raw_fw(struct dmub_srv_fw_meta_info_params *params,
1143 						       struct dmub_fw_meta_info *fw_info_out);
1144 
1145 #endif /* _DMUB_SRV_H_ */
1146