1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright 2019-2026 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 * 23 * Authors: AMD 24 * 25 */ 26 27 #ifndef _DMUB_SRV_H_ 28 #define _DMUB_SRV_H_ 29 30 /** 31 * DOC: DMUB interface and operation 32 * 33 * DMUB is the interface to the display DMCUB microcontroller on DCN hardware. 34 * It delegates hardware initialization and command submission to the 35 * microcontroller. DMUB is the shortname for DMCUB. 36 * 37 * This interface is not thread-safe. Ensure that all access to the interface 38 * is properly synchronized by the caller. 39 * 40 * Initialization and usage of the DMUB service should be done in the 41 * steps given below: 42 * 43 * 1. dmub_srv_create() 44 * 2. dmub_srv_has_hw_support() 45 * 3. dmub_srv_calc_region_info() 46 * 4. dmub_srv_hw_init() 47 * 48 * The call to dmub_srv_create() is required to use the server. 49 * 50 * The calls to dmub_srv_has_hw_support() and dmub_srv_calc_region_info() 51 * are helpers to query cache window size and allocate framebuffer(s) 52 * for the cache windows. 53 * 54 * The call to dmub_srv_hw_init() programs the DMCUB registers to prepare 55 * for command submission. Commands can be queued via dmub_srv_fb_cmd_queue() 56 * and executed via dmub_srv_fb_cmd_execute(). 57 * 58 * If the queue is full the dmub_srv_wait_for_idle() call can be used to 59 * wait until the queue has been cleared. 60 * 61 * Destroying the DMUB service can be done by calling dmub_srv_destroy(). 62 * This does not clear DMUB hardware state, only software state. 63 * 64 * The interface is intended to be standalone and should not depend on any 65 * other component within DAL. 66 */ 67 68 #include "inc/dmub_cmd.h" 69 #include "dc/dc_types.h" 70 71 #define DMUB_PC_SNAPSHOT_COUNT 10 72 73 /* Default tracebuffer size if meta is absent. */ 74 #define DMUB_TRACE_BUFFER_SIZE (64 * 1024) 75 76 #define PSP_HEADER_BYTES_256 0x100 // 256 bytes 77 #define PSP_FOOTER_BYTES_256 0x100 // 256 bytes 78 79 /* Forward declarations */ 80 struct dmub_srv; 81 struct dmub_srv_common_regs; 82 struct dmub_srv_dcn31_regs; 83 84 struct dmcub_trace_buf_entry; 85 86 /* enum dmub_window_memory_type - memory location type specification for windows */ 87 enum dmub_window_memory_type { 88 DMUB_WINDOW_MEMORY_TYPE_FB = 0, 89 DMUB_WINDOW_MEMORY_TYPE_GART 90 }; 91 92 /* enum dmub_status - return code for dmcub functions */ 93 enum dmub_status { 94 DMUB_STATUS_OK = 0, 95 DMUB_STATUS_NO_CTX, 96 DMUB_STATUS_QUEUE_FULL, 97 DMUB_STATUS_TIMEOUT, 98 DMUB_STATUS_INVALID, 99 DMUB_STATUS_HW_FAILURE, 100 DMUB_STATUS_POWER_STATE_D3 101 }; 102 103 /* enum dmub_asic - dmub asic identifier */ 104 enum dmub_asic { 105 DMUB_ASIC_NONE = 0, 106 DMUB_ASIC_DCN20, 107 DMUB_ASIC_DCN21, 108 DMUB_ASIC_DCN30, 109 DMUB_ASIC_DCN301, 110 DMUB_ASIC_DCN302, 111 DMUB_ASIC_DCN303, 112 DMUB_ASIC_DCN31, 113 DMUB_ASIC_DCN31B, 114 DMUB_ASIC_DCN314, 115 DMUB_ASIC_DCN315, 116 DMUB_ASIC_DCN316, 117 DMUB_ASIC_DCN32, 118 DMUB_ASIC_DCN321, 119 DMUB_ASIC_DCN35, 120 DMUB_ASIC_DCN351, 121 DMUB_ASIC_DCN36, 122 DMUB_ASIC_DCN401, 123 DMUB_ASIC_DCN42, 124 DMUB_ASIC_DCN42B, 125 DMUB_ASIC_MAX, 126 }; 127 128 /* enum dmub_window_id - dmub window identifier */ 129 enum dmub_window_id { 130 DMUB_WINDOW_0_INST_CONST = 0, 131 DMUB_WINDOW_1_STACK, 132 DMUB_WINDOW_2_BSS_DATA, 133 DMUB_WINDOW_3_VBIOS, 134 DMUB_WINDOW_4_MAILBOX, 135 DMUB_WINDOW_5_TRACEBUFF, 136 DMUB_WINDOW_6_FW_STATE, 137 DMUB_WINDOW_7_SCRATCH_MEM, 138 DMUB_WINDOW_IB_MEM, 139 DMUB_WINDOW_SHARED_STATE, 140 DMUB_WINDOW_LSDMA_BUFFER, 141 DMUB_WINDOW_CURSOR_OFFLOAD, 142 DMUB_WINDOW_TOTAL, 143 }; 144 145 /* enum dmub_notification_type - dmub outbox notification identifier */ 146 enum dmub_notification_type { 147 DMUB_NOTIFICATION_NO_DATA = 0, 148 DMUB_NOTIFICATION_AUX_REPLY, 149 DMUB_NOTIFICATION_HPD, 150 DMUB_NOTIFICATION_HPD_IRQ, 151 DMUB_NOTIFICATION_SET_CONFIG_REPLY, 152 DMUB_NOTIFICATION_DPIA_NOTIFICATION, 153 DMUB_NOTIFICATION_HPD_SENSE_NOTIFY, 154 DMUB_NOTIFICATION_FUSED_IO, 155 DMUB_NOTIFICATION_MAX 156 }; 157 158 /** 159 * DPIA NOTIFICATION Response Type 160 */ 161 enum dpia_notify_bw_alloc_status { 162 163 DPIA_BW_REQ_FAILED = 0, 164 DPIA_BW_REQ_SUCCESS, 165 DPIA_EST_BW_CHANGED, 166 DPIA_BW_ALLOC_CAPS_CHANGED 167 }; 168 169 /* enum dmub_memory_access_type - memory access method */ 170 enum dmub_memory_access_type { 171 DMUB_MEMORY_ACCESS_DEFAULT, 172 DMUB_MEMORY_ACCESS_CPU = DMUB_MEMORY_ACCESS_DEFAULT, 173 DMUB_MEMORY_ACCESS_DMA 174 }; 175 176 /* enum dmub_power_state type - to track DC power state in dmub_srv */ 177 enum dmub_srv_power_state_type { 178 DMUB_POWER_STATE_UNDEFINED = 0, 179 DMUB_POWER_STATE_D0 = 1, 180 DMUB_POWER_STATE_D3 = 8 181 }; 182 183 /* enum dmub_inbox_cmd_interface type - defines default interface for host->dmub commands */ 184 enum dmub_inbox_cmd_interface_type { 185 DMUB_CMD_INTERFACE_DEFAULT = 0, 186 DMUB_CMD_INTERFACE_FB = 1, 187 DMUB_CMD_INTERFACE_REG = 2, 188 }; 189 190 /** 191 * struct dmub_region - dmub hw memory region 192 * @base: base address for region, must be 256 byte aligned 193 * @top: top address for region 194 */ 195 struct dmub_region { 196 uint32_t base; 197 uint32_t top; 198 }; 199 200 /** 201 * struct dmub_window - dmub hw cache window 202 * @off: offset to the fb memory in gpu address space 203 * @r: region in uc address space for cache window 204 */ 205 struct dmub_window { 206 union dmub_addr offset; 207 struct dmub_region region; 208 }; 209 210 /** 211 * struct dmub_fb - defines a dmub framebuffer memory region 212 * @cpu_addr: cpu virtual address for the region, NULL if invalid 213 * @gpu_addr: gpu virtual address for the region, NULL if invalid 214 * @size: size of the region in bytes, zero if invalid 215 */ 216 struct dmub_fb { 217 void *cpu_addr; 218 uint64_t gpu_addr; 219 uint32_t size; 220 }; 221 222 /** 223 * struct dmub_srv_region_params - params used for calculating dmub regions 224 * @inst_const_size: size of the fw inst const section 225 * @bss_data_size: size of the fw bss data section 226 * @vbios_size: size of the vbios data 227 * @fw_bss_data: raw firmware bss data section 228 */ 229 struct dmub_srv_region_params { 230 uint32_t inst_const_size; 231 uint32_t bss_data_size; 232 uint32_t vbios_size; 233 const uint8_t *fw_inst_const; 234 const uint8_t *fw_bss_data; 235 const enum dmub_window_memory_type *window_memory_type; 236 const struct dmub_fw_meta_info *fw_info; 237 }; 238 239 /** 240 * struct dmub_srv_fw_meta_info_params - params used for fetching fw meta info from fw_image 241 * @inst_const_size: size of the fw inst const section 242 * @bss_data_size: size of the fw bss data section 243 * @fw_inst_const: raw firmware inst const section 244 * @fw_bss_data: raw firmware bss data section 245 * @custom_psp_footer_size: custom psp footer size to use when indexing for fw meta info 246 */ 247 struct dmub_srv_fw_meta_info_params { 248 uint32_t inst_const_size; 249 uint32_t bss_data_size; 250 const uint8_t *fw_inst_const; 251 const uint8_t *fw_bss_data; 252 uint32_t custom_psp_footer_size; 253 }; 254 255 /** 256 * struct dmub_srv_region_info - output region info from the dmub service 257 * @fb_size: required minimum fb size for all regions, aligned to 4096 bytes 258 * @num_regions: number of regions used by the dmub service 259 * @regions: region info 260 * 261 * The regions are aligned such that they can be all placed within the 262 * same framebuffer but they can also be placed into different framebuffers. 263 * 264 * The size of each region can be calculated by the caller: 265 * size = reg.top - reg.base 266 * 267 * Care must be taken when performing custom allocations to ensure that each 268 * region base address is 256 byte aligned. 269 */ 270 struct dmub_srv_region_info { 271 uint32_t fb_size; 272 uint32_t gart_size; 273 uint8_t num_regions; 274 struct dmub_region regions[DMUB_WINDOW_TOTAL]; 275 uint32_t verified_psp_footer_size; 276 }; 277 278 /** 279 * struct dmub_srv_memory_params - parameters used for driver fb setup 280 * @region_info: region info calculated by dmub service 281 * @cpu_fb_addr: base cpu address for the framebuffer 282 * @cpu_inbox_addr: base cpu address for the gart 283 * @gpu_fb_addr: base gpu virtual address for the framebuffer 284 * @gpu_inbox_addr: base gpu virtual address for the gart 285 */ 286 struct dmub_srv_memory_params { 287 const struct dmub_srv_region_info *region_info; 288 void *cpu_fb_addr; 289 void *cpu_gart_addr; 290 uint64_t gpu_fb_addr; 291 uint64_t gpu_gart_addr; 292 const enum dmub_window_memory_type *window_memory_type; 293 }; 294 295 /** 296 * struct dmub_srv_fb_info - output fb info from the dmub service 297 * @num_fbs: number of required dmub framebuffers 298 * @fbs: fb data for each region 299 * 300 * Output from the dmub service helper that can be used by the 301 * driver to prepare dmub_fb that can be passed into the dmub 302 * hw init service. 303 * 304 * Assumes that all regions are within the same framebuffer 305 * and have been setup according to the region_info generated 306 * by the dmub service. 307 */ 308 struct dmub_srv_fb_info { 309 uint8_t num_fb; 310 struct dmub_fb fb[DMUB_WINDOW_TOTAL]; 311 }; 312 313 /** 314 * struct dmub_soc_fb_info - relevant addresses from the frame buffer 315 * @fb_base: base of the framebuffer aperture 316 * @fb_offset: offset of the framebuffer aperture 317 */ 318 struct dmub_soc_fb_info { 319 uint64_t fb_base; 320 uint64_t fb_offset; 321 }; 322 323 /* 324 * struct dmub_srv_hw_params - params for dmub hardware initialization 325 * @fb: framebuffer info for each region 326 * @fb_base: base of the framebuffer aperture 327 * @fb_offset: offset of the framebuffer aperture 328 * @psp_version: psp version to pass for DMCU init 329 * @load_inst_const: true if DMUB should load inst const fw 330 */ 331 struct dmub_srv_hw_params { 332 struct dmub_fb *fb[DMUB_WINDOW_TOTAL]; 333 struct dmub_soc_fb_info soc_fb_info; 334 uint32_t psp_version; 335 bool load_inst_const; 336 bool skip_panel_power_sequence; 337 bool disable_z10; 338 bool power_optimization; 339 bool dpia_supported; 340 bool disable_dpia; 341 bool usb4_cm_version; 342 bool fw_in_system_memory; 343 bool dpia_hpd_int_enable_supported; 344 bool disable_clock_gate; 345 bool disallow_dispclk_dppclk_ds; 346 bool ips_sequential_ono; 347 enum dmub_memory_access_type mem_access_type; 348 enum dmub_ips_disable_type disable_ips; 349 bool disallow_phy_access; 350 bool disable_sldo_opt; 351 bool enable_non_transparent_setconfig; 352 bool lower_hbr3_phy_ssc; 353 bool override_hbr3_pll_vco; 354 bool disable_dpia_bw_allocation; 355 }; 356 357 /** 358 * struct dmub_srv_debug - Debug info for dmub_srv 359 * @timeout_occured: Indicates a timeout occured on any message from driver to dmub 360 * @timeout_cmd: first cmd sent from driver that timed out - subsequent timeouts are not stored 361 */ 362 struct dmub_timeout_info { 363 bool timeout_occured; 364 union dmub_rb_cmd timeout_cmd; 365 unsigned long long timestamp; 366 }; 367 368 /** 369 * struct dmub_diagnostic_data - Diagnostic data retrieved from DMCUB for 370 * debugging purposes, including logging, crash analysis, etc. 371 */ 372 struct dmub_diagnostic_data { 373 uint32_t dmcub_version; 374 uint32_t scratch[17]; 375 uint32_t pc[DMUB_PC_SNAPSHOT_COUNT]; 376 uint32_t undefined_address_fault_addr; 377 uint32_t inst_fetch_fault_addr; 378 uint32_t data_write_fault_addr; 379 uint32_t inbox1_rptr; 380 uint32_t inbox1_wptr; 381 uint32_t inbox1_size; 382 uint32_t inbox0_rptr; 383 uint32_t inbox0_wptr; 384 uint32_t inbox0_size; 385 uint32_t outbox1_rptr; 386 uint32_t outbox1_wptr; 387 uint32_t outbox1_size; 388 uint32_t gpint_datain0; 389 struct dmub_timeout_info timeout_info; 390 uint8_t is_dmcub_enabled : 1; 391 uint8_t is_dmcub_soft_reset : 1; 392 uint8_t is_dmcub_secure_reset : 1; 393 uint8_t is_traceport_en : 1; 394 uint8_t is_cw0_enabled : 1; 395 uint8_t is_cw6_enabled : 1; 396 uint8_t is_pwait : 1; 397 }; 398 399 /** 400 * struct dmub_preos_info - preos fw info before loading post os fw. 401 */ 402 struct dmub_preos_info { 403 uint64_t fb_base; 404 uint64_t fb_offset; 405 uint64_t trace_buffer_phy_addr; 406 uint32_t trace_buffer_size; 407 uint32_t fw_version; 408 uint32_t boot_status; 409 uint32_t boot_options; 410 }; 411 412 struct dmub_srv_inbox { 413 /* generic status */ 414 uint64_t num_submitted; 415 uint64_t num_reported; 416 union { 417 /* frame buffer mailbox status */ 418 struct dmub_rb rb; 419 /* register mailbox status */ 420 struct { 421 bool is_pending; 422 bool is_multi_pending; 423 }; 424 }; 425 }; 426 427 /** 428 * struct dmub_srv_base_funcs - Driver specific base callbacks 429 */ 430 struct dmub_srv_base_funcs { 431 /** 432 * @reg_read: 433 * 434 * Hook for reading a register. 435 * 436 * Return: The 32-bit register value from the given address. 437 */ 438 uint32_t (*reg_read)(void *ctx, uint32_t address); 439 440 /** 441 * @reg_write: 442 * 443 * Hook for writing a value to the register specified by address. 444 */ 445 void (*reg_write)(void *ctx, uint32_t address, uint32_t value); 446 }; 447 448 /** 449 * struct dmub_srv_hw_funcs - hardware sequencer funcs for dmub 450 */ 451 struct dmub_srv_hw_funcs { 452 /* private: internal use only */ 453 454 void (*init)(struct dmub_srv *dmub); 455 456 void (*reset)(struct dmub_srv *dmub); 457 458 void (*reset_release)(struct dmub_srv *dmub); 459 460 void (*backdoor_load)(struct dmub_srv *dmub, 461 const struct dmub_window *cw0, 462 const struct dmub_window *cw1); 463 464 void (*backdoor_load_zfb_mode)(struct dmub_srv *dmub, 465 const struct dmub_window *cw0, 466 const struct dmub_window *cw1); 467 void (*setup_windows)(struct dmub_srv *dmub, 468 const struct dmub_window *cw2, 469 const struct dmub_window *cw3, 470 const struct dmub_window *cw4, 471 const struct dmub_window *cw5, 472 const struct dmub_window *cw6, 473 const struct dmub_window *region6); 474 475 void (*setup_mailbox)(struct dmub_srv *dmub, 476 const struct dmub_region *inbox1); 477 478 uint32_t (*get_inbox1_wptr)(struct dmub_srv *dmub); 479 480 uint32_t (*get_inbox1_rptr)(struct dmub_srv *dmub); 481 482 void (*set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset); 483 484 void (*setup_out_mailbox)(struct dmub_srv *dmub, 485 const struct dmub_region *outbox1); 486 487 uint32_t (*get_outbox1_wptr)(struct dmub_srv *dmub); 488 489 void (*set_outbox1_rptr)(struct dmub_srv *dmub, uint32_t rptr_offset); 490 491 void (*setup_outbox0)(struct dmub_srv *dmub, 492 const struct dmub_region *outbox0); 493 494 uint32_t (*get_outbox0_wptr)(struct dmub_srv *dmub); 495 496 void (*set_outbox0_rptr)(struct dmub_srv *dmub, uint32_t rptr_offset); 497 498 uint32_t (*emul_get_inbox1_rptr)(struct dmub_srv *dmub); 499 500 uint32_t (*emul_get_inbox1_wptr)(struct dmub_srv *dmub); 501 502 void (*emul_set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset); 503 504 bool (*is_supported)(struct dmub_srv *dmub); 505 506 bool (*is_psrsu_supported)(struct dmub_srv *dmub); 507 508 bool (*is_hw_init)(struct dmub_srv *dmub); 509 bool (*is_hw_powered_up)(struct dmub_srv *dmub); 510 511 void (*enable_dmub_boot_options)(struct dmub_srv *dmub, 512 const struct dmub_srv_hw_params *params); 513 514 void (*skip_dmub_panel_power_sequence)(struct dmub_srv *dmub, bool skip); 515 516 union dmub_fw_boot_status (*get_fw_status)(struct dmub_srv *dmub); 517 518 union dmub_fw_boot_options (*get_fw_boot_option)(struct dmub_srv *dmub); 519 520 void (*set_gpint)(struct dmub_srv *dmub, 521 union dmub_gpint_data_register reg); 522 523 bool (*is_gpint_acked)(struct dmub_srv *dmub, 524 union dmub_gpint_data_register reg); 525 526 uint32_t (*get_gpint_response)(struct dmub_srv *dmub); 527 528 uint32_t (*get_gpint_dataout)(struct dmub_srv *dmub); 529 530 void (*configure_dmub_in_system_memory)(struct dmub_srv *dmub); 531 void (*clear_inbox0_ack_register)(struct dmub_srv *dmub); 532 uint32_t (*read_inbox0_ack_register)(struct dmub_srv *dmub); 533 void (*send_inbox0_cmd)(struct dmub_srv *dmub, union dmub_inbox0_data_register data); 534 uint32_t (*get_current_time)(struct dmub_srv *dmub); 535 536 void (*get_diagnostic_data)(struct dmub_srv *dmub); 537 bool (*get_preos_fw_info)(struct dmub_srv *dmub); 538 539 bool (*should_detect)(struct dmub_srv *dmub); 540 void (*init_reg_offsets)(struct dmub_srv *dmub, struct dc_context *ctx); 541 542 void (*subvp_save_surf_addr)(struct dmub_srv *dmub, const struct dc_plane_address *addr, uint8_t subvp_index); 543 544 void (*send_reg_inbox0_cmd_msg)(struct dmub_srv *dmub, 545 union dmub_rb_cmd *cmd); 546 uint32_t (*read_reg_inbox0_rsp_int_status)(struct dmub_srv *dmub); 547 void (*read_reg_inbox0_cmd_rsp)(struct dmub_srv *dmub, 548 union dmub_rb_cmd *cmd); 549 void (*write_reg_inbox0_rsp_int_ack)(struct dmub_srv *dmub); 550 void (*clear_reg_inbox0_rsp_int_ack)(struct dmub_srv *dmub); 551 void (*enable_reg_inbox0_rsp_int)(struct dmub_srv *dmub, bool enable); 552 553 uint32_t (*read_reg_outbox0_rdy_int_status)(struct dmub_srv *dmub); 554 void (*write_reg_outbox0_rdy_int_ack)(struct dmub_srv *dmub); 555 void (*read_reg_outbox0_msg)(struct dmub_srv *dmub, uint32_t *msg); 556 void (*write_reg_outbox0_rsp)(struct dmub_srv *dmub, uint32_t *rsp); 557 uint32_t (*read_reg_outbox0_rsp_int_status)(struct dmub_srv *dmub); 558 void (*enable_reg_outbox0_rdy_int)(struct dmub_srv *dmub, bool enable); 559 }; 560 561 /** 562 * struct dmub_srv_create_params - params for dmub service creation 563 * @base_funcs: driver supplied base routines 564 * @hw_funcs: optional overrides for hw funcs 565 * @user_ctx: context data for callback funcs 566 * @asic: driver supplied asic 567 * @fw_version: the current firmware version, if any 568 * @is_virtual: false for hw support only 569 */ 570 struct dmub_srv_create_params { 571 struct dmub_srv_base_funcs funcs; 572 struct dmub_srv_hw_funcs *hw_funcs; 573 void *user_ctx; 574 enum dmub_asic asic; 575 uint32_t fw_version; 576 bool is_virtual; 577 enum dmub_inbox_cmd_interface_type inbox_type; 578 }; 579 580 /** 581 * struct dmub_srv - software state for dmcub 582 * @asic: dmub asic identifier 583 * @user_ctx: user provided context for the dmub_srv 584 * @fw_version: the current firmware version, if any 585 * @is_virtual: false if hardware support only 586 * @shared_state: dmub shared state between firmware and driver 587 * @cursor_offload_v1: Cursor offload state 588 * @fw_state: dmub firmware state pointer (debug purpose only) 589 */ 590 struct dmub_srv { 591 enum dmub_asic asic; 592 void *user_ctx; 593 uint32_t fw_version; 594 bool is_virtual; 595 struct dmub_fb scratch_mem_fb; 596 struct dmub_fb ib_mem_gart; 597 struct dmub_fb cursor_offload_fb; 598 volatile struct dmub_shared_state_feature_block *shared_state; 599 volatile struct dmub_cursor_offload_v1 *cursor_offload_v1; 600 volatile const struct dmub_fw_state *fw_state; 601 602 /* private: internal use only */ 603 const struct dmub_srv_common_regs *regs; 604 const struct dmub_srv_dcn31_regs *regs_dcn31; 605 struct dmub_srv_dcn32_regs *regs_dcn32; 606 struct dmub_srv_dcn35_regs *regs_dcn35; 607 const struct dmub_srv_dcn401_regs *regs_dcn401; 608 struct dmub_srv_dcn42_regs *regs_dcn42; 609 struct dmub_srv_base_funcs funcs; 610 struct dmub_srv_hw_funcs hw_funcs; 611 struct dmub_srv_inbox inbox1; 612 uint32_t inbox1_last_wptr; 613 struct dmub_srv_inbox reg_inbox0; 614 /** 615 * outbox1_rb is accessed without locks (dal & dc) 616 * and to be used only in dmub_srv_stat_get_notification() 617 */ 618 struct dmub_rb outbox1_rb; 619 620 struct dmub_rb outbox0_rb; 621 622 bool sw_init; 623 bool hw_init; 624 bool dpia_supported; 625 626 struct dmub_soc_fb_info soc_fb_info; 627 uint32_t psp_version; 628 629 /* Feature capabilities reported by fw */ 630 struct dmub_fw_meta_info meta_info; 631 struct dmub_feature_caps feature_caps; 632 struct dmub_visual_confirm_color visual_confirm_color; 633 enum dmub_inbox_cmd_interface_type inbox_type; 634 635 enum dmub_srv_power_state_type power_state; 636 struct dmub_diagnostic_data debug; 637 struct dmub_fb lsdma_rb_fb; 638 struct dmub_preos_info preos_info; 639 }; 640 641 /** 642 * struct dmub_notification - dmub notification data 643 * @type: dmub notification type 644 * @link_index: link index to identify aux connection 645 * @result: USB4 status returned from dmub 646 * @pending_notification: Indicates there are other pending notifications 647 * @aux_reply: aux reply 648 * @hpd_status: hpd status 649 * @bw_alloc_reply: BW Allocation reply from CM/DPIA 650 */ 651 struct dmub_notification { 652 enum dmub_notification_type type; 653 uint8_t link_index; 654 uint8_t result; 655 /* notify instance from DMUB */ 656 uint8_t instance; 657 bool pending_notification; 658 union { 659 struct aux_reply_data aux_reply; 660 enum dp_hpd_status hpd_status; 661 enum set_config_status sc_status; 662 struct dmub_rb_cmd_hpd_sense_notify_data hpd_sense_notify; 663 struct dmub_cmd_fused_request fused_request; 664 }; 665 }; 666 667 /** 668 * DMUB firmware version helper macro - useful for checking if the version 669 * of a firmware to know if feature or functionality is supported or present. 670 */ 671 #define DMUB_FW_VERSION(major, minor, revision) \ 672 ((((major) & 0xFF) << 24) | (((minor) & 0xFF) << 16) | (((revision) & 0xFF) << 8)) 673 674 /** 675 * dmub_srv_create() - creates the DMUB service. 676 * @dmub: the dmub service 677 * @params: creation parameters for the service 678 * 679 * Return: 680 * DMUB_STATUS_OK - success 681 * DMUB_STATUS_INVALID - unspecified error 682 */ 683 enum dmub_status dmub_srv_create(struct dmub_srv *dmub, 684 const struct dmub_srv_create_params *params); 685 686 /** 687 * dmub_srv_destroy() - destroys the DMUB service. 688 * @dmub: the dmub service 689 */ 690 void dmub_srv_destroy(struct dmub_srv *dmub); 691 692 /** 693 * dmub_srv_calc_region_info() - retreives region info from the dmub service 694 * @dmub: the dmub service 695 * @params: parameters used to calculate region locations 696 * @info_out: the output region info from dmub 697 * 698 * Calculates the base and top address for all relevant dmub regions 699 * using the parameters given (if any). 700 * 701 * Return: 702 * DMUB_STATUS_OK - success 703 * DMUB_STATUS_INVALID - unspecified error 704 */ 705 enum dmub_status 706 dmub_srv_calc_region_info(struct dmub_srv *dmub, 707 const struct dmub_srv_region_params *params, 708 struct dmub_srv_region_info *out); 709 710 /** 711 * dmub_srv_calc_region_info() - retreives fb info from the dmub service 712 * @dmub: the dmub service 713 * @params: parameters used to calculate fb locations 714 * @info_out: the output fb info from dmub 715 * 716 * Calculates the base and top address for all relevant dmub regions 717 * using the parameters given (if any). 718 * 719 * Return: 720 * DMUB_STATUS_OK - success 721 * DMUB_STATUS_INVALID - unspecified error 722 */ 723 enum dmub_status dmub_srv_calc_mem_info(struct dmub_srv *dmub, 724 const struct dmub_srv_memory_params *params, 725 struct dmub_srv_fb_info *out); 726 727 /** 728 * dmub_srv_has_hw_support() - returns hw support state for dmcub 729 * @dmub: the dmub service 730 * @is_supported: hw support state 731 * 732 * Queries the hardware for DMCUB support and returns the result. 733 * 734 * Can be called before dmub_srv_hw_init(). 735 * 736 * Return: 737 * DMUB_STATUS_OK - success 738 * DMUB_STATUS_INVALID - unspecified error 739 */ 740 enum dmub_status dmub_srv_has_hw_support(struct dmub_srv *dmub, 741 bool *is_supported); 742 743 /** 744 * dmub_srv_is_hw_init() - returns hardware init state 745 * 746 * Return: 747 * DMUB_STATUS_OK - success 748 * DMUB_STATUS_INVALID - unspecified error 749 */ 750 enum dmub_status dmub_srv_is_hw_init(struct dmub_srv *dmub, bool *is_hw_init); 751 752 /** 753 * dmub_srv_hw_init() - initializes the underlying DMUB hardware 754 * @dmub: the dmub service 755 * @params: params for hardware initialization 756 * 757 * Resets the DMUB hardware and performs backdoor loading of the 758 * required cache regions based on the input framebuffer regions. 759 * 760 * Return: 761 * DMUB_STATUS_OK - success 762 * DMUB_STATUS_NO_CTX - dmcub context not initialized 763 * DMUB_STATUS_INVALID - unspecified error 764 */ 765 enum dmub_status dmub_srv_hw_init(struct dmub_srv *dmub, 766 const struct dmub_srv_hw_params *params); 767 768 /** 769 * dmub_srv_hw_reset() - puts the DMUB hardware in reset state if initialized 770 * @dmub: the dmub service 771 * 772 * Before destroying the DMUB service or releasing the backing framebuffer 773 * memory we'll need to put the DMCUB into reset first. 774 * 775 * A subsequent call to dmub_srv_hw_init() will re-enable the DMCUB. 776 * 777 * Return: 778 * DMUB_STATUS_OK - success 779 * DMUB_STATUS_INVALID - unspecified error 780 */ 781 enum dmub_status dmub_srv_hw_reset(struct dmub_srv *dmub); 782 783 /** 784 * dmub_srv_fb_cmd_queue() - queues a command to the DMUB 785 * @dmub: the dmub service 786 * @cmd: the command to queue 787 * 788 * Queues a command to the DMUB service but does not begin execution 789 * immediately. 790 * 791 * Return: 792 * DMUB_STATUS_OK - success 793 * DMUB_STATUS_QUEUE_FULL - no remaining room in queue 794 * DMUB_STATUS_INVALID - unspecified error 795 */ 796 enum dmub_status dmub_srv_fb_cmd_queue(struct dmub_srv *dmub, 797 const union dmub_rb_cmd *cmd); 798 799 /** 800 * dmub_srv_fb_cmd_execute() - Executes a queued sequence to the dmub 801 * @dmub: the dmub service 802 * 803 * Begins execution of queued commands on the dmub. 804 * 805 * Return: 806 * DMUB_STATUS_OK - success 807 * DMUB_STATUS_INVALID - unspecified error 808 */ 809 enum dmub_status dmub_srv_fb_cmd_execute(struct dmub_srv *dmub); 810 811 /** 812 * dmub_srv_wait_for_hw_pwr_up() - Waits for firmware hardware power up is completed 813 * @dmub: the dmub service 814 * @timeout_us: the maximum number of microseconds to wait 815 * 816 * Waits until firmware hardware is powered up. The maximum 817 * wait time is given in microseconds to prevent spinning forever. 818 * 819 * Return: 820 * DMUB_STATUS_OK - success 821 * DMUB_STATUS_TIMEOUT - timed out 822 * DMUB_STATUS_INVALID - unspecified error 823 */ 824 enum dmub_status dmub_srv_wait_for_hw_pwr_up(struct dmub_srv *dmub, 825 uint32_t timeout_us); 826 827 bool dmub_srv_is_hw_pwr_up(struct dmub_srv *dmub); 828 829 /** 830 * dmub_srv_wait_for_auto_load() - Waits for firmware auto load to complete 831 * @dmub: the dmub service 832 * @timeout_us: the maximum number of microseconds to wait 833 * 834 * Waits until firmware has been autoloaded by the DMCUB. The maximum 835 * wait time is given in microseconds to prevent spinning forever. 836 * 837 * On ASICs without firmware autoload support this function will return 838 * immediately. 839 * 840 * Return: 841 * DMUB_STATUS_OK - success 842 * DMUB_STATUS_TIMEOUT - wait for phy init timed out 843 * DMUB_STATUS_INVALID - unspecified error 844 */ 845 enum dmub_status dmub_srv_wait_for_auto_load(struct dmub_srv *dmub, 846 uint32_t timeout_us); 847 848 /** 849 * dmub_srv_wait_for_phy_init() - Waits for DMUB PHY init to complete 850 * @dmub: the dmub service 851 * @timeout_us: the maximum number of microseconds to wait 852 * 853 * Waits until the PHY has been initialized by the DMUB. The maximum 854 * wait time is given in microseconds to prevent spinning forever. 855 * 856 * On ASICs without PHY init support this function will return 857 * immediately. 858 * 859 * Return: 860 * DMUB_STATUS_OK - success 861 * DMUB_STATUS_TIMEOUT - wait for phy init timed out 862 * DMUB_STATUS_INVALID - unspecified error 863 */ 864 enum dmub_status dmub_srv_wait_for_phy_init(struct dmub_srv *dmub, 865 uint32_t timeout_us); 866 867 /** 868 * dmub_srv_wait_for_pending() - Re-entrant wait for messages currently pending 869 * @dmub: the dmub service 870 * @timeout_us: the maximum number of microseconds to wait 871 * 872 * Waits until the commands queued prior to this call are complete. 873 * If interfaces remain busy due to additional work being submitted 874 * concurrently, this function will not continue to wait. 875 * 876 * Return: 877 * DMUB_STATUS_OK - success 878 * DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out 879 * DMUB_STATUS_INVALID - unspecified error 880 */ 881 enum dmub_status dmub_srv_wait_for_pending(struct dmub_srv *dmub, 882 uint32_t timeout_us); 883 884 /** 885 * dmub_srv_wait_for_idle() - Waits for the DMUB to be idle 886 * @dmub: the dmub service 887 * @timeout_us: the maximum number of microseconds to wait 888 * 889 * Waits until the DMUB buffer is empty and all commands have 890 * finished processing. The maximum wait time is given in 891 * microseconds to prevent spinning forever. 892 * 893 * Return: 894 * DMUB_STATUS_OK - success 895 * DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out 896 * DMUB_STATUS_INVALID - unspecified error 897 */ 898 enum dmub_status dmub_srv_wait_for_idle(struct dmub_srv *dmub, 899 uint32_t timeout_us); 900 901 /** 902 * dmub_srv_send_gpint_command() - Sends a GPINT based command. 903 * @dmub: the dmub service 904 * @command_code: the command code to send 905 * @param: the command parameter to send 906 * @timeout_us: the maximum number of microseconds to wait 907 * 908 * Sends a command via the general purpose interrupt (GPINT). 909 * Waits for the number of microseconds specified by timeout_us 910 * for the command ACK before returning. 911 * 912 * Can be called after software initialization. 913 * 914 * Return: 915 * DMUB_STATUS_OK - success 916 * DMUB_STATUS_TIMEOUT - wait for ACK timed out 917 * DMUB_STATUS_INVALID - unspecified error 918 */ 919 enum dmub_status 920 dmub_srv_send_gpint_command(struct dmub_srv *dmub, 921 enum dmub_gpint_command command_code, 922 uint16_t param, uint32_t timeout_us); 923 924 /** 925 * dmub_srv_get_gpint_response() - Queries the GPINT response. 926 * @dmub: the dmub service 927 * @response: the response for the last GPINT 928 * 929 * Returns the response code for the last GPINT interrupt. 930 * 931 * Can be called after software initialization. 932 * 933 * Return: 934 * DMUB_STATUS_OK - success 935 * DMUB_STATUS_INVALID - unspecified error 936 */ 937 enum dmub_status dmub_srv_get_gpint_response(struct dmub_srv *dmub, 938 uint32_t *response); 939 940 /** 941 * dmub_srv_get_gpint_dataout() - Queries the GPINT DATAOUT. 942 * @dmub: the dmub service 943 * @dataout: the data for the GPINT DATAOUT 944 * 945 * Returns the response code for the last GPINT DATAOUT interrupt. 946 * 947 * Can be called after software initialization. 948 * 949 * Return: 950 * DMUB_STATUS_OK - success 951 * DMUB_STATUS_INVALID - unspecified error 952 */ 953 enum dmub_status dmub_srv_get_gpint_dataout(struct dmub_srv *dmub, 954 uint32_t *dataout); 955 956 /** 957 * dmub_flush_buffer_mem() - Read back entire frame buffer region. 958 * This ensures that the write from x86 has been flushed and will not 959 * hang the DMCUB. 960 * @fb: frame buffer to flush 961 * 962 * Can be called after software initialization. 963 */ 964 void dmub_flush_buffer_mem(const struct dmub_fb *fb); 965 966 /** 967 * dmub_srv_get_fw_boot_status() - Returns the DMUB boot status bits. 968 * 969 * @dmub: the dmub service 970 * @status: out pointer for firmware status 971 * 972 * Return: 973 * DMUB_STATUS_OK - success 974 * DMUB_STATUS_INVALID - unspecified error, unsupported 975 */ 976 enum dmub_status dmub_srv_get_fw_boot_status(struct dmub_srv *dmub, 977 union dmub_fw_boot_status *status); 978 979 enum dmub_status dmub_srv_get_fw_boot_option(struct dmub_srv *dmub, 980 union dmub_fw_boot_options *option); 981 982 enum dmub_status dmub_srv_set_skip_panel_power_sequence(struct dmub_srv *dmub, 983 bool skip); 984 985 bool dmub_srv_get_outbox0_msg(struct dmub_srv *dmub, struct dmcub_trace_buf_entry *entry); 986 987 bool dmub_srv_get_diagnostic_data(struct dmub_srv *dmub); 988 989 bool dmub_srv_should_detect(struct dmub_srv *dmub); 990 991 /** 992 * dmub_srv_send_inbox0_cmd() - Send command to DMUB using INBOX0 993 * @dmub: the dmub service 994 * @data: the data to be sent in the INBOX0 command 995 * 996 * Send command by writing directly to INBOX0 WPTR 997 * 998 * Return: 999 * DMUB_STATUS_OK - success 1000 * DMUB_STATUS_INVALID - hw_init false or hw function does not exist 1001 */ 1002 enum dmub_status dmub_srv_send_inbox0_cmd(struct dmub_srv *dmub, union dmub_inbox0_data_register data); 1003 1004 /** 1005 * dmub_srv_wait_for_inbox0_ack() - wait for DMUB to ACK INBOX0 command 1006 * @dmub: the dmub service 1007 * @timeout_us: the maximum number of microseconds to wait 1008 * 1009 * Wait for DMUB to ACK the INBOX0 message 1010 * 1011 * Return: 1012 * DMUB_STATUS_OK - success 1013 * DMUB_STATUS_INVALID - hw_init false or hw function does not exist 1014 * DMUB_STATUS_TIMEOUT - wait for ack timed out 1015 */ 1016 enum dmub_status dmub_srv_wait_for_inbox0_ack(struct dmub_srv *dmub, uint32_t timeout_us); 1017 1018 /** 1019 * dmub_srv_wait_for_inbox0_ack() - clear ACK register for INBOX0 1020 * @dmub: the dmub service 1021 * 1022 * Clear ACK register for INBOX0 1023 * 1024 * Return: 1025 * DMUB_STATUS_OK - success 1026 * DMUB_STATUS_INVALID - hw_init false or hw function does not exist 1027 */ 1028 enum dmub_status dmub_srv_clear_inbox0_ack(struct dmub_srv *dmub); 1029 1030 /** 1031 * dmub_srv_subvp_save_surf_addr() - Save primary and meta address for subvp on each flip 1032 * @dmub: The dmub service 1033 * @addr: The surface address to be programmed on the current flip 1034 * @subvp_index: Index of subvp pipe, indicates which subvp pipe the address should be saved for 1035 * 1036 * Function to save the surface flip addr into scratch registers. This is to fix a race condition 1037 * between FW and driver reading / writing to the surface address at the same time. This is 1038 * required because there is no EARLIEST_IN_USE_META. 1039 * 1040 * Return: 1041 * void 1042 */ 1043 void dmub_srv_subvp_save_surf_addr(struct dmub_srv *dmub, const struct dc_plane_address *addr, uint8_t subvp_index); 1044 1045 /** 1046 * dmub_srv_set_power_state() - Track DC power state in dmub_srv 1047 * @dmub: The dmub service 1048 * @power_state: DC power state setting 1049 * 1050 * Store DC power state in dmub_srv. If dmub_srv is in D3, then don't send messages to DMUB 1051 * 1052 * Return: 1053 * void 1054 */ 1055 void dmub_srv_set_power_state(struct dmub_srv *dmub, enum dmub_srv_power_state_type dmub_srv_power_state); 1056 1057 /** 1058 * dmub_srv_reg_cmd_execute() - Executes provided command to the dmub 1059 * @dmub: the dmub service 1060 * @cmd: the command packet to be executed 1061 * 1062 * Executes a single command for the dmub. 1063 * 1064 * Return: 1065 * DMUB_STATUS_OK - success 1066 * DMUB_STATUS_INVALID - unspecified error 1067 */ 1068 enum dmub_status dmub_srv_reg_cmd_execute(struct dmub_srv *dmub, union dmub_rb_cmd *cmd); 1069 1070 1071 /** 1072 * dmub_srv_cmd_get_response() - Copies return data for command into buffer 1073 * @dmub: the dmub service 1074 * @cmd_rsp: response buffer 1075 * 1076 * Copies return data for command into buffer 1077 */ 1078 void dmub_srv_cmd_get_response(struct dmub_srv *dmub, 1079 union dmub_rb_cmd *cmd_rsp); 1080 1081 /** 1082 * dmub_srv_sync_inboxes() - Sync inbox state 1083 * @dmub: the dmub service 1084 * 1085 * Sync inbox state 1086 * 1087 * Return: 1088 * DMUB_STATUS_OK - success 1089 * DMUB_STATUS_INVALID - unspecified error 1090 */ 1091 enum dmub_status dmub_srv_sync_inboxes(struct dmub_srv *dmub); 1092 1093 /** 1094 * dmub_srv_wait_for_inbox_free() - Waits for space in the DMUB inbox to free up 1095 * @dmub: the dmub service 1096 * @timeout_us: the maximum number of microseconds to wait 1097 * @num_free_required: number of free entries required 1098 * 1099 * Waits until the DMUB buffer is freed to the specified number. 1100 * The maximum wait time is given in microseconds to prevent spinning 1101 * forever. 1102 * 1103 * Return: 1104 * DMUB_STATUS_OK - success 1105 * DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out 1106 * DMUB_STATUS_INVALID - unspecified error 1107 */ 1108 enum dmub_status dmub_srv_wait_for_inbox_free(struct dmub_srv *dmub, 1109 uint32_t timeout_us, 1110 uint32_t num_free_required); 1111 1112 /** 1113 * dmub_srv_update_inbox_status() - Updates pending status for inbox & reg inbox0 1114 * @dmub: the dmub service 1115 * 1116 * Return: 1117 * DMUB_STATUS_OK - success 1118 * DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out 1119 * DMUB_STATUS_HW_FAILURE - issue with HW programming 1120 * DMUB_STATUS_INVALID - unspecified error 1121 */ 1122 enum dmub_status dmub_srv_update_inbox_status(struct dmub_srv *dmub); 1123 1124 /** 1125 * dmub_srv_get_preos_info() - retrieves preos fw info 1126 * @dmub: the dmub service 1127 * 1128 * Return: 1129 * true - preos fw info retrieved successfully 1130 * false - preos fw info not retrieved successfully 1131 */ 1132 bool dmub_srv_get_preos_info(struct dmub_srv *dmub); 1133 1134 /** 1135 * dmub_srv_get_fw_meta_info_from_raw_fw() - Fetch firmware metadata info from raw firmware image 1136 * @params: parameters for fetching firmware metadata info 1137 * @fw_info_out: output buffer for firmware metadata info 1138 * 1139 * Return: 1140 * DMUB_STATUS_OK - success 1141 * DMUB_STATUS_INVALID - no FW meta info found 1142 */ 1143 enum dmub_status dmub_srv_get_fw_meta_info_from_raw_fw(struct dmub_srv_fw_meta_info_params *params, 1144 struct dmub_fw_meta_info *fw_info_out); 1145 1146 #endif /* _DMUB_SRV_H_ */ 1147