1 /* 2 * Copyright 2019 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef _DMUB_SRV_H_ 27 #define _DMUB_SRV_H_ 28 29 /** 30 * DOC: DMUB interface and operation 31 * 32 * DMUB is the interface to the display DMCUB microcontroller on DCN hardware. 33 * It delegates hardware initialization and command submission to the 34 * microcontroller. DMUB is the shortname for DMCUB. 35 * 36 * This interface is not thread-safe. Ensure that all access to the interface 37 * is properly synchronized by the caller. 38 * 39 * Initialization and usage of the DMUB service should be done in the 40 * steps given below: 41 * 42 * 1. dmub_srv_create() 43 * 2. dmub_srv_has_hw_support() 44 * 3. dmub_srv_calc_region_info() 45 * 4. dmub_srv_hw_init() 46 * 47 * The call to dmub_srv_create() is required to use the server. 48 * 49 * The calls to dmub_srv_has_hw_support() and dmub_srv_calc_region_info() 50 * are helpers to query cache window size and allocate framebuffer(s) 51 * for the cache windows. 52 * 53 * The call to dmub_srv_hw_init() programs the DMCUB registers to prepare 54 * for command submission. Commands can be queued via dmub_srv_fb_cmd_queue() 55 * and executed via dmub_srv_fb_cmd_execute(). 56 * 57 * If the queue is full the dmub_srv_wait_for_idle() call can be used to 58 * wait until the queue has been cleared. 59 * 60 * Destroying the DMUB service can be done by calling dmub_srv_destroy(). 61 * This does not clear DMUB hardware state, only software state. 62 * 63 * The interface is intended to be standalone and should not depend on any 64 * other component within DAL. 65 */ 66 67 #include "inc/dmub_cmd.h" 68 #include "dc/dc_types.h" 69 70 #define DMUB_PC_SNAPSHOT_COUNT 10 71 72 /* Default tracebuffer size if meta is absent. */ 73 #define DMUB_TRACE_BUFFER_SIZE (64 * 1024) 74 75 #define PSP_HEADER_BYTES_256 0x100 // 256 bytes 76 #define PSP_FOOTER_BYTES_256 0x100 // 256 bytes 77 78 /* Forward declarations */ 79 struct dmub_srv; 80 struct dmub_srv_common_regs; 81 struct dmub_srv_dcn31_regs; 82 83 struct dmcub_trace_buf_entry; 84 85 /* enum dmub_window_memory_type - memory location type specification for windows */ 86 enum dmub_window_memory_type { 87 DMUB_WINDOW_MEMORY_TYPE_FB = 0, 88 DMUB_WINDOW_MEMORY_TYPE_GART 89 }; 90 91 /* enum dmub_status - return code for dmcub functions */ 92 enum dmub_status { 93 DMUB_STATUS_OK = 0, 94 DMUB_STATUS_NO_CTX, 95 DMUB_STATUS_QUEUE_FULL, 96 DMUB_STATUS_TIMEOUT, 97 DMUB_STATUS_INVALID, 98 DMUB_STATUS_HW_FAILURE, 99 DMUB_STATUS_POWER_STATE_D3 100 }; 101 102 /* enum dmub_asic - dmub asic identifier */ 103 enum dmub_asic { 104 DMUB_ASIC_NONE = 0, 105 DMUB_ASIC_DCN20, 106 DMUB_ASIC_DCN21, 107 DMUB_ASIC_DCN30, 108 DMUB_ASIC_DCN301, 109 DMUB_ASIC_DCN302, 110 DMUB_ASIC_DCN303, 111 DMUB_ASIC_DCN31, 112 DMUB_ASIC_DCN31B, 113 DMUB_ASIC_DCN314, 114 DMUB_ASIC_DCN315, 115 DMUB_ASIC_DCN316, 116 DMUB_ASIC_DCN32, 117 DMUB_ASIC_DCN321, 118 DMUB_ASIC_DCN35, 119 DMUB_ASIC_DCN351, 120 DMUB_ASIC_DCN36, 121 DMUB_ASIC_DCN401, 122 DMUB_ASIC_MAX, 123 }; 124 125 /* enum dmub_window_id - dmub window identifier */ 126 enum dmub_window_id { 127 DMUB_WINDOW_0_INST_CONST = 0, 128 DMUB_WINDOW_1_STACK, 129 DMUB_WINDOW_2_BSS_DATA, 130 DMUB_WINDOW_3_VBIOS, 131 DMUB_WINDOW_4_MAILBOX, 132 DMUB_WINDOW_5_TRACEBUFF, 133 DMUB_WINDOW_6_FW_STATE, 134 DMUB_WINDOW_7_SCRATCH_MEM, 135 DMUB_WINDOW_IB_MEM, 136 DMUB_WINDOW_SHARED_STATE, 137 DMUB_WINDOW_LSDMA_BUFFER, 138 DMUB_WINDOW_CURSOR_OFFLOAD, 139 DMUB_WINDOW_TOTAL, 140 }; 141 142 /* enum dmub_notification_type - dmub outbox notification identifier */ 143 enum dmub_notification_type { 144 DMUB_NOTIFICATION_NO_DATA = 0, 145 DMUB_NOTIFICATION_AUX_REPLY, 146 DMUB_NOTIFICATION_HPD, 147 DMUB_NOTIFICATION_HPD_IRQ, 148 DMUB_NOTIFICATION_SET_CONFIG_REPLY, 149 DMUB_NOTIFICATION_DPIA_NOTIFICATION, 150 DMUB_NOTIFICATION_HPD_SENSE_NOTIFY, 151 DMUB_NOTIFICATION_FUSED_IO, 152 DMUB_NOTIFICATION_MAX 153 }; 154 155 /** 156 * DPIA NOTIFICATION Response Type 157 */ 158 enum dpia_notify_bw_alloc_status { 159 160 DPIA_BW_REQ_FAILED = 0, 161 DPIA_BW_REQ_SUCCESS, 162 DPIA_EST_BW_CHANGED, 163 DPIA_BW_ALLOC_CAPS_CHANGED 164 }; 165 166 /* enum dmub_memory_access_type - memory access method */ 167 enum dmub_memory_access_type { 168 DMUB_MEMORY_ACCESS_DEFAULT, 169 DMUB_MEMORY_ACCESS_CPU = DMUB_MEMORY_ACCESS_DEFAULT, 170 DMUB_MEMORY_ACCESS_DMA 171 }; 172 173 /* enum dmub_power_state type - to track DC power state in dmub_srv */ 174 enum dmub_srv_power_state_type { 175 DMUB_POWER_STATE_UNDEFINED = 0, 176 DMUB_POWER_STATE_D0 = 1, 177 DMUB_POWER_STATE_D3 = 8 178 }; 179 180 /* enum dmub_inbox_cmd_interface type - defines default interface for host->dmub commands */ 181 enum dmub_inbox_cmd_interface_type { 182 DMUB_CMD_INTERFACE_DEFAULT = 0, 183 DMUB_CMD_INTERFACE_FB = 1, 184 DMUB_CMD_INTERFACE_REG = 2, 185 }; 186 187 /** 188 * struct dmub_region - dmub hw memory region 189 * @base: base address for region, must be 256 byte aligned 190 * @top: top address for region 191 */ 192 struct dmub_region { 193 uint32_t base; 194 uint32_t top; 195 }; 196 197 /** 198 * struct dmub_window - dmub hw cache window 199 * @off: offset to the fb memory in gpu address space 200 * @r: region in uc address space for cache window 201 */ 202 struct dmub_window { 203 union dmub_addr offset; 204 struct dmub_region region; 205 }; 206 207 /** 208 * struct dmub_fb - defines a dmub framebuffer memory region 209 * @cpu_addr: cpu virtual address for the region, NULL if invalid 210 * @gpu_addr: gpu virtual address for the region, NULL if invalid 211 * @size: size of the region in bytes, zero if invalid 212 */ 213 struct dmub_fb { 214 void *cpu_addr; 215 uint64_t gpu_addr; 216 uint32_t size; 217 }; 218 219 /** 220 * struct dmub_srv_region_params - params used for calculating dmub regions 221 * @inst_const_size: size of the fw inst const section 222 * @bss_data_size: size of the fw bss data section 223 * @vbios_size: size of the vbios data 224 * @fw_bss_data: raw firmware bss data section 225 */ 226 struct dmub_srv_region_params { 227 uint32_t inst_const_size; 228 uint32_t bss_data_size; 229 uint32_t vbios_size; 230 const uint8_t *fw_inst_const; 231 const uint8_t *fw_bss_data; 232 const enum dmub_window_memory_type *window_memory_type; 233 const struct dmub_fw_meta_info *fw_info; 234 }; 235 236 /** 237 * struct dmub_srv_fw_meta_info_params - params used for fetching fw meta info from fw_image 238 * @inst_const_size: size of the fw inst const section 239 * @bss_data_size: size of the fw bss data section 240 * @fw_inst_const: raw firmware inst const section 241 * @fw_bss_data: raw firmware bss data section 242 * @custom_psp_footer_size: custom psp footer size to use when indexing for fw meta info 243 */ 244 struct dmub_srv_fw_meta_info_params { 245 uint32_t inst_const_size; 246 uint32_t bss_data_size; 247 const uint8_t *fw_inst_const; 248 const uint8_t *fw_bss_data; 249 uint32_t custom_psp_footer_size; 250 }; 251 252 /** 253 * struct dmub_srv_region_info - output region info from the dmub service 254 * @fb_size: required minimum fb size for all regions, aligned to 4096 bytes 255 * @num_regions: number of regions used by the dmub service 256 * @regions: region info 257 * 258 * The regions are aligned such that they can be all placed within the 259 * same framebuffer but they can also be placed into different framebuffers. 260 * 261 * The size of each region can be calculated by the caller: 262 * size = reg.top - reg.base 263 * 264 * Care must be taken when performing custom allocations to ensure that each 265 * region base address is 256 byte aligned. 266 */ 267 struct dmub_srv_region_info { 268 uint32_t fb_size; 269 uint32_t gart_size; 270 uint8_t num_regions; 271 struct dmub_region regions[DMUB_WINDOW_TOTAL]; 272 uint32_t verified_psp_footer_size; 273 }; 274 275 /** 276 * struct dmub_srv_memory_params - parameters used for driver fb setup 277 * @region_info: region info calculated by dmub service 278 * @cpu_fb_addr: base cpu address for the framebuffer 279 * @cpu_inbox_addr: base cpu address for the gart 280 * @gpu_fb_addr: base gpu virtual address for the framebuffer 281 * @gpu_inbox_addr: base gpu virtual address for the gart 282 */ 283 struct dmub_srv_memory_params { 284 const struct dmub_srv_region_info *region_info; 285 void *cpu_fb_addr; 286 void *cpu_gart_addr; 287 uint64_t gpu_fb_addr; 288 uint64_t gpu_gart_addr; 289 const enum dmub_window_memory_type *window_memory_type; 290 }; 291 292 /** 293 * struct dmub_srv_fb_info - output fb info from the dmub service 294 * @num_fbs: number of required dmub framebuffers 295 * @fbs: fb data for each region 296 * 297 * Output from the dmub service helper that can be used by the 298 * driver to prepare dmub_fb that can be passed into the dmub 299 * hw init service. 300 * 301 * Assumes that all regions are within the same framebuffer 302 * and have been setup according to the region_info generated 303 * by the dmub service. 304 */ 305 struct dmub_srv_fb_info { 306 uint8_t num_fb; 307 struct dmub_fb fb[DMUB_WINDOW_TOTAL]; 308 }; 309 310 /** 311 * struct dmub_soc_fb_info - relevant addresses from the frame buffer 312 * @fb_base: base of the framebuffer aperture 313 * @fb_offset: offset of the framebuffer aperture 314 */ 315 struct dmub_soc_fb_info { 316 uint64_t fb_base; 317 uint64_t fb_offset; 318 }; 319 320 /* 321 * struct dmub_srv_hw_params - params for dmub hardware initialization 322 * @fb: framebuffer info for each region 323 * @fb_base: base of the framebuffer aperture 324 * @fb_offset: offset of the framebuffer aperture 325 * @psp_version: psp version to pass for DMCU init 326 * @load_inst_const: true if DMUB should load inst const fw 327 */ 328 struct dmub_srv_hw_params { 329 struct dmub_fb *fb[DMUB_WINDOW_TOTAL]; 330 struct dmub_soc_fb_info soc_fb_info; 331 uint32_t psp_version; 332 bool load_inst_const; 333 bool skip_panel_power_sequence; 334 bool disable_z10; 335 bool power_optimization; 336 bool dpia_supported; 337 bool disable_dpia; 338 bool usb4_cm_version; 339 bool fw_in_system_memory; 340 bool dpia_hpd_int_enable_supported; 341 bool disable_clock_gate; 342 bool disallow_dispclk_dppclk_ds; 343 bool ips_sequential_ono; 344 enum dmub_memory_access_type mem_access_type; 345 enum dmub_ips_disable_type disable_ips; 346 bool disallow_phy_access; 347 bool disable_sldo_opt; 348 bool enable_non_transparent_setconfig; 349 bool lower_hbr3_phy_ssc; 350 bool override_hbr3_pll_vco; 351 bool disable_dpia_bw_allocation; 352 }; 353 354 /** 355 * struct dmub_srv_debug - Debug info for dmub_srv 356 * @timeout_occured: Indicates a timeout occured on any message from driver to dmub 357 * @timeout_cmd: first cmd sent from driver that timed out - subsequent timeouts are not stored 358 */ 359 struct dmub_timeout_info { 360 bool timeout_occured; 361 union dmub_rb_cmd timeout_cmd; 362 unsigned long long timestamp; 363 }; 364 365 /** 366 * struct dmub_diagnostic_data - Diagnostic data retrieved from DMCUB for 367 * debugging purposes, including logging, crash analysis, etc. 368 */ 369 struct dmub_diagnostic_data { 370 uint32_t dmcub_version; 371 uint32_t scratch[17]; 372 uint32_t pc[DMUB_PC_SNAPSHOT_COUNT]; 373 uint32_t undefined_address_fault_addr; 374 uint32_t inst_fetch_fault_addr; 375 uint32_t data_write_fault_addr; 376 uint32_t inbox1_rptr; 377 uint32_t inbox1_wptr; 378 uint32_t inbox1_size; 379 uint32_t inbox0_rptr; 380 uint32_t inbox0_wptr; 381 uint32_t inbox0_size; 382 uint32_t outbox1_rptr; 383 uint32_t outbox1_wptr; 384 uint32_t outbox1_size; 385 uint32_t gpint_datain0; 386 struct dmub_timeout_info timeout_info; 387 uint8_t is_dmcub_enabled : 1; 388 uint8_t is_dmcub_soft_reset : 1; 389 uint8_t is_dmcub_secure_reset : 1; 390 uint8_t is_traceport_en : 1; 391 uint8_t is_cw0_enabled : 1; 392 uint8_t is_cw6_enabled : 1; 393 uint8_t is_pwait : 1; 394 }; 395 396 /** 397 * struct dmub_preos_info - preos fw info before loading post os fw. 398 */ 399 struct dmub_preos_info { 400 uint64_t fb_base; 401 uint64_t fb_offset; 402 uint64_t trace_buffer_phy_addr; 403 uint32_t trace_buffer_size; 404 uint32_t fw_version; 405 uint32_t boot_status; 406 uint32_t boot_options; 407 }; 408 409 struct dmub_srv_inbox { 410 /* generic status */ 411 uint64_t num_submitted; 412 uint64_t num_reported; 413 union { 414 /* frame buffer mailbox status */ 415 struct dmub_rb rb; 416 /* register mailbox status */ 417 struct { 418 bool is_pending; 419 bool is_multi_pending; 420 }; 421 }; 422 }; 423 424 /** 425 * struct dmub_srv_base_funcs - Driver specific base callbacks 426 */ 427 struct dmub_srv_base_funcs { 428 /** 429 * @reg_read: 430 * 431 * Hook for reading a register. 432 * 433 * Return: The 32-bit register value from the given address. 434 */ 435 uint32_t (*reg_read)(void *ctx, uint32_t address); 436 437 /** 438 * @reg_write: 439 * 440 * Hook for writing a value to the register specified by address. 441 */ 442 void (*reg_write)(void *ctx, uint32_t address, uint32_t value); 443 }; 444 445 /** 446 * struct dmub_srv_hw_funcs - hardware sequencer funcs for dmub 447 */ 448 struct dmub_srv_hw_funcs { 449 /* private: internal use only */ 450 451 void (*init)(struct dmub_srv *dmub); 452 453 void (*reset)(struct dmub_srv *dmub); 454 455 void (*reset_release)(struct dmub_srv *dmub); 456 457 void (*backdoor_load)(struct dmub_srv *dmub, 458 const struct dmub_window *cw0, 459 const struct dmub_window *cw1); 460 461 void (*backdoor_load_zfb_mode)(struct dmub_srv *dmub, 462 const struct dmub_window *cw0, 463 const struct dmub_window *cw1); 464 void (*setup_windows)(struct dmub_srv *dmub, 465 const struct dmub_window *cw2, 466 const struct dmub_window *cw3, 467 const struct dmub_window *cw4, 468 const struct dmub_window *cw5, 469 const struct dmub_window *cw6, 470 const struct dmub_window *region6); 471 472 void (*setup_mailbox)(struct dmub_srv *dmub, 473 const struct dmub_region *inbox1); 474 475 uint32_t (*get_inbox1_wptr)(struct dmub_srv *dmub); 476 477 uint32_t (*get_inbox1_rptr)(struct dmub_srv *dmub); 478 479 void (*set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset); 480 481 void (*setup_out_mailbox)(struct dmub_srv *dmub, 482 const struct dmub_region *outbox1); 483 484 uint32_t (*get_outbox1_wptr)(struct dmub_srv *dmub); 485 486 void (*set_outbox1_rptr)(struct dmub_srv *dmub, uint32_t rptr_offset); 487 488 void (*setup_outbox0)(struct dmub_srv *dmub, 489 const struct dmub_region *outbox0); 490 491 uint32_t (*get_outbox0_wptr)(struct dmub_srv *dmub); 492 493 void (*set_outbox0_rptr)(struct dmub_srv *dmub, uint32_t rptr_offset); 494 495 uint32_t (*emul_get_inbox1_rptr)(struct dmub_srv *dmub); 496 497 uint32_t (*emul_get_inbox1_wptr)(struct dmub_srv *dmub); 498 499 void (*emul_set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset); 500 501 bool (*is_supported)(struct dmub_srv *dmub); 502 503 bool (*is_psrsu_supported)(struct dmub_srv *dmub); 504 505 bool (*is_hw_init)(struct dmub_srv *dmub); 506 bool (*is_hw_powered_up)(struct dmub_srv *dmub); 507 508 void (*enable_dmub_boot_options)(struct dmub_srv *dmub, 509 const struct dmub_srv_hw_params *params); 510 511 void (*skip_dmub_panel_power_sequence)(struct dmub_srv *dmub, bool skip); 512 513 union dmub_fw_boot_status (*get_fw_status)(struct dmub_srv *dmub); 514 515 union dmub_fw_boot_options (*get_fw_boot_option)(struct dmub_srv *dmub); 516 517 void (*set_gpint)(struct dmub_srv *dmub, 518 union dmub_gpint_data_register reg); 519 520 bool (*is_gpint_acked)(struct dmub_srv *dmub, 521 union dmub_gpint_data_register reg); 522 523 uint32_t (*get_gpint_response)(struct dmub_srv *dmub); 524 525 uint32_t (*get_gpint_dataout)(struct dmub_srv *dmub); 526 527 void (*configure_dmub_in_system_memory)(struct dmub_srv *dmub); 528 void (*clear_inbox0_ack_register)(struct dmub_srv *dmub); 529 uint32_t (*read_inbox0_ack_register)(struct dmub_srv *dmub); 530 void (*send_inbox0_cmd)(struct dmub_srv *dmub, union dmub_inbox0_data_register data); 531 uint32_t (*get_current_time)(struct dmub_srv *dmub); 532 533 void (*get_diagnostic_data)(struct dmub_srv *dmub); 534 bool (*get_preos_fw_info)(struct dmub_srv *dmub); 535 536 bool (*should_detect)(struct dmub_srv *dmub); 537 void (*init_reg_offsets)(struct dmub_srv *dmub, struct dc_context *ctx); 538 539 void (*subvp_save_surf_addr)(struct dmub_srv *dmub, const struct dc_plane_address *addr, uint8_t subvp_index); 540 541 void (*send_reg_inbox0_cmd_msg)(struct dmub_srv *dmub, 542 union dmub_rb_cmd *cmd); 543 uint32_t (*read_reg_inbox0_rsp_int_status)(struct dmub_srv *dmub); 544 void (*read_reg_inbox0_cmd_rsp)(struct dmub_srv *dmub, 545 union dmub_rb_cmd *cmd); 546 void (*write_reg_inbox0_rsp_int_ack)(struct dmub_srv *dmub); 547 void (*clear_reg_inbox0_rsp_int_ack)(struct dmub_srv *dmub); 548 void (*enable_reg_inbox0_rsp_int)(struct dmub_srv *dmub, bool enable); 549 550 uint32_t (*read_reg_outbox0_rdy_int_status)(struct dmub_srv *dmub); 551 void (*write_reg_outbox0_rdy_int_ack)(struct dmub_srv *dmub); 552 void (*read_reg_outbox0_msg)(struct dmub_srv *dmub, uint32_t *msg); 553 void (*write_reg_outbox0_rsp)(struct dmub_srv *dmub, uint32_t *rsp); 554 uint32_t (*read_reg_outbox0_rsp_int_status)(struct dmub_srv *dmub); 555 void (*enable_reg_outbox0_rdy_int)(struct dmub_srv *dmub, bool enable); 556 }; 557 558 /** 559 * struct dmub_srv_create_params - params for dmub service creation 560 * @base_funcs: driver supplied base routines 561 * @hw_funcs: optional overrides for hw funcs 562 * @user_ctx: context data for callback funcs 563 * @asic: driver supplied asic 564 * @fw_version: the current firmware version, if any 565 * @is_virtual: false for hw support only 566 */ 567 struct dmub_srv_create_params { 568 struct dmub_srv_base_funcs funcs; 569 struct dmub_srv_hw_funcs *hw_funcs; 570 void *user_ctx; 571 enum dmub_asic asic; 572 uint32_t fw_version; 573 bool is_virtual; 574 enum dmub_inbox_cmd_interface_type inbox_type; 575 }; 576 577 /** 578 * struct dmub_srv - software state for dmcub 579 * @asic: dmub asic identifier 580 * @user_ctx: user provided context for the dmub_srv 581 * @fw_version: the current firmware version, if any 582 * @is_virtual: false if hardware support only 583 * @shared_state: dmub shared state between firmware and driver 584 * @cursor_offload_v1: Cursor offload state 585 * @fw_state: dmub firmware state pointer (debug purpose only) 586 */ 587 struct dmub_srv { 588 enum dmub_asic asic; 589 void *user_ctx; 590 uint32_t fw_version; 591 bool is_virtual; 592 struct dmub_fb scratch_mem_fb; 593 struct dmub_fb ib_mem_gart; 594 struct dmub_fb cursor_offload_fb; 595 volatile struct dmub_shared_state_feature_block *shared_state; 596 volatile struct dmub_cursor_offload_v1 *cursor_offload_v1; 597 volatile const struct dmub_fw_state *fw_state; 598 599 /* private: internal use only */ 600 const struct dmub_srv_common_regs *regs; 601 const struct dmub_srv_dcn31_regs *regs_dcn31; 602 struct dmub_srv_dcn32_regs *regs_dcn32; 603 struct dmub_srv_dcn35_regs *regs_dcn35; 604 const struct dmub_srv_dcn401_regs *regs_dcn401; 605 struct dmub_srv_base_funcs funcs; 606 struct dmub_srv_hw_funcs hw_funcs; 607 struct dmub_srv_inbox inbox1; 608 uint32_t inbox1_last_wptr; 609 struct dmub_srv_inbox reg_inbox0; 610 /** 611 * outbox1_rb is accessed without locks (dal & dc) 612 * and to be used only in dmub_srv_stat_get_notification() 613 */ 614 struct dmub_rb outbox1_rb; 615 616 struct dmub_rb outbox0_rb; 617 618 bool sw_init; 619 bool hw_init; 620 bool dpia_supported; 621 622 struct dmub_soc_fb_info soc_fb_info; 623 uint32_t psp_version; 624 625 /* Feature capabilities reported by fw */ 626 struct dmub_fw_meta_info meta_info; 627 struct dmub_feature_caps feature_caps; 628 struct dmub_visual_confirm_color visual_confirm_color; 629 enum dmub_inbox_cmd_interface_type inbox_type; 630 631 enum dmub_srv_power_state_type power_state; 632 struct dmub_diagnostic_data debug; 633 struct dmub_fb lsdma_rb_fb; 634 struct dmub_preos_info preos_info; 635 }; 636 637 /** 638 * struct dmub_notification - dmub notification data 639 * @type: dmub notification type 640 * @link_index: link index to identify aux connection 641 * @result: USB4 status returned from dmub 642 * @pending_notification: Indicates there are other pending notifications 643 * @aux_reply: aux reply 644 * @hpd_status: hpd status 645 * @bw_alloc_reply: BW Allocation reply from CM/DPIA 646 */ 647 struct dmub_notification { 648 enum dmub_notification_type type; 649 uint8_t link_index; 650 uint8_t result; 651 /* notify instance from DMUB */ 652 uint8_t instance; 653 bool pending_notification; 654 union { 655 struct aux_reply_data aux_reply; 656 enum dp_hpd_status hpd_status; 657 enum set_config_status sc_status; 658 struct dmub_rb_cmd_hpd_sense_notify_data hpd_sense_notify; 659 struct dmub_cmd_fused_request fused_request; 660 }; 661 }; 662 663 /** 664 * DMUB firmware version helper macro - useful for checking if the version 665 * of a firmware to know if feature or functionality is supported or present. 666 */ 667 #define DMUB_FW_VERSION(major, minor, revision) \ 668 ((((major) & 0xFF) << 24) | (((minor) & 0xFF) << 16) | (((revision) & 0xFF) << 8)) 669 670 /** 671 * dmub_srv_create() - creates the DMUB service. 672 * @dmub: the dmub service 673 * @params: creation parameters for the service 674 * 675 * Return: 676 * DMUB_STATUS_OK - success 677 * DMUB_STATUS_INVALID - unspecified error 678 */ 679 enum dmub_status dmub_srv_create(struct dmub_srv *dmub, 680 const struct dmub_srv_create_params *params); 681 682 /** 683 * dmub_srv_destroy() - destroys the DMUB service. 684 * @dmub: the dmub service 685 */ 686 void dmub_srv_destroy(struct dmub_srv *dmub); 687 688 /** 689 * dmub_srv_calc_region_info() - retreives region info from the dmub service 690 * @dmub: the dmub service 691 * @params: parameters used to calculate region locations 692 * @info_out: the output region info from dmub 693 * 694 * Calculates the base and top address for all relevant dmub regions 695 * using the parameters given (if any). 696 * 697 * Return: 698 * DMUB_STATUS_OK - success 699 * DMUB_STATUS_INVALID - unspecified error 700 */ 701 enum dmub_status 702 dmub_srv_calc_region_info(struct dmub_srv *dmub, 703 const struct dmub_srv_region_params *params, 704 struct dmub_srv_region_info *out); 705 706 /** 707 * dmub_srv_calc_region_info() - retreives fb info from the dmub service 708 * @dmub: the dmub service 709 * @params: parameters used to calculate fb locations 710 * @info_out: the output fb info from dmub 711 * 712 * Calculates the base and top address for all relevant dmub regions 713 * using the parameters given (if any). 714 * 715 * Return: 716 * DMUB_STATUS_OK - success 717 * DMUB_STATUS_INVALID - unspecified error 718 */ 719 enum dmub_status dmub_srv_calc_mem_info(struct dmub_srv *dmub, 720 const struct dmub_srv_memory_params *params, 721 struct dmub_srv_fb_info *out); 722 723 /** 724 * dmub_srv_has_hw_support() - returns hw support state for dmcub 725 * @dmub: the dmub service 726 * @is_supported: hw support state 727 * 728 * Queries the hardware for DMCUB support and returns the result. 729 * 730 * Can be called before dmub_srv_hw_init(). 731 * 732 * Return: 733 * DMUB_STATUS_OK - success 734 * DMUB_STATUS_INVALID - unspecified error 735 */ 736 enum dmub_status dmub_srv_has_hw_support(struct dmub_srv *dmub, 737 bool *is_supported); 738 739 /** 740 * dmub_srv_is_hw_init() - returns hardware init state 741 * 742 * Return: 743 * DMUB_STATUS_OK - success 744 * DMUB_STATUS_INVALID - unspecified error 745 */ 746 enum dmub_status dmub_srv_is_hw_init(struct dmub_srv *dmub, bool *is_hw_init); 747 748 /** 749 * dmub_srv_hw_init() - initializes the underlying DMUB hardware 750 * @dmub: the dmub service 751 * @params: params for hardware initialization 752 * 753 * Resets the DMUB hardware and performs backdoor loading of the 754 * required cache regions based on the input framebuffer regions. 755 * 756 * Return: 757 * DMUB_STATUS_OK - success 758 * DMUB_STATUS_NO_CTX - dmcub context not initialized 759 * DMUB_STATUS_INVALID - unspecified error 760 */ 761 enum dmub_status dmub_srv_hw_init(struct dmub_srv *dmub, 762 const struct dmub_srv_hw_params *params); 763 764 /** 765 * dmub_srv_hw_reset() - puts the DMUB hardware in reset state if initialized 766 * @dmub: the dmub service 767 * 768 * Before destroying the DMUB service or releasing the backing framebuffer 769 * memory we'll need to put the DMCUB into reset first. 770 * 771 * A subsequent call to dmub_srv_hw_init() will re-enable the DMCUB. 772 * 773 * Return: 774 * DMUB_STATUS_OK - success 775 * DMUB_STATUS_INVALID - unspecified error 776 */ 777 enum dmub_status dmub_srv_hw_reset(struct dmub_srv *dmub); 778 779 /** 780 * dmub_srv_fb_cmd_queue() - queues a command to the DMUB 781 * @dmub: the dmub service 782 * @cmd: the command to queue 783 * 784 * Queues a command to the DMUB service but does not begin execution 785 * immediately. 786 * 787 * Return: 788 * DMUB_STATUS_OK - success 789 * DMUB_STATUS_QUEUE_FULL - no remaining room in queue 790 * DMUB_STATUS_INVALID - unspecified error 791 */ 792 enum dmub_status dmub_srv_fb_cmd_queue(struct dmub_srv *dmub, 793 const union dmub_rb_cmd *cmd); 794 795 /** 796 * dmub_srv_fb_cmd_execute() - Executes a queued sequence to the dmub 797 * @dmub: the dmub service 798 * 799 * Begins execution of queued commands on the dmub. 800 * 801 * Return: 802 * DMUB_STATUS_OK - success 803 * DMUB_STATUS_INVALID - unspecified error 804 */ 805 enum dmub_status dmub_srv_fb_cmd_execute(struct dmub_srv *dmub); 806 807 /** 808 * dmub_srv_wait_for_hw_pwr_up() - Waits for firmware hardware power up is completed 809 * @dmub: the dmub service 810 * @timeout_us: the maximum number of microseconds to wait 811 * 812 * Waits until firmware hardware is powered up. The maximum 813 * wait time is given in microseconds to prevent spinning forever. 814 * 815 * Return: 816 * DMUB_STATUS_OK - success 817 * DMUB_STATUS_TIMEOUT - timed out 818 * DMUB_STATUS_INVALID - unspecified error 819 */ 820 enum dmub_status dmub_srv_wait_for_hw_pwr_up(struct dmub_srv *dmub, 821 uint32_t timeout_us); 822 823 bool dmub_srv_is_hw_pwr_up(struct dmub_srv *dmub); 824 825 /** 826 * dmub_srv_wait_for_auto_load() - Waits for firmware auto load to complete 827 * @dmub: the dmub service 828 * @timeout_us: the maximum number of microseconds to wait 829 * 830 * Waits until firmware has been autoloaded by the DMCUB. The maximum 831 * wait time is given in microseconds to prevent spinning forever. 832 * 833 * On ASICs without firmware autoload support this function will return 834 * immediately. 835 * 836 * Return: 837 * DMUB_STATUS_OK - success 838 * DMUB_STATUS_TIMEOUT - wait for phy init timed out 839 * DMUB_STATUS_INVALID - unspecified error 840 */ 841 enum dmub_status dmub_srv_wait_for_auto_load(struct dmub_srv *dmub, 842 uint32_t timeout_us); 843 844 /** 845 * dmub_srv_wait_for_phy_init() - Waits for DMUB PHY init to complete 846 * @dmub: the dmub service 847 * @timeout_us: the maximum number of microseconds to wait 848 * 849 * Waits until the PHY has been initialized by the DMUB. The maximum 850 * wait time is given in microseconds to prevent spinning forever. 851 * 852 * On ASICs without PHY init support this function will return 853 * immediately. 854 * 855 * Return: 856 * DMUB_STATUS_OK - success 857 * DMUB_STATUS_TIMEOUT - wait for phy init timed out 858 * DMUB_STATUS_INVALID - unspecified error 859 */ 860 enum dmub_status dmub_srv_wait_for_phy_init(struct dmub_srv *dmub, 861 uint32_t timeout_us); 862 863 /** 864 * dmub_srv_wait_for_pending() - Re-entrant wait for messages currently pending 865 * @dmub: the dmub service 866 * @timeout_us: the maximum number of microseconds to wait 867 * 868 * Waits until the commands queued prior to this call are complete. 869 * If interfaces remain busy due to additional work being submitted 870 * concurrently, this function will not continue to wait. 871 * 872 * Return: 873 * DMUB_STATUS_OK - success 874 * DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out 875 * DMUB_STATUS_INVALID - unspecified error 876 */ 877 enum dmub_status dmub_srv_wait_for_pending(struct dmub_srv *dmub, 878 uint32_t timeout_us); 879 880 /** 881 * dmub_srv_wait_for_idle() - Waits for the DMUB to be idle 882 * @dmub: the dmub service 883 * @timeout_us: the maximum number of microseconds to wait 884 * 885 * Waits until the DMUB buffer is empty and all commands have 886 * finished processing. The maximum wait time is given in 887 * microseconds to prevent spinning forever. 888 * 889 * Return: 890 * DMUB_STATUS_OK - success 891 * DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out 892 * DMUB_STATUS_INVALID - unspecified error 893 */ 894 enum dmub_status dmub_srv_wait_for_idle(struct dmub_srv *dmub, 895 uint32_t timeout_us); 896 897 /** 898 * dmub_srv_send_gpint_command() - Sends a GPINT based command. 899 * @dmub: the dmub service 900 * @command_code: the command code to send 901 * @param: the command parameter to send 902 * @timeout_us: the maximum number of microseconds to wait 903 * 904 * Sends a command via the general purpose interrupt (GPINT). 905 * Waits for the number of microseconds specified by timeout_us 906 * for the command ACK before returning. 907 * 908 * Can be called after software initialization. 909 * 910 * Return: 911 * DMUB_STATUS_OK - success 912 * DMUB_STATUS_TIMEOUT - wait for ACK timed out 913 * DMUB_STATUS_INVALID - unspecified error 914 */ 915 enum dmub_status 916 dmub_srv_send_gpint_command(struct dmub_srv *dmub, 917 enum dmub_gpint_command command_code, 918 uint16_t param, uint32_t timeout_us); 919 920 /** 921 * dmub_srv_get_gpint_response() - Queries the GPINT response. 922 * @dmub: the dmub service 923 * @response: the response for the last GPINT 924 * 925 * Returns the response code for the last GPINT interrupt. 926 * 927 * Can be called after software initialization. 928 * 929 * Return: 930 * DMUB_STATUS_OK - success 931 * DMUB_STATUS_INVALID - unspecified error 932 */ 933 enum dmub_status dmub_srv_get_gpint_response(struct dmub_srv *dmub, 934 uint32_t *response); 935 936 /** 937 * dmub_srv_get_gpint_dataout() - Queries the GPINT DATAOUT. 938 * @dmub: the dmub service 939 * @dataout: the data for the GPINT DATAOUT 940 * 941 * Returns the response code for the last GPINT DATAOUT interrupt. 942 * 943 * Can be called after software initialization. 944 * 945 * Return: 946 * DMUB_STATUS_OK - success 947 * DMUB_STATUS_INVALID - unspecified error 948 */ 949 enum dmub_status dmub_srv_get_gpint_dataout(struct dmub_srv *dmub, 950 uint32_t *dataout); 951 952 /** 953 * dmub_flush_buffer_mem() - Read back entire frame buffer region. 954 * This ensures that the write from x86 has been flushed and will not 955 * hang the DMCUB. 956 * @fb: frame buffer to flush 957 * 958 * Can be called after software initialization. 959 */ 960 void dmub_flush_buffer_mem(const struct dmub_fb *fb); 961 962 /** 963 * dmub_srv_get_fw_boot_status() - Returns the DMUB boot status bits. 964 * 965 * @dmub: the dmub service 966 * @status: out pointer for firmware status 967 * 968 * Return: 969 * DMUB_STATUS_OK - success 970 * DMUB_STATUS_INVALID - unspecified error, unsupported 971 */ 972 enum dmub_status dmub_srv_get_fw_boot_status(struct dmub_srv *dmub, 973 union dmub_fw_boot_status *status); 974 975 enum dmub_status dmub_srv_get_fw_boot_option(struct dmub_srv *dmub, 976 union dmub_fw_boot_options *option); 977 978 enum dmub_status dmub_srv_set_skip_panel_power_sequence(struct dmub_srv *dmub, 979 bool skip); 980 981 bool dmub_srv_get_outbox0_msg(struct dmub_srv *dmub, struct dmcub_trace_buf_entry *entry); 982 983 bool dmub_srv_get_diagnostic_data(struct dmub_srv *dmub); 984 985 bool dmub_srv_should_detect(struct dmub_srv *dmub); 986 987 /** 988 * dmub_srv_send_inbox0_cmd() - Send command to DMUB using INBOX0 989 * @dmub: the dmub service 990 * @data: the data to be sent in the INBOX0 command 991 * 992 * Send command by writing directly to INBOX0 WPTR 993 * 994 * Return: 995 * DMUB_STATUS_OK - success 996 * DMUB_STATUS_INVALID - hw_init false or hw function does not exist 997 */ 998 enum dmub_status dmub_srv_send_inbox0_cmd(struct dmub_srv *dmub, union dmub_inbox0_data_register data); 999 1000 /** 1001 * dmub_srv_wait_for_inbox0_ack() - wait for DMUB to ACK INBOX0 command 1002 * @dmub: the dmub service 1003 * @timeout_us: the maximum number of microseconds to wait 1004 * 1005 * Wait for DMUB to ACK the INBOX0 message 1006 * 1007 * Return: 1008 * DMUB_STATUS_OK - success 1009 * DMUB_STATUS_INVALID - hw_init false or hw function does not exist 1010 * DMUB_STATUS_TIMEOUT - wait for ack timed out 1011 */ 1012 enum dmub_status dmub_srv_wait_for_inbox0_ack(struct dmub_srv *dmub, uint32_t timeout_us); 1013 1014 /** 1015 * dmub_srv_wait_for_inbox0_ack() - clear ACK register for INBOX0 1016 * @dmub: the dmub service 1017 * 1018 * Clear ACK register for INBOX0 1019 * 1020 * Return: 1021 * DMUB_STATUS_OK - success 1022 * DMUB_STATUS_INVALID - hw_init false or hw function does not exist 1023 */ 1024 enum dmub_status dmub_srv_clear_inbox0_ack(struct dmub_srv *dmub); 1025 1026 /** 1027 * dmub_srv_subvp_save_surf_addr() - Save primary and meta address for subvp on each flip 1028 * @dmub: The dmub service 1029 * @addr: The surface address to be programmed on the current flip 1030 * @subvp_index: Index of subvp pipe, indicates which subvp pipe the address should be saved for 1031 * 1032 * Function to save the surface flip addr into scratch registers. This is to fix a race condition 1033 * between FW and driver reading / writing to the surface address at the same time. This is 1034 * required because there is no EARLIEST_IN_USE_META. 1035 * 1036 * Return: 1037 * void 1038 */ 1039 void dmub_srv_subvp_save_surf_addr(struct dmub_srv *dmub, const struct dc_plane_address *addr, uint8_t subvp_index); 1040 1041 /** 1042 * dmub_srv_set_power_state() - Track DC power state in dmub_srv 1043 * @dmub: The dmub service 1044 * @power_state: DC power state setting 1045 * 1046 * Store DC power state in dmub_srv. If dmub_srv is in D3, then don't send messages to DMUB 1047 * 1048 * Return: 1049 * void 1050 */ 1051 void dmub_srv_set_power_state(struct dmub_srv *dmub, enum dmub_srv_power_state_type dmub_srv_power_state); 1052 1053 /** 1054 * dmub_srv_reg_cmd_execute() - Executes provided command to the dmub 1055 * @dmub: the dmub service 1056 * @cmd: the command packet to be executed 1057 * 1058 * Executes a single command for the dmub. 1059 * 1060 * Return: 1061 * DMUB_STATUS_OK - success 1062 * DMUB_STATUS_INVALID - unspecified error 1063 */ 1064 enum dmub_status dmub_srv_reg_cmd_execute(struct dmub_srv *dmub, union dmub_rb_cmd *cmd); 1065 1066 1067 /** 1068 * dmub_srv_cmd_get_response() - Copies return data for command into buffer 1069 * @dmub: the dmub service 1070 * @cmd_rsp: response buffer 1071 * 1072 * Copies return data for command into buffer 1073 */ 1074 void dmub_srv_cmd_get_response(struct dmub_srv *dmub, 1075 union dmub_rb_cmd *cmd_rsp); 1076 1077 /** 1078 * dmub_srv_sync_inboxes() - Sync inbox state 1079 * @dmub: the dmub service 1080 * 1081 * Sync inbox state 1082 * 1083 * Return: 1084 * DMUB_STATUS_OK - success 1085 * DMUB_STATUS_INVALID - unspecified error 1086 */ 1087 enum dmub_status dmub_srv_sync_inboxes(struct dmub_srv *dmub); 1088 1089 /** 1090 * dmub_srv_wait_for_inbox_free() - Waits for space in the DMUB inbox to free up 1091 * @dmub: the dmub service 1092 * @timeout_us: the maximum number of microseconds to wait 1093 * @num_free_required: number of free entries required 1094 * 1095 * Waits until the DMUB buffer is freed to the specified number. 1096 * The maximum wait time is given in microseconds to prevent spinning 1097 * forever. 1098 * 1099 * Return: 1100 * DMUB_STATUS_OK - success 1101 * DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out 1102 * DMUB_STATUS_INVALID - unspecified error 1103 */ 1104 enum dmub_status dmub_srv_wait_for_inbox_free(struct dmub_srv *dmub, 1105 uint32_t timeout_us, 1106 uint32_t num_free_required); 1107 1108 /** 1109 * dmub_srv_update_inbox_status() - Updates pending status for inbox & reg inbox0 1110 * @dmub: the dmub service 1111 * 1112 * Return: 1113 * DMUB_STATUS_OK - success 1114 * DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out 1115 * DMUB_STATUS_HW_FAILURE - issue with HW programming 1116 * DMUB_STATUS_INVALID - unspecified error 1117 */ 1118 enum dmub_status dmub_srv_update_inbox_status(struct dmub_srv *dmub); 1119 1120 /** 1121 * dmub_srv_get_preos_info() - retrieves preos fw info 1122 * @dmub: the dmub service 1123 * 1124 * Return: 1125 * true - preos fw info retrieved successfully 1126 * false - preos fw info not retrieved successfully 1127 */ 1128 bool dmub_srv_get_preos_info(struct dmub_srv *dmub); 1129 1130 /** 1131 * dmub_srv_get_fw_meta_info_from_raw_fw() - Fetch firmware metadata info from raw firmware image 1132 * @params: parameters for fetching firmware metadata info 1133 * @fw_info_out: output buffer for firmware metadata info 1134 * 1135 * Return: 1136 * DMUB_STATUS_OK - success 1137 * DMUB_STATUS_INVALID - no FW meta info found 1138 */ 1139 enum dmub_status dmub_srv_get_fw_meta_info_from_raw_fw(struct dmub_srv_fw_meta_info_params *params, 1140 struct dmub_fw_meta_info *fw_info_out); 1141 1142 #endif /* _DMUB_SRV_H_ */ 1143