xref: /linux/drivers/gpu/drm/amd/display/dmub/dmub_srv.h (revision 14d68acfd04b39f34eea7bea65dda652e6db5bf6)
1 /*
2  * Copyright 2019 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #ifndef _DMUB_SRV_H_
27 #define _DMUB_SRV_H_
28 
29 /**
30  * DOC: DMUB interface and operation
31  *
32  * DMUB is the interface to the display DMCUB microcontroller on DCN hardware.
33  * It delegates hardware initialization and command submission to the
34  * microcontroller. DMUB is the shortname for DMCUB.
35  *
36  * This interface is not thread-safe. Ensure that all access to the interface
37  * is properly synchronized by the caller.
38  *
39  * Initialization and usage of the DMUB service should be done in the
40  * steps given below:
41  *
42  * 1. dmub_srv_create()
43  * 2. dmub_srv_has_hw_support()
44  * 3. dmub_srv_calc_region_info()
45  * 4. dmub_srv_hw_init()
46  *
47  * The call to dmub_srv_create() is required to use the server.
48  *
49  * The calls to dmub_srv_has_hw_support() and dmub_srv_calc_region_info()
50  * are helpers to query cache window size and allocate framebuffer(s)
51  * for the cache windows.
52  *
53  * The call to dmub_srv_hw_init() programs the DMCUB registers to prepare
54  * for command submission. Commands can be queued via dmub_srv_cmd_queue()
55  * and executed via dmub_srv_cmd_execute().
56  *
57  * If the queue is full the dmub_srv_wait_for_idle() call can be used to
58  * wait until the queue has been cleared.
59  *
60  * Destroying the DMUB service can be done by calling dmub_srv_destroy().
61  * This does not clear DMUB hardware state, only software state.
62  *
63  * The interface is intended to be standalone and should not depend on any
64  * other component within DAL.
65  */
66 
67 #include "inc/dmub_cmd.h"
68 #include "dc/dc_types.h"
69 
70 #if defined(__cplusplus)
71 extern "C" {
72 #endif
73 
74 /* Forward declarations */
75 struct dmub_srv;
76 struct dmub_srv_common_regs;
77 struct dmub_srv_dcn31_regs;
78 
79 struct dmcub_trace_buf_entry;
80 
81 /* enum dmub_window_memory_type - memory location type specification for windows */
82 enum dmub_window_memory_type {
83 	DMUB_WINDOW_MEMORY_TYPE_FB = 0,
84 	DMUB_WINDOW_MEMORY_TYPE_GART
85 };
86 
87 /* enum dmub_status - return code for dmcub functions */
88 enum dmub_status {
89 	DMUB_STATUS_OK = 0,
90 	DMUB_STATUS_NO_CTX,
91 	DMUB_STATUS_QUEUE_FULL,
92 	DMUB_STATUS_TIMEOUT,
93 	DMUB_STATUS_INVALID,
94 	DMUB_STATUS_HW_FAILURE,
95 	DMUB_STATUS_POWER_STATE_D3
96 };
97 
98 /* enum dmub_asic - dmub asic identifier */
99 enum dmub_asic {
100 	DMUB_ASIC_NONE = 0,
101 	DMUB_ASIC_DCN20,
102 	DMUB_ASIC_DCN21,
103 	DMUB_ASIC_DCN30,
104 	DMUB_ASIC_DCN301,
105 	DMUB_ASIC_DCN302,
106 	DMUB_ASIC_DCN303,
107 	DMUB_ASIC_DCN31,
108 	DMUB_ASIC_DCN31B,
109 	DMUB_ASIC_DCN314,
110 	DMUB_ASIC_DCN315,
111 	DMUB_ASIC_DCN316,
112 	DMUB_ASIC_DCN32,
113 	DMUB_ASIC_DCN321,
114 	DMUB_ASIC_DCN35,
115 	DMUB_ASIC_MAX,
116 };
117 
118 /* enum dmub_window_id - dmub window identifier */
119 enum dmub_window_id {
120 	DMUB_WINDOW_0_INST_CONST = 0,
121 	DMUB_WINDOW_1_STACK,
122 	DMUB_WINDOW_2_BSS_DATA,
123 	DMUB_WINDOW_3_VBIOS,
124 	DMUB_WINDOW_4_MAILBOX,
125 	DMUB_WINDOW_5_TRACEBUFF,
126 	DMUB_WINDOW_6_FW_STATE,
127 	DMUB_WINDOW_7_SCRATCH_MEM,
128 	DMUB_WINDOW_SHARED_STATE,
129 	DMUB_WINDOW_TOTAL,
130 };
131 
132 /* enum dmub_notification_type - dmub outbox notification identifier */
133 enum dmub_notification_type {
134 	DMUB_NOTIFICATION_NO_DATA = 0,
135 	DMUB_NOTIFICATION_AUX_REPLY,
136 	DMUB_NOTIFICATION_HPD,
137 	DMUB_NOTIFICATION_HPD_IRQ,
138 	DMUB_NOTIFICATION_SET_CONFIG_REPLY,
139 	DMUB_NOTIFICATION_DPIA_NOTIFICATION,
140 	DMUB_NOTIFICATION_MAX
141 };
142 
143 /**
144  * DPIA NOTIFICATION Response Type
145  */
146 enum dpia_notify_bw_alloc_status {
147 
148 	DPIA_BW_REQ_FAILED = 0,
149 	DPIA_BW_REQ_SUCCESS,
150 	DPIA_EST_BW_CHANGED,
151 	DPIA_BW_ALLOC_CAPS_CHANGED
152 };
153 
154 /* enum dmub_memory_access_type - memory access method */
155 enum dmub_memory_access_type {
156 	DMUB_MEMORY_ACCESS_DEFAULT,
157 	DMUB_MEMORY_ACCESS_CPU = DMUB_MEMORY_ACCESS_DEFAULT,
158 	DMUB_MEMORY_ACCESS_DMA
159 };
160 
161 /* enum dmub_power_state type - to track DC power state in dmub_srv */
162 enum dmub_srv_power_state_type {
163 	DMUB_POWER_STATE_UNDEFINED = 0,
164 	DMUB_POWER_STATE_D0 = 1,
165 	DMUB_POWER_STATE_D3 = 8
166 };
167 
168 /**
169  * struct dmub_region - dmub hw memory region
170  * @base: base address for region, must be 256 byte aligned
171  * @top: top address for region
172  */
173 struct dmub_region {
174 	uint32_t base;
175 	uint32_t top;
176 };
177 
178 /**
179  * struct dmub_window - dmub hw cache window
180  * @off: offset to the fb memory in gpu address space
181  * @r: region in uc address space for cache window
182  */
183 struct dmub_window {
184 	union dmub_addr offset;
185 	struct dmub_region region;
186 };
187 
188 /**
189  * struct dmub_fb - defines a dmub framebuffer memory region
190  * @cpu_addr: cpu virtual address for the region, NULL if invalid
191  * @gpu_addr: gpu virtual address for the region, NULL if invalid
192  * @size: size of the region in bytes, zero if invalid
193  */
194 struct dmub_fb {
195 	void *cpu_addr;
196 	uint64_t gpu_addr;
197 	uint32_t size;
198 };
199 
200 /**
201  * struct dmub_srv_region_params - params used for calculating dmub regions
202  * @inst_const_size: size of the fw inst const section
203  * @bss_data_size: size of the fw bss data section
204  * @vbios_size: size of the vbios data
205  * @fw_bss_data: raw firmware bss data section
206  */
207 struct dmub_srv_region_params {
208 	uint32_t inst_const_size;
209 	uint32_t bss_data_size;
210 	uint32_t vbios_size;
211 	const uint8_t *fw_inst_const;
212 	const uint8_t *fw_bss_data;
213 	const enum dmub_window_memory_type *window_memory_type;
214 };
215 
216 /**
217  * struct dmub_srv_region_info - output region info from the dmub service
218  * @fb_size: required minimum fb size for all regions, aligned to 4096 bytes
219  * @num_regions: number of regions used by the dmub service
220  * @regions: region info
221  *
222  * The regions are aligned such that they can be all placed within the
223  * same framebuffer but they can also be placed into different framebuffers.
224  *
225  * The size of each region can be calculated by the caller:
226  * size = reg.top - reg.base
227  *
228  * Care must be taken when performing custom allocations to ensure that each
229  * region base address is 256 byte aligned.
230  */
231 struct dmub_srv_region_info {
232 	uint32_t fb_size;
233 	uint32_t gart_size;
234 	uint8_t num_regions;
235 	struct dmub_region regions[DMUB_WINDOW_TOTAL];
236 };
237 
238 /**
239  * struct dmub_srv_memory_params - parameters used for driver fb setup
240  * @region_info: region info calculated by dmub service
241  * @cpu_fb_addr: base cpu address for the framebuffer
242  * @cpu_inbox_addr: base cpu address for the gart
243  * @gpu_fb_addr: base gpu virtual address for the framebuffer
244  * @gpu_inbox_addr: base gpu virtual address for the gart
245  */
246 struct dmub_srv_memory_params {
247 	const struct dmub_srv_region_info *region_info;
248 	void *cpu_fb_addr;
249 	void *cpu_gart_addr;
250 	uint64_t gpu_fb_addr;
251 	uint64_t gpu_gart_addr;
252 	const enum dmub_window_memory_type *window_memory_type;
253 };
254 
255 /**
256  * struct dmub_srv_fb_info - output fb info from the dmub service
257  * @num_fbs: number of required dmub framebuffers
258  * @fbs: fb data for each region
259  *
260  * Output from the dmub service helper that can be used by the
261  * driver to prepare dmub_fb that can be passed into the dmub
262  * hw init service.
263  *
264  * Assumes that all regions are within the same framebuffer
265  * and have been setup according to the region_info generated
266  * by the dmub service.
267  */
268 struct dmub_srv_fb_info {
269 	uint8_t num_fb;
270 	struct dmub_fb fb[DMUB_WINDOW_TOTAL];
271 };
272 
273 /*
274  * struct dmub_srv_hw_params - params for dmub hardware initialization
275  * @fb: framebuffer info for each region
276  * @fb_base: base of the framebuffer aperture
277  * @fb_offset: offset of the framebuffer aperture
278  * @psp_version: psp version to pass for DMCU init
279  * @load_inst_const: true if DMUB should load inst const fw
280  */
281 struct dmub_srv_hw_params {
282 	struct dmub_fb *fb[DMUB_WINDOW_TOTAL];
283 	uint64_t fb_base;
284 	uint64_t fb_offset;
285 	uint32_t psp_version;
286 	bool load_inst_const;
287 	bool skip_panel_power_sequence;
288 	bool disable_z10;
289 	bool power_optimization;
290 	bool dpia_supported;
291 	bool disable_dpia;
292 	bool usb4_cm_version;
293 	bool fw_in_system_memory;
294 	bool dpia_hpd_int_enable_supported;
295 	bool disable_clock_gate;
296 	bool disallow_dispclk_dppclk_ds;
297 	enum dmub_memory_access_type mem_access_type;
298 	enum dmub_ips_disable_type disable_ips;
299 };
300 
301 /**
302  * struct dmub_diagnostic_data - Diagnostic data retrieved from DMCUB for
303  * debugging purposes, including logging, crash analysis, etc.
304  */
305 struct dmub_diagnostic_data {
306 	uint32_t dmcub_version;
307 	uint32_t scratch[17];
308 	uint32_t pc;
309 	uint32_t undefined_address_fault_addr;
310 	uint32_t inst_fetch_fault_addr;
311 	uint32_t data_write_fault_addr;
312 	uint32_t inbox1_rptr;
313 	uint32_t inbox1_wptr;
314 	uint32_t inbox1_size;
315 	uint32_t inbox0_rptr;
316 	uint32_t inbox0_wptr;
317 	uint32_t inbox0_size;
318 	uint32_t gpint_datain0;
319 	uint8_t is_dmcub_enabled : 1;
320 	uint8_t is_dmcub_soft_reset : 1;
321 	uint8_t is_dmcub_secure_reset : 1;
322 	uint8_t is_traceport_en : 1;
323 	uint8_t is_cw0_enabled : 1;
324 	uint8_t is_cw6_enabled : 1;
325 };
326 
327 /**
328  * struct dmub_srv_base_funcs - Driver specific base callbacks
329  */
330 struct dmub_srv_base_funcs {
331 	/**
332 	 * @reg_read:
333 	 *
334 	 * Hook for reading a register.
335 	 *
336 	 * Return: The 32-bit register value from the given address.
337 	 */
338 	uint32_t (*reg_read)(void *ctx, uint32_t address);
339 
340 	/**
341 	 * @reg_write:
342 	 *
343 	 * Hook for writing a value to the register specified by address.
344 	 */
345 	void (*reg_write)(void *ctx, uint32_t address, uint32_t value);
346 };
347 
348 /**
349  * struct dmub_srv_hw_funcs - hardware sequencer funcs for dmub
350  */
351 struct dmub_srv_hw_funcs {
352 	/* private: internal use only */
353 
354 	void (*init)(struct dmub_srv *dmub);
355 
356 	void (*reset)(struct dmub_srv *dmub);
357 
358 	void (*reset_release)(struct dmub_srv *dmub);
359 
360 	void (*backdoor_load)(struct dmub_srv *dmub,
361 			      const struct dmub_window *cw0,
362 			      const struct dmub_window *cw1);
363 
364 	void (*backdoor_load_zfb_mode)(struct dmub_srv *dmub,
365 			      const struct dmub_window *cw0,
366 			      const struct dmub_window *cw1);
367 	void (*setup_windows)(struct dmub_srv *dmub,
368 			      const struct dmub_window *cw2,
369 			      const struct dmub_window *cw3,
370 			      const struct dmub_window *cw4,
371 			      const struct dmub_window *cw5,
372 			      const struct dmub_window *cw6,
373 			      const struct dmub_window *region6);
374 
375 	void (*setup_mailbox)(struct dmub_srv *dmub,
376 			      const struct dmub_region *inbox1);
377 
378 	uint32_t (*get_inbox1_wptr)(struct dmub_srv *dmub);
379 
380 	uint32_t (*get_inbox1_rptr)(struct dmub_srv *dmub);
381 
382 	void (*set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset);
383 
384 	void (*setup_out_mailbox)(struct dmub_srv *dmub,
385 			      const struct dmub_region *outbox1);
386 
387 	uint32_t (*get_outbox1_wptr)(struct dmub_srv *dmub);
388 
389 	void (*set_outbox1_rptr)(struct dmub_srv *dmub, uint32_t rptr_offset);
390 
391 	void (*setup_outbox0)(struct dmub_srv *dmub,
392 			      const struct dmub_region *outbox0);
393 
394 	uint32_t (*get_outbox0_wptr)(struct dmub_srv *dmub);
395 
396 	void (*set_outbox0_rptr)(struct dmub_srv *dmub, uint32_t rptr_offset);
397 
398 	uint32_t (*emul_get_inbox1_rptr)(struct dmub_srv *dmub);
399 
400 	void (*emul_set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset);
401 
402 	bool (*is_supported)(struct dmub_srv *dmub);
403 
404 	bool (*is_psrsu_supported)(struct dmub_srv *dmub);
405 
406 	bool (*is_hw_init)(struct dmub_srv *dmub);
407 	bool (*is_hw_powered_up)(struct dmub_srv *dmub);
408 
409 	void (*enable_dmub_boot_options)(struct dmub_srv *dmub,
410 				const struct dmub_srv_hw_params *params);
411 
412 	void (*skip_dmub_panel_power_sequence)(struct dmub_srv *dmub, bool skip);
413 
414 	union dmub_fw_boot_status (*get_fw_status)(struct dmub_srv *dmub);
415 
416 	union dmub_fw_boot_options (*get_fw_boot_option)(struct dmub_srv *dmub);
417 
418 	void (*set_gpint)(struct dmub_srv *dmub,
419 			  union dmub_gpint_data_register reg);
420 
421 	bool (*is_gpint_acked)(struct dmub_srv *dmub,
422 			       union dmub_gpint_data_register reg);
423 
424 	uint32_t (*get_gpint_response)(struct dmub_srv *dmub);
425 
426 	uint32_t (*get_gpint_dataout)(struct dmub_srv *dmub);
427 
428 	void (*configure_dmub_in_system_memory)(struct dmub_srv *dmub);
429 	void (*clear_inbox0_ack_register)(struct dmub_srv *dmub);
430 	uint32_t (*read_inbox0_ack_register)(struct dmub_srv *dmub);
431 	void (*send_inbox0_cmd)(struct dmub_srv *dmub, union dmub_inbox0_data_register data);
432 	uint32_t (*get_current_time)(struct dmub_srv *dmub);
433 
434 	void (*get_diagnostic_data)(struct dmub_srv *dmub, struct dmub_diagnostic_data *dmub_oca);
435 
436 	bool (*should_detect)(struct dmub_srv *dmub);
437 	void (*init_reg_offsets)(struct dmub_srv *dmub, struct dc_context *ctx);
438 
439 	void (*subvp_save_surf_addr)(struct dmub_srv *dmub, const struct dc_plane_address *addr, uint8_t subvp_index);
440 };
441 
442 /**
443  * struct dmub_srv_create_params - params for dmub service creation
444  * @base_funcs: driver supplied base routines
445  * @hw_funcs: optional overrides for hw funcs
446  * @user_ctx: context data for callback funcs
447  * @asic: driver supplied asic
448  * @fw_version: the current firmware version, if any
449  * @is_virtual: false for hw support only
450  */
451 struct dmub_srv_create_params {
452 	struct dmub_srv_base_funcs funcs;
453 	struct dmub_srv_hw_funcs *hw_funcs;
454 	void *user_ctx;
455 	enum dmub_asic asic;
456 	uint32_t fw_version;
457 	bool is_virtual;
458 };
459 
460 /**
461  * struct dmub_srv - software state for dmcub
462  * @asic: dmub asic identifier
463  * @user_ctx: user provided context for the dmub_srv
464  * @fw_version: the current firmware version, if any
465  * @is_virtual: false if hardware support only
466  * @shared_state: dmub shared state between firmware and driver
467  * @fw_state: dmub firmware state pointer
468  */
469 struct dmub_srv {
470 	enum dmub_asic asic;
471 	void *user_ctx;
472 	uint32_t fw_version;
473 	bool is_virtual;
474 	struct dmub_fb scratch_mem_fb;
475 	volatile struct dmub_shared_state_feature_block *shared_state;
476 	volatile const struct dmub_fw_state *fw_state;
477 
478 	/* private: internal use only */
479 	const struct dmub_srv_common_regs *regs;
480 	const struct dmub_srv_dcn31_regs *regs_dcn31;
481 	struct dmub_srv_dcn32_regs *regs_dcn32;
482 	struct dmub_srv_dcn35_regs *regs_dcn35;
483 
484 	struct dmub_srv_base_funcs funcs;
485 	struct dmub_srv_hw_funcs hw_funcs;
486 	struct dmub_rb inbox1_rb;
487 	uint32_t inbox1_last_wptr;
488 	/**
489 	 * outbox1_rb is accessed without locks (dal & dc)
490 	 * and to be used only in dmub_srv_stat_get_notification()
491 	 */
492 	struct dmub_rb outbox1_rb;
493 
494 	struct dmub_rb outbox0_rb;
495 
496 	bool sw_init;
497 	bool hw_init;
498 
499 	uint64_t fb_base;
500 	uint64_t fb_offset;
501 	uint32_t psp_version;
502 
503 	/* Feature capabilities reported by fw */
504 	struct dmub_feature_caps feature_caps;
505 	struct dmub_visual_confirm_color visual_confirm_color;
506 
507 	enum dmub_srv_power_state_type power_state;
508 };
509 
510 /**
511  * struct dmub_notification - dmub notification data
512  * @type: dmub notification type
513  * @link_index: link index to identify aux connection
514  * @result: USB4 status returned from dmub
515  * @pending_notification: Indicates there are other pending notifications
516  * @aux_reply: aux reply
517  * @hpd_status: hpd status
518  * @bw_alloc_reply: BW Allocation reply from CM/DPIA
519  */
520 struct dmub_notification {
521 	enum dmub_notification_type type;
522 	uint8_t link_index;
523 	uint8_t result;
524 	bool pending_notification;
525 	union {
526 		struct aux_reply_data aux_reply;
527 		enum dp_hpd_status hpd_status;
528 		enum set_config_status sc_status;
529 		/**
530 		 * DPIA notification command.
531 		 */
532 		struct dmub_rb_cmd_dpia_notification dpia_notification;
533 	};
534 };
535 
536 /**
537  * DMUB firmware version helper macro - useful for checking if the version
538  * of a firmware to know if feature or functionality is supported or present.
539  */
540 #define DMUB_FW_VERSION(major, minor, revision) \
541 	((((major) & 0xFF) << 24) | (((minor) & 0xFF) << 16) | (((revision) & 0xFF) << 8))
542 
543 /**
544  * dmub_srv_create() - creates the DMUB service.
545  * @dmub: the dmub service
546  * @params: creation parameters for the service
547  *
548  * Return:
549  *   DMUB_STATUS_OK - success
550  *   DMUB_STATUS_INVALID - unspecified error
551  */
552 enum dmub_status dmub_srv_create(struct dmub_srv *dmub,
553 				 const struct dmub_srv_create_params *params);
554 
555 /**
556  * dmub_srv_destroy() - destroys the DMUB service.
557  * @dmub: the dmub service
558  */
559 void dmub_srv_destroy(struct dmub_srv *dmub);
560 
561 /**
562  * dmub_srv_calc_region_info() - retreives region info from the dmub service
563  * @dmub: the dmub service
564  * @params: parameters used to calculate region locations
565  * @info_out: the output region info from dmub
566  *
567  * Calculates the base and top address for all relevant dmub regions
568  * using the parameters given (if any).
569  *
570  * Return:
571  *   DMUB_STATUS_OK - success
572  *   DMUB_STATUS_INVALID - unspecified error
573  */
574 enum dmub_status
575 dmub_srv_calc_region_info(struct dmub_srv *dmub,
576 			  const struct dmub_srv_region_params *params,
577 			  struct dmub_srv_region_info *out);
578 
579 /**
580  * dmub_srv_calc_region_info() - retreives fb info from the dmub service
581  * @dmub: the dmub service
582  * @params: parameters used to calculate fb locations
583  * @info_out: the output fb info from dmub
584  *
585  * Calculates the base and top address for all relevant dmub regions
586  * using the parameters given (if any).
587  *
588  * Return:
589  *   DMUB_STATUS_OK - success
590  *   DMUB_STATUS_INVALID - unspecified error
591  */
592 enum dmub_status dmub_srv_calc_mem_info(struct dmub_srv *dmub,
593 				       const struct dmub_srv_memory_params *params,
594 				       struct dmub_srv_fb_info *out);
595 
596 /**
597  * dmub_srv_has_hw_support() - returns hw support state for dmcub
598  * @dmub: the dmub service
599  * @is_supported: hw support state
600  *
601  * Queries the hardware for DMCUB support and returns the result.
602  *
603  * Can be called before dmub_srv_hw_init().
604  *
605  * Return:
606  *   DMUB_STATUS_OK - success
607  *   DMUB_STATUS_INVALID - unspecified error
608  */
609 enum dmub_status dmub_srv_has_hw_support(struct dmub_srv *dmub,
610 					 bool *is_supported);
611 
612 /**
613  * dmub_srv_is_hw_init() - returns hardware init state
614  *
615  * Return:
616  *   DMUB_STATUS_OK - success
617  *   DMUB_STATUS_INVALID - unspecified error
618  */
619 enum dmub_status dmub_srv_is_hw_init(struct dmub_srv *dmub, bool *is_hw_init);
620 
621 /**
622  * dmub_srv_hw_init() - initializes the underlying DMUB hardware
623  * @dmub: the dmub service
624  * @params: params for hardware initialization
625  *
626  * Resets the DMUB hardware and performs backdoor loading of the
627  * required cache regions based on the input framebuffer regions.
628  *
629  * Return:
630  *   DMUB_STATUS_OK - success
631  *   DMUB_STATUS_NO_CTX - dmcub context not initialized
632  *   DMUB_STATUS_INVALID - unspecified error
633  */
634 enum dmub_status dmub_srv_hw_init(struct dmub_srv *dmub,
635 				  const struct dmub_srv_hw_params *params);
636 
637 /**
638  * dmub_srv_hw_reset() - puts the DMUB hardware in reset state if initialized
639  * @dmub: the dmub service
640  *
641  * Before destroying the DMUB service or releasing the backing framebuffer
642  * memory we'll need to put the DMCUB into reset first.
643  *
644  * A subsequent call to dmub_srv_hw_init() will re-enable the DMCUB.
645  *
646  * Return:
647  *   DMUB_STATUS_OK - success
648  *   DMUB_STATUS_INVALID - unspecified error
649  */
650 enum dmub_status dmub_srv_hw_reset(struct dmub_srv *dmub);
651 
652 /**
653  * dmub_srv_sync_inbox1() - sync sw state with hw state
654  * @dmub: the dmub service
655  *
656  * Sync sw state with hw state when resume from S0i3
657  *
658  * Return:
659  *   DMUB_STATUS_OK - success
660  *   DMUB_STATUS_INVALID - unspecified error
661  */
662 enum dmub_status dmub_srv_sync_inbox1(struct dmub_srv *dmub);
663 
664 /**
665  * dmub_srv_cmd_queue() - queues a command to the DMUB
666  * @dmub: the dmub service
667  * @cmd: the command to queue
668  *
669  * Queues a command to the DMUB service but does not begin execution
670  * immediately.
671  *
672  * Return:
673  *   DMUB_STATUS_OK - success
674  *   DMUB_STATUS_QUEUE_FULL - no remaining room in queue
675  *   DMUB_STATUS_INVALID - unspecified error
676  */
677 enum dmub_status dmub_srv_cmd_queue(struct dmub_srv *dmub,
678 				    const union dmub_rb_cmd *cmd);
679 
680 /**
681  * dmub_srv_cmd_execute() - Executes a queued sequence to the dmub
682  * @dmub: the dmub service
683  *
684  * Begins execution of queued commands on the dmub.
685  *
686  * Return:
687  *   DMUB_STATUS_OK - success
688  *   DMUB_STATUS_INVALID - unspecified error
689  */
690 enum dmub_status dmub_srv_cmd_execute(struct dmub_srv *dmub);
691 
692 /**
693  * dmub_srv_wait_for_hw_pwr_up() - Waits for firmware hardware power up is completed
694  * @dmub: the dmub service
695  * @timeout_us: the maximum number of microseconds to wait
696  *
697  * Waits until firmware hardware is powered up. The maximum
698  * wait time is given in microseconds to prevent spinning forever.
699  *
700  * Return:
701  *   DMUB_STATUS_OK - success
702  *   DMUB_STATUS_TIMEOUT - timed out
703  *   DMUB_STATUS_INVALID - unspecified error
704  */
705 enum dmub_status dmub_srv_wait_for_hw_pwr_up(struct dmub_srv *dmub,
706 					     uint32_t timeout_us);
707 
708 bool dmub_srv_is_hw_pwr_up(struct dmub_srv *dmub);
709 
710 /**
711  * dmub_srv_wait_for_auto_load() - Waits for firmware auto load to complete
712  * @dmub: the dmub service
713  * @timeout_us: the maximum number of microseconds to wait
714  *
715  * Waits until firmware has been autoloaded by the DMCUB. The maximum
716  * wait time is given in microseconds to prevent spinning forever.
717  *
718  * On ASICs without firmware autoload support this function will return
719  * immediately.
720  *
721  * Return:
722  *   DMUB_STATUS_OK - success
723  *   DMUB_STATUS_TIMEOUT - wait for phy init timed out
724  *   DMUB_STATUS_INVALID - unspecified error
725  */
726 enum dmub_status dmub_srv_wait_for_auto_load(struct dmub_srv *dmub,
727 					     uint32_t timeout_us);
728 
729 /**
730  * dmub_srv_wait_for_phy_init() - Waits for DMUB PHY init to complete
731  * @dmub: the dmub service
732  * @timeout_us: the maximum number of microseconds to wait
733  *
734  * Waits until the PHY has been initialized by the DMUB. The maximum
735  * wait time is given in microseconds to prevent spinning forever.
736  *
737  * On ASICs without PHY init support this function will return
738  * immediately.
739  *
740  * Return:
741  *   DMUB_STATUS_OK - success
742  *   DMUB_STATUS_TIMEOUT - wait for phy init timed out
743  *   DMUB_STATUS_INVALID - unspecified error
744  */
745 enum dmub_status dmub_srv_wait_for_phy_init(struct dmub_srv *dmub,
746 					    uint32_t timeout_us);
747 
748 /**
749  * dmub_srv_wait_for_idle() - Waits for the DMUB to be idle
750  * @dmub: the dmub service
751  * @timeout_us: the maximum number of microseconds to wait
752  *
753  * Waits until the DMUB buffer is empty and all commands have
754  * finished processing. The maximum wait time is given in
755  * microseconds to prevent spinning forever.
756  *
757  * Return:
758  *   DMUB_STATUS_OK - success
759  *   DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out
760  *   DMUB_STATUS_INVALID - unspecified error
761  */
762 enum dmub_status dmub_srv_wait_for_idle(struct dmub_srv *dmub,
763 					uint32_t timeout_us);
764 
765 /**
766  * dmub_srv_send_gpint_command() - Sends a GPINT based command.
767  * @dmub: the dmub service
768  * @command_code: the command code to send
769  * @param: the command parameter to send
770  * @timeout_us: the maximum number of microseconds to wait
771  *
772  * Sends a command via the general purpose interrupt (GPINT).
773  * Waits for the number of microseconds specified by timeout_us
774  * for the command ACK before returning.
775  *
776  * Can be called after software initialization.
777  *
778  * Return:
779  *   DMUB_STATUS_OK - success
780  *   DMUB_STATUS_TIMEOUT - wait for ACK timed out
781  *   DMUB_STATUS_INVALID - unspecified error
782  */
783 enum dmub_status
784 dmub_srv_send_gpint_command(struct dmub_srv *dmub,
785 			    enum dmub_gpint_command command_code,
786 			    uint16_t param, uint32_t timeout_us);
787 
788 /**
789  * dmub_srv_get_gpint_response() - Queries the GPINT response.
790  * @dmub: the dmub service
791  * @response: the response for the last GPINT
792  *
793  * Returns the response code for the last GPINT interrupt.
794  *
795  * Can be called after software initialization.
796  *
797  * Return:
798  *   DMUB_STATUS_OK - success
799  *   DMUB_STATUS_INVALID - unspecified error
800  */
801 enum dmub_status dmub_srv_get_gpint_response(struct dmub_srv *dmub,
802 					     uint32_t *response);
803 
804 /**
805  * dmub_srv_get_gpint_dataout() - Queries the GPINT DATAOUT.
806  * @dmub: the dmub service
807  * @dataout: the data for the GPINT DATAOUT
808  *
809  * Returns the response code for the last GPINT DATAOUT interrupt.
810  *
811  * Can be called after software initialization.
812  *
813  * Return:
814  *   DMUB_STATUS_OK - success
815  *   DMUB_STATUS_INVALID - unspecified error
816  */
817 enum dmub_status dmub_srv_get_gpint_dataout(struct dmub_srv *dmub,
818 					     uint32_t *dataout);
819 
820 /**
821  * dmub_flush_buffer_mem() - Read back entire frame buffer region.
822  * This ensures that the write from x86 has been flushed and will not
823  * hang the DMCUB.
824  * @fb: frame buffer to flush
825  *
826  * Can be called after software initialization.
827  */
828 void dmub_flush_buffer_mem(const struct dmub_fb *fb);
829 
830 /**
831  * dmub_srv_get_fw_boot_status() - Returns the DMUB boot status bits.
832  *
833  * @dmub: the dmub service
834  * @status: out pointer for firmware status
835  *
836  * Return:
837  *   DMUB_STATUS_OK - success
838  *   DMUB_STATUS_INVALID - unspecified error, unsupported
839  */
840 enum dmub_status dmub_srv_get_fw_boot_status(struct dmub_srv *dmub,
841 					     union dmub_fw_boot_status *status);
842 
843 enum dmub_status dmub_srv_get_fw_boot_option(struct dmub_srv *dmub,
844 					     union dmub_fw_boot_options *option);
845 
846 enum dmub_status dmub_srv_cmd_with_reply_data(struct dmub_srv *dmub,
847 					      union dmub_rb_cmd *cmd);
848 
849 enum dmub_status dmub_srv_set_skip_panel_power_sequence(struct dmub_srv *dmub,
850 					     bool skip);
851 
852 bool dmub_srv_get_outbox0_msg(struct dmub_srv *dmub, struct dmcub_trace_buf_entry *entry);
853 
854 bool dmub_srv_get_diagnostic_data(struct dmub_srv *dmub, struct dmub_diagnostic_data *diag_data);
855 
856 bool dmub_srv_should_detect(struct dmub_srv *dmub);
857 
858 /**
859  * dmub_srv_send_inbox0_cmd() - Send command to DMUB using INBOX0
860  * @dmub: the dmub service
861  * @data: the data to be sent in the INBOX0 command
862  *
863  * Send command by writing directly to INBOX0 WPTR
864  *
865  * Return:
866  *   DMUB_STATUS_OK - success
867  *   DMUB_STATUS_INVALID - hw_init false or hw function does not exist
868  */
869 enum dmub_status dmub_srv_send_inbox0_cmd(struct dmub_srv *dmub, union dmub_inbox0_data_register data);
870 
871 /**
872  * dmub_srv_wait_for_inbox0_ack() - wait for DMUB to ACK INBOX0 command
873  * @dmub: the dmub service
874  * @timeout_us: the maximum number of microseconds to wait
875  *
876  * Wait for DMUB to ACK the INBOX0 message
877  *
878  * Return:
879  *   DMUB_STATUS_OK - success
880  *   DMUB_STATUS_INVALID - hw_init false or hw function does not exist
881  *   DMUB_STATUS_TIMEOUT - wait for ack timed out
882  */
883 enum dmub_status dmub_srv_wait_for_inbox0_ack(struct dmub_srv *dmub, uint32_t timeout_us);
884 
885 /**
886  * dmub_srv_wait_for_inbox0_ack() - clear ACK register for INBOX0
887  * @dmub: the dmub service
888  *
889  * Clear ACK register for INBOX0
890  *
891  * Return:
892  *   DMUB_STATUS_OK - success
893  *   DMUB_STATUS_INVALID - hw_init false or hw function does not exist
894  */
895 enum dmub_status dmub_srv_clear_inbox0_ack(struct dmub_srv *dmub);
896 
897 /**
898  * dmub_srv_subvp_save_surf_addr() - Save primary and meta address for subvp on each flip
899  * @dmub: The dmub service
900  * @addr: The surface address to be programmed on the current flip
901  * @subvp_index: Index of subvp pipe, indicates which subvp pipe the address should be saved for
902  *
903  * Function to save the surface flip addr into scratch registers. This is to fix a race condition
904  * between FW and driver reading / writing to the surface address at the same time. This is
905  * required because there is no EARLIEST_IN_USE_META.
906  *
907  * Return:
908  *   void
909  */
910 void dmub_srv_subvp_save_surf_addr(struct dmub_srv *dmub, const struct dc_plane_address *addr, uint8_t subvp_index);
911 
912 /**
913  * dmub_srv_set_power_state() - Track DC power state in dmub_srv
914  * @dmub: The dmub service
915  * @power_state: DC power state setting
916  *
917  * Store DC power state in dmub_srv.  If dmub_srv is in D3, then don't send messages to DMUB
918  *
919  * Return:
920  *   void
921  */
922 void dmub_srv_set_power_state(struct dmub_srv *dmub, enum dmub_srv_power_state_type dmub_srv_power_state);
923 
924 #if defined(__cplusplus)
925 }
926 #endif
927 
928 #endif /* _DMUB_SRV_H_ */
929