1 // SPDX-License-Identifier: MIT 2 // 3 // Copyright 2024 Advanced Micro Devices, Inc. 4 5 #include "dc_spl.h" 6 #include "dc_spl_scl_filters.h" 7 #include "dc_spl_scl_easf_filters.h" 8 #include "dc_spl_isharp_filters.h" 9 #include "spl_debug.h" 10 11 #define IDENTITY_RATIO(ratio) (spl_fixpt_u2d19(ratio) == (1 << 19)) 12 #define MIN_VIEWPORT_SIZE 12 13 14 static bool spl_is_yuv420(enum spl_pixel_format format) 15 { 16 if ((format >= SPL_PIXEL_FORMAT_420BPP8) && 17 (format <= SPL_PIXEL_FORMAT_420BPP10)) 18 return true; 19 20 return false; 21 } 22 23 static bool spl_is_rgb8(enum spl_pixel_format format) 24 { 25 if (format == SPL_PIXEL_FORMAT_ARGB8888) 26 return true; 27 28 return false; 29 } 30 31 static bool spl_is_video_format(enum spl_pixel_format format) 32 { 33 if (format >= SPL_PIXEL_FORMAT_VIDEO_BEGIN 34 && format <= SPL_PIXEL_FORMAT_VIDEO_END) 35 return true; 36 else 37 return false; 38 } 39 40 static bool spl_is_subsampled_format(enum spl_pixel_format format) 41 { 42 if (format >= SPL_PIXEL_FORMAT_SUBSAMPLED_BEGIN 43 && format <= SPL_PIXEL_FORMAT_SUBSAMPLED_END) 44 return true; 45 else 46 return false; 47 } 48 49 static struct spl_rect intersect_rec(const struct spl_rect *r0, const struct spl_rect *r1) 50 { 51 struct spl_rect rec; 52 int r0_x_end = r0->x + r0->width; 53 int r1_x_end = r1->x + r1->width; 54 int r0_y_end = r0->y + r0->height; 55 int r1_y_end = r1->y + r1->height; 56 57 rec.x = r0->x > r1->x ? r0->x : r1->x; 58 rec.width = r0_x_end > r1_x_end ? r1_x_end - rec.x : r0_x_end - rec.x; 59 rec.y = r0->y > r1->y ? r0->y : r1->y; 60 rec.height = r0_y_end > r1_y_end ? r1_y_end - rec.y : r0_y_end - rec.y; 61 62 /* in case that there is no intersection */ 63 if (rec.width < 0 || rec.height < 0) 64 memset(&rec, 0, sizeof(rec)); 65 66 return rec; 67 } 68 69 static struct spl_rect shift_rec(const struct spl_rect *rec_in, int x, int y) 70 { 71 struct spl_rect rec_out = *rec_in; 72 73 rec_out.x += x; 74 rec_out.y += y; 75 76 return rec_out; 77 } 78 79 static struct spl_rect calculate_plane_rec_in_timing_active( 80 struct spl_in *spl_in, 81 const struct spl_rect *rec_in) 82 { 83 /* 84 * The following diagram shows an example where we map a 1920x1200 85 * desktop to a 2560x1440 timing with a plane rect in the middle 86 * of the screen. To map a plane rect from Stream Source to Timing 87 * Active space, we first multiply stream scaling ratios (i.e 2304/1920 88 * horizontal and 1440/1200 vertical) to the plane's x and y, then 89 * we add stream destination offsets (i.e 128 horizontal, 0 vertical). 90 * This will give us a plane rect's position in Timing Active. However 91 * we have to remove the fractional. The rule is that we find left/right 92 * and top/bottom positions and round the value to the adjacent integer. 93 * 94 * Stream Source Space 95 * ------------ 96 * __________________________________________________ 97 * |Stream Source (1920 x 1200) ^ | 98 * | y | 99 * | <------- w --------|> | 100 * | __________________V | 101 * |<-- x -->|Plane//////////////| ^ | 102 * | |(pre scale)////////| | | 103 * | |///////////////////| | | 104 * | |///////////////////| h | 105 * | |///////////////////| | | 106 * | |///////////////////| | | 107 * | |///////////////////| V | 108 * | | 109 * | | 110 * |__________________________________________________| 111 * 112 * 113 * Timing Active Space 114 * --------------------------------- 115 * 116 * Timing Active (2560 x 1440) 117 * __________________________________________________ 118 * |*****| Stteam Destination (2304 x 1440) |*****| 119 * |*****| |*****| 120 * |<128>| |*****| 121 * |*****| __________________ |*****| 122 * |*****| |Plane/////////////| |*****| 123 * |*****| |(post scale)//////| |*****| 124 * |*****| |//////////////////| |*****| 125 * |*****| |//////////////////| |*****| 126 * |*****| |//////////////////| |*****| 127 * |*****| |//////////////////| |*****| 128 * |*****| |*****| 129 * |*****| |*****| 130 * |*****| |*****| 131 * |*****|______________________________________|*****| 132 * 133 * So the resulting formulas are shown below: 134 * 135 * recout_x = 128 + round(plane_x * 2304 / 1920) 136 * recout_w = 128 + round((plane_x + plane_w) * 2304 / 1920) - recout_x 137 * recout_y = 0 + round(plane_y * 1440 / 1200) 138 * recout_h = 0 + round((plane_y + plane_h) * 1440 / 1200) - recout_y 139 * 140 * NOTE: fixed point division is not error free. To reduce errors 141 * introduced by fixed point division, we divide only after 142 * multiplication is complete. 143 */ 144 const struct spl_rect *stream_src = &spl_in->basic_out.src_rect; 145 const struct spl_rect *stream_dst = &spl_in->basic_out.dst_rect; 146 struct spl_rect rec_out = {0}; 147 struct spl_fixed31_32 temp; 148 149 150 temp = spl_fixpt_from_fraction(rec_in->x * (long long)stream_dst->width, 151 stream_src->width); 152 rec_out.x = stream_dst->x + spl_fixpt_round(temp); 153 154 temp = spl_fixpt_from_fraction( 155 (rec_in->x + rec_in->width) * (long long)stream_dst->width, 156 stream_src->width); 157 rec_out.width = stream_dst->x + spl_fixpt_round(temp) - rec_out.x; 158 159 temp = spl_fixpt_from_fraction(rec_in->y * (long long)stream_dst->height, 160 stream_src->height); 161 rec_out.y = stream_dst->y + spl_fixpt_round(temp); 162 163 temp = spl_fixpt_from_fraction( 164 (rec_in->y + rec_in->height) * (long long)stream_dst->height, 165 stream_src->height); 166 rec_out.height = stream_dst->y + spl_fixpt_round(temp) - rec_out.y; 167 168 return rec_out; 169 } 170 171 static struct spl_rect calculate_mpc_slice_in_timing_active( 172 struct spl_in *spl_in, 173 struct spl_rect *plane_clip_rec) 174 { 175 bool use_recout_width_aligned = 176 spl_in->basic_in.num_h_slices_recout_width_align.use_recout_width_aligned; 177 int mpc_slice_count = 178 spl_in->basic_in.num_h_slices_recout_width_align.num_slices_recout_width.mpc_num_h_slices; 179 int recout_width_align = 180 spl_in->basic_in.num_h_slices_recout_width_align.num_slices_recout_width.mpc_recout_width_align; 181 int mpc_slice_idx = spl_in->basic_in.mpc_h_slice_index; 182 int epimo = mpc_slice_count - plane_clip_rec->width % mpc_slice_count - 1; 183 struct spl_rect mpc_rec; 184 185 if (use_recout_width_aligned) { 186 mpc_rec.width = recout_width_align; 187 if ((mpc_rec.width * (mpc_slice_idx + 1)) > plane_clip_rec->width) { 188 mpc_rec.width = plane_clip_rec->width % recout_width_align; 189 mpc_rec.x = plane_clip_rec->x + recout_width_align * mpc_slice_idx; 190 } else 191 mpc_rec.x = plane_clip_rec->x + mpc_rec.width * mpc_slice_idx; 192 mpc_rec.height = plane_clip_rec->height; 193 mpc_rec.y = plane_clip_rec->y; 194 195 } else { 196 mpc_rec.width = plane_clip_rec->width / mpc_slice_count; 197 mpc_rec.x = plane_clip_rec->x + mpc_rec.width * mpc_slice_idx; 198 mpc_rec.height = plane_clip_rec->height; 199 mpc_rec.y = plane_clip_rec->y; 200 } 201 SPL_ASSERT(mpc_slice_count == 1 || 202 spl_in->basic_out.view_format != SPL_VIEW_3D_SIDE_BY_SIDE || 203 mpc_rec.width % 2 == 0); 204 205 /* extra pixels in the division remainder need to go to pipes after 206 * the extra pixel index minus one(epimo) defined here as: 207 */ 208 if (mpc_slice_idx > epimo) { 209 mpc_rec.x += mpc_slice_idx - epimo - 1; 210 mpc_rec.width += 1; 211 } 212 213 if (spl_in->basic_out.view_format == SPL_VIEW_3D_TOP_AND_BOTTOM) { 214 SPL_ASSERT(mpc_rec.height % 2 == 0); 215 mpc_rec.height /= 2; 216 } 217 return mpc_rec; 218 } 219 220 static struct spl_rect calculate_odm_slice_in_timing_active(struct spl_in *spl_in) 221 { 222 int odm_slice_count = spl_in->basic_out.odm_combine_factor; 223 int odm_slice_idx = spl_in->odm_slice_index; 224 bool is_last_odm_slice = (odm_slice_idx + 1) == odm_slice_count; 225 int h_active = spl_in->basic_out.output_size.width; 226 int v_active = spl_in->basic_out.output_size.height; 227 int odm_slice_width; 228 struct spl_rect odm_rec; 229 230 if (spl_in->basic_out.odm_combine_factor > 0) { 231 odm_slice_width = h_active / odm_slice_count; 232 /* 233 * deprecated, caller must pass in odm slice rect i.e OPP input 234 * rect in timing active for the new interface. 235 */ 236 if (spl_in->basic_out.use_two_pixels_per_container && (odm_slice_width % 2)) 237 odm_slice_width++; 238 239 odm_rec.x = odm_slice_width * odm_slice_idx; 240 odm_rec.width = is_last_odm_slice ? 241 /* last slice width is the reminder of h_active */ 242 h_active - odm_slice_width * (odm_slice_count - 1) : 243 /* odm slice width is the floor of h_active / count */ 244 odm_slice_width; 245 odm_rec.y = 0; 246 odm_rec.height = v_active; 247 248 return odm_rec; 249 } 250 251 return spl_in->basic_out.odm_slice_rect; 252 } 253 254 static void spl_calculate_recout(struct spl_in *spl_in, struct spl_scratch *spl_scratch, struct spl_out *spl_out) 255 { 256 /* 257 * A plane clip represents the desired plane size and position in Stream 258 * Source Space. Stream Source is the destination where all planes are 259 * blended (i.e. positioned, scaled and overlaid). It is a canvas where 260 * all planes associated with the current stream are drawn together. 261 * After Stream Source is completed, we will further scale and 262 * reposition the entire canvas of the stream source to Stream 263 * Destination in Timing Active Space. This could be due to display 264 * overscan adjustment where we will need to rescale and reposition all 265 * the planes so they can fit into a TV with overscan or downscale 266 * upscale features such as GPU scaling or VSR. 267 * 268 * This two step blending is a virtual procedure in software. In 269 * hardware there is no such thing as Stream Source. all planes are 270 * blended once in Timing Active Space. Software virtualizes a Stream 271 * Source space to decouple the math complicity so scaling param 272 * calculation focuses on one step at a time. 273 * 274 * In the following two diagrams, user applied 10% overscan adjustment 275 * so the Stream Source needs to be scaled down a little before mapping 276 * to Timing Active Space. As a result the Plane Clip is also scaled 277 * down by the same ratio, Plane Clip position (i.e. x and y) with 278 * respect to Stream Source is also scaled down. To map it in Timing 279 * Active Space additional x and y offsets from Stream Destination are 280 * added to Plane Clip as well. 281 * 282 * Stream Source Space 283 * ------------ 284 * __________________________________________________ 285 * |Stream Source (3840 x 2160) ^ | 286 * | y | 287 * | | | 288 * | __________________V | 289 * |<-- x -->|Plane Clip/////////| | 290 * | |(pre scale)////////| | 291 * | |///////////////////| | 292 * | |///////////////////| | 293 * | |///////////////////| | 294 * | |///////////////////| | 295 * | |///////////////////| | 296 * | | 297 * | | 298 * |__________________________________________________| 299 * 300 * 301 * Timing Active Space (3840 x 2160) 302 * --------------------------------- 303 * 304 * Timing Active 305 * __________________________________________________ 306 * | y_____________________________________________ | 307 * |x |Stream Destination (3456 x 1944) | | 308 * | | | | 309 * | | __________________ | | 310 * | | |Plane Clip////////| | | 311 * | | |(post scale)//////| | | 312 * | | |//////////////////| | | 313 * | | |//////////////////| | | 314 * | | |//////////////////| | | 315 * | | |//////////////////| | | 316 * | | | | 317 * | | | | 318 * | |____________________________________________| | 319 * |__________________________________________________| 320 * 321 * 322 * In Timing Active Space a plane clip could be further sliced into 323 * pieces called MPC slices. Each Pipe Context is responsible for 324 * processing only one MPC slice so the plane processing workload can be 325 * distributed to multiple DPP Pipes. MPC slices could be blended 326 * together to a single ODM slice. Each ODM slice is responsible for 327 * processing a portion of Timing Active divided horizontally so the 328 * output pixel processing workload can be distributed to multiple OPP 329 * pipes. All ODM slices are mapped together in ODM block so all MPC 330 * slices belong to different ODM slices could be pieced together to 331 * form a single image in Timing Active. MPC slices must belong to 332 * single ODM slice. If an MPC slice goes across ODM slice boundary, it 333 * needs to be divided into two MPC slices one for each ODM slice. 334 * 335 * In the following diagram the output pixel processing workload is 336 * divided horizontally into two ODM slices one for each OPP blend tree. 337 * OPP0 blend tree is responsible for processing left half of Timing 338 * Active, while OPP2 blend tree is responsible for processing right 339 * half. 340 * 341 * The plane has two MPC slices. However since the right MPC slice goes 342 * across ODM boundary, two DPP pipes are needed one for each OPP blend 343 * tree. (i.e. DPP1 for OPP0 blend tree and DPP2 for OPP2 blend tree). 344 * 345 * Assuming that we have a Pipe Context associated with OPP0 and DPP1 346 * working on processing the plane in the diagram. We want to know the 347 * width and height of the shaded rectangle and its relative position 348 * with respect to the ODM slice0. This is called the recout of the pipe 349 * context. 350 * 351 * Planes can be at arbitrary size and position and there could be an 352 * arbitrary number of MPC and ODM slices. The algorithm needs to take 353 * all scenarios into account. 354 * 355 * Timing Active Space (3840 x 2160) 356 * --------------------------------- 357 * 358 * Timing Active 359 * __________________________________________________ 360 * |OPP0(ODM slice0)^ |OPP2(ODM slice1) | 361 * | y | | 362 * | | <- w -> | 363 * | _____V________|____ | 364 * | |DPP0 ^ |DPP1 |DPP2| | 365 * |<------ x |-----|->|/////| | | 366 * | | | |/////| | | 367 * | | h |/////| | | 368 * | | | |/////| | | 369 * | |_____V__|/////|____| | 370 * | | | 371 * | | | 372 * | | | 373 * |_________________________|________________________| 374 * 375 * 376 */ 377 struct spl_rect plane_clip; 378 struct spl_rect mpc_slice_of_plane_clip; 379 struct spl_rect odm_slice; 380 struct spl_rect overlapping_area; 381 382 plane_clip = calculate_plane_rec_in_timing_active(spl_in, 383 &spl_in->basic_in.clip_rect); 384 /* guard plane clip from drawing beyond stream dst here */ 385 plane_clip = intersect_rec(&plane_clip, 386 &spl_in->basic_out.dst_rect); 387 mpc_slice_of_plane_clip = calculate_mpc_slice_in_timing_active( 388 spl_in, &plane_clip); 389 odm_slice = calculate_odm_slice_in_timing_active(spl_in); 390 overlapping_area = intersect_rec(&mpc_slice_of_plane_clip, &odm_slice); 391 392 if (overlapping_area.height > 0 && 393 overlapping_area.width > 0) { 394 /* shift the overlapping area so it is with respect to current 395 * ODM slice's position 396 */ 397 spl_scratch->scl_data.recout = shift_rec( 398 &overlapping_area, 399 -odm_slice.x, -odm_slice.y); 400 spl_scratch->scl_data.recout.height -= 401 spl_in->debug.visual_confirm_base_offset; 402 spl_scratch->scl_data.recout.height -= 403 spl_in->debug.visual_confirm_dpp_offset; 404 } else 405 /* if there is no overlap, zero recout */ 406 memset(&spl_scratch->scl_data.recout, 0, 407 sizeof(struct spl_rect)); 408 } 409 410 /* Calculate scaling ratios */ 411 static void spl_calculate_scaling_ratios(struct spl_in *spl_in, 412 struct spl_scratch *spl_scratch, 413 struct spl_out *spl_out) 414 { 415 const int in_w = spl_in->basic_out.src_rect.width; 416 const int in_h = spl_in->basic_out.src_rect.height; 417 const int out_w = spl_in->basic_out.dst_rect.width; 418 const int out_h = spl_in->basic_out.dst_rect.height; 419 struct spl_rect surf_src = spl_in->basic_in.src_rect; 420 421 /*Swap surf_src height and width since scaling ratios are in recout rotation*/ 422 if (spl_in->basic_in.rotation == SPL_ROTATION_ANGLE_90 || 423 spl_in->basic_in.rotation == SPL_ROTATION_ANGLE_270) 424 spl_swap(surf_src.height, surf_src.width); 425 426 spl_scratch->scl_data.ratios.horz = spl_fixpt_from_fraction( 427 surf_src.width, 428 spl_in->basic_in.dst_rect.width); 429 spl_scratch->scl_data.ratios.vert = spl_fixpt_from_fraction( 430 surf_src.height, 431 spl_in->basic_in.dst_rect.height); 432 433 if (spl_in->basic_out.view_format == SPL_VIEW_3D_SIDE_BY_SIDE) 434 spl_scratch->scl_data.ratios.horz.value *= 2; 435 else if (spl_in->basic_out.view_format == SPL_VIEW_3D_TOP_AND_BOTTOM) 436 spl_scratch->scl_data.ratios.vert.value *= 2; 437 438 spl_scratch->scl_data.ratios.vert.value = spl_div64_s64( 439 spl_scratch->scl_data.ratios.vert.value * in_h, out_h); 440 spl_scratch->scl_data.ratios.horz.value = spl_div64_s64( 441 spl_scratch->scl_data.ratios.horz.value * in_w, out_w); 442 443 spl_scratch->scl_data.ratios.horz_c = spl_scratch->scl_data.ratios.horz; 444 spl_scratch->scl_data.ratios.vert_c = spl_scratch->scl_data.ratios.vert; 445 446 if (spl_is_yuv420(spl_in->basic_in.format)) { 447 spl_scratch->scl_data.ratios.horz_c.value /= 2; 448 spl_scratch->scl_data.ratios.vert_c.value /= 2; 449 } 450 spl_scratch->scl_data.ratios.horz = spl_fixpt_truncate( 451 spl_scratch->scl_data.ratios.horz, 19); 452 spl_scratch->scl_data.ratios.vert = spl_fixpt_truncate( 453 spl_scratch->scl_data.ratios.vert, 19); 454 spl_scratch->scl_data.ratios.horz_c = spl_fixpt_truncate( 455 spl_scratch->scl_data.ratios.horz_c, 19); 456 spl_scratch->scl_data.ratios.vert_c = spl_fixpt_truncate( 457 spl_scratch->scl_data.ratios.vert_c, 19); 458 459 /* 460 * Coefficient table and some registers are different based on ratio 461 * that is output/input. Currently we calculate input/output 462 * Store 1/ratio in recip_ratio for those lookups 463 */ 464 spl_scratch->scl_data.recip_ratios.horz = spl_fixpt_recip( 465 spl_scratch->scl_data.ratios.horz); 466 spl_scratch->scl_data.recip_ratios.vert = spl_fixpt_recip( 467 spl_scratch->scl_data.ratios.vert); 468 spl_scratch->scl_data.recip_ratios.horz_c = spl_fixpt_recip( 469 spl_scratch->scl_data.ratios.horz_c); 470 spl_scratch->scl_data.recip_ratios.vert_c = spl_fixpt_recip( 471 spl_scratch->scl_data.ratios.vert_c); 472 } 473 474 /* Calculate Viewport size */ 475 static void spl_calculate_viewport_size(struct spl_in *spl_in, struct spl_scratch *spl_scratch) 476 { 477 spl_scratch->scl_data.viewport.width = spl_fixpt_ceil(spl_fixpt_mul_int(spl_scratch->scl_data.ratios.horz, 478 spl_scratch->scl_data.recout.width)); 479 spl_scratch->scl_data.viewport.height = spl_fixpt_ceil(spl_fixpt_mul_int(spl_scratch->scl_data.ratios.vert, 480 spl_scratch->scl_data.recout.height)); 481 spl_scratch->scl_data.viewport_c.width = spl_fixpt_ceil(spl_fixpt_mul_int(spl_scratch->scl_data.ratios.horz_c, 482 spl_scratch->scl_data.recout.width)); 483 spl_scratch->scl_data.viewport_c.height = spl_fixpt_ceil(spl_fixpt_mul_int(spl_scratch->scl_data.ratios.vert_c, 484 spl_scratch->scl_data.recout.height)); 485 if (spl_in->basic_in.rotation == SPL_ROTATION_ANGLE_90 || 486 spl_in->basic_in.rotation == SPL_ROTATION_ANGLE_270) { 487 spl_swap(spl_scratch->scl_data.viewport.width, spl_scratch->scl_data.viewport.height); 488 spl_swap(spl_scratch->scl_data.viewport_c.width, spl_scratch->scl_data.viewport_c.height); 489 } 490 } 491 492 static void spl_get_vp_scan_direction(enum spl_rotation_angle rotation, 493 bool horizontal_mirror, 494 bool *orthogonal_rotation, 495 bool *flip_vert_scan_dir, 496 bool *flip_horz_scan_dir) 497 { 498 *orthogonal_rotation = false; 499 *flip_vert_scan_dir = false; 500 *flip_horz_scan_dir = false; 501 if (rotation == SPL_ROTATION_ANGLE_180) { 502 *flip_vert_scan_dir = true; 503 *flip_horz_scan_dir = true; 504 } else if (rotation == SPL_ROTATION_ANGLE_90) { 505 *orthogonal_rotation = true; 506 *flip_horz_scan_dir = true; 507 } else if (rotation == SPL_ROTATION_ANGLE_270) { 508 *orthogonal_rotation = true; 509 *flip_vert_scan_dir = true; 510 } 511 512 if (horizontal_mirror) 513 *flip_horz_scan_dir = !*flip_horz_scan_dir; 514 } 515 516 /* 517 * We completely calculate vp offset, size and inits here based entirely on scaling 518 * ratios and recout for pixel perfect pipe combine. 519 */ 520 static void spl_calculate_init_and_vp(bool flip_scan_dir, 521 int recout_offset_within_recout_full, 522 int recout_size, 523 int src_size, 524 int taps, 525 struct spl_fixed31_32 ratio, 526 struct spl_fixed31_32 init_adj, 527 struct spl_fixed31_32 *init, 528 int *vp_offset, 529 int *vp_size) 530 { 531 struct spl_fixed31_32 temp; 532 int int_part; 533 534 /* 535 * First of the taps starts sampling pixel number <init_int_part> corresponding to recout 536 * pixel 1. Next recout pixel samples int part of <init + scaling ratio> and so on. 537 * All following calculations are based on this logic. 538 * 539 * Init calculated according to formula: 540 * init = (scaling_ratio + number_of_taps + 1) / 2 541 * init_bot = init + scaling_ratio 542 * to get pixel perfect combine add the fraction from calculating vp offset 543 */ 544 temp = spl_fixpt_mul_int(ratio, recout_offset_within_recout_full); 545 *vp_offset = spl_fixpt_floor(temp); 546 temp.value &= 0xffffffff; 547 *init = spl_fixpt_add(spl_fixpt_div_int(spl_fixpt_add_int(ratio, taps + 1), 2), temp); 548 *init = spl_fixpt_add(*init, init_adj); 549 *init = spl_fixpt_truncate(*init, 19); 550 551 /* 552 * If viewport has non 0 offset and there are more taps than covered by init then 553 * we should decrease the offset and increase init so we are never sampling 554 * outside of viewport. 555 */ 556 int_part = spl_fixpt_floor(*init); 557 if (int_part < taps) { 558 int_part = taps - int_part; 559 if (int_part > *vp_offset) 560 int_part = *vp_offset; 561 *vp_offset -= int_part; 562 *init = spl_fixpt_add_int(*init, int_part); 563 } 564 /* 565 * If taps are sampling outside of viewport at end of recout and there are more pixels 566 * available in the surface we should increase the viewport size, regardless set vp to 567 * only what is used. 568 */ 569 temp = spl_fixpt_add(*init, spl_fixpt_mul_int(ratio, recout_size - 1)); 570 *vp_size = spl_fixpt_floor(temp); 571 if (*vp_size + *vp_offset > src_size) 572 *vp_size = src_size - *vp_offset; 573 574 /* We did all the math assuming we are scanning same direction as display does, 575 * however mirror/rotation changes how vp scans vs how it is offset. If scan direction 576 * is flipped we simply need to calculate offset from the other side of plane. 577 * Note that outside of viewport all scaling hardware works in recout space. 578 */ 579 if (flip_scan_dir) 580 *vp_offset = src_size - *vp_offset - *vp_size; 581 } 582 583 /*Calculate inits and viewport */ 584 static void spl_calculate_inits_and_viewports(struct spl_in *spl_in, 585 struct spl_scratch *spl_scratch) 586 { 587 struct spl_rect src = spl_in->basic_in.src_rect; 588 struct spl_rect recout_dst_in_active_timing; 589 struct spl_rect recout_clip_in_active_timing; 590 struct spl_rect recout_clip_in_recout_dst; 591 struct spl_rect overlap_in_active_timing; 592 struct spl_rect odm_slice = calculate_odm_slice_in_timing_active(spl_in); 593 int vpc_div = spl_is_subsampled_format(spl_in->basic_in.format) ? 2 : 1; 594 bool orthogonal_rotation, flip_vert_scan_dir, flip_horz_scan_dir; 595 struct spl_fixed31_32 init_adj_h = spl_fixpt_zero; 596 struct spl_fixed31_32 init_adj_v = spl_fixpt_zero; 597 598 recout_clip_in_active_timing = shift_rec( 599 &spl_scratch->scl_data.recout, odm_slice.x, odm_slice.y); 600 recout_dst_in_active_timing = calculate_plane_rec_in_timing_active( 601 spl_in, &spl_in->basic_in.dst_rect); 602 overlap_in_active_timing = intersect_rec(&recout_clip_in_active_timing, 603 &recout_dst_in_active_timing); 604 if (overlap_in_active_timing.width > 0 && 605 overlap_in_active_timing.height > 0) 606 recout_clip_in_recout_dst = shift_rec(&overlap_in_active_timing, 607 -recout_dst_in_active_timing.x, 608 -recout_dst_in_active_timing.y); 609 else 610 memset(&recout_clip_in_recout_dst, 0, sizeof(struct spl_rect)); 611 /* 612 * Work in recout rotation since that requires less transformations 613 */ 614 spl_get_vp_scan_direction( 615 spl_in->basic_in.rotation, 616 spl_in->basic_in.horizontal_mirror, 617 &orthogonal_rotation, 618 &flip_vert_scan_dir, 619 &flip_horz_scan_dir); 620 621 if (spl_is_subsampled_format(spl_in->basic_in.format)) { 622 /* this gives the direction of the cositing (negative will move 623 * left, right otherwise) 624 */ 625 int sign = 1; 626 627 switch (spl_in->basic_in.cositing) { 628 629 case CHROMA_COSITING_TOPLEFT: 630 init_adj_h = spl_fixpt_from_fraction(sign, 4); 631 init_adj_v = spl_fixpt_from_fraction(sign, 4); 632 break; 633 case CHROMA_COSITING_LEFT: 634 init_adj_h = spl_fixpt_from_fraction(sign, 4); 635 init_adj_v = spl_fixpt_zero; 636 break; 637 case CHROMA_COSITING_NONE: 638 default: 639 init_adj_h = spl_fixpt_zero; 640 init_adj_v = spl_fixpt_zero; 641 break; 642 } 643 } 644 645 if (orthogonal_rotation) { 646 spl_swap(src.width, src.height); 647 spl_swap(flip_vert_scan_dir, flip_horz_scan_dir); 648 spl_swap(init_adj_h, init_adj_v); 649 } 650 651 spl_calculate_init_and_vp( 652 flip_horz_scan_dir, 653 recout_clip_in_recout_dst.x, 654 spl_scratch->scl_data.recout.width, 655 src.width, 656 spl_scratch->scl_data.taps.h_taps, 657 spl_scratch->scl_data.ratios.horz, 658 spl_fixpt_zero, 659 &spl_scratch->scl_data.inits.h, 660 &spl_scratch->scl_data.viewport.x, 661 &spl_scratch->scl_data.viewport.width); 662 spl_calculate_init_and_vp( 663 flip_horz_scan_dir, 664 recout_clip_in_recout_dst.x, 665 spl_scratch->scl_data.recout.width, 666 src.width / vpc_div, 667 spl_scratch->scl_data.taps.h_taps_c, 668 spl_scratch->scl_data.ratios.horz_c, 669 init_adj_h, 670 &spl_scratch->scl_data.inits.h_c, 671 &spl_scratch->scl_data.viewport_c.x, 672 &spl_scratch->scl_data.viewport_c.width); 673 spl_calculate_init_and_vp( 674 flip_vert_scan_dir, 675 recout_clip_in_recout_dst.y, 676 spl_scratch->scl_data.recout.height, 677 src.height, 678 spl_scratch->scl_data.taps.v_taps, 679 spl_scratch->scl_data.ratios.vert, 680 spl_fixpt_zero, 681 &spl_scratch->scl_data.inits.v, 682 &spl_scratch->scl_data.viewport.y, 683 &spl_scratch->scl_data.viewport.height); 684 spl_calculate_init_and_vp( 685 flip_vert_scan_dir, 686 recout_clip_in_recout_dst.y, 687 spl_scratch->scl_data.recout.height, 688 src.height / vpc_div, 689 spl_scratch->scl_data.taps.v_taps_c, 690 spl_scratch->scl_data.ratios.vert_c, 691 init_adj_v, 692 &spl_scratch->scl_data.inits.v_c, 693 &spl_scratch->scl_data.viewport_c.y, 694 &spl_scratch->scl_data.viewport_c.height); 695 if (orthogonal_rotation) { 696 spl_swap(spl_scratch->scl_data.viewport.x, spl_scratch->scl_data.viewport.y); 697 spl_swap(spl_scratch->scl_data.viewport.width, spl_scratch->scl_data.viewport.height); 698 spl_swap(spl_scratch->scl_data.viewport_c.x, spl_scratch->scl_data.viewport_c.y); 699 spl_swap(spl_scratch->scl_data.viewport_c.width, spl_scratch->scl_data.viewport_c.height); 700 } 701 spl_scratch->scl_data.viewport.x += src.x; 702 spl_scratch->scl_data.viewport.y += src.y; 703 SPL_ASSERT(src.x % vpc_div == 0 && src.y % vpc_div == 0); 704 spl_scratch->scl_data.viewport_c.x += src.x / vpc_div; 705 spl_scratch->scl_data.viewport_c.y += src.y / vpc_div; 706 } 707 708 static void spl_handle_3d_recout(struct spl_in *spl_in, struct spl_rect *recout) 709 { 710 /* 711 * Handle side by side and top bottom 3d recout offsets after vp calculation 712 * since 3d is special and needs to calculate vp as if there is no recout offset 713 * This may break with rotation, good thing we aren't mixing hw rotation and 3d 714 */ 715 if (spl_in->basic_in.mpc_h_slice_index) { 716 SPL_ASSERT(spl_in->basic_in.rotation == SPL_ROTATION_ANGLE_0 || 717 (spl_in->basic_out.view_format != SPL_VIEW_3D_TOP_AND_BOTTOM && 718 spl_in->basic_out.view_format != SPL_VIEW_3D_SIDE_BY_SIDE)); 719 if (spl_in->basic_out.view_format == SPL_VIEW_3D_TOP_AND_BOTTOM) 720 recout->y += recout->height; 721 else if (spl_in->basic_out.view_format == SPL_VIEW_3D_SIDE_BY_SIDE) 722 recout->x += recout->width; 723 } 724 } 725 726 static void spl_clamp_viewport(struct spl_rect *viewport) 727 { 728 /* Clamp minimum viewport size */ 729 if (viewport->height < MIN_VIEWPORT_SIZE) 730 viewport->height = MIN_VIEWPORT_SIZE; 731 if (viewport->width < MIN_VIEWPORT_SIZE) 732 viewport->width = MIN_VIEWPORT_SIZE; 733 } 734 735 static enum scl_mode spl_get_dscl_mode(const struct spl_in *spl_in, 736 const struct spl_scaler_data *data, 737 bool enable_isharp, bool enable_easf) 738 { 739 const long long one = spl_fixpt_one.value; 740 enum spl_pixel_format pixel_format = spl_in->basic_in.format; 741 742 /* Bypass if ratio is 1:1 with no ISHARP or force scale on */ 743 if (data->ratios.horz.value == one 744 && data->ratios.vert.value == one 745 && data->ratios.horz_c.value == one 746 && data->ratios.vert_c.value == one 747 && !spl_in->basic_out.always_scale 748 && !enable_isharp) 749 return SCL_MODE_SCALING_444_BYPASS; 750 751 if (!spl_is_subsampled_format(pixel_format)) { 752 if (spl_is_video_format(pixel_format)) 753 return SCL_MODE_SCALING_444_YCBCR_ENABLE; 754 else 755 return SCL_MODE_SCALING_444_RGB_ENABLE; 756 } 757 758 /* 759 * Bypass YUV if Y is 1:1 with no ISHARP 760 * Do not bypass UV at 1:1 for cositing to be applied 761 */ 762 if (!enable_isharp) { 763 if (data->ratios.horz.value == one && data->ratios.vert.value == one) 764 return SCL_MODE_SCALING_420_LUMA_BYPASS; 765 } 766 767 return SCL_MODE_SCALING_420_YCBCR_ENABLE; 768 } 769 770 static void spl_choose_lls_policy(enum spl_pixel_format format, 771 enum linear_light_scaling *lls_pref) 772 { 773 if (spl_is_subsampled_format(format)) 774 *lls_pref = LLS_PREF_NO; 775 else /* RGB or YUV444 */ 776 *lls_pref = LLS_PREF_YES; 777 } 778 779 /* Enable EASF ?*/ 780 static bool enable_easf(struct spl_in *spl_in, struct spl_scratch *spl_scratch) 781 { 782 int vratio = 0; 783 int hratio = 0; 784 bool skip_easf = false; 785 786 if (spl_in->disable_easf) 787 skip_easf = true; 788 789 vratio = spl_fixpt_ceil(spl_scratch->scl_data.ratios.vert); 790 hratio = spl_fixpt_ceil(spl_scratch->scl_data.ratios.horz); 791 792 /* 793 * No EASF support for downscaling > 2:1 794 * EASF support for upscaling or downscaling up to 2:1 795 */ 796 if ((vratio > 2) || (hratio > 2)) 797 skip_easf = true; 798 799 /* 800 * If lls_pref is LLS_PREF_DONT_CARE, then use pixel format 801 * to determine whether to use LINEAR or NONLINEAR scaling 802 */ 803 if (spl_in->lls_pref == LLS_PREF_DONT_CARE) 804 spl_choose_lls_policy(spl_in->basic_in.format, 805 &spl_in->lls_pref); 806 807 /* Check for linear scaling or EASF preferred */ 808 if (spl_in->lls_pref != LLS_PREF_YES && !spl_in->prefer_easf) 809 skip_easf = true; 810 811 return skip_easf; 812 } 813 814 /* Check if video is in fullscreen mode */ 815 static bool spl_is_video_fullscreen(struct spl_in *spl_in) 816 { 817 if (spl_is_video_format(spl_in->basic_in.format) && spl_in->is_fullscreen) 818 return true; 819 return false; 820 } 821 822 static bool spl_get_isharp_en(struct spl_in *spl_in, 823 struct spl_scratch *spl_scratch) 824 { 825 bool enable_isharp = false; 826 int vratio = 0; 827 int hratio = 0; 828 struct spl_taps taps = spl_scratch->scl_data.taps; 829 bool fullscreen = spl_is_video_fullscreen(spl_in); 830 831 /* Return if adaptive sharpness is disabled */ 832 if (spl_in->adaptive_sharpness.enable == false) 833 return enable_isharp; 834 835 vratio = spl_fixpt_ceil(spl_scratch->scl_data.ratios.vert); 836 hratio = spl_fixpt_ceil(spl_scratch->scl_data.ratios.horz); 837 838 /* No iSHARP support for downscaling */ 839 if (vratio > 1 || hratio > 1) 840 return enable_isharp; 841 842 // Scaling is up to 1:1 (no scaling) or upscaling 843 844 /* 845 * Apply sharpness to RGB and YUV (NV12/P010) 846 * surfaces based on policy setting 847 */ 848 if (!spl_is_video_format(spl_in->basic_in.format) && 849 (spl_in->sharpen_policy == SHARPEN_YUV)) 850 return enable_isharp; 851 else if ((spl_is_video_format(spl_in->basic_in.format) && !fullscreen) && 852 (spl_in->sharpen_policy == SHARPEN_RGB_FULLSCREEN_YUV)) 853 return enable_isharp; 854 else if (!spl_in->is_fullscreen && 855 spl_in->sharpen_policy == SHARPEN_FULLSCREEN_ALL) 856 return enable_isharp; 857 858 /* 859 * Apply sharpness if supports horizontal taps 4,6 AND 860 * vertical taps 3, 4, 6 861 */ 862 if ((taps.h_taps == 4 || taps.h_taps == 6) && 863 (taps.v_taps == 3 || taps.v_taps == 4 || taps.v_taps == 6)) 864 enable_isharp = true; 865 866 return enable_isharp; 867 } 868 869 /* Calculate number of tap with adaptive scaling off */ 870 static void spl_get_taps_non_adaptive_scaler( 871 struct spl_scratch *spl_scratch, const struct spl_taps *in_taps) 872 { 873 if (in_taps->h_taps == 0) { 874 if (spl_fixpt_ceil(spl_scratch->scl_data.ratios.horz) > 1) 875 spl_scratch->scl_data.taps.h_taps = spl_min(2 * spl_fixpt_ceil( 876 spl_scratch->scl_data.ratios.horz), 8); 877 else 878 spl_scratch->scl_data.taps.h_taps = 4; 879 } else 880 spl_scratch->scl_data.taps.h_taps = in_taps->h_taps; 881 882 if (in_taps->v_taps == 0) { 883 if (spl_fixpt_ceil(spl_scratch->scl_data.ratios.vert) > 1) 884 spl_scratch->scl_data.taps.v_taps = spl_min(2 * spl_fixpt_ceil( 885 spl_scratch->scl_data.ratios.vert), 8); 886 else 887 spl_scratch->scl_data.taps.v_taps = 4; 888 } else 889 spl_scratch->scl_data.taps.v_taps = in_taps->v_taps; 890 891 if (in_taps->v_taps_c == 0) { 892 if (spl_fixpt_ceil(spl_scratch->scl_data.ratios.vert_c) > 1) 893 spl_scratch->scl_data.taps.v_taps_c = spl_min(2 * spl_fixpt_ceil( 894 spl_scratch->scl_data.ratios.vert_c), 8); 895 else 896 spl_scratch->scl_data.taps.v_taps_c = 4; 897 } else 898 spl_scratch->scl_data.taps.v_taps_c = in_taps->v_taps_c; 899 900 if (in_taps->h_taps_c == 0) { 901 if (spl_fixpt_ceil(spl_scratch->scl_data.ratios.horz_c) > 1) 902 spl_scratch->scl_data.taps.h_taps_c = spl_min(2 * spl_fixpt_ceil( 903 spl_scratch->scl_data.ratios.horz_c), 8); 904 else 905 spl_scratch->scl_data.taps.h_taps_c = 4; 906 } else if ((in_taps->h_taps_c % 2) != 0 && in_taps->h_taps_c != 1) 907 /* Only 1 and even h_taps_c are supported by hw */ 908 spl_scratch->scl_data.taps.h_taps_c = in_taps->h_taps_c - 1; 909 else 910 spl_scratch->scl_data.taps.h_taps_c = in_taps->h_taps_c; 911 912 if (IDENTITY_RATIO(spl_scratch->scl_data.ratios.horz)) 913 spl_scratch->scl_data.taps.h_taps = 1; 914 if (IDENTITY_RATIO(spl_scratch->scl_data.ratios.vert)) 915 spl_scratch->scl_data.taps.v_taps = 1; 916 if (IDENTITY_RATIO(spl_scratch->scl_data.ratios.horz_c)) 917 spl_scratch->scl_data.taps.h_taps_c = 1; 918 if (IDENTITY_RATIO(spl_scratch->scl_data.ratios.vert_c)) 919 spl_scratch->scl_data.taps.v_taps_c = 1; 920 921 } 922 923 /* Calculate optimal number of taps */ 924 static bool spl_get_optimal_number_of_taps( 925 int max_downscale_src_width, struct spl_in *spl_in, struct spl_scratch *spl_scratch, 926 const struct spl_taps *in_taps, bool *enable_easf_v, bool *enable_easf_h, 927 bool *enable_isharp) 928 { 929 int num_part_y, num_part_c; 930 int max_taps_y, max_taps_c; 931 int min_taps_y, min_taps_c; 932 enum lb_memory_config lb_config; 933 bool skip_easf = false; 934 bool is_subsampled = spl_is_subsampled_format(spl_in->basic_in.format); 935 936 if (spl_scratch->scl_data.viewport.width > spl_scratch->scl_data.h_active && 937 max_downscale_src_width != 0 && 938 spl_scratch->scl_data.viewport.width > max_downscale_src_width) { 939 spl_get_taps_non_adaptive_scaler(spl_scratch, in_taps); 940 *enable_easf_v = false; 941 *enable_easf_h = false; 942 *enable_isharp = false; 943 return false; 944 } 945 946 /* Disable adaptive scaler and sharpener when integer scaling is enabled */ 947 if (spl_in->scaling_quality.integer_scaling) { 948 spl_get_taps_non_adaptive_scaler(spl_scratch, in_taps); 949 *enable_easf_v = false; 950 *enable_easf_h = false; 951 *enable_isharp = false; 952 return true; 953 } 954 955 /* Check if we are using EASF or not */ 956 skip_easf = enable_easf(spl_in, spl_scratch); 957 958 /* 959 * Set default taps if none are provided 960 * From programming guide: taps = min{ ceil(2*H_RATIO,1), 8} for downscaling 961 * taps = 4 for upscaling 962 */ 963 if (skip_easf) 964 spl_get_taps_non_adaptive_scaler(spl_scratch, in_taps); 965 else { 966 if (spl_is_video_format(spl_in->basic_in.format)) { 967 spl_scratch->scl_data.taps.h_taps = 6; 968 spl_scratch->scl_data.taps.v_taps = 6; 969 spl_scratch->scl_data.taps.h_taps_c = 4; 970 spl_scratch->scl_data.taps.v_taps_c = 4; 971 } else { /* RGB */ 972 spl_scratch->scl_data.taps.h_taps = 6; 973 spl_scratch->scl_data.taps.v_taps = 6; 974 spl_scratch->scl_data.taps.h_taps_c = 6; 975 spl_scratch->scl_data.taps.v_taps_c = 6; 976 } 977 } 978 979 /*Ensure we can support the requested number of vtaps*/ 980 min_taps_y = spl_fixpt_ceil(spl_scratch->scl_data.ratios.vert); 981 min_taps_c = spl_fixpt_ceil(spl_scratch->scl_data.ratios.vert_c); 982 983 /* Use LB_MEMORY_CONFIG_3 for 4:2:0 */ 984 if (spl_is_yuv420(spl_in->basic_in.format)) 985 lb_config = LB_MEMORY_CONFIG_3; 986 else 987 lb_config = LB_MEMORY_CONFIG_0; 988 // Determine max vtap support by calculating how much line buffer can fit 989 spl_in->callbacks.spl_calc_lb_num_partitions(spl_in->basic_out.alpha_en, &spl_scratch->scl_data, 990 lb_config, &num_part_y, &num_part_c); 991 /* MAX_V_TAPS = MIN (NUM_LINES - MAX(CEILING(V_RATIO,1)-2, 0), 8) */ 992 if (spl_fixpt_ceil(spl_scratch->scl_data.ratios.vert) > 2) 993 max_taps_y = num_part_y - (spl_fixpt_ceil(spl_scratch->scl_data.ratios.vert) - 2); 994 else 995 max_taps_y = num_part_y; 996 997 if (spl_fixpt_ceil(spl_scratch->scl_data.ratios.vert_c) > 2) 998 max_taps_c = num_part_c - (spl_fixpt_ceil(spl_scratch->scl_data.ratios.vert_c) - 2); 999 else 1000 max_taps_c = num_part_c; 1001 1002 if (max_taps_y < min_taps_y) 1003 return false; 1004 else if (max_taps_c < min_taps_c) 1005 return false; 1006 1007 if (spl_scratch->scl_data.taps.v_taps > max_taps_y) 1008 spl_scratch->scl_data.taps.v_taps = max_taps_y; 1009 1010 if (spl_scratch->scl_data.taps.v_taps_c > max_taps_c) 1011 spl_scratch->scl_data.taps.v_taps_c = max_taps_c; 1012 1013 if (!skip_easf) { 1014 /* 1015 * RGB ( L + NL ) and Linear HDR support 6x6, 6x4, 6x3, 4x4, 4x3 1016 * NL YUV420 only supports 6x6, 6x4 for Y and 4x4 for UV 1017 * 1018 * If LB does not support 3, 4, or 6 taps, then disable EASF_V 1019 * and only enable EASF_H. So for RGB, support 6x2, 4x2 1020 * and for NL YUV420, support 6x2 for Y and 4x2 for UV 1021 * 1022 * All other cases, have to disable EASF_V and EASF_H 1023 * 1024 * If optimal no of taps is 5, then set it to 4 1025 * If optimal no of taps is 7 or 8, then fine since max tap is 6 1026 * 1027 */ 1028 if (spl_scratch->scl_data.taps.v_taps == 5) 1029 spl_scratch->scl_data.taps.v_taps = 4; 1030 1031 if (spl_scratch->scl_data.taps.v_taps_c == 5) 1032 spl_scratch->scl_data.taps.v_taps_c = 4; 1033 1034 if (spl_scratch->scl_data.taps.h_taps == 5) 1035 spl_scratch->scl_data.taps.h_taps = 4; 1036 1037 if (spl_scratch->scl_data.taps.h_taps_c == 5) 1038 spl_scratch->scl_data.taps.h_taps_c = 4; 1039 1040 if (spl_is_video_format(spl_in->basic_in.format)) { 1041 if (spl_scratch->scl_data.taps.h_taps <= 4) { 1042 *enable_easf_v = false; 1043 *enable_easf_h = false; 1044 } else if (spl_scratch->scl_data.taps.v_taps <= 3) { 1045 *enable_easf_v = false; 1046 *enable_easf_h = true; 1047 } else { 1048 *enable_easf_v = true; 1049 *enable_easf_h = true; 1050 } 1051 SPL_ASSERT((spl_scratch->scl_data.taps.v_taps > 1) && 1052 (spl_scratch->scl_data.taps.v_taps_c > 1)); 1053 } else { /* RGB */ 1054 if (spl_scratch->scl_data.taps.h_taps <= 3) { 1055 *enable_easf_v = false; 1056 *enable_easf_h = false; 1057 } else if (spl_scratch->scl_data.taps.v_taps < 3) { 1058 *enable_easf_v = false; 1059 *enable_easf_h = true; 1060 } else { 1061 *enable_easf_v = true; 1062 *enable_easf_h = true; 1063 } 1064 SPL_ASSERT(spl_scratch->scl_data.taps.v_taps > 1); 1065 } 1066 } else { 1067 *enable_easf_v = false; 1068 *enable_easf_h = false; 1069 } // end of if prefer_easf 1070 1071 /* Sharpener requires scaler to be enabled, including for 1:1 1072 * Check if ISHARP can be enabled 1073 * If ISHARP is not enabled, set taps to 1 if ratio is 1:1 1074 * except for chroma taps. Keep previous taps so it can 1075 * handle cositing 1076 */ 1077 1078 *enable_isharp = spl_get_isharp_en(spl_in, spl_scratch); 1079 if (!*enable_isharp && !spl_in->basic_out.always_scale) { 1080 if ((IDENTITY_RATIO(spl_scratch->scl_data.ratios.horz)) && 1081 (IDENTITY_RATIO(spl_scratch->scl_data.ratios.vert))) { 1082 spl_scratch->scl_data.taps.h_taps = 1; 1083 spl_scratch->scl_data.taps.v_taps = 1; 1084 1085 if (IDENTITY_RATIO(spl_scratch->scl_data.ratios.horz_c) && !is_subsampled) 1086 spl_scratch->scl_data.taps.h_taps_c = 1; 1087 1088 if (IDENTITY_RATIO(spl_scratch->scl_data.ratios.vert_c) && !is_subsampled) 1089 spl_scratch->scl_data.taps.v_taps_c = 1; 1090 1091 *enable_easf_v = false; 1092 *enable_easf_h = false; 1093 } else { 1094 if ((!*enable_easf_h) && 1095 (IDENTITY_RATIO(spl_scratch->scl_data.ratios.horz))) 1096 spl_scratch->scl_data.taps.h_taps = 1; 1097 1098 if ((!*enable_easf_v) && 1099 (IDENTITY_RATIO(spl_scratch->scl_data.ratios.vert))) 1100 spl_scratch->scl_data.taps.v_taps = 1; 1101 1102 if ((!*enable_easf_h) && !is_subsampled && 1103 (IDENTITY_RATIO(spl_scratch->scl_data.ratios.horz_c))) 1104 spl_scratch->scl_data.taps.h_taps_c = 1; 1105 1106 if ((!*enable_easf_v) && !is_subsampled && 1107 (IDENTITY_RATIO(spl_scratch->scl_data.ratios.vert_c))) 1108 spl_scratch->scl_data.taps.v_taps_c = 1; 1109 } 1110 } 1111 return true; 1112 } 1113 1114 static void spl_set_black_color_data(enum spl_pixel_format format, 1115 struct scl_black_color *scl_black_color) 1116 { 1117 bool ycbcr = spl_is_video_format(format); 1118 if (ycbcr) { 1119 scl_black_color->offset_rgb_y = BLACK_OFFSET_RGB_Y; 1120 scl_black_color->offset_rgb_cbcr = BLACK_OFFSET_CBCR; 1121 } else { 1122 scl_black_color->offset_rgb_y = 0x0; 1123 scl_black_color->offset_rgb_cbcr = 0x0; 1124 } 1125 } 1126 1127 static void spl_set_manual_ratio_init_data(struct dscl_prog_data *dscl_prog_data, 1128 const struct spl_scaler_data *scl_data) 1129 { 1130 struct spl_fixed31_32 bot; 1131 1132 dscl_prog_data->ratios.h_scale_ratio = spl_fixpt_u3d19(scl_data->ratios.horz) << 5; 1133 dscl_prog_data->ratios.v_scale_ratio = spl_fixpt_u3d19(scl_data->ratios.vert) << 5; 1134 dscl_prog_data->ratios.h_scale_ratio_c = spl_fixpt_u3d19(scl_data->ratios.horz_c) << 5; 1135 dscl_prog_data->ratios.v_scale_ratio_c = spl_fixpt_u3d19(scl_data->ratios.vert_c) << 5; 1136 /* 1137 * 0.24 format for fraction, first five bits zeroed 1138 */ 1139 dscl_prog_data->init.h_filter_init_frac = 1140 spl_fixpt_u0d19(scl_data->inits.h) << 5; 1141 dscl_prog_data->init.h_filter_init_int = 1142 spl_fixpt_floor(scl_data->inits.h); 1143 dscl_prog_data->init.h_filter_init_frac_c = 1144 spl_fixpt_u0d19(scl_data->inits.h_c) << 5; 1145 dscl_prog_data->init.h_filter_init_int_c = 1146 spl_fixpt_floor(scl_data->inits.h_c); 1147 dscl_prog_data->init.v_filter_init_frac = 1148 spl_fixpt_u0d19(scl_data->inits.v) << 5; 1149 dscl_prog_data->init.v_filter_init_int = 1150 spl_fixpt_floor(scl_data->inits.v); 1151 dscl_prog_data->init.v_filter_init_frac_c = 1152 spl_fixpt_u0d19(scl_data->inits.v_c) << 5; 1153 dscl_prog_data->init.v_filter_init_int_c = 1154 spl_fixpt_floor(scl_data->inits.v_c); 1155 1156 bot = spl_fixpt_add(scl_data->inits.v, scl_data->ratios.vert); 1157 dscl_prog_data->init.v_filter_init_bot_frac = spl_fixpt_u0d19(bot) << 5; 1158 dscl_prog_data->init.v_filter_init_bot_int = spl_fixpt_floor(bot); 1159 bot = spl_fixpt_add(scl_data->inits.v_c, scl_data->ratios.vert_c); 1160 dscl_prog_data->init.v_filter_init_bot_frac_c = spl_fixpt_u0d19(bot) << 5; 1161 dscl_prog_data->init.v_filter_init_bot_int_c = spl_fixpt_floor(bot); 1162 } 1163 1164 static void spl_set_taps_data(struct dscl_prog_data *dscl_prog_data, 1165 const struct spl_scaler_data *scl_data) 1166 { 1167 dscl_prog_data->taps.v_taps = scl_data->taps.v_taps - 1; 1168 dscl_prog_data->taps.h_taps = scl_data->taps.h_taps - 1; 1169 dscl_prog_data->taps.v_taps_c = scl_data->taps.v_taps_c - 1; 1170 dscl_prog_data->taps.h_taps_c = scl_data->taps.h_taps_c - 1; 1171 } 1172 1173 /* Populate dscl prog data structure from scaler data calculated by SPL */ 1174 static void spl_set_dscl_prog_data(struct spl_in *spl_in, struct spl_scratch *spl_scratch, 1175 struct spl_out *spl_out, bool enable_easf_v, bool enable_easf_h, bool enable_isharp) 1176 { 1177 struct dscl_prog_data *dscl_prog_data = spl_out->dscl_prog_data; 1178 1179 const struct spl_scaler_data *data = &spl_scratch->scl_data; 1180 1181 struct scl_black_color *scl_black_color = &dscl_prog_data->scl_black_color; 1182 1183 bool enable_easf = enable_easf_v || enable_easf_h; 1184 1185 // Set values for recout 1186 dscl_prog_data->recout = spl_scratch->scl_data.recout; 1187 // Set values for MPC Size 1188 dscl_prog_data->mpc_size.width = spl_scratch->scl_data.h_active; 1189 dscl_prog_data->mpc_size.height = spl_scratch->scl_data.v_active; 1190 1191 // SCL_MODE - Set SCL_MODE data 1192 dscl_prog_data->dscl_mode = spl_get_dscl_mode(spl_in, data, enable_isharp, 1193 enable_easf); 1194 1195 // SCL_BLACK_COLOR 1196 spl_set_black_color_data(spl_in->basic_in.format, scl_black_color); 1197 1198 /* Manually calculate scale ratio and init values */ 1199 spl_set_manual_ratio_init_data(dscl_prog_data, data); 1200 1201 // Set HTaps/VTaps 1202 spl_set_taps_data(dscl_prog_data, data); 1203 // Set viewport 1204 dscl_prog_data->viewport = spl_scratch->scl_data.viewport; 1205 // Set viewport_c 1206 dscl_prog_data->viewport_c = spl_scratch->scl_data.viewport_c; 1207 // Set filters data 1208 spl_set_filters_data(dscl_prog_data, data, enable_easf_v, enable_easf_h); 1209 } 1210 1211 /* Calculate C0-C3 coefficients based on HDR_mult */ 1212 static void spl_calculate_c0_c3_hdr(struct dscl_prog_data *dscl_prog_data, uint32_t sdr_white_level_nits) 1213 { 1214 struct spl_fixed31_32 hdr_mult, c0_mult, c1_mult, c2_mult; 1215 struct spl_fixed31_32 c0_calc, c1_calc, c2_calc; 1216 struct spl_custom_float_format fmt; 1217 uint32_t hdr_multx100_int; 1218 1219 if ((sdr_white_level_nits >= 80) && (sdr_white_level_nits <= 480)) 1220 hdr_multx100_int = sdr_white_level_nits * 100 / 80; 1221 else 1222 hdr_multx100_int = 100; /* default for 80 nits otherwise */ 1223 1224 hdr_mult = spl_fixpt_from_fraction((long long)hdr_multx100_int, 100LL); 1225 c0_mult = spl_fixpt_from_fraction(2126LL, 10000LL); 1226 c1_mult = spl_fixpt_from_fraction(7152LL, 10000LL); 1227 c2_mult = spl_fixpt_from_fraction(722LL, 10000LL); 1228 1229 c0_calc = spl_fixpt_mul(hdr_mult, spl_fixpt_mul(c0_mult, spl_fixpt_from_fraction( 1230 16384LL, 125LL))); 1231 c1_calc = spl_fixpt_mul(hdr_mult, spl_fixpt_mul(c1_mult, spl_fixpt_from_fraction( 1232 16384LL, 125LL))); 1233 c2_calc = spl_fixpt_mul(hdr_mult, spl_fixpt_mul(c2_mult, spl_fixpt_from_fraction( 1234 16384LL, 125LL))); 1235 1236 fmt.exponenta_bits = 5; 1237 fmt.mantissa_bits = 10; 1238 fmt.sign = true; 1239 1240 // fp1.5.10, C0 coefficient (LN_rec709: HDR_MULT * 0.212600 * 2^14/125) 1241 spl_convert_to_custom_float_format(c0_calc, &fmt, &dscl_prog_data->easf_matrix_c0); 1242 // fp1.5.10, C1 coefficient (LN_rec709: HDR_MULT * 0.715200 * 2^14/125) 1243 spl_convert_to_custom_float_format(c1_calc, &fmt, &dscl_prog_data->easf_matrix_c1); 1244 // fp1.5.10, C2 coefficient (LN_rec709: HDR_MULT * 0.072200 * 2^14/125) 1245 spl_convert_to_custom_float_format(c2_calc, &fmt, &dscl_prog_data->easf_matrix_c2); 1246 dscl_prog_data->easf_matrix_c3 = 0x0; // fp1.5.10, C3 coefficient 1247 } 1248 1249 /* Set EASF data */ 1250 static void spl_set_easf_data(struct spl_scratch *spl_scratch, struct spl_out *spl_out, bool enable_easf_v, 1251 bool enable_easf_h, enum linear_light_scaling lls_pref, 1252 enum spl_pixel_format format, enum system_setup setup, 1253 uint32_t sdr_white_level_nits) 1254 { 1255 struct dscl_prog_data *dscl_prog_data = spl_out->dscl_prog_data; 1256 if (enable_easf_v) { 1257 dscl_prog_data->easf_v_en = true; 1258 dscl_prog_data->easf_v_ring = 0; 1259 dscl_prog_data->easf_v_sharp_factor = 0; 1260 dscl_prog_data->easf_v_bf1_en = 1; // 1-bit, BF1 calculation enable, 0=disable, 1=enable 1261 dscl_prog_data->easf_v_bf2_mode = 0xF; // 4-bit, BF2 calculation mode 1262 /* 2-bit, BF3 chroma mode correction calculation mode */ 1263 dscl_prog_data->easf_v_bf3_mode = spl_get_v_bf3_mode( 1264 spl_scratch->scl_data.recip_ratios.vert); 1265 /* FP1.5.10 [ minCoef ]*/ 1266 dscl_prog_data->easf_v_ringest_3tap_dntilt_uptilt = 1267 spl_get_3tap_dntilt_uptilt_offset(spl_scratch->scl_data.taps.v_taps, 1268 spl_scratch->scl_data.recip_ratios.vert); 1269 /* FP1.5.10 [ upTiltMaxVal ]*/ 1270 dscl_prog_data->easf_v_ringest_3tap_uptilt_max = 1271 spl_get_3tap_uptilt_maxval(spl_scratch->scl_data.taps.v_taps, 1272 spl_scratch->scl_data.recip_ratios.vert); 1273 /* FP1.5.10 [ dnTiltSlope ]*/ 1274 dscl_prog_data->easf_v_ringest_3tap_dntilt_slope = 1275 spl_get_3tap_dntilt_slope(spl_scratch->scl_data.taps.v_taps, 1276 spl_scratch->scl_data.recip_ratios.vert); 1277 /* FP1.5.10 [ upTilt1Slope ]*/ 1278 dscl_prog_data->easf_v_ringest_3tap_uptilt1_slope = 1279 spl_get_3tap_uptilt1_slope(spl_scratch->scl_data.taps.v_taps, 1280 spl_scratch->scl_data.recip_ratios.vert); 1281 /* FP1.5.10 [ upTilt2Slope ]*/ 1282 dscl_prog_data->easf_v_ringest_3tap_uptilt2_slope = 1283 spl_get_3tap_uptilt2_slope(spl_scratch->scl_data.taps.v_taps, 1284 spl_scratch->scl_data.recip_ratios.vert); 1285 /* FP1.5.10 [ upTilt2Offset ]*/ 1286 dscl_prog_data->easf_v_ringest_3tap_uptilt2_offset = 1287 spl_get_3tap_uptilt2_offset(spl_scratch->scl_data.taps.v_taps, 1288 spl_scratch->scl_data.recip_ratios.vert); 1289 /* FP1.5.10; (2.0) Ring reducer gain for 4 or 6-tap mode [H_REDUCER_GAIN4] */ 1290 dscl_prog_data->easf_v_ringest_eventap_reduceg1 = 1291 spl_get_reducer_gain4(spl_scratch->scl_data.taps.v_taps, 1292 spl_scratch->scl_data.recip_ratios.vert); 1293 /* FP1.5.10; (2.5) Ring reducer gain for 6-tap mode [V_REDUCER_GAIN6] */ 1294 dscl_prog_data->easf_v_ringest_eventap_reduceg2 = 1295 spl_get_reducer_gain6(spl_scratch->scl_data.taps.v_taps, 1296 spl_scratch->scl_data.recip_ratios.vert); 1297 /* FP1.5.10; (-0.135742) Ring gain for 6-tap set to -139/1024 */ 1298 dscl_prog_data->easf_v_ringest_eventap_gain1 = 1299 spl_get_gainRing4(spl_scratch->scl_data.taps.v_taps, 1300 spl_scratch->scl_data.recip_ratios.vert); 1301 /* FP1.5.10; (-0.024414) Ring gain for 6-tap set to -25/1024 */ 1302 dscl_prog_data->easf_v_ringest_eventap_gain2 = 1303 spl_get_gainRing6(spl_scratch->scl_data.taps.v_taps, 1304 spl_scratch->scl_data.recip_ratios.vert); 1305 dscl_prog_data->easf_v_bf_maxa = 63; //Vertical Max BF value A in U0.6 format.Selected if V_FCNTL == 0 1306 dscl_prog_data->easf_v_bf_maxb = 63; //Vertical Max BF value A in U0.6 format.Selected if V_FCNTL == 1 1307 dscl_prog_data->easf_v_bf_mina = 0; //Vertical Min BF value A in U0.6 format.Selected if V_FCNTL == 0 1308 dscl_prog_data->easf_v_bf_minb = 0; //Vertical Min BF value A in U0.6 format.Selected if V_FCNTL == 1 1309 if (lls_pref == LLS_PREF_YES) { 1310 dscl_prog_data->easf_v_bf2_flat1_gain = 4; // U1.3, BF2 Flat1 Gain control 1311 dscl_prog_data->easf_v_bf2_flat2_gain = 8; // U4.0, BF2 Flat2 Gain control 1312 dscl_prog_data->easf_v_bf2_roc_gain = 4; // U2.2, Rate Of Change control 1313 1314 dscl_prog_data->easf_v_bf1_pwl_in_seg0 = 0x600; // S0.10, BF1 PWL Segment 0 = -512 1315 dscl_prog_data->easf_v_bf1_pwl_base_seg0 = 0; // U0.6, BF1 Base PWL Segment 0 1316 dscl_prog_data->easf_v_bf1_pwl_slope_seg0 = 3; // S7.3, BF1 Slope PWL Segment 0 1317 dscl_prog_data->easf_v_bf1_pwl_in_seg1 = 0x7EC; // S0.10, BF1 PWL Segment 1 = -20 1318 dscl_prog_data->easf_v_bf1_pwl_base_seg1 = 12; // U0.6, BF1 Base PWL Segment 1 1319 dscl_prog_data->easf_v_bf1_pwl_slope_seg1 = 326; // S7.3, BF1 Slope PWL Segment 1 1320 dscl_prog_data->easf_v_bf1_pwl_in_seg2 = 0; // S0.10, BF1 PWL Segment 2 1321 dscl_prog_data->easf_v_bf1_pwl_base_seg2 = 63; // U0.6, BF1 Base PWL Segment 2 1322 dscl_prog_data->easf_v_bf1_pwl_slope_seg2 = 0; // S7.3, BF1 Slope PWL Segment 2 1323 dscl_prog_data->easf_v_bf1_pwl_in_seg3 = 16; // S0.10, BF1 PWL Segment 3 1324 dscl_prog_data->easf_v_bf1_pwl_base_seg3 = 63; // U0.6, BF1 Base PWL Segment 3 1325 dscl_prog_data->easf_v_bf1_pwl_slope_seg3 = 0x7C8; // S7.3, BF1 Slope PWL Segment 3 = -56 1326 dscl_prog_data->easf_v_bf1_pwl_in_seg4 = 32; // S0.10, BF1 PWL Segment 4 1327 dscl_prog_data->easf_v_bf1_pwl_base_seg4 = 56; // U0.6, BF1 Base PWL Segment 4 1328 dscl_prog_data->easf_v_bf1_pwl_slope_seg4 = 0x7D0; // S7.3, BF1 Slope PWL Segment 4 = -48 1329 dscl_prog_data->easf_v_bf1_pwl_in_seg5 = 48; // S0.10, BF1 PWL Segment 5 1330 dscl_prog_data->easf_v_bf1_pwl_base_seg5 = 50; // U0.6, BF1 Base PWL Segment 5 1331 dscl_prog_data->easf_v_bf1_pwl_slope_seg5 = 0x710; // S7.3, BF1 Slope PWL Segment 5 = -240 1332 dscl_prog_data->easf_v_bf1_pwl_in_seg6 = 64; // S0.10, BF1 PWL Segment 6 1333 dscl_prog_data->easf_v_bf1_pwl_base_seg6 = 20; // U0.6, BF1 Base PWL Segment 6 1334 dscl_prog_data->easf_v_bf1_pwl_slope_seg6 = 0x760; // S7.3, BF1 Slope PWL Segment 6 = -160 1335 dscl_prog_data->easf_v_bf1_pwl_in_seg7 = 80; // S0.10, BF1 PWL Segment 7 1336 dscl_prog_data->easf_v_bf1_pwl_base_seg7 = 0; // U0.6, BF1 Base PWL Segment 7 1337 1338 dscl_prog_data->easf_v_bf3_pwl_in_set0 = 0x000; // FP0.6.6, BF3 Input value PWL Segment 0 1339 dscl_prog_data->easf_v_bf3_pwl_base_set0 = 63; // S0.6, BF3 Base PWL Segment 0 1340 dscl_prog_data->easf_v_bf3_pwl_slope_set0 = 0x12C5; // FP1.6.6, BF3 Slope PWL Segment 0 1341 dscl_prog_data->easf_v_bf3_pwl_in_set1 = 1342 0x0B37; // FP0.6.6, BF3 Input value PWL Segment 1 (0.0078125 * 125^3) 1343 dscl_prog_data->easf_v_bf3_pwl_base_set1 = 62; // S0.6, BF3 Base PWL Segment 1 1344 dscl_prog_data->easf_v_bf3_pwl_slope_set1 = 1345 0x13B8; // FP1.6.6, BF3 Slope PWL Segment 1 1346 dscl_prog_data->easf_v_bf3_pwl_in_set2 = 1347 0x0BB7; // FP0.6.6, BF3 Input value PWL Segment 2 (0.03125 * 125^3) 1348 dscl_prog_data->easf_v_bf3_pwl_base_set2 = 20; // S0.6, BF3 Base PWL Segment 2 1349 dscl_prog_data->easf_v_bf3_pwl_slope_set2 = 1350 0x1356; // FP1.6.6, BF3 Slope PWL Segment 2 1351 dscl_prog_data->easf_v_bf3_pwl_in_set3 = 1352 0x0BF7; // FP0.6.6, BF3 Input value PWL Segment 3 (0.0625 * 125^3) 1353 dscl_prog_data->easf_v_bf3_pwl_base_set3 = 0; // S0.6, BF3 Base PWL Segment 3 1354 dscl_prog_data->easf_v_bf3_pwl_slope_set3 = 1355 0x136B; // FP1.6.6, BF3 Slope PWL Segment 3 1356 dscl_prog_data->easf_v_bf3_pwl_in_set4 = 1357 0x0C37; // FP0.6.6, BF3 Input value PWL Segment 4 (0.125 * 125^3) 1358 dscl_prog_data->easf_v_bf3_pwl_base_set4 = 0x4E; // S0.6, BF3 Base PWL Segment 4 = -50 1359 dscl_prog_data->easf_v_bf3_pwl_slope_set4 = 1360 0x1200; // FP1.6.6, BF3 Slope PWL Segment 4 1361 dscl_prog_data->easf_v_bf3_pwl_in_set5 = 1362 0x0CF7; // FP0.6.6, BF3 Input value PWL Segment 5 (1.0 * 125^3) 1363 dscl_prog_data->easf_v_bf3_pwl_base_set5 = 0x41; // S0.6, BF3 Base PWL Segment 5 = -63 1364 } else { 1365 dscl_prog_data->easf_v_bf2_flat1_gain = 13; // U1.3, BF2 Flat1 Gain control 1366 dscl_prog_data->easf_v_bf2_flat2_gain = 15; // U4.0, BF2 Flat2 Gain control 1367 dscl_prog_data->easf_v_bf2_roc_gain = 14; // U2.2, Rate Of Change control 1368 1369 dscl_prog_data->easf_v_bf1_pwl_in_seg0 = 0x440; // S0.10, BF1 PWL Segment 0 = -960 1370 dscl_prog_data->easf_v_bf1_pwl_base_seg0 = 0; // U0.6, BF1 Base PWL Segment 0 1371 dscl_prog_data->easf_v_bf1_pwl_slope_seg0 = 2; // S7.3, BF1 Slope PWL Segment 0 1372 dscl_prog_data->easf_v_bf1_pwl_in_seg1 = 0x7C4; // S0.10, BF1 PWL Segment 1 = -60 1373 dscl_prog_data->easf_v_bf1_pwl_base_seg1 = 12; // U0.6, BF1 Base PWL Segment 1 1374 dscl_prog_data->easf_v_bf1_pwl_slope_seg1 = 109; // S7.3, BF1 Slope PWL Segment 1 1375 dscl_prog_data->easf_v_bf1_pwl_in_seg2 = 0; // S0.10, BF1 PWL Segment 2 1376 dscl_prog_data->easf_v_bf1_pwl_base_seg2 = 63; // U0.6, BF1 Base PWL Segment 2 1377 dscl_prog_data->easf_v_bf1_pwl_slope_seg2 = 0; // S7.3, BF1 Slope PWL Segment 2 1378 dscl_prog_data->easf_v_bf1_pwl_in_seg3 = 48; // S0.10, BF1 PWL Segment 3 1379 dscl_prog_data->easf_v_bf1_pwl_base_seg3 = 63; // U0.6, BF1 Base PWL Segment 3 1380 dscl_prog_data->easf_v_bf1_pwl_slope_seg3 = 0x7ED; // S7.3, BF1 Slope PWL Segment 3 = -19 1381 dscl_prog_data->easf_v_bf1_pwl_in_seg4 = 96; // S0.10, BF1 PWL Segment 4 1382 dscl_prog_data->easf_v_bf1_pwl_base_seg4 = 56; // U0.6, BF1 Base PWL Segment 4 1383 dscl_prog_data->easf_v_bf1_pwl_slope_seg4 = 0x7F0; // S7.3, BF1 Slope PWL Segment 4 = -16 1384 dscl_prog_data->easf_v_bf1_pwl_in_seg5 = 144; // S0.10, BF1 PWL Segment 5 1385 dscl_prog_data->easf_v_bf1_pwl_base_seg5 = 50; // U0.6, BF1 Base PWL Segment 5 1386 dscl_prog_data->easf_v_bf1_pwl_slope_seg5 = 0x7B0; // S7.3, BF1 Slope PWL Segment 5 = -80 1387 dscl_prog_data->easf_v_bf1_pwl_in_seg6 = 192; // S0.10, BF1 PWL Segment 6 1388 dscl_prog_data->easf_v_bf1_pwl_base_seg6 = 20; // U0.6, BF1 Base PWL Segment 6 1389 dscl_prog_data->easf_v_bf1_pwl_slope_seg6 = 0x7CB; // S7.3, BF1 Slope PWL Segment 6 = -53 1390 dscl_prog_data->easf_v_bf1_pwl_in_seg7 = 240; // S0.10, BF1 PWL Segment 7 1391 dscl_prog_data->easf_v_bf1_pwl_base_seg7 = 0; // U0.6, BF1 Base PWL Segment 7 1392 1393 dscl_prog_data->easf_v_bf3_pwl_in_set0 = 0x000; // FP0.6.6, BF3 Input value PWL Segment 0 1394 dscl_prog_data->easf_v_bf3_pwl_base_set0 = 63; // S0.6, BF3 Base PWL Segment 0 1395 dscl_prog_data->easf_v_bf3_pwl_slope_set0 = 0x0000; // FP1.6.6, BF3 Slope PWL Segment 0 1396 dscl_prog_data->easf_v_bf3_pwl_in_set1 = 1397 0x06C0; // FP0.6.6, BF3 Input value PWL Segment 1 (0.0625) 1398 dscl_prog_data->easf_v_bf3_pwl_base_set1 = 63; // S0.6, BF3 Base PWL Segment 1 1399 dscl_prog_data->easf_v_bf3_pwl_slope_set1 = 0x1896; // FP1.6.6, BF3 Slope PWL Segment 1 1400 dscl_prog_data->easf_v_bf3_pwl_in_set2 = 1401 0x0700; // FP0.6.6, BF3 Input value PWL Segment 2 (0.125) 1402 dscl_prog_data->easf_v_bf3_pwl_base_set2 = 20; // S0.6, BF3 Base PWL Segment 2 1403 dscl_prog_data->easf_v_bf3_pwl_slope_set2 = 0x1810; // FP1.6.6, BF3 Slope PWL Segment 2 1404 dscl_prog_data->easf_v_bf3_pwl_in_set3 = 1405 0x0740; // FP0.6.6, BF3 Input value PWL Segment 3 (0.25) 1406 dscl_prog_data->easf_v_bf3_pwl_base_set3 = 0; // S0.6, BF3 Base PWL Segment 3 1407 dscl_prog_data->easf_v_bf3_pwl_slope_set3 = 1408 0x1878; // FP1.6.6, BF3 Slope PWL Segment 3 1409 dscl_prog_data->easf_v_bf3_pwl_in_set4 = 1410 0x0761; // FP0.6.6, BF3 Input value PWL Segment 4 (0.375) 1411 dscl_prog_data->easf_v_bf3_pwl_base_set4 = 0x44; // S0.6, BF3 Base PWL Segment 4 = -60 1412 dscl_prog_data->easf_v_bf3_pwl_slope_set4 = 0x1760; // FP1.6.6, BF3 Slope PWL Segment 4 1413 dscl_prog_data->easf_v_bf3_pwl_in_set5 = 1414 0x0780; // FP0.6.6, BF3 Input value PWL Segment 5 (0.5) 1415 dscl_prog_data->easf_v_bf3_pwl_base_set5 = 0x41; // S0.6, BF3 Base PWL Segment 5 = -63 1416 } 1417 } else 1418 dscl_prog_data->easf_v_en = false; 1419 1420 if (enable_easf_h) { 1421 dscl_prog_data->easf_h_en = true; 1422 dscl_prog_data->easf_h_ring = 0; 1423 dscl_prog_data->easf_h_sharp_factor = 0; 1424 dscl_prog_data->easf_h_bf1_en = 1425 1; // 1-bit, BF1 calculation enable, 0=disable, 1=enable 1426 dscl_prog_data->easf_h_bf2_mode = 1427 0xF; // 4-bit, BF2 calculation mode 1428 /* 2-bit, BF3 chroma mode correction calculation mode */ 1429 dscl_prog_data->easf_h_bf3_mode = spl_get_h_bf3_mode( 1430 spl_scratch->scl_data.recip_ratios.horz); 1431 /* FP1.5.10; (2.0) Ring reducer gain for 4 or 6-tap mode [H_REDUCER_GAIN4] */ 1432 dscl_prog_data->easf_h_ringest_eventap_reduceg1 = 1433 spl_get_reducer_gain4(spl_scratch->scl_data.taps.h_taps, 1434 spl_scratch->scl_data.recip_ratios.horz); 1435 /* FP1.5.10; (2.5) Ring reducer gain for 6-tap mode [V_REDUCER_GAIN6] */ 1436 dscl_prog_data->easf_h_ringest_eventap_reduceg2 = 1437 spl_get_reducer_gain6(spl_scratch->scl_data.taps.h_taps, 1438 spl_scratch->scl_data.recip_ratios.horz); 1439 /* FP1.5.10; (-0.135742) Ring gain for 6-tap set to -139/1024 */ 1440 dscl_prog_data->easf_h_ringest_eventap_gain1 = 1441 spl_get_gainRing4(spl_scratch->scl_data.taps.h_taps, 1442 spl_scratch->scl_data.recip_ratios.horz); 1443 /* FP1.5.10; (-0.024414) Ring gain for 6-tap set to -25/1024 */ 1444 dscl_prog_data->easf_h_ringest_eventap_gain2 = 1445 spl_get_gainRing6(spl_scratch->scl_data.taps.h_taps, 1446 spl_scratch->scl_data.recip_ratios.horz); 1447 dscl_prog_data->easf_h_bf_maxa = 63; //Horz Max BF value A in U0.6 format.Selected if H_FCNTL==0 1448 dscl_prog_data->easf_h_bf_maxb = 63; //Horz Max BF value B in U0.6 format.Selected if H_FCNTL==1 1449 dscl_prog_data->easf_h_bf_mina = 0; //Horz Min BF value B in U0.6 format.Selected if H_FCNTL==0 1450 dscl_prog_data->easf_h_bf_minb = 0; //Horz Min BF value B in U0.6 format.Selected if H_FCNTL==1 1451 if (lls_pref == LLS_PREF_YES) { 1452 dscl_prog_data->easf_h_bf2_flat1_gain = 4; // U1.3, BF2 Flat1 Gain control 1453 dscl_prog_data->easf_h_bf2_flat2_gain = 8; // U4.0, BF2 Flat2 Gain control 1454 dscl_prog_data->easf_h_bf2_roc_gain = 4; // U2.2, Rate Of Change control 1455 1456 dscl_prog_data->easf_h_bf1_pwl_in_seg0 = 0x600; // S0.10, BF1 PWL Segment 0 = -512 1457 dscl_prog_data->easf_h_bf1_pwl_base_seg0 = 0; // U0.6, BF1 Base PWL Segment 0 1458 dscl_prog_data->easf_h_bf1_pwl_slope_seg0 = 3; // S7.3, BF1 Slope PWL Segment 0 1459 dscl_prog_data->easf_h_bf1_pwl_in_seg1 = 0x7EC; // S0.10, BF1 PWL Segment 1 = -20 1460 dscl_prog_data->easf_h_bf1_pwl_base_seg1 = 12; // U0.6, BF1 Base PWL Segment 1 1461 dscl_prog_data->easf_h_bf1_pwl_slope_seg1 = 326; // S7.3, BF1 Slope PWL Segment 1 1462 dscl_prog_data->easf_h_bf1_pwl_in_seg2 = 0; // S0.10, BF1 PWL Segment 2 1463 dscl_prog_data->easf_h_bf1_pwl_base_seg2 = 63; // U0.6, BF1 Base PWL Segment 2 1464 dscl_prog_data->easf_h_bf1_pwl_slope_seg2 = 0; // S7.3, BF1 Slope PWL Segment 2 1465 dscl_prog_data->easf_h_bf1_pwl_in_seg3 = 16; // S0.10, BF1 PWL Segment 3 1466 dscl_prog_data->easf_h_bf1_pwl_base_seg3 = 63; // U0.6, BF1 Base PWL Segment 3 1467 dscl_prog_data->easf_h_bf1_pwl_slope_seg3 = 0x7C8; // S7.3, BF1 Slope PWL Segment 3 = -56 1468 dscl_prog_data->easf_h_bf1_pwl_in_seg4 = 32; // S0.10, BF1 PWL Segment 4 1469 dscl_prog_data->easf_h_bf1_pwl_base_seg4 = 56; // U0.6, BF1 Base PWL Segment 4 1470 dscl_prog_data->easf_h_bf1_pwl_slope_seg4 = 0x7D0; // S7.3, BF1 Slope PWL Segment 4 = -48 1471 dscl_prog_data->easf_h_bf1_pwl_in_seg5 = 48; // S0.10, BF1 PWL Segment 5 1472 dscl_prog_data->easf_h_bf1_pwl_base_seg5 = 50; // U0.6, BF1 Base PWL Segment 5 1473 dscl_prog_data->easf_h_bf1_pwl_slope_seg5 = 0x710; // S7.3, BF1 Slope PWL Segment 5 = -240 1474 dscl_prog_data->easf_h_bf1_pwl_in_seg6 = 64; // S0.10, BF1 PWL Segment 6 1475 dscl_prog_data->easf_h_bf1_pwl_base_seg6 = 20; // U0.6, BF1 Base PWL Segment 6 1476 dscl_prog_data->easf_h_bf1_pwl_slope_seg6 = 0x760; // S7.3, BF1 Slope PWL Segment 6 = -160 1477 dscl_prog_data->easf_h_bf1_pwl_in_seg7 = 80; // S0.10, BF1 PWL Segment 7 1478 dscl_prog_data->easf_h_bf1_pwl_base_seg7 = 0; // U0.6, BF1 Base PWL Segment 7 1479 1480 dscl_prog_data->easf_h_bf3_pwl_in_set0 = 0x000; // FP0.6.6, BF3 Input value PWL Segment 0 1481 dscl_prog_data->easf_h_bf3_pwl_base_set0 = 63; // S0.6, BF3 Base PWL Segment 0 1482 dscl_prog_data->easf_h_bf3_pwl_slope_set0 = 0x12C5; // FP1.6.6, BF3 Slope PWL Segment 0 1483 dscl_prog_data->easf_h_bf3_pwl_in_set1 = 1484 0x0B37; // FP0.6.6, BF3 Input value PWL Segment 1 (0.0078125 * 125^3) 1485 dscl_prog_data->easf_h_bf3_pwl_base_set1 = 62; // S0.6, BF3 Base PWL Segment 1 1486 dscl_prog_data->easf_h_bf3_pwl_slope_set1 = 0x13B8; // FP1.6.6, BF3 Slope PWL Segment 1 1487 dscl_prog_data->easf_h_bf3_pwl_in_set2 = 1488 0x0BB7; // FP0.6.6, BF3 Input value PWL Segment 2 (0.03125 * 125^3) 1489 dscl_prog_data->easf_h_bf3_pwl_base_set2 = 20; // S0.6, BF3 Base PWL Segment 2 1490 dscl_prog_data->easf_h_bf3_pwl_slope_set2 = 0x1356; // FP1.6.6, BF3 Slope PWL Segment 2 1491 dscl_prog_data->easf_h_bf3_pwl_in_set3 = 1492 0x0BF7; // FP0.6.6, BF3 Input value PWL Segment 3 (0.0625 * 125^3) 1493 dscl_prog_data->easf_h_bf3_pwl_base_set3 = 0; // S0.6, BF3 Base PWL Segment 3 1494 dscl_prog_data->easf_h_bf3_pwl_slope_set3 = 0x136B; // FP1.6.6, BF3 Slope PWL Segment 3 1495 dscl_prog_data->easf_h_bf3_pwl_in_set4 = 1496 0x0C37; // FP0.6.6, BF3 Input value PWL Segment 4 (0.125 * 125^3) 1497 dscl_prog_data->easf_h_bf3_pwl_base_set4 = 0x4E; // S0.6, BF3 Base PWL Segment 4 = -50 1498 dscl_prog_data->easf_h_bf3_pwl_slope_set4 = 0x1200; // FP1.6.6, BF3 Slope PWL Segment 4 1499 dscl_prog_data->easf_h_bf3_pwl_in_set5 = 1500 0x0CF7; // FP0.6.6, BF3 Input value PWL Segment 5 (1.0 * 125^3) 1501 dscl_prog_data->easf_h_bf3_pwl_base_set5 = 0x41; // S0.6, BF3 Base PWL Segment 5 = -63 1502 } else { 1503 dscl_prog_data->easf_h_bf2_flat1_gain = 13; // U1.3, BF2 Flat1 Gain control 1504 dscl_prog_data->easf_h_bf2_flat2_gain = 15; // U4.0, BF2 Flat2 Gain control 1505 dscl_prog_data->easf_h_bf2_roc_gain = 14; // U2.2, Rate Of Change control 1506 1507 dscl_prog_data->easf_h_bf1_pwl_in_seg0 = 0x440; // S0.10, BF1 PWL Segment 0 = -960 1508 dscl_prog_data->easf_h_bf1_pwl_base_seg0 = 0; // U0.6, BF1 Base PWL Segment 0 1509 dscl_prog_data->easf_h_bf1_pwl_slope_seg0 = 2; // S7.3, BF1 Slope PWL Segment 0 1510 dscl_prog_data->easf_h_bf1_pwl_in_seg1 = 0x7C4; // S0.10, BF1 PWL Segment 1 = -60 1511 dscl_prog_data->easf_h_bf1_pwl_base_seg1 = 12; // U0.6, BF1 Base PWL Segment 1 1512 dscl_prog_data->easf_h_bf1_pwl_slope_seg1 = 109; // S7.3, BF1 Slope PWL Segment 1 1513 dscl_prog_data->easf_h_bf1_pwl_in_seg2 = 0; // S0.10, BF1 PWL Segment 2 1514 dscl_prog_data->easf_h_bf1_pwl_base_seg2 = 63; // U0.6, BF1 Base PWL Segment 2 1515 dscl_prog_data->easf_h_bf1_pwl_slope_seg2 = 0; // S7.3, BF1 Slope PWL Segment 2 1516 dscl_prog_data->easf_h_bf1_pwl_in_seg3 = 48; // S0.10, BF1 PWL Segment 3 1517 dscl_prog_data->easf_h_bf1_pwl_base_seg3 = 63; // U0.6, BF1 Base PWL Segment 3 1518 dscl_prog_data->easf_h_bf1_pwl_slope_seg3 = 0x7ED; // S7.3, BF1 Slope PWL Segment 3 = -19 1519 dscl_prog_data->easf_h_bf1_pwl_in_seg4 = 96; // S0.10, BF1 PWL Segment 4 1520 dscl_prog_data->easf_h_bf1_pwl_base_seg4 = 56; // U0.6, BF1 Base PWL Segment 4 1521 dscl_prog_data->easf_h_bf1_pwl_slope_seg4 = 0x7F0; // S7.3, BF1 Slope PWL Segment 4 = -16 1522 dscl_prog_data->easf_h_bf1_pwl_in_seg5 = 144; // S0.10, BF1 PWL Segment 5 1523 dscl_prog_data->easf_h_bf1_pwl_base_seg5 = 50; // U0.6, BF1 Base PWL Segment 5 1524 dscl_prog_data->easf_h_bf1_pwl_slope_seg5 = 0x7B0; // S7.3, BF1 Slope PWL Segment 5 = -80 1525 dscl_prog_data->easf_h_bf1_pwl_in_seg6 = 192; // S0.10, BF1 PWL Segment 6 1526 dscl_prog_data->easf_h_bf1_pwl_base_seg6 = 20; // U0.6, BF1 Base PWL Segment 6 1527 dscl_prog_data->easf_h_bf1_pwl_slope_seg6 = 0x7CB; // S7.3, BF1 Slope PWL Segment 6 = -53 1528 dscl_prog_data->easf_h_bf1_pwl_in_seg7 = 240; // S0.10, BF1 PWL Segment 7 1529 dscl_prog_data->easf_h_bf1_pwl_base_seg7 = 0; // U0.6, BF1 Base PWL Segment 7 1530 1531 dscl_prog_data->easf_h_bf3_pwl_in_set0 = 0x000; // FP0.6.6, BF3 Input value PWL Segment 0 1532 dscl_prog_data->easf_h_bf3_pwl_base_set0 = 63; // S0.6, BF3 Base PWL Segment 0 1533 dscl_prog_data->easf_h_bf3_pwl_slope_set0 = 0x0000; // FP1.6.6, BF3 Slope PWL Segment 0 1534 dscl_prog_data->easf_h_bf3_pwl_in_set1 = 1535 0x06C0; // FP0.6.6, BF3 Input value PWL Segment 1 (0.0625) 1536 dscl_prog_data->easf_h_bf3_pwl_base_set1 = 63; // S0.6, BF3 Base PWL Segment 1 1537 dscl_prog_data->easf_h_bf3_pwl_slope_set1 = 0x1896; // FP1.6.6, BF3 Slope PWL Segment 1 1538 dscl_prog_data->easf_h_bf3_pwl_in_set2 = 1539 0x0700; // FP0.6.6, BF3 Input value PWL Segment 2 (0.125) 1540 dscl_prog_data->easf_h_bf3_pwl_base_set2 = 20; // S0.6, BF3 Base PWL Segment 2 1541 dscl_prog_data->easf_h_bf3_pwl_slope_set2 = 0x1810; // FP1.6.6, BF3 Slope PWL Segment 2 1542 dscl_prog_data->easf_h_bf3_pwl_in_set3 = 1543 0x0740; // FP0.6.6, BF3 Input value PWL Segment 3 (0.25) 1544 dscl_prog_data->easf_h_bf3_pwl_base_set3 = 0; // S0.6, BF3 Base PWL Segment 3 1545 dscl_prog_data->easf_h_bf3_pwl_slope_set3 = 0x1878; // FP1.6.6, BF3 Slope PWL Segment 3 1546 dscl_prog_data->easf_h_bf3_pwl_in_set4 = 1547 0x0761; // FP0.6.6, BF3 Input value PWL Segment 4 (0.375) 1548 dscl_prog_data->easf_h_bf3_pwl_base_set4 = 0x44; // S0.6, BF3 Base PWL Segment 4 = -60 1549 dscl_prog_data->easf_h_bf3_pwl_slope_set4 = 0x1760; // FP1.6.6, BF3 Slope PWL Segment 4 1550 dscl_prog_data->easf_h_bf3_pwl_in_set5 = 1551 0x0780; // FP0.6.6, BF3 Input value PWL Segment 5 (0.5) 1552 dscl_prog_data->easf_h_bf3_pwl_base_set5 = 0x41; // S0.6, BF3 Base PWL Segment 5 = -63 1553 } // if (lls_pref == LLS_PREF_YES) 1554 } else 1555 dscl_prog_data->easf_h_en = false; 1556 1557 if (lls_pref == LLS_PREF_YES) { 1558 dscl_prog_data->easf_ltonl_en = 1; // Linear input 1559 if ((setup == HDR_L) && (spl_is_rgb8(format))) { 1560 /* Calculate C0-C3 coefficients based on HDR multiplier */ 1561 spl_calculate_c0_c3_hdr(dscl_prog_data, sdr_white_level_nits); 1562 } else { // HDR_L ( DWM ) and SDR_L 1563 dscl_prog_data->easf_matrix_c0 = 1564 0x4EF7; // fp1.5.10, C0 coefficient (LN_rec709: 0.2126 * (2^14)/125 = 27.86590720) 1565 dscl_prog_data->easf_matrix_c1 = 1566 0x55DC; // fp1.5.10, C1 coefficient (LN_rec709: 0.7152 * (2^14)/125 = 93.74269440) 1567 dscl_prog_data->easf_matrix_c2 = 1568 0x48BB; // fp1.5.10, C2 coefficient (LN_rec709: 0.0722 * (2^14)/125 = 9.46339840) 1569 dscl_prog_data->easf_matrix_c3 = 1570 0x0; // fp1.5.10, C3 coefficient 1571 } 1572 } else { 1573 dscl_prog_data->easf_ltonl_en = 0; // Non-Linear input 1574 dscl_prog_data->easf_matrix_c0 = 1575 0x3434; // fp1.5.10, C0 coefficient (LN_BT2020: 0.262695312500000) 1576 dscl_prog_data->easf_matrix_c1 = 1577 0x396D; // fp1.5.10, C1 coefficient (LN_BT2020: 0.678222656250000) 1578 dscl_prog_data->easf_matrix_c2 = 1579 0x2B97; // fp1.5.10, C2 coefficient (LN_BT2020: 0.059295654296875) 1580 dscl_prog_data->easf_matrix_c3 = 1581 0x0; // fp1.5.10, C3 coefficient 1582 } 1583 1584 if (spl_is_subsampled_format(format)) { /* TODO: 0 = RGB, 1 = YUV */ 1585 dscl_prog_data->easf_matrix_mode = 1; 1586 /* 1587 * 2-bit, BF3 chroma mode correction calculation mode 1588 * Needs to be disabled for YUV420 mode 1589 * Override lookup value 1590 */ 1591 dscl_prog_data->easf_v_bf3_mode = 0; 1592 dscl_prog_data->easf_h_bf3_mode = 0; 1593 } else 1594 dscl_prog_data->easf_matrix_mode = 0; 1595 1596 } 1597 1598 /*Set isharp noise detection */ 1599 static void spl_set_isharp_noise_det_mode(struct dscl_prog_data *dscl_prog_data, 1600 const struct spl_scaler_data *data) 1601 { 1602 // ISHARP_NOISEDET_MODE 1603 // 0: 3x5 as VxH 1604 // 1: 4x5 as VxH 1605 // 2: 1606 // 3: 5x5 as VxH 1607 if (data->taps.v_taps == 6) 1608 dscl_prog_data->isharp_noise_det.mode = 3; 1609 else if (data->taps.v_taps == 4) 1610 dscl_prog_data->isharp_noise_det.mode = 1; 1611 else if (data->taps.v_taps == 3) 1612 dscl_prog_data->isharp_noise_det.mode = 0; 1613 }; 1614 /* Set Sharpener data */ 1615 static void spl_set_isharp_data(struct dscl_prog_data *dscl_prog_data, 1616 struct adaptive_sharpness adp_sharpness, bool enable_isharp, 1617 enum linear_light_scaling lls_pref, enum spl_pixel_format format, 1618 const struct spl_scaler_data *data, struct spl_fixed31_32 ratio, 1619 enum system_setup setup, enum scale_to_sharpness_policy scale_to_sharpness_policy) 1620 { 1621 /* Turn off sharpener if not required */ 1622 if (!enable_isharp) { 1623 dscl_prog_data->isharp_en = 0; 1624 return; 1625 } 1626 1627 spl_build_isharp_1dlut_from_reference_curve(ratio, setup, adp_sharpness, 1628 scale_to_sharpness_policy); 1629 memcpy(dscl_prog_data->isharp_delta, spl_get_pregen_filter_isharp_1D_lut(setup), 1630 sizeof(uint32_t) * ISHARP_LUT_TABLE_SIZE); 1631 dscl_prog_data->sharpness_level = adp_sharpness.sharpness_level; 1632 1633 dscl_prog_data->isharp_en = 1; // ISHARP_EN 1634 // Set ISHARP_NOISEDET_MODE if htaps = 6-tap 1635 if (data->taps.h_taps == 6) { 1636 dscl_prog_data->isharp_noise_det.enable = 1; /* ISHARP_NOISEDET_EN */ 1637 spl_set_isharp_noise_det_mode(dscl_prog_data, data); /* ISHARP_NOISEDET_MODE */ 1638 } else 1639 dscl_prog_data->isharp_noise_det.enable = 0; // ISHARP_NOISEDET_EN 1640 // Program noise detection threshold 1641 dscl_prog_data->isharp_noise_det.uthreshold = 24; // ISHARP_NOISEDET_UTHRE 1642 dscl_prog_data->isharp_noise_det.dthreshold = 4; // ISHARP_NOISEDET_DTHRE 1643 // Program noise detection gain 1644 dscl_prog_data->isharp_noise_det.pwl_start_in = 3; // ISHARP_NOISEDET_PWL_START_IN 1645 dscl_prog_data->isharp_noise_det.pwl_end_in = 13; // ISHARP_NOISEDET_PWL_END_IN 1646 dscl_prog_data->isharp_noise_det.pwl_slope = 1623; // ISHARP_NOISEDET_PWL_SLOPE 1647 1648 if (lls_pref == LLS_PREF_NO) /* ISHARP_FMT_MODE */ 1649 dscl_prog_data->isharp_fmt.mode = 1; 1650 else 1651 dscl_prog_data->isharp_fmt.mode = 0; 1652 1653 dscl_prog_data->isharp_fmt.norm = 0x3C00; // ISHARP_FMT_NORM 1654 dscl_prog_data->isharp_lba.mode = 0; // ISHARP_LBA_MODE 1655 1656 if (setup == SDR_L) { 1657 // ISHARP_LBA_PWL_SEG0: ISHARP Local Brightness Adjustment PWL Segment 0 1658 dscl_prog_data->isharp_lba.in_seg[0] = 0; // ISHARP LBA PWL for Seg 0. INPUT value in U0.10 format 1659 dscl_prog_data->isharp_lba.base_seg[0] = 0; // ISHARP LBA PWL for Seg 0. BASE value in U0.6 format 1660 dscl_prog_data->isharp_lba.slope_seg[0] = 62; // ISHARP LBA for Seg 0. SLOPE value in S5.3 format 1661 // ISHARP_LBA_PWL_SEG1: ISHARP LBA PWL Segment 1 1662 dscl_prog_data->isharp_lba.in_seg[1] = 130; // ISHARP LBA PWL for Seg 1. INPUT value in U0.10 format 1663 dscl_prog_data->isharp_lba.base_seg[1] = 63; // ISHARP LBA PWL for Seg 1. BASE value in U0.6 format 1664 dscl_prog_data->isharp_lba.slope_seg[1] = 0; // ISHARP LBA for Seg 1. SLOPE value in S5.3 format 1665 // ISHARP_LBA_PWL_SEG2: ISHARP LBA PWL Segment 2 1666 dscl_prog_data->isharp_lba.in_seg[2] = 450; // ISHARP LBA PWL for Seg 2. INPUT value in U0.10 format 1667 dscl_prog_data->isharp_lba.base_seg[2] = 63; // ISHARP LBA PWL for Seg 2. BASE value in U0.6 format 1668 dscl_prog_data->isharp_lba.slope_seg[2] = 0x18D; // ISHARP LBA for Seg 2. SLOPE value in S5.3 format = -115 1669 // ISHARP_LBA_PWL_SEG3: ISHARP LBA PWL Segment 3 1670 dscl_prog_data->isharp_lba.in_seg[3] = 520; // ISHARP LBA PWL for Seg 3.INPUT value in U0.10 format 1671 dscl_prog_data->isharp_lba.base_seg[3] = 0; // ISHARP LBA PWL for Seg 3. BASE value in U0.6 format 1672 dscl_prog_data->isharp_lba.slope_seg[3] = 0; // ISHARP LBA for Seg 3. SLOPE value in S5.3 format 1673 // ISHARP_LBA_PWL_SEG4: ISHARP LBA PWL Segment 4 1674 dscl_prog_data->isharp_lba.in_seg[4] = 520; // ISHARP LBA PWL for Seg 4.INPUT value in U0.10 format 1675 dscl_prog_data->isharp_lba.base_seg[4] = 0; // ISHARP LBA PWL for Seg 4. BASE value in U0.6 format 1676 dscl_prog_data->isharp_lba.slope_seg[4] = 0; // ISHARP LBA for Seg 4. SLOPE value in S5.3 format 1677 // ISHARP_LBA_PWL_SEG5: ISHARP LBA PWL Segment 5 1678 dscl_prog_data->isharp_lba.in_seg[5] = 520; // ISHARP LBA PWL for Seg 5.INPUT value in U0.10 format 1679 dscl_prog_data->isharp_lba.base_seg[5] = 0; // ISHARP LBA PWL for Seg 5. BASE value in U0.6 format 1680 } else if (setup == HDR_L) { 1681 // ISHARP_LBA_PWL_SEG0: ISHARP Local Brightness Adjustment PWL Segment 0 1682 dscl_prog_data->isharp_lba.in_seg[0] = 0; // ISHARP LBA PWL for Seg 0. INPUT value in U0.10 format 1683 dscl_prog_data->isharp_lba.base_seg[0] = 0; // ISHARP LBA PWL for Seg 0. BASE value in U0.6 format 1684 dscl_prog_data->isharp_lba.slope_seg[0] = 32; // ISHARP LBA for Seg 0. SLOPE value in S5.3 format 1685 // ISHARP_LBA_PWL_SEG1: ISHARP LBA PWL Segment 1 1686 dscl_prog_data->isharp_lba.in_seg[1] = 254; // ISHARP LBA PWL for Seg 1. INPUT value in U0.10 format 1687 dscl_prog_data->isharp_lba.base_seg[1] = 63; // ISHARP LBA PWL for Seg 1. BASE value in U0.6 format 1688 dscl_prog_data->isharp_lba.slope_seg[1] = 0; // ISHARP LBA for Seg 1. SLOPE value in S5.3 format 1689 // ISHARP_LBA_PWL_SEG2: ISHARP LBA PWL Segment 2 1690 dscl_prog_data->isharp_lba.in_seg[2] = 559; // ISHARP LBA PWL for Seg 2. INPUT value in U0.10 format 1691 dscl_prog_data->isharp_lba.base_seg[2] = 63; // ISHARP LBA PWL for Seg 2. BASE value in U0.6 format 1692 dscl_prog_data->isharp_lba.slope_seg[2] = 0x10C; // ISHARP LBA for Seg 2. SLOPE value in S5.3 format = -244 1693 // ISHARP_LBA_PWL_SEG3: ISHARP LBA PWL Segment 3 1694 dscl_prog_data->isharp_lba.in_seg[3] = 592; // ISHARP LBA PWL for Seg 3.INPUT value in U0.10 format 1695 dscl_prog_data->isharp_lba.base_seg[3] = 0; // ISHARP LBA PWL for Seg 3. BASE value in U0.6 format 1696 dscl_prog_data->isharp_lba.slope_seg[3] = 0; // ISHARP LBA for Seg 3. SLOPE value in S5.3 format 1697 // ISHARP_LBA_PWL_SEG4: ISHARP LBA PWL Segment 4 1698 dscl_prog_data->isharp_lba.in_seg[4] = 1023; // ISHARP LBA PWL for Seg 4.INPUT value in U0.10 format 1699 dscl_prog_data->isharp_lba.base_seg[4] = 0; // ISHARP LBA PWL for Seg 4. BASE value in U0.6 format 1700 dscl_prog_data->isharp_lba.slope_seg[4] = 0; // ISHARP LBA for Seg 4. SLOPE value in S5.3 format 1701 // ISHARP_LBA_PWL_SEG5: ISHARP LBA PWL Segment 5 1702 dscl_prog_data->isharp_lba.in_seg[5] = 1023; // ISHARP LBA PWL for Seg 5.INPUT value in U0.10 format 1703 dscl_prog_data->isharp_lba.base_seg[5] = 0; // ISHARP LBA PWL for Seg 5. BASE value in U0.6 format 1704 } else { 1705 // ISHARP_LBA_PWL_SEG0: ISHARP Local Brightness Adjustment PWL Segment 0 1706 dscl_prog_data->isharp_lba.in_seg[0] = 0; // ISHARP LBA PWL for Seg 0. INPUT value in U0.10 format 1707 dscl_prog_data->isharp_lba.base_seg[0] = 0; // ISHARP LBA PWL for Seg 0. BASE value in U0.6 format 1708 dscl_prog_data->isharp_lba.slope_seg[0] = 40; // ISHARP LBA for Seg 0. SLOPE value in S5.3 format 1709 // ISHARP_LBA_PWL_SEG1: ISHARP LBA PWL Segment 1 1710 dscl_prog_data->isharp_lba.in_seg[1] = 204; // ISHARP LBA PWL for Seg 1. INPUT value in U0.10 format 1711 dscl_prog_data->isharp_lba.base_seg[1] = 63; // ISHARP LBA PWL for Seg 1. BASE value in U0.6 format 1712 dscl_prog_data->isharp_lba.slope_seg[1] = 0; // ISHARP LBA for Seg 1. SLOPE value in S5.3 format 1713 // ISHARP_LBA_PWL_SEG2: ISHARP LBA PWL Segment 2 1714 dscl_prog_data->isharp_lba.in_seg[2] = 818; // ISHARP LBA PWL for Seg 2. INPUT value in U0.10 format 1715 dscl_prog_data->isharp_lba.base_seg[2] = 63; // ISHARP LBA PWL for Seg 2. BASE value in U0.6 format 1716 dscl_prog_data->isharp_lba.slope_seg[2] = 0x1D9; // ISHARP LBA for Seg 2. SLOPE value in S5.3 format = -39 1717 // ISHARP_LBA_PWL_SEG3: ISHARP LBA PWL Segment 3 1718 dscl_prog_data->isharp_lba.in_seg[3] = 1023; // ISHARP LBA PWL for Seg 3.INPUT value in U0.10 format 1719 dscl_prog_data->isharp_lba.base_seg[3] = 0; // ISHARP LBA PWL for Seg 3. BASE value in U0.6 format 1720 dscl_prog_data->isharp_lba.slope_seg[3] = 0; // ISHARP LBA for Seg 3. SLOPE value in S5.3 format 1721 // ISHARP_LBA_PWL_SEG4: ISHARP LBA PWL Segment 4 1722 dscl_prog_data->isharp_lba.in_seg[4] = 1023; // ISHARP LBA PWL for Seg 4.INPUT value in U0.10 format 1723 dscl_prog_data->isharp_lba.base_seg[4] = 0; // ISHARP LBA PWL for Seg 4. BASE value in U0.6 format 1724 dscl_prog_data->isharp_lba.slope_seg[4] = 0; // ISHARP LBA for Seg 4. SLOPE value in S5.3 format 1725 // ISHARP_LBA_PWL_SEG5: ISHARP LBA PWL Segment 5 1726 dscl_prog_data->isharp_lba.in_seg[5] = 1023; // ISHARP LBA PWL for Seg 5.INPUT value in U0.10 format 1727 dscl_prog_data->isharp_lba.base_seg[5] = 0; // ISHARP LBA PWL for Seg 5. BASE value in U0.6 format 1728 } 1729 1730 // Program the nldelta soft clip values 1731 if (lls_pref == LLS_PREF_YES) { 1732 dscl_prog_data->isharp_nldelta_sclip.enable_p = 0; /* ISHARP_NLDELTA_SCLIP_EN_P */ 1733 dscl_prog_data->isharp_nldelta_sclip.pivot_p = 0; /* ISHARP_NLDELTA_SCLIP_PIVOT_P */ 1734 dscl_prog_data->isharp_nldelta_sclip.slope_p = 0; /* ISHARP_NLDELTA_SCLIP_SLOPE_P */ 1735 dscl_prog_data->isharp_nldelta_sclip.enable_n = 1; /* ISHARP_NLDELTA_SCLIP_EN_N */ 1736 dscl_prog_data->isharp_nldelta_sclip.pivot_n = 71; /* ISHARP_NLDELTA_SCLIP_PIVOT_N */ 1737 dscl_prog_data->isharp_nldelta_sclip.slope_n = 16; /* ISHARP_NLDELTA_SCLIP_SLOPE_N */ 1738 } else { 1739 dscl_prog_data->isharp_nldelta_sclip.enable_p = 1; /* ISHARP_NLDELTA_SCLIP_EN_P */ 1740 dscl_prog_data->isharp_nldelta_sclip.pivot_p = 70; /* ISHARP_NLDELTA_SCLIP_PIVOT_P */ 1741 dscl_prog_data->isharp_nldelta_sclip.slope_p = 24; /* ISHARP_NLDELTA_SCLIP_SLOPE_P */ 1742 dscl_prog_data->isharp_nldelta_sclip.enable_n = 1; /* ISHARP_NLDELTA_SCLIP_EN_N */ 1743 dscl_prog_data->isharp_nldelta_sclip.pivot_n = 70; /* ISHARP_NLDELTA_SCLIP_PIVOT_N */ 1744 dscl_prog_data->isharp_nldelta_sclip.slope_n = 24; /* ISHARP_NLDELTA_SCLIP_SLOPE_N */ 1745 } 1746 1747 // Set the values as per lookup table 1748 spl_set_blur_scale_data(dscl_prog_data, data); 1749 } 1750 1751 /* Calculate recout, scaling ratio, and viewport, then get optimal number of taps */ 1752 static bool spl_calculate_number_of_taps(struct spl_in *spl_in, struct spl_scratch *spl_scratch, struct spl_out *spl_out, 1753 bool *enable_easf_v, bool *enable_easf_h, bool *enable_isharp) 1754 { 1755 bool res = false; 1756 1757 memset(spl_scratch, 0, sizeof(struct spl_scratch)); 1758 spl_scratch->scl_data.h_active = spl_in->h_active; 1759 spl_scratch->scl_data.v_active = spl_in->v_active; 1760 1761 // All SPL calls 1762 /* recout calculation */ 1763 /* depends on h_active */ 1764 spl_calculate_recout(spl_in, spl_scratch, spl_out); 1765 /* depends on pixel format */ 1766 spl_calculate_scaling_ratios(spl_in, spl_scratch, spl_out); 1767 /* depends on scaling ratios and recout, does not calculate offset yet */ 1768 spl_calculate_viewport_size(spl_in, spl_scratch); 1769 1770 res = spl_get_optimal_number_of_taps( 1771 spl_in->basic_out.max_downscale_src_width, spl_in, 1772 spl_scratch, &spl_in->scaling_quality, enable_easf_v, 1773 enable_easf_h, enable_isharp); 1774 return res; 1775 } 1776 1777 /* Calculate scaler parameters */ 1778 bool spl_calculate_scaler_params(struct spl_in *spl_in, struct spl_out *spl_out) 1779 { 1780 bool res = false; 1781 bool enable_easf_v = false; 1782 bool enable_easf_h = false; 1783 int vratio = 0; 1784 int hratio = 0; 1785 struct spl_scratch spl_scratch; 1786 struct spl_fixed31_32 isharp_scale_ratio; 1787 enum system_setup setup; 1788 bool enable_isharp = false; 1789 const struct spl_scaler_data *data = &spl_scratch.scl_data; 1790 1791 res = spl_calculate_number_of_taps(spl_in, &spl_scratch, spl_out, 1792 &enable_easf_v, &enable_easf_h, &enable_isharp); 1793 1794 /* 1795 * Depends on recout, scaling ratios, h_active and taps 1796 * May need to re-check lb size after this in some obscure scenario 1797 */ 1798 if (res) 1799 spl_calculate_inits_and_viewports(spl_in, &spl_scratch); 1800 // Handle 3d recout 1801 spl_handle_3d_recout(spl_in, &spl_scratch.scl_data.recout); 1802 // Clamp 1803 spl_clamp_viewport(&spl_scratch.scl_data.viewport); 1804 1805 // Save all calculated parameters in dscl_prog_data structure to program hw registers 1806 spl_set_dscl_prog_data(spl_in, &spl_scratch, spl_out, enable_easf_v, enable_easf_h, enable_isharp); 1807 1808 if (!res) 1809 return res; 1810 1811 if (spl_in->lls_pref == LLS_PREF_YES) { 1812 if (spl_in->is_hdr_on) 1813 setup = HDR_L; 1814 else 1815 setup = SDR_L; 1816 } else { 1817 if (spl_in->is_hdr_on) 1818 setup = HDR_NL; 1819 else 1820 setup = SDR_NL; 1821 } 1822 1823 // Set EASF 1824 spl_set_easf_data(&spl_scratch, spl_out, enable_easf_v, enable_easf_h, spl_in->lls_pref, 1825 spl_in->basic_in.format, setup, spl_in->sdr_white_level_nits); 1826 1827 // Set iSHARP 1828 vratio = spl_fixpt_ceil(spl_scratch.scl_data.ratios.vert); 1829 hratio = spl_fixpt_ceil(spl_scratch.scl_data.ratios.horz); 1830 if (vratio <= hratio) 1831 isharp_scale_ratio = spl_scratch.scl_data.recip_ratios.vert; 1832 else 1833 isharp_scale_ratio = spl_scratch.scl_data.recip_ratios.horz; 1834 1835 spl_set_isharp_data(spl_out->dscl_prog_data, spl_in->adaptive_sharpness, enable_isharp, 1836 spl_in->lls_pref, spl_in->basic_in.format, data, isharp_scale_ratio, setup, 1837 spl_in->debug.scale_to_sharpness_policy); 1838 1839 return res; 1840 } 1841 1842 /* External interface to get number of taps only */ 1843 bool spl_get_number_of_taps(struct spl_in *spl_in, struct spl_out *spl_out) 1844 { 1845 bool res = false; 1846 bool enable_easf_v = false; 1847 bool enable_easf_h = false; 1848 bool enable_isharp = false; 1849 struct spl_scratch spl_scratch; 1850 struct dscl_prog_data *dscl_prog_data = spl_out->dscl_prog_data; 1851 const struct spl_scaler_data *data = &spl_scratch.scl_data; 1852 1853 res = spl_calculate_number_of_taps(spl_in, &spl_scratch, spl_out, 1854 &enable_easf_v, &enable_easf_h, &enable_isharp); 1855 spl_set_taps_data(dscl_prog_data, data); 1856 return res; 1857 } 1858