1 // SPDX-License-Identifier: MIT 2 // 3 // Copyright 2024 Advanced Micro Devices, Inc. 4 5 #include "dc_spl.h" 6 #include "dc_spl_scl_easf_filters.h" 7 #include "dc_spl_isharp_filters.h" 8 #include "spl_debug.h" 9 10 #define IDENTITY_RATIO(ratio) (spl_fixpt_u3d19(ratio) == (1 << 19)) 11 #define MIN_VIEWPORT_SIZE 12 12 13 static bool spl_is_yuv420(enum spl_pixel_format format) 14 { 15 if ((format >= SPL_PIXEL_FORMAT_420BPP8) && 16 (format <= SPL_PIXEL_FORMAT_420BPP10)) 17 return true; 18 19 return false; 20 } 21 22 static bool spl_is_rgb8(enum spl_pixel_format format) 23 { 24 if (format == SPL_PIXEL_FORMAT_ARGB8888) 25 return true; 26 27 return false; 28 } 29 30 static bool spl_is_video_format(enum spl_pixel_format format) 31 { 32 if (format >= SPL_PIXEL_FORMAT_VIDEO_BEGIN 33 && format <= SPL_PIXEL_FORMAT_VIDEO_END) 34 return true; 35 else 36 return false; 37 } 38 39 static bool spl_is_subsampled_format(enum spl_pixel_format format) 40 { 41 if (format >= SPL_PIXEL_FORMAT_SUBSAMPLED_BEGIN 42 && format <= SPL_PIXEL_FORMAT_SUBSAMPLED_END) 43 return true; 44 else 45 return false; 46 } 47 48 static struct spl_rect intersect_rec(const struct spl_rect *r0, const struct spl_rect *r1) 49 { 50 struct spl_rect rec; 51 int r0_x_end = r0->x + r0->width; 52 int r1_x_end = r1->x + r1->width; 53 int r0_y_end = r0->y + r0->height; 54 int r1_y_end = r1->y + r1->height; 55 56 rec.x = r0->x > r1->x ? r0->x : r1->x; 57 rec.width = r0_x_end > r1_x_end ? r1_x_end - rec.x : r0_x_end - rec.x; 58 rec.y = r0->y > r1->y ? r0->y : r1->y; 59 rec.height = r0_y_end > r1_y_end ? r1_y_end - rec.y : r0_y_end - rec.y; 60 61 /* in case that there is no intersection */ 62 if (rec.width < 0 || rec.height < 0) 63 memset(&rec, 0, sizeof(rec)); 64 65 return rec; 66 } 67 68 static struct spl_rect shift_rec(const struct spl_rect *rec_in, int x, int y) 69 { 70 struct spl_rect rec_out = *rec_in; 71 72 rec_out.x += x; 73 rec_out.y += y; 74 75 return rec_out; 76 } 77 78 static void spl_opp_adjust_rect(struct spl_rect *rec, const struct spl_opp_adjust *adjust) 79 { 80 if ((rec->x + adjust->x) >= 0) 81 rec->x += adjust->x; 82 83 if ((rec->y + adjust->y) >= 0) 84 rec->y += adjust->y; 85 86 if ((rec->width + adjust->width) >= 1) 87 rec->width += adjust->width; 88 89 if ((rec->height + adjust->height) >= 1) 90 rec->height += adjust->height; 91 } 92 93 static struct spl_rect calculate_plane_rec_in_timing_active( 94 struct spl_in *spl_in, 95 const struct spl_rect *rec_in) 96 { 97 /* 98 * The following diagram shows an example where we map a 1920x1200 99 * desktop to a 2560x1440 timing with a plane rect in the middle 100 * of the screen. To map a plane rect from Stream Source to Timing 101 * Active space, we first multiply stream scaling ratios (i.e 2304/1920 102 * horizontal and 1440/1200 vertical) to the plane's x and y, then 103 * we add stream destination offsets (i.e 128 horizontal, 0 vertical). 104 * This will give us a plane rect's position in Timing Active. However 105 * we have to remove the fractional. The rule is that we find left/right 106 * and top/bottom positions and round the value to the adjacent integer. 107 * 108 * Stream Source Space 109 * ------------ 110 * __________________________________________________ 111 * |Stream Source (1920 x 1200) ^ | 112 * | y | 113 * | <------- w --------|> | 114 * | __________________V | 115 * |<-- x -->|Plane//////////////| ^ | 116 * | |(pre scale)////////| | | 117 * | |///////////////////| | | 118 * | |///////////////////| h | 119 * | |///////////////////| | | 120 * | |///////////////////| | | 121 * | |///////////////////| V | 122 * | | 123 * | | 124 * |__________________________________________________| 125 * 126 * 127 * Timing Active Space 128 * --------------------------------- 129 * 130 * Timing Active (2560 x 1440) 131 * __________________________________________________ 132 * |*****| Stteam Destination (2304 x 1440) |*****| 133 * |*****| |*****| 134 * |<128>| |*****| 135 * |*****| __________________ |*****| 136 * |*****| |Plane/////////////| |*****| 137 * |*****| |(post scale)//////| |*****| 138 * |*****| |//////////////////| |*****| 139 * |*****| |//////////////////| |*****| 140 * |*****| |//////////////////| |*****| 141 * |*****| |//////////////////| |*****| 142 * |*****| |*****| 143 * |*****| |*****| 144 * |*****| |*****| 145 * |*****|______________________________________|*****| 146 * 147 * So the resulting formulas are shown below: 148 * 149 * recout_x = 128 + round(plane_x * 2304 / 1920) 150 * recout_w = 128 + round((plane_x + plane_w) * 2304 / 1920) - recout_x 151 * recout_y = 0 + round(plane_y * 1440 / 1200) 152 * recout_h = 0 + round((plane_y + plane_h) * 1440 / 1200) - recout_y 153 * 154 * NOTE: fixed point division is not error free. To reduce errors 155 * introduced by fixed point division, we divide only after 156 * multiplication is complete. 157 */ 158 const struct spl_rect *stream_src = &spl_in->basic_out.src_rect; 159 const struct spl_rect *stream_dst = &spl_in->basic_out.dst_rect; 160 struct spl_rect rec_out = {0}; 161 struct spl_fixed31_32 temp; 162 163 164 temp = spl_fixpt_from_fraction(rec_in->x * (long long)stream_dst->width, 165 stream_src->width); 166 rec_out.x = stream_dst->x + spl_fixpt_round(temp); 167 168 temp = spl_fixpt_from_fraction( 169 (rec_in->x + rec_in->width) * (long long)stream_dst->width, 170 stream_src->width); 171 rec_out.width = stream_dst->x + spl_fixpt_round(temp) - rec_out.x; 172 173 temp = spl_fixpt_from_fraction(rec_in->y * (long long)stream_dst->height, 174 stream_src->height); 175 rec_out.y = stream_dst->y + spl_fixpt_round(temp); 176 177 temp = spl_fixpt_from_fraction( 178 (rec_in->y + rec_in->height) * (long long)stream_dst->height, 179 stream_src->height); 180 rec_out.height = stream_dst->y + spl_fixpt_round(temp) - rec_out.y; 181 182 return rec_out; 183 } 184 185 static struct spl_rect calculate_mpc_slice_in_timing_active( 186 struct spl_in *spl_in, 187 struct spl_rect *plane_clip_rec) 188 { 189 bool use_recout_width_aligned = 190 spl_in->basic_in.num_h_slices_recout_width_align.use_recout_width_aligned; 191 int mpc_slice_count = 192 spl_in->basic_in.num_h_slices_recout_width_align.num_slices_recout_width.mpc_num_h_slices; 193 int recout_width_align = 194 spl_in->basic_in.num_h_slices_recout_width_align.num_slices_recout_width.mpc_recout_width_align; 195 int mpc_slice_idx = spl_in->basic_in.mpc_h_slice_index; 196 int epimo = mpc_slice_count - plane_clip_rec->width % mpc_slice_count - 1; 197 struct spl_rect mpc_rec; 198 199 if (use_recout_width_aligned) { 200 mpc_rec.width = recout_width_align; 201 if ((mpc_rec.width * (mpc_slice_idx + 1)) > plane_clip_rec->width) { 202 mpc_rec.width = plane_clip_rec->width % recout_width_align; 203 mpc_rec.x = plane_clip_rec->x + recout_width_align * mpc_slice_idx; 204 } else 205 mpc_rec.x = plane_clip_rec->x + mpc_rec.width * mpc_slice_idx; 206 mpc_rec.height = plane_clip_rec->height; 207 mpc_rec.y = plane_clip_rec->y; 208 209 } else { 210 mpc_rec.width = plane_clip_rec->width / mpc_slice_count; 211 mpc_rec.x = plane_clip_rec->x + mpc_rec.width * mpc_slice_idx; 212 mpc_rec.height = plane_clip_rec->height; 213 mpc_rec.y = plane_clip_rec->y; 214 } 215 SPL_ASSERT(mpc_slice_count == 1 || 216 spl_in->basic_out.view_format != SPL_VIEW_3D_SIDE_BY_SIDE || 217 mpc_rec.width % 2 == 0); 218 219 /* extra pixels in the division remainder need to go to pipes after 220 * the extra pixel index minus one(epimo) defined here as: 221 */ 222 if (mpc_slice_idx > epimo) { 223 mpc_rec.x += mpc_slice_idx - epimo - 1; 224 mpc_rec.width += 1; 225 } 226 227 if (spl_in->basic_out.view_format == SPL_VIEW_3D_TOP_AND_BOTTOM) { 228 SPL_ASSERT(mpc_rec.height % 2 == 0); 229 mpc_rec.height /= 2; 230 } 231 return mpc_rec; 232 } 233 234 static struct spl_rect calculate_odm_slice_in_timing_active(struct spl_in *spl_in) 235 { 236 int odm_slice_count = spl_in->basic_out.odm_combine_factor; 237 int odm_slice_idx = spl_in->odm_slice_index; 238 bool is_last_odm_slice = (odm_slice_idx + 1) == odm_slice_count; 239 int h_active = spl_in->basic_out.output_size.width; 240 int v_active = spl_in->basic_out.output_size.height; 241 int odm_slice_width; 242 struct spl_rect odm_rec; 243 244 if (spl_in->basic_out.odm_combine_factor > 0) { 245 odm_slice_width = h_active / odm_slice_count; 246 /* 247 * deprecated, caller must pass in odm slice rect i.e OPP input 248 * rect in timing active for the new interface. 249 */ 250 if (spl_in->basic_out.use_two_pixels_per_container && (odm_slice_width % 2)) 251 odm_slice_width++; 252 253 odm_rec.x = odm_slice_width * odm_slice_idx; 254 odm_rec.width = is_last_odm_slice ? 255 /* last slice width is the reminder of h_active */ 256 h_active - odm_slice_width * (odm_slice_count - 1) : 257 /* odm slice width is the floor of h_active / count */ 258 odm_slice_width; 259 odm_rec.y = 0; 260 odm_rec.height = v_active; 261 262 return odm_rec; 263 } 264 265 return spl_in->basic_out.odm_slice_rect; 266 } 267 268 static void spl_calculate_recout(struct spl_in *spl_in, struct spl_scratch *spl_scratch, struct spl_out *spl_out) 269 { 270 /* 271 * A plane clip represents the desired plane size and position in Stream 272 * Source Space. Stream Source is the destination where all planes are 273 * blended (i.e. positioned, scaled and overlaid). It is a canvas where 274 * all planes associated with the current stream are drawn together. 275 * After Stream Source is completed, we will further scale and 276 * reposition the entire canvas of the stream source to Stream 277 * Destination in Timing Active Space. This could be due to display 278 * overscan adjustment where we will need to rescale and reposition all 279 * the planes so they can fit into a TV with overscan or downscale 280 * upscale features such as GPU scaling or VSR. 281 * 282 * This two step blending is a virtual procedure in software. In 283 * hardware there is no such thing as Stream Source. all planes are 284 * blended once in Timing Active Space. Software virtualizes a Stream 285 * Source space to decouple the math complicity so scaling param 286 * calculation focuses on one step at a time. 287 * 288 * In the following two diagrams, user applied 10% overscan adjustment 289 * so the Stream Source needs to be scaled down a little before mapping 290 * to Timing Active Space. As a result the Plane Clip is also scaled 291 * down by the same ratio, Plane Clip position (i.e. x and y) with 292 * respect to Stream Source is also scaled down. To map it in Timing 293 * Active Space additional x and y offsets from Stream Destination are 294 * added to Plane Clip as well. 295 * 296 * Stream Source Space 297 * ------------ 298 * __________________________________________________ 299 * |Stream Source (3840 x 2160) ^ | 300 * | y | 301 * | | | 302 * | __________________V | 303 * |<-- x -->|Plane Clip/////////| | 304 * | |(pre scale)////////| | 305 * | |///////////////////| | 306 * | |///////////////////| | 307 * | |///////////////////| | 308 * | |///////////////////| | 309 * | |///////////////////| | 310 * | | 311 * | | 312 * |__________________________________________________| 313 * 314 * 315 * Timing Active Space (3840 x 2160) 316 * --------------------------------- 317 * 318 * Timing Active 319 * __________________________________________________ 320 * | y_____________________________________________ | 321 * |x |Stream Destination (3456 x 1944) | | 322 * | | | | 323 * | | __________________ | | 324 * | | |Plane Clip////////| | | 325 * | | |(post scale)//////| | | 326 * | | |//////////////////| | | 327 * | | |//////////////////| | | 328 * | | |//////////////////| | | 329 * | | |//////////////////| | | 330 * | | | | 331 * | | | | 332 * | |____________________________________________| | 333 * |__________________________________________________| 334 * 335 * 336 * In Timing Active Space a plane clip could be further sliced into 337 * pieces called MPC slices. Each Pipe Context is responsible for 338 * processing only one MPC slice so the plane processing workload can be 339 * distributed to multiple DPP Pipes. MPC slices could be blended 340 * together to a single ODM slice. Each ODM slice is responsible for 341 * processing a portion of Timing Active divided horizontally so the 342 * output pixel processing workload can be distributed to multiple OPP 343 * pipes. All ODM slices are mapped together in ODM block so all MPC 344 * slices belong to different ODM slices could be pieced together to 345 * form a single image in Timing Active. MPC slices must belong to 346 * single ODM slice. If an MPC slice goes across ODM slice boundary, it 347 * needs to be divided into two MPC slices one for each ODM slice. 348 * 349 * In the following diagram the output pixel processing workload is 350 * divided horizontally into two ODM slices one for each OPP blend tree. 351 * OPP0 blend tree is responsible for processing left half of Timing 352 * Active, while OPP2 blend tree is responsible for processing right 353 * half. 354 * 355 * The plane has two MPC slices. However since the right MPC slice goes 356 * across ODM boundary, two DPP pipes are needed one for each OPP blend 357 * tree. (i.e. DPP1 for OPP0 blend tree and DPP2 for OPP2 blend tree). 358 * 359 * Assuming that we have a Pipe Context associated with OPP0 and DPP1 360 * working on processing the plane in the diagram. We want to know the 361 * width and height of the shaded rectangle and its relative position 362 * with respect to the ODM slice0. This is called the recout of the pipe 363 * context. 364 * 365 * Planes can be at arbitrary size and position and there could be an 366 * arbitrary number of MPC and ODM slices. The algorithm needs to take 367 * all scenarios into account. 368 * 369 * Timing Active Space (3840 x 2160) 370 * --------------------------------- 371 * 372 * Timing Active 373 * __________________________________________________ 374 * |OPP0(ODM slice0)^ |OPP2(ODM slice1) | 375 * | y | | 376 * | | <- w -> | 377 * | _____V________|____ | 378 * | |DPP0 ^ |DPP1 |DPP2| | 379 * |<------ x |-----|->|/////| | | 380 * | | | |/////| | | 381 * | | h |/////| | | 382 * | | | |/////| | | 383 * | |_____V__|/////|____| | 384 * | | | 385 * | | | 386 * | | | 387 * |_________________________|________________________| 388 * 389 * 390 */ 391 struct spl_rect plane_clip; 392 struct spl_rect mpc_slice_of_plane_clip; 393 struct spl_rect odm_slice; 394 struct spl_rect overlapping_area; 395 396 plane_clip = calculate_plane_rec_in_timing_active(spl_in, 397 &spl_in->basic_in.clip_rect); 398 /* guard plane clip from drawing beyond stream dst here */ 399 plane_clip = intersect_rec(&plane_clip, 400 &spl_in->basic_out.dst_rect); 401 mpc_slice_of_plane_clip = calculate_mpc_slice_in_timing_active( 402 spl_in, &plane_clip); 403 odm_slice = calculate_odm_slice_in_timing_active(spl_in); 404 overlapping_area = intersect_rec(&mpc_slice_of_plane_clip, &odm_slice); 405 406 if (overlapping_area.height > 0 && 407 overlapping_area.width > 0) { 408 /* shift the overlapping area so it is with respect to current 409 * ODM slice's position 410 */ 411 spl_scratch->scl_data.recout = shift_rec( 412 &overlapping_area, 413 -odm_slice.x, -odm_slice.y); 414 spl_scratch->scl_data.recout.height -= 415 spl_in->debug.visual_confirm_base_offset; 416 spl_scratch->scl_data.recout.height -= 417 spl_in->debug.visual_confirm_dpp_offset; 418 } else 419 /* if there is no overlap, zero recout */ 420 memset(&spl_scratch->scl_data.recout, 0, 421 sizeof(struct spl_rect)); 422 } 423 424 /* Calculate scaling ratios */ 425 static void spl_calculate_scaling_ratios(struct spl_in *spl_in, 426 struct spl_scratch *spl_scratch, 427 struct spl_out *spl_out) 428 { 429 const int in_w = spl_in->basic_out.src_rect.width; 430 const int in_h = spl_in->basic_out.src_rect.height; 431 const int out_w = spl_in->basic_out.dst_rect.width; 432 const int out_h = spl_in->basic_out.dst_rect.height; 433 struct spl_rect surf_src = spl_in->basic_in.src_rect; 434 435 /*Swap surf_src height and width since scaling ratios are in recout rotation*/ 436 if (spl_in->basic_in.rotation == SPL_ROTATION_ANGLE_90 || 437 spl_in->basic_in.rotation == SPL_ROTATION_ANGLE_270) 438 spl_swap(surf_src.height, surf_src.width); 439 440 spl_scratch->scl_data.ratios.horz = spl_fixpt_from_fraction( 441 surf_src.width, 442 spl_in->basic_in.dst_rect.width); 443 spl_scratch->scl_data.ratios.vert = spl_fixpt_from_fraction( 444 surf_src.height, 445 spl_in->basic_in.dst_rect.height); 446 447 if (spl_in->basic_out.view_format == SPL_VIEW_3D_SIDE_BY_SIDE) 448 spl_scratch->scl_data.ratios.horz.value *= 2; 449 else if (spl_in->basic_out.view_format == SPL_VIEW_3D_TOP_AND_BOTTOM) 450 spl_scratch->scl_data.ratios.vert.value *= 2; 451 452 spl_scratch->scl_data.ratios.vert.value = spl_div64_s64( 453 spl_scratch->scl_data.ratios.vert.value * in_h, out_h); 454 spl_scratch->scl_data.ratios.horz.value = spl_div64_s64( 455 spl_scratch->scl_data.ratios.horz.value * in_w, out_w); 456 457 spl_scratch->scl_data.ratios.horz_c = spl_scratch->scl_data.ratios.horz; 458 spl_scratch->scl_data.ratios.vert_c = spl_scratch->scl_data.ratios.vert; 459 460 if (spl_is_yuv420(spl_in->basic_in.format)) { 461 spl_scratch->scl_data.ratios.horz_c.value /= 2; 462 spl_scratch->scl_data.ratios.vert_c.value /= 2; 463 } 464 spl_scratch->scl_data.ratios.horz = spl_fixpt_truncate( 465 spl_scratch->scl_data.ratios.horz, 19); 466 spl_scratch->scl_data.ratios.vert = spl_fixpt_truncate( 467 spl_scratch->scl_data.ratios.vert, 19); 468 spl_scratch->scl_data.ratios.horz_c = spl_fixpt_truncate( 469 spl_scratch->scl_data.ratios.horz_c, 19); 470 spl_scratch->scl_data.ratios.vert_c = spl_fixpt_truncate( 471 spl_scratch->scl_data.ratios.vert_c, 19); 472 473 /* 474 * Coefficient table and some registers are different based on ratio 475 * that is output/input. Currently we calculate input/output 476 * Store 1/ratio in recip_ratio for those lookups 477 */ 478 spl_scratch->scl_data.recip_ratios.horz = spl_fixpt_recip( 479 spl_scratch->scl_data.ratios.horz); 480 spl_scratch->scl_data.recip_ratios.vert = spl_fixpt_recip( 481 spl_scratch->scl_data.ratios.vert); 482 spl_scratch->scl_data.recip_ratios.horz_c = spl_fixpt_recip( 483 spl_scratch->scl_data.ratios.horz_c); 484 spl_scratch->scl_data.recip_ratios.vert_c = spl_fixpt_recip( 485 spl_scratch->scl_data.ratios.vert_c); 486 } 487 488 /* Calculate Viewport size */ 489 static void spl_calculate_viewport_size(struct spl_in *spl_in, struct spl_scratch *spl_scratch) 490 { 491 spl_scratch->scl_data.viewport.width = spl_fixpt_ceil(spl_fixpt_mul_int(spl_scratch->scl_data.ratios.horz, 492 spl_scratch->scl_data.recout.width)); 493 spl_scratch->scl_data.viewport.height = spl_fixpt_ceil(spl_fixpt_mul_int(spl_scratch->scl_data.ratios.vert, 494 spl_scratch->scl_data.recout.height)); 495 spl_scratch->scl_data.viewport_c.width = spl_fixpt_ceil(spl_fixpt_mul_int(spl_scratch->scl_data.ratios.horz_c, 496 spl_scratch->scl_data.recout.width)); 497 spl_scratch->scl_data.viewport_c.height = spl_fixpt_ceil(spl_fixpt_mul_int(spl_scratch->scl_data.ratios.vert_c, 498 spl_scratch->scl_data.recout.height)); 499 if (spl_in->basic_in.rotation == SPL_ROTATION_ANGLE_90 || 500 spl_in->basic_in.rotation == SPL_ROTATION_ANGLE_270) { 501 spl_swap(spl_scratch->scl_data.viewport.width, spl_scratch->scl_data.viewport.height); 502 spl_swap(spl_scratch->scl_data.viewport_c.width, spl_scratch->scl_data.viewport_c.height); 503 } 504 } 505 506 static void spl_get_vp_scan_direction(enum spl_rotation_angle rotation, 507 bool horizontal_mirror, 508 bool *orthogonal_rotation, 509 bool *flip_vert_scan_dir, 510 bool *flip_horz_scan_dir) 511 { 512 *orthogonal_rotation = false; 513 *flip_vert_scan_dir = false; 514 *flip_horz_scan_dir = false; 515 if (rotation == SPL_ROTATION_ANGLE_180) { 516 *flip_vert_scan_dir = true; 517 *flip_horz_scan_dir = true; 518 } else if (rotation == SPL_ROTATION_ANGLE_90) { 519 *orthogonal_rotation = true; 520 *flip_horz_scan_dir = true; 521 } else if (rotation == SPL_ROTATION_ANGLE_270) { 522 *orthogonal_rotation = true; 523 *flip_vert_scan_dir = true; 524 } 525 526 if (horizontal_mirror) 527 *flip_horz_scan_dir = !*flip_horz_scan_dir; 528 } 529 530 /* 531 * We completely calculate vp offset, size and inits here based entirely on scaling 532 * ratios and recout for pixel perfect pipe combine. 533 */ 534 static void spl_calculate_init_and_vp(bool flip_scan_dir, 535 int recout_offset_within_recout_full, 536 int recout_size, 537 int src_size, 538 int taps, 539 struct spl_fixed31_32 ratio, 540 struct spl_fixed31_32 init_adj, 541 struct spl_fixed31_32 *init, 542 int *vp_offset, 543 int *vp_size) 544 { 545 struct spl_fixed31_32 temp; 546 int int_part; 547 548 /* 549 * First of the taps starts sampling pixel number <init_int_part> corresponding to recout 550 * pixel 1. Next recout pixel samples int part of <init + scaling ratio> and so on. 551 * All following calculations are based on this logic. 552 * 553 * Init calculated according to formula: 554 * init = (scaling_ratio + number_of_taps + 1) / 2 555 * init_bot = init + scaling_ratio 556 * to get pixel perfect combine add the fraction from calculating vp offset 557 */ 558 temp = spl_fixpt_mul_int(ratio, recout_offset_within_recout_full); 559 *vp_offset = spl_fixpt_floor(temp); 560 temp.value &= 0xffffffff; 561 *init = spl_fixpt_add(spl_fixpt_div_int(spl_fixpt_add_int(ratio, taps + 1), 2), temp); 562 *init = spl_fixpt_add(*init, init_adj); 563 *init = spl_fixpt_truncate(*init, 19); 564 565 /* 566 * If viewport has non 0 offset and there are more taps than covered by init then 567 * we should decrease the offset and increase init so we are never sampling 568 * outside of viewport. 569 */ 570 int_part = spl_fixpt_floor(*init); 571 if (int_part < taps) { 572 int_part = taps - int_part; 573 if (int_part > *vp_offset) 574 int_part = *vp_offset; 575 *vp_offset -= int_part; 576 *init = spl_fixpt_add_int(*init, int_part); 577 } 578 /* 579 * If taps are sampling outside of viewport at end of recout and there are more pixels 580 * available in the surface we should increase the viewport size, regardless set vp to 581 * only what is used. 582 */ 583 temp = spl_fixpt_add(*init, spl_fixpt_mul_int(ratio, recout_size - 1)); 584 *vp_size = spl_fixpt_floor(temp); 585 if (*vp_size + *vp_offset > src_size) 586 *vp_size = src_size - *vp_offset; 587 588 /* We did all the math assuming we are scanning same direction as display does, 589 * however mirror/rotation changes how vp scans vs how it is offset. If scan direction 590 * is flipped we simply need to calculate offset from the other side of plane. 591 * Note that outside of viewport all scaling hardware works in recout space. 592 */ 593 if (flip_scan_dir) 594 *vp_offset = src_size - *vp_offset - *vp_size; 595 } 596 597 /*Calculate inits and viewport */ 598 static void spl_calculate_inits_and_viewports(struct spl_in *spl_in, 599 struct spl_scratch *spl_scratch) 600 { 601 struct spl_rect src = spl_in->basic_in.src_rect; 602 struct spl_rect recout_dst_in_active_timing; 603 struct spl_rect recout_clip_in_active_timing; 604 struct spl_rect recout_clip_in_recout_dst; 605 struct spl_rect overlap_in_active_timing; 606 struct spl_rect odm_slice = calculate_odm_slice_in_timing_active(spl_in); 607 int vpc_div = spl_is_subsampled_format(spl_in->basic_in.format) ? 2 : 1; 608 bool orthogonal_rotation, flip_vert_scan_dir, flip_horz_scan_dir; 609 struct spl_fixed31_32 init_adj_h = spl_fixpt_zero; 610 struct spl_fixed31_32 init_adj_v = spl_fixpt_zero; 611 612 recout_clip_in_active_timing = shift_rec( 613 &spl_scratch->scl_data.recout, odm_slice.x, odm_slice.y); 614 recout_dst_in_active_timing = calculate_plane_rec_in_timing_active( 615 spl_in, &spl_in->basic_in.dst_rect); 616 overlap_in_active_timing = intersect_rec(&recout_clip_in_active_timing, 617 &recout_dst_in_active_timing); 618 if (overlap_in_active_timing.width > 0 && 619 overlap_in_active_timing.height > 0) 620 recout_clip_in_recout_dst = shift_rec(&overlap_in_active_timing, 621 -recout_dst_in_active_timing.x, 622 -recout_dst_in_active_timing.y); 623 else 624 memset(&recout_clip_in_recout_dst, 0, sizeof(struct spl_rect)); 625 /* 626 * Work in recout rotation since that requires less transformations 627 */ 628 spl_get_vp_scan_direction( 629 spl_in->basic_in.rotation, 630 spl_in->basic_in.horizontal_mirror, 631 &orthogonal_rotation, 632 &flip_vert_scan_dir, 633 &flip_horz_scan_dir); 634 635 if (spl_is_subsampled_format(spl_in->basic_in.format)) { 636 /* this gives the direction of the cositing (negative will move 637 * left, right otherwise) 638 */ 639 int sign = 1; 640 641 switch (spl_in->basic_in.cositing) { 642 643 case CHROMA_COSITING_TOPLEFT: 644 init_adj_h = spl_fixpt_from_fraction(sign, 4); 645 init_adj_v = spl_fixpt_from_fraction(sign, 4); 646 break; 647 case CHROMA_COSITING_LEFT: 648 init_adj_h = spl_fixpt_from_fraction(sign, 4); 649 init_adj_v = spl_fixpt_zero; 650 break; 651 case CHROMA_COSITING_NONE: 652 default: 653 init_adj_h = spl_fixpt_zero; 654 init_adj_v = spl_fixpt_zero; 655 break; 656 } 657 } 658 659 if (orthogonal_rotation) { 660 spl_swap(src.width, src.height); 661 spl_swap(flip_vert_scan_dir, flip_horz_scan_dir); 662 spl_swap(init_adj_h, init_adj_v); 663 } 664 665 spl_calculate_init_and_vp( 666 flip_horz_scan_dir, 667 recout_clip_in_recout_dst.x, 668 spl_scratch->scl_data.recout.width, 669 src.width, 670 spl_scratch->scl_data.taps.h_taps, 671 spl_scratch->scl_data.ratios.horz, 672 spl_fixpt_zero, 673 &spl_scratch->scl_data.inits.h, 674 &spl_scratch->scl_data.viewport.x, 675 &spl_scratch->scl_data.viewport.width); 676 spl_calculate_init_and_vp( 677 flip_horz_scan_dir, 678 recout_clip_in_recout_dst.x, 679 spl_scratch->scl_data.recout.width, 680 src.width / vpc_div, 681 spl_scratch->scl_data.taps.h_taps_c, 682 spl_scratch->scl_data.ratios.horz_c, 683 init_adj_h, 684 &spl_scratch->scl_data.inits.h_c, 685 &spl_scratch->scl_data.viewport_c.x, 686 &spl_scratch->scl_data.viewport_c.width); 687 spl_calculate_init_and_vp( 688 flip_vert_scan_dir, 689 recout_clip_in_recout_dst.y, 690 spl_scratch->scl_data.recout.height, 691 src.height, 692 spl_scratch->scl_data.taps.v_taps, 693 spl_scratch->scl_data.ratios.vert, 694 spl_fixpt_zero, 695 &spl_scratch->scl_data.inits.v, 696 &spl_scratch->scl_data.viewport.y, 697 &spl_scratch->scl_data.viewport.height); 698 spl_calculate_init_and_vp( 699 flip_vert_scan_dir, 700 recout_clip_in_recout_dst.y, 701 spl_scratch->scl_data.recout.height, 702 src.height / vpc_div, 703 spl_scratch->scl_data.taps.v_taps_c, 704 spl_scratch->scl_data.ratios.vert_c, 705 init_adj_v, 706 &spl_scratch->scl_data.inits.v_c, 707 &spl_scratch->scl_data.viewport_c.y, 708 &spl_scratch->scl_data.viewport_c.height); 709 if (orthogonal_rotation) { 710 spl_swap(spl_scratch->scl_data.viewport.x, spl_scratch->scl_data.viewport.y); 711 spl_swap(spl_scratch->scl_data.viewport.width, spl_scratch->scl_data.viewport.height); 712 spl_swap(spl_scratch->scl_data.viewport_c.x, spl_scratch->scl_data.viewport_c.y); 713 spl_swap(spl_scratch->scl_data.viewport_c.width, spl_scratch->scl_data.viewport_c.height); 714 } 715 spl_scratch->scl_data.viewport.x += src.x; 716 spl_scratch->scl_data.viewport.y += src.y; 717 SPL_ASSERT(src.x % vpc_div == 0 && src.y % vpc_div == 0); 718 spl_scratch->scl_data.viewport_c.x += src.x / vpc_div; 719 spl_scratch->scl_data.viewport_c.y += src.y / vpc_div; 720 } 721 722 static void spl_handle_3d_recout(struct spl_in *spl_in, struct spl_rect *recout) 723 { 724 /* 725 * Handle side by side and top bottom 3d recout offsets after vp calculation 726 * since 3d is special and needs to calculate vp as if there is no recout offset 727 * This may break with rotation, good thing we aren't mixing hw rotation and 3d 728 */ 729 if (spl_in->basic_in.mpc_h_slice_index) { 730 SPL_ASSERT(spl_in->basic_in.rotation == SPL_ROTATION_ANGLE_0 || 731 (spl_in->basic_out.view_format != SPL_VIEW_3D_TOP_AND_BOTTOM && 732 spl_in->basic_out.view_format != SPL_VIEW_3D_SIDE_BY_SIDE)); 733 if (spl_in->basic_out.view_format == SPL_VIEW_3D_TOP_AND_BOTTOM) 734 recout->y += recout->height; 735 else if (spl_in->basic_out.view_format == SPL_VIEW_3D_SIDE_BY_SIDE) 736 recout->x += recout->width; 737 } 738 } 739 740 static void spl_clamp_viewport(struct spl_rect *viewport, int min_viewport_size) 741 { 742 if (min_viewport_size == 0) 743 min_viewport_size = MIN_VIEWPORT_SIZE; 744 /* Clamp minimum viewport size */ 745 if (viewport->height < min_viewport_size) 746 viewport->height = min_viewport_size; 747 if (viewport->width < min_viewport_size) 748 viewport->width = min_viewport_size; 749 } 750 751 static enum scl_mode spl_get_dscl_mode(const struct spl_in *spl_in, 752 const struct spl_scaler_data *data, 753 bool enable_isharp, bool enable_easf) 754 { 755 const long long one = spl_fixpt_one.value; 756 enum spl_pixel_format pixel_format = spl_in->basic_in.format; 757 758 /* Bypass if ratio is 1:1 with no ISHARP or force scale on */ 759 if (data->ratios.horz.value == one 760 && data->ratios.vert.value == one 761 && data->ratios.horz_c.value == one 762 && data->ratios.vert_c.value == one 763 && !spl_in->basic_out.always_scale 764 && !enable_isharp) 765 return SCL_MODE_SCALING_444_BYPASS; 766 767 if (!spl_is_subsampled_format(pixel_format)) { 768 if (spl_is_video_format(pixel_format)) 769 return SCL_MODE_SCALING_444_YCBCR_ENABLE; 770 else 771 return SCL_MODE_SCALING_444_RGB_ENABLE; 772 } 773 774 /* 775 * Bypass YUV if Y is 1:1 with no ISHARP 776 * Do not bypass UV at 1:1 for cositing to be applied 777 */ 778 if (!enable_isharp) { 779 if (data->ratios.horz.value == one && data->ratios.vert.value == one && !spl_in->basic_out.always_scale) 780 return SCL_MODE_SCALING_420_LUMA_BYPASS; 781 } 782 783 return SCL_MODE_SCALING_420_YCBCR_ENABLE; 784 } 785 786 static void spl_choose_lls_policy(enum spl_pixel_format format, 787 enum linear_light_scaling *lls_pref) 788 { 789 if (spl_is_subsampled_format(format)) 790 *lls_pref = LLS_PREF_NO; 791 else /* RGB or YUV444 */ 792 *lls_pref = LLS_PREF_YES; 793 } 794 795 /* Enable EASF ?*/ 796 static bool enable_easf(struct spl_in *spl_in, struct spl_scratch *spl_scratch) 797 { 798 int vratio = 0; 799 int hratio = 0; 800 bool skip_easf = false; 801 802 if (spl_in->disable_easf) 803 skip_easf = true; 804 805 vratio = spl_fixpt_ceil(spl_scratch->scl_data.ratios.vert); 806 hratio = spl_fixpt_ceil(spl_scratch->scl_data.ratios.horz); 807 808 /* 809 * No EASF support for downscaling > 2:1 810 * EASF support for upscaling or downscaling up to 2:1 811 */ 812 if ((vratio > 2) || (hratio > 2)) 813 skip_easf = true; 814 815 /* 816 * If lls_pref is LLS_PREF_DONT_CARE, then use pixel format 817 * to determine whether to use LINEAR or NONLINEAR scaling 818 */ 819 if (spl_in->lls_pref == LLS_PREF_DONT_CARE) 820 spl_choose_lls_policy(spl_in->basic_in.format, 821 &spl_in->lls_pref); 822 823 /* Check for linear scaling or EASF preferred */ 824 if (spl_in->lls_pref != LLS_PREF_YES && !spl_in->prefer_easf) 825 skip_easf = true; 826 827 return skip_easf; 828 } 829 830 /* Check if video is in fullscreen mode */ 831 static bool spl_is_video_fullscreen(struct spl_in *spl_in) 832 { 833 if (spl_is_video_format(spl_in->basic_in.format) && spl_in->is_fullscreen) 834 return true; 835 return false; 836 } 837 838 static bool spl_get_isharp_en(struct spl_in *spl_in, 839 struct spl_scratch *spl_scratch) 840 { 841 bool enable_isharp = false; 842 int vratio = 0; 843 int hratio = 0; 844 struct spl_taps taps = spl_scratch->scl_data.taps; 845 bool fullscreen = spl_is_video_fullscreen(spl_in); 846 847 /* Return if adaptive sharpness is disabled */ 848 if (spl_in->adaptive_sharpness.enable == false) 849 return enable_isharp; 850 851 vratio = spl_fixpt_ceil(spl_scratch->scl_data.ratios.vert); 852 hratio = spl_fixpt_ceil(spl_scratch->scl_data.ratios.horz); 853 854 /* No iSHARP support for downscaling */ 855 if (vratio > 1 || hratio > 1) 856 return enable_isharp; 857 858 // Scaling is up to 1:1 (no scaling) or upscaling 859 860 /* 861 * Apply sharpness to RGB and YUV (NV12/P010) 862 * surfaces based on policy setting 863 */ 864 if (!spl_is_video_format(spl_in->basic_in.format) && 865 (spl_in->sharpen_policy == SHARPEN_YUV)) 866 return enable_isharp; 867 else if ((spl_is_video_format(spl_in->basic_in.format) && !fullscreen) && 868 (spl_in->sharpen_policy == SHARPEN_RGB_FULLSCREEN_YUV)) 869 return enable_isharp; 870 else if (!spl_in->is_fullscreen && 871 spl_in->sharpen_policy == SHARPEN_FULLSCREEN_ALL) 872 return enable_isharp; 873 874 /* 875 * Apply sharpness if supports horizontal taps 4,6 AND 876 * vertical taps 3, 4, 6 877 */ 878 if ((taps.h_taps == 4 || taps.h_taps == 6) && 879 (taps.v_taps == 3 || taps.v_taps == 4 || taps.v_taps == 6)) 880 enable_isharp = true; 881 882 return enable_isharp; 883 } 884 885 /* Calculate number of tap with adaptive scaling off */ 886 static void spl_get_taps_non_adaptive_scaler( 887 struct spl_scratch *spl_scratch, 888 const struct spl_taps *in_taps, 889 bool is_subsampled) 890 { 891 bool check_max_downscale = false; 892 893 if (in_taps->h_taps == 0) { 894 if (spl_fixpt_ceil(spl_scratch->scl_data.ratios.horz) > 1) 895 spl_scratch->scl_data.taps.h_taps = spl_min(2 * spl_fixpt_ceil( 896 spl_scratch->scl_data.ratios.horz), 8); 897 else 898 spl_scratch->scl_data.taps.h_taps = 4; 899 } else 900 spl_scratch->scl_data.taps.h_taps = in_taps->h_taps; 901 902 if (in_taps->v_taps == 0) { 903 if (spl_fixpt_ceil(spl_scratch->scl_data.ratios.vert) > 1) 904 spl_scratch->scl_data.taps.v_taps = spl_min(2 * spl_fixpt_ceil( 905 spl_scratch->scl_data.ratios.vert), 8); 906 else 907 spl_scratch->scl_data.taps.v_taps = 4; 908 } else 909 spl_scratch->scl_data.taps.v_taps = in_taps->v_taps; 910 911 if (in_taps->v_taps_c == 0) { 912 if (spl_fixpt_ceil(spl_scratch->scl_data.ratios.vert_c) > 1) 913 spl_scratch->scl_data.taps.v_taps_c = spl_min(2 * spl_fixpt_ceil( 914 spl_scratch->scl_data.ratios.vert_c), 8); 915 else 916 spl_scratch->scl_data.taps.v_taps_c = 4; 917 } else 918 spl_scratch->scl_data.taps.v_taps_c = in_taps->v_taps_c; 919 920 if (in_taps->h_taps_c == 0) { 921 if (spl_fixpt_ceil(spl_scratch->scl_data.ratios.horz_c) > 1) 922 spl_scratch->scl_data.taps.h_taps_c = spl_min(2 * spl_fixpt_ceil( 923 spl_scratch->scl_data.ratios.horz_c), 8); 924 else 925 spl_scratch->scl_data.taps.h_taps_c = 4; 926 } else if ((in_taps->h_taps_c % 2) != 0 && in_taps->h_taps_c != 1) 927 /* Only 1 and even h_taps_c are supported by hw */ 928 spl_scratch->scl_data.taps.h_taps_c = in_taps->h_taps_c - 1; 929 else 930 spl_scratch->scl_data.taps.h_taps_c = in_taps->h_taps_c; 931 932 933 /* 934 * Max downscale supported is 6.0x. Add ASSERT to catch if go beyond that 935 */ 936 check_max_downscale = spl_fixpt_le(spl_scratch->scl_data.ratios.horz, 937 spl_fixpt_from_fraction(6, 1)); 938 SPL_ASSERT(check_max_downscale); 939 check_max_downscale = spl_fixpt_le(spl_scratch->scl_data.ratios.vert, 940 spl_fixpt_from_fraction(6, 1)); 941 SPL_ASSERT(check_max_downscale); 942 check_max_downscale = spl_fixpt_le(spl_scratch->scl_data.ratios.horz_c, 943 spl_fixpt_from_fraction(6, 1)); 944 SPL_ASSERT(check_max_downscale); 945 check_max_downscale = spl_fixpt_le(spl_scratch->scl_data.ratios.vert_c, 946 spl_fixpt_from_fraction(6, 1)); 947 SPL_ASSERT(check_max_downscale); 948 949 950 if (IDENTITY_RATIO(spl_scratch->scl_data.ratios.horz)) 951 spl_scratch->scl_data.taps.h_taps = 1; 952 if (IDENTITY_RATIO(spl_scratch->scl_data.ratios.vert)) 953 spl_scratch->scl_data.taps.v_taps = 1; 954 if (IDENTITY_RATIO(spl_scratch->scl_data.ratios.horz_c) && !is_subsampled) 955 spl_scratch->scl_data.taps.h_taps_c = 1; 956 if (IDENTITY_RATIO(spl_scratch->scl_data.ratios.vert_c) && !is_subsampled) 957 spl_scratch->scl_data.taps.v_taps_c = 1; 958 959 } 960 961 /* Calculate optimal number of taps */ 962 static bool spl_get_optimal_number_of_taps( 963 int max_downscale_src_width, struct spl_in *spl_in, struct spl_scratch *spl_scratch, 964 const struct spl_taps *in_taps, bool *enable_easf_v, bool *enable_easf_h, 965 bool *enable_isharp) 966 { 967 int num_part_y, num_part_c; 968 unsigned int max_taps_y, max_taps_c; 969 unsigned int min_taps_y, min_taps_c; 970 enum lb_memory_config lb_config; 971 bool skip_easf = false; 972 bool is_subsampled = spl_is_subsampled_format(spl_in->basic_in.format); 973 974 if (spl_scratch->scl_data.viewport.width > spl_scratch->scl_data.h_active && 975 max_downscale_src_width != 0 && 976 spl_scratch->scl_data.viewport.width > max_downscale_src_width) { 977 spl_get_taps_non_adaptive_scaler(spl_scratch, in_taps, is_subsampled); 978 *enable_easf_v = false; 979 *enable_easf_h = false; 980 *enable_isharp = false; 981 return false; 982 } 983 984 /* Disable adaptive scaler and sharpener when integer scaling is enabled */ 985 if (spl_in->scaling_quality.integer_scaling) { 986 spl_get_taps_non_adaptive_scaler(spl_scratch, in_taps, is_subsampled); 987 *enable_easf_v = false; 988 *enable_easf_h = false; 989 *enable_isharp = false; 990 return true; 991 } 992 993 /* Check if we are using EASF or not */ 994 skip_easf = enable_easf(spl_in, spl_scratch); 995 996 /* 997 * Set default taps if none are provided 998 * From programming guide: taps = min{ ceil(2*H_RATIO,1), 8} for downscaling 999 * taps = 4 for upscaling 1000 */ 1001 if (skip_easf) { 1002 spl_get_taps_non_adaptive_scaler(spl_scratch, in_taps, is_subsampled); 1003 } 1004 else { 1005 if (spl_is_video_format(spl_in->basic_in.format)) { 1006 spl_scratch->scl_data.taps.h_taps = 6; 1007 spl_scratch->scl_data.taps.v_taps = 6; 1008 spl_scratch->scl_data.taps.h_taps_c = 4; 1009 spl_scratch->scl_data.taps.v_taps_c = 4; 1010 } else { /* RGB */ 1011 spl_scratch->scl_data.taps.h_taps = 6; 1012 spl_scratch->scl_data.taps.v_taps = 6; 1013 spl_scratch->scl_data.taps.h_taps_c = 6; 1014 spl_scratch->scl_data.taps.v_taps_c = 6; 1015 } 1016 } 1017 1018 /*Ensure we can support the requested number of vtaps*/ 1019 min_taps_y = spl_fixpt_ceil(spl_scratch->scl_data.ratios.vert); 1020 min_taps_c = spl_fixpt_ceil(spl_scratch->scl_data.ratios.vert_c); 1021 1022 /* Use LB_MEMORY_CONFIG_3 for 4:2:0 */ 1023 if (spl_is_yuv420(spl_in->basic_in.format)) 1024 lb_config = LB_MEMORY_CONFIG_3; 1025 else 1026 lb_config = LB_MEMORY_CONFIG_0; 1027 // Determine max vtap support by calculating how much line buffer can fit 1028 spl_in->callbacks.spl_calc_lb_num_partitions(spl_in->basic_out.alpha_en, &spl_scratch->scl_data, 1029 lb_config, &num_part_y, &num_part_c); 1030 /* MAX_V_TAPS = MIN (NUM_LINES - MAX(CEILING(V_RATIO,1)-2, 0), 8) */ 1031 if (spl_fixpt_ceil(spl_scratch->scl_data.ratios.vert) > 2) 1032 if ((spl_fixpt_ceil(spl_scratch->scl_data.ratios.vert) - 2) > num_part_y) 1033 max_taps_y = 0; 1034 else 1035 max_taps_y = num_part_y - (spl_fixpt_ceil(spl_scratch->scl_data.ratios.vert) - 2); 1036 else 1037 max_taps_y = num_part_y; 1038 1039 if (spl_fixpt_ceil(spl_scratch->scl_data.ratios.vert_c) > 2) 1040 if ((spl_fixpt_ceil(spl_scratch->scl_data.ratios.vert_c) - 2) > num_part_c) 1041 max_taps_c = 0; 1042 else 1043 max_taps_c = num_part_c - (spl_fixpt_ceil(spl_scratch->scl_data.ratios.vert_c) - 2); 1044 else 1045 max_taps_c = num_part_c; 1046 1047 if (max_taps_y < min_taps_y) 1048 return false; 1049 else if (max_taps_c < min_taps_c) 1050 return false; 1051 1052 if (spl_scratch->scl_data.taps.v_taps > max_taps_y) 1053 spl_scratch->scl_data.taps.v_taps = max_taps_y; 1054 1055 if (spl_scratch->scl_data.taps.v_taps_c > max_taps_c) 1056 spl_scratch->scl_data.taps.v_taps_c = max_taps_c; 1057 1058 if (!skip_easf) { 1059 /* 1060 * RGB ( L + NL ) and Linear HDR support 6x6, 6x4, 6x3, 4x4, 4x3 1061 * NL YUV420 only supports 6x6, 6x4 for Y and 4x4 for UV 1062 * 1063 * If LB does not support 3, 4, or 6 taps, then disable EASF_V 1064 * and only enable EASF_H. So for RGB, support 6x2, 4x2 1065 * and for NL YUV420, support 6x2 for Y and 4x2 for UV 1066 * 1067 * All other cases, have to disable EASF_V and EASF_H 1068 * 1069 * If optimal no of taps is 5, then set it to 4 1070 * If optimal no of taps is 7 or 8, then fine since max tap is 6 1071 * 1072 */ 1073 if (spl_scratch->scl_data.taps.v_taps == 5) 1074 spl_scratch->scl_data.taps.v_taps = 4; 1075 1076 if (spl_scratch->scl_data.taps.v_taps_c == 5) 1077 spl_scratch->scl_data.taps.v_taps_c = 4; 1078 1079 if (spl_scratch->scl_data.taps.h_taps == 5) 1080 spl_scratch->scl_data.taps.h_taps = 4; 1081 1082 if (spl_scratch->scl_data.taps.h_taps_c == 5) 1083 spl_scratch->scl_data.taps.h_taps_c = 4; 1084 1085 if (spl_is_video_format(spl_in->basic_in.format)) { 1086 if (spl_scratch->scl_data.taps.h_taps <= 4) { 1087 *enable_easf_v = false; 1088 *enable_easf_h = false; 1089 } else if (spl_scratch->scl_data.taps.v_taps <= 3) { 1090 *enable_easf_v = false; 1091 *enable_easf_h = true; 1092 } else { 1093 *enable_easf_v = true; 1094 *enable_easf_h = true; 1095 } 1096 SPL_ASSERT((spl_scratch->scl_data.taps.v_taps > 1) && 1097 (spl_scratch->scl_data.taps.v_taps_c > 1)); 1098 } else { /* RGB */ 1099 if (spl_scratch->scl_data.taps.h_taps <= 3) { 1100 *enable_easf_v = false; 1101 *enable_easf_h = false; 1102 } else if (spl_scratch->scl_data.taps.v_taps < 3) { 1103 *enable_easf_v = false; 1104 *enable_easf_h = true; 1105 } else { 1106 *enable_easf_v = true; 1107 *enable_easf_h = true; 1108 } 1109 SPL_ASSERT(spl_scratch->scl_data.taps.v_taps > 1); 1110 } 1111 } else { 1112 *enable_easf_v = false; 1113 *enable_easf_h = false; 1114 } // end of if prefer_easf 1115 1116 /* Sharpener requires scaler to be enabled, including for 1:1 1117 * Check if ISHARP can be enabled 1118 * If ISHARP is not enabled, set taps to 1 if ratio is 1:1 1119 * except for chroma taps. Keep previous taps so it can 1120 * handle cositing 1121 */ 1122 1123 *enable_isharp = spl_get_isharp_en(spl_in, spl_scratch); 1124 if (!*enable_isharp && !spl_in->basic_out.always_scale) { 1125 if ((IDENTITY_RATIO(spl_scratch->scl_data.ratios.horz)) && 1126 (IDENTITY_RATIO(spl_scratch->scl_data.ratios.vert))) { 1127 spl_scratch->scl_data.taps.h_taps = 1; 1128 spl_scratch->scl_data.taps.v_taps = 1; 1129 if (IDENTITY_RATIO(spl_scratch->scl_data.ratios.horz_c) && !is_subsampled) 1130 spl_scratch->scl_data.taps.h_taps_c = 1; 1131 1132 if (IDENTITY_RATIO(spl_scratch->scl_data.ratios.vert_c) && !is_subsampled) 1133 spl_scratch->scl_data.taps.v_taps_c = 1; 1134 1135 *enable_easf_v = false; 1136 *enable_easf_h = false; 1137 } else { 1138 if ((!*enable_easf_h) && 1139 (IDENTITY_RATIO(spl_scratch->scl_data.ratios.horz))) 1140 spl_scratch->scl_data.taps.h_taps = 1; 1141 1142 if ((!*enable_easf_v) && 1143 (IDENTITY_RATIO(spl_scratch->scl_data.ratios.vert))) 1144 spl_scratch->scl_data.taps.v_taps = 1; 1145 1146 if ((!*enable_easf_h) && !is_subsampled && 1147 (IDENTITY_RATIO(spl_scratch->scl_data.ratios.horz_c))) 1148 spl_scratch->scl_data.taps.h_taps_c = 1; 1149 1150 if ((!*enable_easf_v) && !is_subsampled && 1151 (IDENTITY_RATIO(spl_scratch->scl_data.ratios.vert_c))) 1152 spl_scratch->scl_data.taps.v_taps_c = 1; 1153 1154 } 1155 } 1156 return true; 1157 } 1158 1159 static void spl_set_black_color_data(enum spl_pixel_format format, 1160 struct scl_black_color *scl_black_color) 1161 { 1162 bool ycbcr = spl_is_video_format(format); 1163 if (ycbcr) { 1164 scl_black_color->offset_rgb_y = BLACK_OFFSET_RGB_Y; 1165 scl_black_color->offset_rgb_cbcr = BLACK_OFFSET_CBCR; 1166 } else { 1167 scl_black_color->offset_rgb_y = 0x0; 1168 scl_black_color->offset_rgb_cbcr = 0x0; 1169 } 1170 } 1171 1172 static void spl_set_manual_ratio_init_data(struct dscl_prog_data *dscl_prog_data, 1173 const struct spl_scaler_data *scl_data) 1174 { 1175 struct spl_fixed31_32 bot; 1176 1177 dscl_prog_data->ratios.h_scale_ratio = spl_fixpt_u3d19(scl_data->ratios.horz) << 5; 1178 dscl_prog_data->ratios.v_scale_ratio = spl_fixpt_u3d19(scl_data->ratios.vert) << 5; 1179 dscl_prog_data->ratios.h_scale_ratio_c = spl_fixpt_u3d19(scl_data->ratios.horz_c) << 5; 1180 dscl_prog_data->ratios.v_scale_ratio_c = spl_fixpt_u3d19(scl_data->ratios.vert_c) << 5; 1181 /* 1182 * 0.24 format for fraction, first five bits zeroed 1183 */ 1184 dscl_prog_data->init.h_filter_init_frac = 1185 spl_fixpt_u0d19(scl_data->inits.h) << 5; 1186 dscl_prog_data->init.h_filter_init_int = 1187 spl_fixpt_floor(scl_data->inits.h); 1188 dscl_prog_data->init.h_filter_init_frac_c = 1189 spl_fixpt_u0d19(scl_data->inits.h_c) << 5; 1190 dscl_prog_data->init.h_filter_init_int_c = 1191 spl_fixpt_floor(scl_data->inits.h_c); 1192 dscl_prog_data->init.v_filter_init_frac = 1193 spl_fixpt_u0d19(scl_data->inits.v) << 5; 1194 dscl_prog_data->init.v_filter_init_int = 1195 spl_fixpt_floor(scl_data->inits.v); 1196 dscl_prog_data->init.v_filter_init_frac_c = 1197 spl_fixpt_u0d19(scl_data->inits.v_c) << 5; 1198 dscl_prog_data->init.v_filter_init_int_c = 1199 spl_fixpt_floor(scl_data->inits.v_c); 1200 1201 bot = spl_fixpt_add(scl_data->inits.v, scl_data->ratios.vert); 1202 dscl_prog_data->init.v_filter_init_bot_frac = spl_fixpt_u0d19(bot) << 5; 1203 dscl_prog_data->init.v_filter_init_bot_int = spl_fixpt_floor(bot); 1204 bot = spl_fixpt_add(scl_data->inits.v_c, scl_data->ratios.vert_c); 1205 dscl_prog_data->init.v_filter_init_bot_frac_c = spl_fixpt_u0d19(bot) << 5; 1206 dscl_prog_data->init.v_filter_init_bot_int_c = spl_fixpt_floor(bot); 1207 } 1208 1209 static void spl_set_taps_data(struct dscl_prog_data *dscl_prog_data, 1210 const struct spl_scaler_data *scl_data) 1211 { 1212 dscl_prog_data->taps.v_taps = scl_data->taps.v_taps - 1; 1213 dscl_prog_data->taps.h_taps = scl_data->taps.h_taps - 1; 1214 dscl_prog_data->taps.v_taps_c = scl_data->taps.v_taps_c - 1; 1215 dscl_prog_data->taps.h_taps_c = scl_data->taps.h_taps_c - 1; 1216 } 1217 1218 /* Populate dscl prog data structure from scaler data calculated by SPL */ 1219 static void spl_set_dscl_prog_data(struct spl_in *spl_in, struct spl_scratch *spl_scratch, 1220 struct spl_out *spl_out, bool enable_easf_v, bool enable_easf_h, bool enable_isharp) 1221 { 1222 struct dscl_prog_data *dscl_prog_data = spl_out->dscl_prog_data; 1223 1224 const struct spl_scaler_data *data = &spl_scratch->scl_data; 1225 1226 struct scl_black_color *scl_black_color = &dscl_prog_data->scl_black_color; 1227 1228 bool enable_easf = enable_easf_v || enable_easf_h; 1229 1230 // Set values for recout 1231 dscl_prog_data->recout = spl_scratch->scl_data.recout; 1232 // Set values for MPC Size 1233 dscl_prog_data->mpc_size.width = spl_scratch->scl_data.h_active; 1234 dscl_prog_data->mpc_size.height = spl_scratch->scl_data.v_active; 1235 1236 // SCL_MODE - Set SCL_MODE data 1237 dscl_prog_data->dscl_mode = spl_get_dscl_mode(spl_in, data, enable_isharp, 1238 enable_easf); 1239 1240 // SCL_BLACK_COLOR 1241 spl_set_black_color_data(spl_in->basic_in.format, scl_black_color); 1242 1243 /* Manually calculate scale ratio and init values */ 1244 spl_set_manual_ratio_init_data(dscl_prog_data, data); 1245 1246 // Set HTaps/VTaps 1247 spl_set_taps_data(dscl_prog_data, data); 1248 // Set viewport 1249 dscl_prog_data->viewport = spl_scratch->scl_data.viewport; 1250 // Set viewport_c 1251 dscl_prog_data->viewport_c = spl_scratch->scl_data.viewport_c; 1252 // Set filters data 1253 spl_set_filters_data(dscl_prog_data, data, enable_easf_v, enable_easf_h); 1254 } 1255 1256 /* Calculate C0-C3 coefficients based on HDR_mult */ 1257 static void spl_calculate_c0_c3_hdr(struct dscl_prog_data *dscl_prog_data, uint32_t sdr_white_level_nits) 1258 { 1259 struct spl_fixed31_32 hdr_mult, c0_mult, c1_mult, c2_mult; 1260 struct spl_fixed31_32 c0_calc, c1_calc, c2_calc; 1261 struct spl_custom_float_format fmt; 1262 uint32_t hdr_multx100_int; 1263 1264 if ((sdr_white_level_nits >= 80) && (sdr_white_level_nits <= 480)) 1265 hdr_multx100_int = sdr_white_level_nits * 100 / 80; 1266 else 1267 hdr_multx100_int = 100; /* default for 80 nits otherwise */ 1268 1269 hdr_mult = spl_fixpt_from_fraction((long long)hdr_multx100_int, 100LL); 1270 c0_mult = spl_fixpt_from_fraction(2126LL, 10000LL); 1271 c1_mult = spl_fixpt_from_fraction(7152LL, 10000LL); 1272 c2_mult = spl_fixpt_from_fraction(722LL, 10000LL); 1273 1274 c0_calc = spl_fixpt_mul(hdr_mult, spl_fixpt_mul(c0_mult, spl_fixpt_from_fraction( 1275 16384LL, 125LL))); 1276 c1_calc = spl_fixpt_mul(hdr_mult, spl_fixpt_mul(c1_mult, spl_fixpt_from_fraction( 1277 16384LL, 125LL))); 1278 c2_calc = spl_fixpt_mul(hdr_mult, spl_fixpt_mul(c2_mult, spl_fixpt_from_fraction( 1279 16384LL, 125LL))); 1280 1281 fmt.exponenta_bits = 5; 1282 fmt.mantissa_bits = 10; 1283 fmt.sign = true; 1284 1285 // fp1.5.10, C0 coefficient (LN_rec709: HDR_MULT * 0.212600 * 2^14/125) 1286 spl_convert_to_custom_float_format(c0_calc, &fmt, &dscl_prog_data->easf_matrix_c0); 1287 // fp1.5.10, C1 coefficient (LN_rec709: HDR_MULT * 0.715200 * 2^14/125) 1288 spl_convert_to_custom_float_format(c1_calc, &fmt, &dscl_prog_data->easf_matrix_c1); 1289 // fp1.5.10, C2 coefficient (LN_rec709: HDR_MULT * 0.072200 * 2^14/125) 1290 spl_convert_to_custom_float_format(c2_calc, &fmt, &dscl_prog_data->easf_matrix_c2); 1291 dscl_prog_data->easf_matrix_c3 = 0x0; // fp1.5.10, C3 coefficient 1292 } 1293 1294 /* Set EASF data */ 1295 static void spl_set_easf_data(struct spl_scratch *spl_scratch, struct spl_out *spl_out, bool enable_easf_v, 1296 bool enable_easf_h, enum linear_light_scaling lls_pref, 1297 enum spl_pixel_format format, enum system_setup setup, 1298 uint32_t sdr_white_level_nits) 1299 { 1300 struct dscl_prog_data *dscl_prog_data = spl_out->dscl_prog_data; 1301 if (enable_easf_v) { 1302 dscl_prog_data->easf_v_en = true; 1303 dscl_prog_data->easf_v_ring = 0; 1304 dscl_prog_data->easf_v_sharp_factor = 1; 1305 dscl_prog_data->easf_v_bf1_en = 1; // 1-bit, BF1 calculation enable, 0=disable, 1=enable 1306 dscl_prog_data->easf_v_bf2_mode = 0xF; // 4-bit, BF2 calculation mode 1307 /* 2-bit, BF3 chroma mode correction calculation mode */ 1308 dscl_prog_data->easf_v_bf3_mode = spl_get_v_bf3_mode( 1309 spl_scratch->scl_data.recip_ratios.vert); 1310 /* FP1.5.10 [ minCoef ]*/ 1311 dscl_prog_data->easf_v_ringest_3tap_dntilt_uptilt = 1312 spl_get_3tap_dntilt_uptilt_offset(spl_scratch->scl_data.taps.v_taps, 1313 spl_scratch->scl_data.recip_ratios.vert); 1314 /* FP1.5.10 [ upTiltMaxVal ]*/ 1315 dscl_prog_data->easf_v_ringest_3tap_uptilt_max = 1316 spl_get_3tap_uptilt_maxval(spl_scratch->scl_data.taps.v_taps, 1317 spl_scratch->scl_data.recip_ratios.vert); 1318 /* FP1.5.10 [ dnTiltSlope ]*/ 1319 dscl_prog_data->easf_v_ringest_3tap_dntilt_slope = 1320 spl_get_3tap_dntilt_slope(spl_scratch->scl_data.taps.v_taps, 1321 spl_scratch->scl_data.recip_ratios.vert); 1322 /* FP1.5.10 [ upTilt1Slope ]*/ 1323 dscl_prog_data->easf_v_ringest_3tap_uptilt1_slope = 1324 spl_get_3tap_uptilt1_slope(spl_scratch->scl_data.taps.v_taps, 1325 spl_scratch->scl_data.recip_ratios.vert); 1326 /* FP1.5.10 [ upTilt2Slope ]*/ 1327 dscl_prog_data->easf_v_ringest_3tap_uptilt2_slope = 1328 spl_get_3tap_uptilt2_slope(spl_scratch->scl_data.taps.v_taps, 1329 spl_scratch->scl_data.recip_ratios.vert); 1330 /* FP1.5.10 [ upTilt2Offset ]*/ 1331 dscl_prog_data->easf_v_ringest_3tap_uptilt2_offset = 1332 spl_get_3tap_uptilt2_offset(spl_scratch->scl_data.taps.v_taps, 1333 spl_scratch->scl_data.recip_ratios.vert); 1334 /* FP1.5.10; (2.0) Ring reducer gain for 4 or 6-tap mode [H_REDUCER_GAIN4] */ 1335 dscl_prog_data->easf_v_ringest_eventap_reduceg1 = 1336 spl_get_reducer_gain4(spl_scratch->scl_data.taps.v_taps, 1337 spl_scratch->scl_data.recip_ratios.vert); 1338 /* FP1.5.10; (2.5) Ring reducer gain for 6-tap mode [V_REDUCER_GAIN6] */ 1339 dscl_prog_data->easf_v_ringest_eventap_reduceg2 = 1340 spl_get_reducer_gain6(spl_scratch->scl_data.taps.v_taps, 1341 spl_scratch->scl_data.recip_ratios.vert); 1342 /* FP1.5.10; (-0.135742) Ring gain for 6-tap set to -139/1024 */ 1343 dscl_prog_data->easf_v_ringest_eventap_gain1 = 1344 spl_get_gainRing4(spl_scratch->scl_data.taps.v_taps, 1345 spl_scratch->scl_data.recip_ratios.vert); 1346 /* FP1.5.10; (-0.024414) Ring gain for 6-tap set to -25/1024 */ 1347 dscl_prog_data->easf_v_ringest_eventap_gain2 = 1348 spl_get_gainRing6(spl_scratch->scl_data.taps.v_taps, 1349 spl_scratch->scl_data.recip_ratios.vert); 1350 dscl_prog_data->easf_v_bf_maxa = 63; //Vertical Max BF value A in U0.6 format.Selected if V_FCNTL == 0 1351 dscl_prog_data->easf_v_bf_maxb = 63; //Vertical Max BF value A in U0.6 format.Selected if V_FCNTL == 1 1352 dscl_prog_data->easf_v_bf_mina = 0; //Vertical Min BF value A in U0.6 format.Selected if V_FCNTL == 0 1353 dscl_prog_data->easf_v_bf_minb = 0; //Vertical Min BF value A in U0.6 format.Selected if V_FCNTL == 1 1354 if (lls_pref == LLS_PREF_YES) { 1355 dscl_prog_data->easf_v_bf2_flat1_gain = 4; // U1.3, BF2 Flat1 Gain control 1356 dscl_prog_data->easf_v_bf2_flat2_gain = 8; // U4.0, BF2 Flat2 Gain control 1357 dscl_prog_data->easf_v_bf2_roc_gain = 4; // U2.2, Rate Of Change control 1358 1359 dscl_prog_data->easf_v_bf1_pwl_in_seg0 = 0x600; // S0.10, BF1 PWL Segment 0 = -512 1360 dscl_prog_data->easf_v_bf1_pwl_base_seg0 = 0; // U0.6, BF1 Base PWL Segment 0 1361 dscl_prog_data->easf_v_bf1_pwl_slope_seg0 = 3; // S7.3, BF1 Slope PWL Segment 0 1362 dscl_prog_data->easf_v_bf1_pwl_in_seg1 = 0x7EC; // S0.10, BF1 PWL Segment 1 = -20 1363 dscl_prog_data->easf_v_bf1_pwl_base_seg1 = 12; // U0.6, BF1 Base PWL Segment 1 1364 dscl_prog_data->easf_v_bf1_pwl_slope_seg1 = 326; // S7.3, BF1 Slope PWL Segment 1 1365 dscl_prog_data->easf_v_bf1_pwl_in_seg2 = 0; // S0.10, BF1 PWL Segment 2 1366 dscl_prog_data->easf_v_bf1_pwl_base_seg2 = 63; // U0.6, BF1 Base PWL Segment 2 1367 dscl_prog_data->easf_v_bf1_pwl_slope_seg2 = 0; // S7.3, BF1 Slope PWL Segment 2 1368 dscl_prog_data->easf_v_bf1_pwl_in_seg3 = 16; // S0.10, BF1 PWL Segment 3 1369 dscl_prog_data->easf_v_bf1_pwl_base_seg3 = 63; // U0.6, BF1 Base PWL Segment 3 1370 dscl_prog_data->easf_v_bf1_pwl_slope_seg3 = 0x7C8; // S7.3, BF1 Slope PWL Segment 3 = -56 1371 dscl_prog_data->easf_v_bf1_pwl_in_seg4 = 32; // S0.10, BF1 PWL Segment 4 1372 dscl_prog_data->easf_v_bf1_pwl_base_seg4 = 56; // U0.6, BF1 Base PWL Segment 4 1373 dscl_prog_data->easf_v_bf1_pwl_slope_seg4 = 0x7D0; // S7.3, BF1 Slope PWL Segment 4 = -48 1374 dscl_prog_data->easf_v_bf1_pwl_in_seg5 = 48; // S0.10, BF1 PWL Segment 5 1375 dscl_prog_data->easf_v_bf1_pwl_base_seg5 = 50; // U0.6, BF1 Base PWL Segment 5 1376 dscl_prog_data->easf_v_bf1_pwl_slope_seg5 = 0x710; // S7.3, BF1 Slope PWL Segment 5 = -240 1377 dscl_prog_data->easf_v_bf1_pwl_in_seg6 = 64; // S0.10, BF1 PWL Segment 6 1378 dscl_prog_data->easf_v_bf1_pwl_base_seg6 = 20; // U0.6, BF1 Base PWL Segment 6 1379 dscl_prog_data->easf_v_bf1_pwl_slope_seg6 = 0x760; // S7.3, BF1 Slope PWL Segment 6 = -160 1380 dscl_prog_data->easf_v_bf1_pwl_in_seg7 = 80; // S0.10, BF1 PWL Segment 7 1381 dscl_prog_data->easf_v_bf1_pwl_base_seg7 = 0; // U0.6, BF1 Base PWL Segment 7 1382 1383 dscl_prog_data->easf_v_bf3_pwl_in_set0 = 0x000; // FP0.6.6, BF3 Input value PWL Segment 0 1384 dscl_prog_data->easf_v_bf3_pwl_base_set0 = 63; // S0.6, BF3 Base PWL Segment 0 1385 dscl_prog_data->easf_v_bf3_pwl_slope_set0 = 0x12C5; // FP1.6.6, BF3 Slope PWL Segment 0 1386 dscl_prog_data->easf_v_bf3_pwl_in_set1 = 1387 0x0B37; // FP0.6.6, BF3 Input value PWL Segment 1 (0.0078125 * 125^3) 1388 dscl_prog_data->easf_v_bf3_pwl_base_set1 = 62; // S0.6, BF3 Base PWL Segment 1 1389 dscl_prog_data->easf_v_bf3_pwl_slope_set1 = 1390 0x13B8; // FP1.6.6, BF3 Slope PWL Segment 1 1391 dscl_prog_data->easf_v_bf3_pwl_in_set2 = 1392 0x0BB7; // FP0.6.6, BF3 Input value PWL Segment 2 (0.03125 * 125^3) 1393 dscl_prog_data->easf_v_bf3_pwl_base_set2 = 20; // S0.6, BF3 Base PWL Segment 2 1394 dscl_prog_data->easf_v_bf3_pwl_slope_set2 = 1395 0x1356; // FP1.6.6, BF3 Slope PWL Segment 2 1396 dscl_prog_data->easf_v_bf3_pwl_in_set3 = 1397 0x0BF7; // FP0.6.6, BF3 Input value PWL Segment 3 (0.0625 * 125^3) 1398 dscl_prog_data->easf_v_bf3_pwl_base_set3 = 0; // S0.6, BF3 Base PWL Segment 3 1399 dscl_prog_data->easf_v_bf3_pwl_slope_set3 = 1400 0x136B; // FP1.6.6, BF3 Slope PWL Segment 3 1401 dscl_prog_data->easf_v_bf3_pwl_in_set4 = 1402 0x0C37; // FP0.6.6, BF3 Input value PWL Segment 4 (0.125 * 125^3) 1403 dscl_prog_data->easf_v_bf3_pwl_base_set4 = 0x4E; // S0.6, BF3 Base PWL Segment 4 = -50 1404 dscl_prog_data->easf_v_bf3_pwl_slope_set4 = 1405 0x1200; // FP1.6.6, BF3 Slope PWL Segment 4 1406 dscl_prog_data->easf_v_bf3_pwl_in_set5 = 1407 0x0CF7; // FP0.6.6, BF3 Input value PWL Segment 5 (1.0 * 125^3) 1408 dscl_prog_data->easf_v_bf3_pwl_base_set5 = 0x41; // S0.6, BF3 Base PWL Segment 5 = -63 1409 } else { 1410 dscl_prog_data->easf_v_bf2_flat1_gain = 13; // U1.3, BF2 Flat1 Gain control 1411 dscl_prog_data->easf_v_bf2_flat2_gain = 15; // U4.0, BF2 Flat2 Gain control 1412 dscl_prog_data->easf_v_bf2_roc_gain = 14; // U2.2, Rate Of Change control 1413 1414 dscl_prog_data->easf_v_bf1_pwl_in_seg0 = 0x440; // S0.10, BF1 PWL Segment 0 = -960 1415 dscl_prog_data->easf_v_bf1_pwl_base_seg0 = 0; // U0.6, BF1 Base PWL Segment 0 1416 dscl_prog_data->easf_v_bf1_pwl_slope_seg0 = 2; // S7.3, BF1 Slope PWL Segment 0 1417 dscl_prog_data->easf_v_bf1_pwl_in_seg1 = 0x7C4; // S0.10, BF1 PWL Segment 1 = -60 1418 dscl_prog_data->easf_v_bf1_pwl_base_seg1 = 12; // U0.6, BF1 Base PWL Segment 1 1419 dscl_prog_data->easf_v_bf1_pwl_slope_seg1 = 109; // S7.3, BF1 Slope PWL Segment 1 1420 dscl_prog_data->easf_v_bf1_pwl_in_seg2 = 0; // S0.10, BF1 PWL Segment 2 1421 dscl_prog_data->easf_v_bf1_pwl_base_seg2 = 63; // U0.6, BF1 Base PWL Segment 2 1422 dscl_prog_data->easf_v_bf1_pwl_slope_seg2 = 0; // S7.3, BF1 Slope PWL Segment 2 1423 dscl_prog_data->easf_v_bf1_pwl_in_seg3 = 48; // S0.10, BF1 PWL Segment 3 1424 dscl_prog_data->easf_v_bf1_pwl_base_seg3 = 63; // U0.6, BF1 Base PWL Segment 3 1425 dscl_prog_data->easf_v_bf1_pwl_slope_seg3 = 0x7ED; // S7.3, BF1 Slope PWL Segment 3 = -19 1426 dscl_prog_data->easf_v_bf1_pwl_in_seg4 = 96; // S0.10, BF1 PWL Segment 4 1427 dscl_prog_data->easf_v_bf1_pwl_base_seg4 = 56; // U0.6, BF1 Base PWL Segment 4 1428 dscl_prog_data->easf_v_bf1_pwl_slope_seg4 = 0x7F0; // S7.3, BF1 Slope PWL Segment 4 = -16 1429 dscl_prog_data->easf_v_bf1_pwl_in_seg5 = 144; // S0.10, BF1 PWL Segment 5 1430 dscl_prog_data->easf_v_bf1_pwl_base_seg5 = 50; // U0.6, BF1 Base PWL Segment 5 1431 dscl_prog_data->easf_v_bf1_pwl_slope_seg5 = 0x7B0; // S7.3, BF1 Slope PWL Segment 5 = -80 1432 dscl_prog_data->easf_v_bf1_pwl_in_seg6 = 192; // S0.10, BF1 PWL Segment 6 1433 dscl_prog_data->easf_v_bf1_pwl_base_seg6 = 20; // U0.6, BF1 Base PWL Segment 6 1434 dscl_prog_data->easf_v_bf1_pwl_slope_seg6 = 0x7CB; // S7.3, BF1 Slope PWL Segment 6 = -53 1435 dscl_prog_data->easf_v_bf1_pwl_in_seg7 = 240; // S0.10, BF1 PWL Segment 7 1436 dscl_prog_data->easf_v_bf1_pwl_base_seg7 = 0; // U0.6, BF1 Base PWL Segment 7 1437 1438 dscl_prog_data->easf_v_bf3_pwl_in_set0 = 0x000; // FP0.6.6, BF3 Input value PWL Segment 0 1439 dscl_prog_data->easf_v_bf3_pwl_base_set0 = 63; // S0.6, BF3 Base PWL Segment 0 1440 dscl_prog_data->easf_v_bf3_pwl_slope_set0 = 0x0000; // FP1.6.6, BF3 Slope PWL Segment 0 1441 dscl_prog_data->easf_v_bf3_pwl_in_set1 = 1442 0x06C0; // FP0.6.6, BF3 Input value PWL Segment 1 (0.0625) 1443 dscl_prog_data->easf_v_bf3_pwl_base_set1 = 63; // S0.6, BF3 Base PWL Segment 1 1444 dscl_prog_data->easf_v_bf3_pwl_slope_set1 = 0x1896; // FP1.6.6, BF3 Slope PWL Segment 1 1445 dscl_prog_data->easf_v_bf3_pwl_in_set2 = 1446 0x0700; // FP0.6.6, BF3 Input value PWL Segment 2 (0.125) 1447 dscl_prog_data->easf_v_bf3_pwl_base_set2 = 20; // S0.6, BF3 Base PWL Segment 2 1448 dscl_prog_data->easf_v_bf3_pwl_slope_set2 = 0x1810; // FP1.6.6, BF3 Slope PWL Segment 2 1449 dscl_prog_data->easf_v_bf3_pwl_in_set3 = 1450 0x0740; // FP0.6.6, BF3 Input value PWL Segment 3 (0.25) 1451 dscl_prog_data->easf_v_bf3_pwl_base_set3 = 0; // S0.6, BF3 Base PWL Segment 3 1452 dscl_prog_data->easf_v_bf3_pwl_slope_set3 = 1453 0x1878; // FP1.6.6, BF3 Slope PWL Segment 3 1454 dscl_prog_data->easf_v_bf3_pwl_in_set4 = 1455 0x0761; // FP0.6.6, BF3 Input value PWL Segment 4 (0.375) 1456 dscl_prog_data->easf_v_bf3_pwl_base_set4 = 0x44; // S0.6, BF3 Base PWL Segment 4 = -60 1457 dscl_prog_data->easf_v_bf3_pwl_slope_set4 = 0x1760; // FP1.6.6, BF3 Slope PWL Segment 4 1458 dscl_prog_data->easf_v_bf3_pwl_in_set5 = 1459 0x0780; // FP0.6.6, BF3 Input value PWL Segment 5 (0.5) 1460 dscl_prog_data->easf_v_bf3_pwl_base_set5 = 0x41; // S0.6, BF3 Base PWL Segment 5 = -63 1461 } 1462 } else 1463 dscl_prog_data->easf_v_en = false; 1464 1465 if (enable_easf_h) { 1466 dscl_prog_data->easf_h_en = true; 1467 dscl_prog_data->easf_h_ring = 0; 1468 dscl_prog_data->easf_h_sharp_factor = 1; 1469 dscl_prog_data->easf_h_bf1_en = 1470 1; // 1-bit, BF1 calculation enable, 0=disable, 1=enable 1471 dscl_prog_data->easf_h_bf2_mode = 1472 0xF; // 4-bit, BF2 calculation mode 1473 /* 2-bit, BF3 chroma mode correction calculation mode */ 1474 dscl_prog_data->easf_h_bf3_mode = spl_get_h_bf3_mode( 1475 spl_scratch->scl_data.recip_ratios.horz); 1476 /* FP1.5.10; (2.0) Ring reducer gain for 4 or 6-tap mode [H_REDUCER_GAIN4] */ 1477 dscl_prog_data->easf_h_ringest_eventap_reduceg1 = 1478 spl_get_reducer_gain4(spl_scratch->scl_data.taps.h_taps, 1479 spl_scratch->scl_data.recip_ratios.horz); 1480 /* FP1.5.10; (2.5) Ring reducer gain for 6-tap mode [V_REDUCER_GAIN6] */ 1481 dscl_prog_data->easf_h_ringest_eventap_reduceg2 = 1482 spl_get_reducer_gain6(spl_scratch->scl_data.taps.h_taps, 1483 spl_scratch->scl_data.recip_ratios.horz); 1484 /* FP1.5.10; (-0.135742) Ring gain for 6-tap set to -139/1024 */ 1485 dscl_prog_data->easf_h_ringest_eventap_gain1 = 1486 spl_get_gainRing4(spl_scratch->scl_data.taps.h_taps, 1487 spl_scratch->scl_data.recip_ratios.horz); 1488 /* FP1.5.10; (-0.024414) Ring gain for 6-tap set to -25/1024 */ 1489 dscl_prog_data->easf_h_ringest_eventap_gain2 = 1490 spl_get_gainRing6(spl_scratch->scl_data.taps.h_taps, 1491 spl_scratch->scl_data.recip_ratios.horz); 1492 dscl_prog_data->easf_h_bf_maxa = 63; //Horz Max BF value A in U0.6 format.Selected if H_FCNTL==0 1493 dscl_prog_data->easf_h_bf_maxb = 63; //Horz Max BF value B in U0.6 format.Selected if H_FCNTL==1 1494 dscl_prog_data->easf_h_bf_mina = 0; //Horz Min BF value B in U0.6 format.Selected if H_FCNTL==0 1495 dscl_prog_data->easf_h_bf_minb = 0; //Horz Min BF value B in U0.6 format.Selected if H_FCNTL==1 1496 if (lls_pref == LLS_PREF_YES) { 1497 dscl_prog_data->easf_h_bf2_flat1_gain = 4; // U1.3, BF2 Flat1 Gain control 1498 dscl_prog_data->easf_h_bf2_flat2_gain = 8; // U4.0, BF2 Flat2 Gain control 1499 dscl_prog_data->easf_h_bf2_roc_gain = 4; // U2.2, Rate Of Change control 1500 1501 dscl_prog_data->easf_h_bf1_pwl_in_seg0 = 0x600; // S0.10, BF1 PWL Segment 0 = -512 1502 dscl_prog_data->easf_h_bf1_pwl_base_seg0 = 0; // U0.6, BF1 Base PWL Segment 0 1503 dscl_prog_data->easf_h_bf1_pwl_slope_seg0 = 3; // S7.3, BF1 Slope PWL Segment 0 1504 dscl_prog_data->easf_h_bf1_pwl_in_seg1 = 0x7EC; // S0.10, BF1 PWL Segment 1 = -20 1505 dscl_prog_data->easf_h_bf1_pwl_base_seg1 = 12; // U0.6, BF1 Base PWL Segment 1 1506 dscl_prog_data->easf_h_bf1_pwl_slope_seg1 = 326; // S7.3, BF1 Slope PWL Segment 1 1507 dscl_prog_data->easf_h_bf1_pwl_in_seg2 = 0; // S0.10, BF1 PWL Segment 2 1508 dscl_prog_data->easf_h_bf1_pwl_base_seg2 = 63; // U0.6, BF1 Base PWL Segment 2 1509 dscl_prog_data->easf_h_bf1_pwl_slope_seg2 = 0; // S7.3, BF1 Slope PWL Segment 2 1510 dscl_prog_data->easf_h_bf1_pwl_in_seg3 = 16; // S0.10, BF1 PWL Segment 3 1511 dscl_prog_data->easf_h_bf1_pwl_base_seg3 = 63; // U0.6, BF1 Base PWL Segment 3 1512 dscl_prog_data->easf_h_bf1_pwl_slope_seg3 = 0x7C8; // S7.3, BF1 Slope PWL Segment 3 = -56 1513 dscl_prog_data->easf_h_bf1_pwl_in_seg4 = 32; // S0.10, BF1 PWL Segment 4 1514 dscl_prog_data->easf_h_bf1_pwl_base_seg4 = 56; // U0.6, BF1 Base PWL Segment 4 1515 dscl_prog_data->easf_h_bf1_pwl_slope_seg4 = 0x7D0; // S7.3, BF1 Slope PWL Segment 4 = -48 1516 dscl_prog_data->easf_h_bf1_pwl_in_seg5 = 48; // S0.10, BF1 PWL Segment 5 1517 dscl_prog_data->easf_h_bf1_pwl_base_seg5 = 50; // U0.6, BF1 Base PWL Segment 5 1518 dscl_prog_data->easf_h_bf1_pwl_slope_seg5 = 0x710; // S7.3, BF1 Slope PWL Segment 5 = -240 1519 dscl_prog_data->easf_h_bf1_pwl_in_seg6 = 64; // S0.10, BF1 PWL Segment 6 1520 dscl_prog_data->easf_h_bf1_pwl_base_seg6 = 20; // U0.6, BF1 Base PWL Segment 6 1521 dscl_prog_data->easf_h_bf1_pwl_slope_seg6 = 0x760; // S7.3, BF1 Slope PWL Segment 6 = -160 1522 dscl_prog_data->easf_h_bf1_pwl_in_seg7 = 80; // S0.10, BF1 PWL Segment 7 1523 dscl_prog_data->easf_h_bf1_pwl_base_seg7 = 0; // U0.6, BF1 Base PWL Segment 7 1524 1525 dscl_prog_data->easf_h_bf3_pwl_in_set0 = 0x000; // FP0.6.6, BF3 Input value PWL Segment 0 1526 dscl_prog_data->easf_h_bf3_pwl_base_set0 = 63; // S0.6, BF3 Base PWL Segment 0 1527 dscl_prog_data->easf_h_bf3_pwl_slope_set0 = 0x12C5; // FP1.6.6, BF3 Slope PWL Segment 0 1528 dscl_prog_data->easf_h_bf3_pwl_in_set1 = 1529 0x0B37; // FP0.6.6, BF3 Input value PWL Segment 1 (0.0078125 * 125^3) 1530 dscl_prog_data->easf_h_bf3_pwl_base_set1 = 62; // S0.6, BF3 Base PWL Segment 1 1531 dscl_prog_data->easf_h_bf3_pwl_slope_set1 = 0x13B8; // FP1.6.6, BF3 Slope PWL Segment 1 1532 dscl_prog_data->easf_h_bf3_pwl_in_set2 = 1533 0x0BB7; // FP0.6.6, BF3 Input value PWL Segment 2 (0.03125 * 125^3) 1534 dscl_prog_data->easf_h_bf3_pwl_base_set2 = 20; // S0.6, BF3 Base PWL Segment 2 1535 dscl_prog_data->easf_h_bf3_pwl_slope_set2 = 0x1356; // FP1.6.6, BF3 Slope PWL Segment 2 1536 dscl_prog_data->easf_h_bf3_pwl_in_set3 = 1537 0x0BF7; // FP0.6.6, BF3 Input value PWL Segment 3 (0.0625 * 125^3) 1538 dscl_prog_data->easf_h_bf3_pwl_base_set3 = 0; // S0.6, BF3 Base PWL Segment 3 1539 dscl_prog_data->easf_h_bf3_pwl_slope_set3 = 0x136B; // FP1.6.6, BF3 Slope PWL Segment 3 1540 dscl_prog_data->easf_h_bf3_pwl_in_set4 = 1541 0x0C37; // FP0.6.6, BF3 Input value PWL Segment 4 (0.125 * 125^3) 1542 dscl_prog_data->easf_h_bf3_pwl_base_set4 = 0x4E; // S0.6, BF3 Base PWL Segment 4 = -50 1543 dscl_prog_data->easf_h_bf3_pwl_slope_set4 = 0x1200; // FP1.6.6, BF3 Slope PWL Segment 4 1544 dscl_prog_data->easf_h_bf3_pwl_in_set5 = 1545 0x0CF7; // FP0.6.6, BF3 Input value PWL Segment 5 (1.0 * 125^3) 1546 dscl_prog_data->easf_h_bf3_pwl_base_set5 = 0x41; // S0.6, BF3 Base PWL Segment 5 = -63 1547 } else { 1548 dscl_prog_data->easf_h_bf2_flat1_gain = 13; // U1.3, BF2 Flat1 Gain control 1549 dscl_prog_data->easf_h_bf2_flat2_gain = 15; // U4.0, BF2 Flat2 Gain control 1550 dscl_prog_data->easf_h_bf2_roc_gain = 14; // U2.2, Rate Of Change control 1551 1552 dscl_prog_data->easf_h_bf1_pwl_in_seg0 = 0x440; // S0.10, BF1 PWL Segment 0 = -960 1553 dscl_prog_data->easf_h_bf1_pwl_base_seg0 = 0; // U0.6, BF1 Base PWL Segment 0 1554 dscl_prog_data->easf_h_bf1_pwl_slope_seg0 = 2; // S7.3, BF1 Slope PWL Segment 0 1555 dscl_prog_data->easf_h_bf1_pwl_in_seg1 = 0x7C4; // S0.10, BF1 PWL Segment 1 = -60 1556 dscl_prog_data->easf_h_bf1_pwl_base_seg1 = 12; // U0.6, BF1 Base PWL Segment 1 1557 dscl_prog_data->easf_h_bf1_pwl_slope_seg1 = 109; // S7.3, BF1 Slope PWL Segment 1 1558 dscl_prog_data->easf_h_bf1_pwl_in_seg2 = 0; // S0.10, BF1 PWL Segment 2 1559 dscl_prog_data->easf_h_bf1_pwl_base_seg2 = 63; // U0.6, BF1 Base PWL Segment 2 1560 dscl_prog_data->easf_h_bf1_pwl_slope_seg2 = 0; // S7.3, BF1 Slope PWL Segment 2 1561 dscl_prog_data->easf_h_bf1_pwl_in_seg3 = 48; // S0.10, BF1 PWL Segment 3 1562 dscl_prog_data->easf_h_bf1_pwl_base_seg3 = 63; // U0.6, BF1 Base PWL Segment 3 1563 dscl_prog_data->easf_h_bf1_pwl_slope_seg3 = 0x7ED; // S7.3, BF1 Slope PWL Segment 3 = -19 1564 dscl_prog_data->easf_h_bf1_pwl_in_seg4 = 96; // S0.10, BF1 PWL Segment 4 1565 dscl_prog_data->easf_h_bf1_pwl_base_seg4 = 56; // U0.6, BF1 Base PWL Segment 4 1566 dscl_prog_data->easf_h_bf1_pwl_slope_seg4 = 0x7F0; // S7.3, BF1 Slope PWL Segment 4 = -16 1567 dscl_prog_data->easf_h_bf1_pwl_in_seg5 = 144; // S0.10, BF1 PWL Segment 5 1568 dscl_prog_data->easf_h_bf1_pwl_base_seg5 = 50; // U0.6, BF1 Base PWL Segment 5 1569 dscl_prog_data->easf_h_bf1_pwl_slope_seg5 = 0x7B0; // S7.3, BF1 Slope PWL Segment 5 = -80 1570 dscl_prog_data->easf_h_bf1_pwl_in_seg6 = 192; // S0.10, BF1 PWL Segment 6 1571 dscl_prog_data->easf_h_bf1_pwl_base_seg6 = 20; // U0.6, BF1 Base PWL Segment 6 1572 dscl_prog_data->easf_h_bf1_pwl_slope_seg6 = 0x7CB; // S7.3, BF1 Slope PWL Segment 6 = -53 1573 dscl_prog_data->easf_h_bf1_pwl_in_seg7 = 240; // S0.10, BF1 PWL Segment 7 1574 dscl_prog_data->easf_h_bf1_pwl_base_seg7 = 0; // U0.6, BF1 Base PWL Segment 7 1575 1576 dscl_prog_data->easf_h_bf3_pwl_in_set0 = 0x000; // FP0.6.6, BF3 Input value PWL Segment 0 1577 dscl_prog_data->easf_h_bf3_pwl_base_set0 = 63; // S0.6, BF3 Base PWL Segment 0 1578 dscl_prog_data->easf_h_bf3_pwl_slope_set0 = 0x0000; // FP1.6.6, BF3 Slope PWL Segment 0 1579 dscl_prog_data->easf_h_bf3_pwl_in_set1 = 1580 0x06C0; // FP0.6.6, BF3 Input value PWL Segment 1 (0.0625) 1581 dscl_prog_data->easf_h_bf3_pwl_base_set1 = 63; // S0.6, BF3 Base PWL Segment 1 1582 dscl_prog_data->easf_h_bf3_pwl_slope_set1 = 0x1896; // FP1.6.6, BF3 Slope PWL Segment 1 1583 dscl_prog_data->easf_h_bf3_pwl_in_set2 = 1584 0x0700; // FP0.6.6, BF3 Input value PWL Segment 2 (0.125) 1585 dscl_prog_data->easf_h_bf3_pwl_base_set2 = 20; // S0.6, BF3 Base PWL Segment 2 1586 dscl_prog_data->easf_h_bf3_pwl_slope_set2 = 0x1810; // FP1.6.6, BF3 Slope PWL Segment 2 1587 dscl_prog_data->easf_h_bf3_pwl_in_set3 = 1588 0x0740; // FP0.6.6, BF3 Input value PWL Segment 3 (0.25) 1589 dscl_prog_data->easf_h_bf3_pwl_base_set3 = 0; // S0.6, BF3 Base PWL Segment 3 1590 dscl_prog_data->easf_h_bf3_pwl_slope_set3 = 0x1878; // FP1.6.6, BF3 Slope PWL Segment 3 1591 dscl_prog_data->easf_h_bf3_pwl_in_set4 = 1592 0x0761; // FP0.6.6, BF3 Input value PWL Segment 4 (0.375) 1593 dscl_prog_data->easf_h_bf3_pwl_base_set4 = 0x44; // S0.6, BF3 Base PWL Segment 4 = -60 1594 dscl_prog_data->easf_h_bf3_pwl_slope_set4 = 0x1760; // FP1.6.6, BF3 Slope PWL Segment 4 1595 dscl_prog_data->easf_h_bf3_pwl_in_set5 = 1596 0x0780; // FP0.6.6, BF3 Input value PWL Segment 5 (0.5) 1597 dscl_prog_data->easf_h_bf3_pwl_base_set5 = 0x41; // S0.6, BF3 Base PWL Segment 5 = -63 1598 } // if (lls_pref == LLS_PREF_YES) 1599 } else 1600 dscl_prog_data->easf_h_en = false; 1601 1602 if (lls_pref == LLS_PREF_YES) { 1603 dscl_prog_data->easf_ltonl_en = 1; // Linear input 1604 if ((setup == HDR_L) && (spl_is_rgb8(format))) { 1605 /* Calculate C0-C3 coefficients based on HDR multiplier */ 1606 spl_calculate_c0_c3_hdr(dscl_prog_data, sdr_white_level_nits); 1607 } else { // HDR_L ( DWM ) and SDR_L 1608 dscl_prog_data->easf_matrix_c0 = 1609 0x4EF7; // fp1.5.10, C0 coefficient (LN_rec709: 0.2126 * (2^14)/125 = 27.86590720) 1610 dscl_prog_data->easf_matrix_c1 = 1611 0x55DC; // fp1.5.10, C1 coefficient (LN_rec709: 0.7152 * (2^14)/125 = 93.74269440) 1612 dscl_prog_data->easf_matrix_c2 = 1613 0x48BB; // fp1.5.10, C2 coefficient (LN_rec709: 0.0722 * (2^14)/125 = 9.46339840) 1614 dscl_prog_data->easf_matrix_c3 = 1615 0x0; // fp1.5.10, C3 coefficient 1616 } 1617 } else { 1618 dscl_prog_data->easf_ltonl_en = 0; // Non-Linear input 1619 dscl_prog_data->easf_matrix_c0 = 1620 0x3434; // fp1.5.10, C0 coefficient (LN_BT2020: 0.262695312500000) 1621 dscl_prog_data->easf_matrix_c1 = 1622 0x396D; // fp1.5.10, C1 coefficient (LN_BT2020: 0.678222656250000) 1623 dscl_prog_data->easf_matrix_c2 = 1624 0x2B97; // fp1.5.10, C2 coefficient (LN_BT2020: 0.059295654296875) 1625 dscl_prog_data->easf_matrix_c3 = 1626 0x0; // fp1.5.10, C3 coefficient 1627 } 1628 1629 if (spl_is_subsampled_format(format)) { /* TODO: 0 = RGB, 1 = YUV */ 1630 dscl_prog_data->easf_matrix_mode = 1; 1631 /* 1632 * 2-bit, BF3 chroma mode correction calculation mode 1633 * Needs to be disabled for YUV420 mode 1634 * Override lookup value 1635 */ 1636 dscl_prog_data->easf_v_bf3_mode = 0; 1637 dscl_prog_data->easf_h_bf3_mode = 0; 1638 } else 1639 dscl_prog_data->easf_matrix_mode = 0; 1640 1641 } 1642 1643 /*Set isharp noise detection */ 1644 static void spl_set_isharp_noise_det_mode(struct dscl_prog_data *dscl_prog_data, 1645 const struct spl_scaler_data *data) 1646 { 1647 // ISHARP_NOISEDET_MODE 1648 // 0: 3x5 as VxH 1649 // 1: 4x5 as VxH 1650 // 2: 1651 // 3: 5x5 as VxH 1652 if (data->taps.v_taps == 6) 1653 dscl_prog_data->isharp_noise_det.mode = 3; 1654 else if (data->taps.v_taps == 4) 1655 dscl_prog_data->isharp_noise_det.mode = 1; 1656 else if (data->taps.v_taps == 3) 1657 dscl_prog_data->isharp_noise_det.mode = 0; 1658 }; 1659 /* Set Sharpener data */ 1660 static void spl_set_isharp_data(struct dscl_prog_data *dscl_prog_data, 1661 struct adaptive_sharpness adp_sharpness, bool enable_isharp, 1662 enum linear_light_scaling lls_pref, enum spl_pixel_format format, 1663 const struct spl_scaler_data *data, struct spl_fixed31_32 ratio, 1664 enum system_setup setup, enum scale_to_sharpness_policy scale_to_sharpness_policy) 1665 { 1666 /* Turn off sharpener if not required */ 1667 if (!enable_isharp) { 1668 dscl_prog_data->isharp_en = 0; 1669 return; 1670 } 1671 1672 spl_build_isharp_1dlut_from_reference_curve(ratio, setup, adp_sharpness, 1673 scale_to_sharpness_policy); 1674 memcpy(dscl_prog_data->isharp_delta, spl_get_pregen_filter_isharp_1D_lut(setup), 1675 sizeof(uint32_t) * ISHARP_LUT_TABLE_SIZE); 1676 dscl_prog_data->sharpness_level = adp_sharpness.sharpness_level; 1677 1678 dscl_prog_data->isharp_en = 1; // ISHARP_EN 1679 // Set ISHARP_NOISEDET_MODE if htaps = 6-tap 1680 if (data->taps.h_taps == 6) { 1681 dscl_prog_data->isharp_noise_det.enable = 1; /* ISHARP_NOISEDET_EN */ 1682 spl_set_isharp_noise_det_mode(dscl_prog_data, data); /* ISHARP_NOISEDET_MODE */ 1683 } else 1684 dscl_prog_data->isharp_noise_det.enable = 0; // ISHARP_NOISEDET_EN 1685 // Program noise detection threshold 1686 dscl_prog_data->isharp_noise_det.uthreshold = 24; // ISHARP_NOISEDET_UTHRE 1687 dscl_prog_data->isharp_noise_det.dthreshold = 4; // ISHARP_NOISEDET_DTHRE 1688 // Program noise detection gain 1689 dscl_prog_data->isharp_noise_det.pwl_start_in = 3; // ISHARP_NOISEDET_PWL_START_IN 1690 dscl_prog_data->isharp_noise_det.pwl_end_in = 13; // ISHARP_NOISEDET_PWL_END_IN 1691 dscl_prog_data->isharp_noise_det.pwl_slope = 1623; // ISHARP_NOISEDET_PWL_SLOPE 1692 1693 if (lls_pref == LLS_PREF_NO) /* ISHARP_FMT_MODE */ 1694 dscl_prog_data->isharp_fmt.mode = 1; 1695 else 1696 dscl_prog_data->isharp_fmt.mode = 0; 1697 1698 dscl_prog_data->isharp_fmt.norm = 0x3C00; // ISHARP_FMT_NORM 1699 dscl_prog_data->isharp_lba.mode = 0; // ISHARP_LBA_MODE 1700 1701 if (setup == SDR_L) { 1702 // ISHARP_LBA_PWL_SEG0: ISHARP Local Brightness Adjustment PWL Segment 0 1703 dscl_prog_data->isharp_lba.in_seg[0] = 0; // ISHARP LBA PWL for Seg 0. INPUT value in U0.10 format 1704 dscl_prog_data->isharp_lba.base_seg[0] = 0; // ISHARP LBA PWL for Seg 0. BASE value in U0.6 format 1705 dscl_prog_data->isharp_lba.slope_seg[0] = 62; // ISHARP LBA for Seg 0. SLOPE value in S5.3 format 1706 // ISHARP_LBA_PWL_SEG1: ISHARP LBA PWL Segment 1 1707 dscl_prog_data->isharp_lba.in_seg[1] = 130; // ISHARP LBA PWL for Seg 1. INPUT value in U0.10 format 1708 dscl_prog_data->isharp_lba.base_seg[1] = 63; // ISHARP LBA PWL for Seg 1. BASE value in U0.6 format 1709 dscl_prog_data->isharp_lba.slope_seg[1] = 0; // ISHARP LBA for Seg 1. SLOPE value in S5.3 format 1710 // ISHARP_LBA_PWL_SEG2: ISHARP LBA PWL Segment 2 1711 dscl_prog_data->isharp_lba.in_seg[2] = 450; // ISHARP LBA PWL for Seg 2. INPUT value in U0.10 format 1712 dscl_prog_data->isharp_lba.base_seg[2] = 63; // ISHARP LBA PWL for Seg 2. BASE value in U0.6 format 1713 dscl_prog_data->isharp_lba.slope_seg[2] = 0x18D; // ISHARP LBA for Seg 2. SLOPE value in S5.3 format = -115 1714 // ISHARP_LBA_PWL_SEG3: ISHARP LBA PWL Segment 3 1715 dscl_prog_data->isharp_lba.in_seg[3] = 520; // ISHARP LBA PWL for Seg 3.INPUT value in U0.10 format 1716 dscl_prog_data->isharp_lba.base_seg[3] = 0; // ISHARP LBA PWL for Seg 3. BASE value in U0.6 format 1717 dscl_prog_data->isharp_lba.slope_seg[3] = 0; // ISHARP LBA for Seg 3. SLOPE value in S5.3 format 1718 // ISHARP_LBA_PWL_SEG4: ISHARP LBA PWL Segment 4 1719 dscl_prog_data->isharp_lba.in_seg[4] = 520; // ISHARP LBA PWL for Seg 4.INPUT value in U0.10 format 1720 dscl_prog_data->isharp_lba.base_seg[4] = 0; // ISHARP LBA PWL for Seg 4. BASE value in U0.6 format 1721 dscl_prog_data->isharp_lba.slope_seg[4] = 0; // ISHARP LBA for Seg 4. SLOPE value in S5.3 format 1722 // ISHARP_LBA_PWL_SEG5: ISHARP LBA PWL Segment 5 1723 dscl_prog_data->isharp_lba.in_seg[5] = 520; // ISHARP LBA PWL for Seg 5.INPUT value in U0.10 format 1724 dscl_prog_data->isharp_lba.base_seg[5] = 0; // ISHARP LBA PWL for Seg 5. BASE value in U0.6 format 1725 } else if (setup == HDR_L) { 1726 // ISHARP_LBA_PWL_SEG0: ISHARP Local Brightness Adjustment PWL Segment 0 1727 dscl_prog_data->isharp_lba.in_seg[0] = 0; // ISHARP LBA PWL for Seg 0. INPUT value in U0.10 format 1728 dscl_prog_data->isharp_lba.base_seg[0] = 0; // ISHARP LBA PWL for Seg 0. BASE value in U0.6 format 1729 dscl_prog_data->isharp_lba.slope_seg[0] = 32; // ISHARP LBA for Seg 0. SLOPE value in S5.3 format 1730 // ISHARP_LBA_PWL_SEG1: ISHARP LBA PWL Segment 1 1731 dscl_prog_data->isharp_lba.in_seg[1] = 254; // ISHARP LBA PWL for Seg 1. INPUT value in U0.10 format 1732 dscl_prog_data->isharp_lba.base_seg[1] = 63; // ISHARP LBA PWL for Seg 1. BASE value in U0.6 format 1733 dscl_prog_data->isharp_lba.slope_seg[1] = 0; // ISHARP LBA for Seg 1. SLOPE value in S5.3 format 1734 // ISHARP_LBA_PWL_SEG2: ISHARP LBA PWL Segment 2 1735 dscl_prog_data->isharp_lba.in_seg[2] = 559; // ISHARP LBA PWL for Seg 2. INPUT value in U0.10 format 1736 dscl_prog_data->isharp_lba.base_seg[2] = 63; // ISHARP LBA PWL for Seg 2. BASE value in U0.6 format 1737 dscl_prog_data->isharp_lba.slope_seg[2] = 0x10C; // ISHARP LBA for Seg 2. SLOPE value in S5.3 format = -244 1738 // ISHARP_LBA_PWL_SEG3: ISHARP LBA PWL Segment 3 1739 dscl_prog_data->isharp_lba.in_seg[3] = 592; // ISHARP LBA PWL for Seg 3.INPUT value in U0.10 format 1740 dscl_prog_data->isharp_lba.base_seg[3] = 0; // ISHARP LBA PWL for Seg 3. BASE value in U0.6 format 1741 dscl_prog_data->isharp_lba.slope_seg[3] = 0; // ISHARP LBA for Seg 3. SLOPE value in S5.3 format 1742 // ISHARP_LBA_PWL_SEG4: ISHARP LBA PWL Segment 4 1743 dscl_prog_data->isharp_lba.in_seg[4] = 1023; // ISHARP LBA PWL for Seg 4.INPUT value in U0.10 format 1744 dscl_prog_data->isharp_lba.base_seg[4] = 0; // ISHARP LBA PWL for Seg 4. BASE value in U0.6 format 1745 dscl_prog_data->isharp_lba.slope_seg[4] = 0; // ISHARP LBA for Seg 4. SLOPE value in S5.3 format 1746 // ISHARP_LBA_PWL_SEG5: ISHARP LBA PWL Segment 5 1747 dscl_prog_data->isharp_lba.in_seg[5] = 1023; // ISHARP LBA PWL for Seg 5.INPUT value in U0.10 format 1748 dscl_prog_data->isharp_lba.base_seg[5] = 0; // ISHARP LBA PWL for Seg 5. BASE value in U0.6 format 1749 } else { 1750 // ISHARP_LBA_PWL_SEG0: ISHARP Local Brightness Adjustment PWL Segment 0 1751 dscl_prog_data->isharp_lba.in_seg[0] = 0; // ISHARP LBA PWL for Seg 0. INPUT value in U0.10 format 1752 dscl_prog_data->isharp_lba.base_seg[0] = 0; // ISHARP LBA PWL for Seg 0. BASE value in U0.6 format 1753 dscl_prog_data->isharp_lba.slope_seg[0] = 40; // ISHARP LBA for Seg 0. SLOPE value in S5.3 format 1754 // ISHARP_LBA_PWL_SEG1: ISHARP LBA PWL Segment 1 1755 dscl_prog_data->isharp_lba.in_seg[1] = 204; // ISHARP LBA PWL for Seg 1. INPUT value in U0.10 format 1756 dscl_prog_data->isharp_lba.base_seg[1] = 63; // ISHARP LBA PWL for Seg 1. BASE value in U0.6 format 1757 dscl_prog_data->isharp_lba.slope_seg[1] = 0; // ISHARP LBA for Seg 1. SLOPE value in S5.3 format 1758 // ISHARP_LBA_PWL_SEG2: ISHARP LBA PWL Segment 2 1759 dscl_prog_data->isharp_lba.in_seg[2] = 818; // ISHARP LBA PWL for Seg 2. INPUT value in U0.10 format 1760 dscl_prog_data->isharp_lba.base_seg[2] = 63; // ISHARP LBA PWL for Seg 2. BASE value in U0.6 format 1761 dscl_prog_data->isharp_lba.slope_seg[2] = 0x1D9; // ISHARP LBA for Seg 2. SLOPE value in S5.3 format = -39 1762 // ISHARP_LBA_PWL_SEG3: ISHARP LBA PWL Segment 3 1763 dscl_prog_data->isharp_lba.in_seg[3] = 1023; // ISHARP LBA PWL for Seg 3.INPUT value in U0.10 format 1764 dscl_prog_data->isharp_lba.base_seg[3] = 0; // ISHARP LBA PWL for Seg 3. BASE value in U0.6 format 1765 dscl_prog_data->isharp_lba.slope_seg[3] = 0; // ISHARP LBA for Seg 3. SLOPE value in S5.3 format 1766 // ISHARP_LBA_PWL_SEG4: ISHARP LBA PWL Segment 4 1767 dscl_prog_data->isharp_lba.in_seg[4] = 1023; // ISHARP LBA PWL for Seg 4.INPUT value in U0.10 format 1768 dscl_prog_data->isharp_lba.base_seg[4] = 0; // ISHARP LBA PWL for Seg 4. BASE value in U0.6 format 1769 dscl_prog_data->isharp_lba.slope_seg[4] = 0; // ISHARP LBA for Seg 4. SLOPE value in S5.3 format 1770 // ISHARP_LBA_PWL_SEG5: ISHARP LBA PWL Segment 5 1771 dscl_prog_data->isharp_lba.in_seg[5] = 1023; // ISHARP LBA PWL for Seg 5.INPUT value in U0.10 format 1772 dscl_prog_data->isharp_lba.base_seg[5] = 0; // ISHARP LBA PWL for Seg 5. BASE value in U0.6 format 1773 } 1774 1775 // Program the nldelta soft clip values 1776 if (lls_pref == LLS_PREF_YES) { 1777 dscl_prog_data->isharp_nldelta_sclip.enable_p = 0; /* ISHARP_NLDELTA_SCLIP_EN_P */ 1778 dscl_prog_data->isharp_nldelta_sclip.pivot_p = 0; /* ISHARP_NLDELTA_SCLIP_PIVOT_P */ 1779 dscl_prog_data->isharp_nldelta_sclip.slope_p = 0; /* ISHARP_NLDELTA_SCLIP_SLOPE_P */ 1780 dscl_prog_data->isharp_nldelta_sclip.enable_n = 1; /* ISHARP_NLDELTA_SCLIP_EN_N */ 1781 dscl_prog_data->isharp_nldelta_sclip.pivot_n = 71; /* ISHARP_NLDELTA_SCLIP_PIVOT_N */ 1782 dscl_prog_data->isharp_nldelta_sclip.slope_n = 16; /* ISHARP_NLDELTA_SCLIP_SLOPE_N */ 1783 } else { 1784 dscl_prog_data->isharp_nldelta_sclip.enable_p = 1; /* ISHARP_NLDELTA_SCLIP_EN_P */ 1785 dscl_prog_data->isharp_nldelta_sclip.pivot_p = 70; /* ISHARP_NLDELTA_SCLIP_PIVOT_P */ 1786 dscl_prog_data->isharp_nldelta_sclip.slope_p = 24; /* ISHARP_NLDELTA_SCLIP_SLOPE_P */ 1787 dscl_prog_data->isharp_nldelta_sclip.enable_n = 1; /* ISHARP_NLDELTA_SCLIP_EN_N */ 1788 dscl_prog_data->isharp_nldelta_sclip.pivot_n = 70; /* ISHARP_NLDELTA_SCLIP_PIVOT_N */ 1789 dscl_prog_data->isharp_nldelta_sclip.slope_n = 24; /* ISHARP_NLDELTA_SCLIP_SLOPE_N */ 1790 } 1791 1792 // Set the values as per lookup table 1793 spl_set_blur_scale_data(dscl_prog_data, data); 1794 } 1795 1796 /* Calculate recout, scaling ratio, and viewport, then get optimal number of taps */ 1797 static bool spl_calculate_number_of_taps(struct spl_in *spl_in, struct spl_scratch *spl_scratch, struct spl_out *spl_out, 1798 bool *enable_easf_v, bool *enable_easf_h, bool *enable_isharp) 1799 { 1800 bool res = false; 1801 1802 memset(spl_scratch, 0, sizeof(struct spl_scratch)); 1803 spl_scratch->scl_data.h_active = spl_in->h_active; 1804 spl_scratch->scl_data.v_active = spl_in->v_active; 1805 1806 // All SPL calls 1807 /* recout calculation */ 1808 /* depends on h_active */ 1809 spl_calculate_recout(spl_in, spl_scratch, spl_out); 1810 /* depends on pixel format */ 1811 spl_calculate_scaling_ratios(spl_in, spl_scratch, spl_out); 1812 /* Adjust recout for opp if needed */ 1813 spl_opp_adjust_rect(&spl_scratch->scl_data.recout, &spl_in->basic_in.opp_recout_adjust); 1814 /* depends on scaling ratios and recout, does not calculate offset yet */ 1815 spl_calculate_viewport_size(spl_in, spl_scratch); 1816 1817 res = spl_get_optimal_number_of_taps( 1818 spl_in->basic_out.max_downscale_src_width, spl_in, 1819 spl_scratch, &spl_in->scaling_quality, enable_easf_v, 1820 enable_easf_h, enable_isharp); 1821 return res; 1822 } 1823 1824 /* Calculate scaler parameters */ 1825 bool SPL_NAMESPACE(spl_calculate_scaler_params(struct spl_in *spl_in, struct spl_out *spl_out)) 1826 { 1827 bool res = false; 1828 bool enable_easf_v = false; 1829 bool enable_easf_h = false; 1830 int vratio = 0; 1831 int hratio = 0; 1832 struct spl_scratch spl_scratch; 1833 struct spl_fixed31_32 isharp_scale_ratio; 1834 enum system_setup setup; 1835 bool enable_isharp = false; 1836 const struct spl_scaler_data *data = &spl_scratch.scl_data; 1837 1838 res = spl_calculate_number_of_taps(spl_in, &spl_scratch, spl_out, 1839 &enable_easf_v, &enable_easf_h, &enable_isharp); 1840 1841 /* 1842 * Depends on recout, scaling ratios, h_active and taps 1843 * May need to re-check lb size after this in some obscure scenario 1844 */ 1845 if (res) 1846 spl_calculate_inits_and_viewports(spl_in, &spl_scratch); 1847 // Handle 3d recout 1848 spl_handle_3d_recout(spl_in, &spl_scratch.scl_data.recout); 1849 // Clamp 1850 spl_clamp_viewport(&spl_scratch.scl_data.viewport, spl_in->min_viewport_size); 1851 1852 // Save all calculated parameters in dscl_prog_data structure to program hw registers 1853 spl_set_dscl_prog_data(spl_in, &spl_scratch, spl_out, enable_easf_v, enable_easf_h, enable_isharp); 1854 1855 if (!res) 1856 return res; 1857 1858 if (spl_in->lls_pref == LLS_PREF_YES) { 1859 if (spl_in->is_hdr_on) 1860 setup = HDR_L; 1861 else 1862 setup = SDR_L; 1863 } else { 1864 if (spl_in->is_hdr_on) 1865 setup = HDR_NL; 1866 else 1867 setup = SDR_NL; 1868 } 1869 1870 // Set EASF 1871 spl_set_easf_data(&spl_scratch, spl_out, enable_easf_v, enable_easf_h, spl_in->lls_pref, 1872 spl_in->basic_in.format, setup, spl_in->sdr_white_level_nits); 1873 1874 // Set iSHARP 1875 vratio = spl_fixpt_ceil(spl_scratch.scl_data.ratios.vert); 1876 hratio = spl_fixpt_ceil(spl_scratch.scl_data.ratios.horz); 1877 if (vratio <= hratio) 1878 isharp_scale_ratio = spl_scratch.scl_data.recip_ratios.vert; 1879 else 1880 isharp_scale_ratio = spl_scratch.scl_data.recip_ratios.horz; 1881 1882 spl_set_isharp_data(spl_out->dscl_prog_data, spl_in->adaptive_sharpness, enable_isharp, 1883 spl_in->lls_pref, spl_in->basic_in.format, data, isharp_scale_ratio, setup, 1884 spl_in->debug.scale_to_sharpness_policy); 1885 1886 return res; 1887 } 1888 1889 /* External interface to get number of taps only */ 1890 bool SPL_NAMESPACE(spl_get_number_of_taps(struct spl_in *spl_in, struct spl_out *spl_out)) 1891 { 1892 bool res = false; 1893 bool enable_easf_v = false; 1894 bool enable_easf_h = false; 1895 bool enable_isharp = false; 1896 struct spl_scratch spl_scratch; 1897 struct dscl_prog_data *dscl_prog_data = spl_out->dscl_prog_data; 1898 const struct spl_scaler_data *data = &spl_scratch.scl_data; 1899 1900 res = spl_calculate_number_of_taps(spl_in, &spl_scratch, spl_out, 1901 &enable_easf_v, &enable_easf_h, &enable_isharp); 1902 spl_set_taps_data(dscl_prog_data, data); 1903 return res; 1904 } 1905 1906