xref: /linux/drivers/gpu/drm/amd/display/dc/inc/resource.h (revision bba2c3615bd6cfee7456d1130f2e6b01b3f4e9ba)
1 /*
2  * Copyright 2015 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  */
24 
25 #ifndef DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_
26 #define DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_
27 
28 #include "core_types.h"
29 #include "core_status.h"
30 #include "dal_asic_id.h"
31 #include "dm_pp_smu.h"
32 
33 #define MEMORY_TYPE_MULTIPLIER_CZ 4
34 #define MEMORY_TYPE_HBM 2
35 #define MAX_MCACHES 8
36 
37 
38 #define IS_PIPE_SYNCD_VALID(pipe) ((((pipe)->pipe_idx_syncd) & 0x80)?1:0)
39 #define GET_PIPE_SYNCD_FROM_PIPE(pipe) ((pipe)->pipe_idx_syncd & 0x7F)
40 #define SET_PIPE_SYNCD_TO_PIPE(pipe, pipe_syncd) ((pipe)->pipe_idx_syncd = (0x80 | pipe_syncd))
41 
42 enum dce_version resource_parse_asic_id(
43 		struct hw_asic_id asic_id);
44 
45 struct resource_caps {
46 	int num_timing_generator;
47 	int num_opp;
48 	int num_dpp;
49 	int num_video_plane;
50 	int num_audio;
51 	int num_stream_encoder;
52 	int num_analog_stream_encoder;
53 	int num_pll;
54 	int num_dwb;
55 	int num_ddc;
56 	int num_vmid;
57 	int num_dsc;
58 	unsigned int num_dig_link_enc; // Total number of DIGs (digital encoders) in DIO (Display Input/Output).
59 	unsigned int num_usb4_dpia; // Total number of USB4 DPIA (DisplayPort Input Adapters).
60 	int num_hpo_frl;
61 	int num_hpo_dp_stream_encoder;
62 	int num_hpo_dp_link_encoder;
63 	int num_mpc_3dlut;
64 	int num_mpc;
65 	int num_rmcm;
66 	int num_aux;
67 };
68 
69 struct resource_straps {
70 	uint32_t hdmi_disable;
71 	uint32_t dc_pinstraps_audio;
72 	uint32_t audio_stream_number;
73 };
74 
75 struct dc_mcache_allocations {
76 	int global_mcache_ids_plane0[MAX_MCACHES + 1];
77 	int global_mcache_ids_plane1[MAX_MCACHES + 1];
78 	int global_mcache_ids_mall_plane0[MAX_MCACHES + 1];
79 	int global_mcache_ids_mall_plane1[MAX_MCACHES + 1];
80 };
81 
82 struct resource_create_funcs {
83 	void (*read_dce_straps)(
84 			struct dc_context *ctx, struct resource_straps *straps);
85 
86 	struct audio *(*create_audio)(
87 			struct dc_context *ctx, unsigned int inst);
88 
89 	struct stream_encoder *(*create_stream_encoder)(
90 			enum engine_id eng_id, struct dc_context *ctx);
91 
92 	struct hpo_frl_stream_encoder *(*create_hpo_frl_stream_encoder)(
93 			enum engine_id eng_id, struct dc_context *ctx);
94 	struct hpo_frl_link_encoder *(*create_hpo_frl_link_encoder)(
95 			enum engine_id eng_id, struct dc_context *ctx);
96 	struct hpo_dp_stream_encoder *(*create_hpo_dp_stream_encoder)(
97 			enum engine_id eng_id, struct dc_context *ctx);
98 	struct hpo_dp_link_encoder *(*create_hpo_dp_link_encoder)(
99 			uint8_t inst,
100 			struct dc_context *ctx);
101 	struct dce_hwseq *(*create_hwseq)(
102 			struct dc_context *ctx);
103 };
104 
105 bool resource_construct(
106 	unsigned int num_virtual_links,
107 	struct dc *dc,
108 	struct resource_pool *pool,
109 	const struct resource_create_funcs *create_funcs);
110 
111 struct resource_pool *dc_create_resource_pool(struct dc  *dc,
112 					      const struct dc_init_data *init_data,
113 					      enum dce_version dc_version);
114 
115 void dc_destroy_resource_pool(struct dc *dc);
116 
117 enum dc_status resource_map_pool_resources(
118 		const struct dc *dc,
119 		struct dc_state *context,
120 		struct dc_stream_state *stream);
121 
122 void resource_build_test_pattern_params(
123 		struct resource_context *res_ctx,
124 		struct pipe_ctx *pipe_ctx);
125 
126 bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx);
127 
128 enum dc_status resource_build_scaling_params_for_context(
129 		const struct dc *dc,
130 		struct dc_state *context);
131 
132 void resource_build_info_frame(struct pipe_ctx *pipe_ctx);
133 
134 void resource_unreference_clock_source(
135 		struct resource_context *res_ctx,
136 		const struct resource_pool *pool,
137 		struct clock_source *clock_source);
138 
139 void resource_reference_clock_source(
140 		struct resource_context *res_ctx,
141 		const struct resource_pool *pool,
142 		struct clock_source *clock_source);
143 
144 int resource_get_clock_source_reference(
145 		struct resource_context *res_ctx,
146 		const struct resource_pool *pool,
147 		struct clock_source *clock_source);
148 
149 bool resource_are_streams_timing_synchronizable(
150 		struct dc_stream_state *stream1,
151 		struct dc_stream_state *stream2);
152 
153 bool resource_are_vblanks_synchronizable(
154 		struct dc_stream_state *stream1,
155 		struct dc_stream_state *stream2);
156 
157 struct clock_source *resource_find_used_clk_src_for_sharing(
158 		struct resource_context *res_ctx,
159 		struct pipe_ctx *pipe_ctx);
160 
161 struct clock_source *dc_resource_find_first_free_pll(
162 		struct resource_context *res_ctx,
163 		const struct resource_pool *pool);
164 
165 bool resource_attach_surfaces_to_context(
166 		struct dc_plane_state *const *plane_state,
167 		int surface_count,
168 		struct dc_stream_state *dc_stream,
169 		struct dc_state *context,
170 		const struct resource_pool *pool);
171 
172 bool resource_can_pipe_disable_cursor(struct pipe_ctx *pipe_ctx);
173 
174 #define FREE_PIPE_INDEX_NOT_FOUND -1
175 
176 /*
177  * pipe types are identified based on MUXes in DCN front end that are capable
178  * of taking input from one DCN pipeline to another DCN pipeline. The name is
179  * in a form of XXXX_YYYY, where XXXX is the DCN front end hardware block the
180  * pipeline ends with and YYYY is the rendering role that the pipe is in.
181  *
182  * For instance OTG_MASTER is a pipe ending with OTG hardware block in its
183  * pipeline and it is in a role of a master pipe for timing generation.
184  *
185  * For quick reference a diagram of each pipe type's areas of responsibility
186  * for outputting timings on the screen is shown below:
187  *
188  *       Timing Active for Stream 0
189  *        __________________________________________________
190  *       |OTG master 0 (OPP head 0)|OPP head 2 (DPP pipe 2) |
191  *       |             (DPP pipe 0)|                        |
192  *       | Top Plane 0             |                        |
193  *       |           ______________|____                    |
194  *       |          |DPP pipe 1    |DPP |                   |
195  *       |          |              |pipe|                   |
196  *       |          |  Bottom      |3   |                   |
197  *       |          |  Plane 1     |    |                   |
198  *       |          |              |    |                   |
199  *       |          |______________|____|                   |
200  *       |                         |                        |
201  *       |                         |                        |
202  *       | ODM slice 0             | ODM slice 1            |
203  *       |_________________________|________________________|
204  *
205  *       Timing Active for Stream 1
206  *        __________________________________________________
207  *       |OTG master 4 (OPP head 4)                         |
208  *       |                                                  |
209  *       |                                                  |
210  *       |                                                  |
211  *       |                                                  |
212  *       |                                                  |
213  *       |               Blank Pixel Data                   |
214  *       |              (generated by DPG4)                 |
215  *       |                                                  |
216  *       |                                                  |
217  *       |                                                  |
218  *       |                                                  |
219  *       |                                                  |
220  *       |__________________________________________________|
221  *
222  *       Inter-pipe Relation
223  *        __________________________________________________
224  *       |PIPE IDX|   DPP PIPES   | OPP HEADS | OTG MASTER  |
225  *       |        |  plane 0      | slice 0   |             |
226  *       |   0    | -------------MPC---------ODM----------- |
227  *       |        |  plane 1    | |         | |             |
228  *       |   1    | ------------- |         | |             |
229  *       |        |  plane 0      | slice 1 | |             |
230  *       |   2    | -------------MPC--------- |             |
231  *       |        |  plane 1    | |           |             |
232  *       |   3    | ------------- |           |             |
233  *       |        |               | blank     |             |
234  *       |   4    |               | ----------------------- |
235  *       |        |               |           |             |
236  *       |   5    |  (FREE)       |           |             |
237  *       |________|_______________|___________|_____________|
238  *
239  * The following is a quick reference of the class relation:
240  *
241  *	DC state            ---1--------0..N---           streams
242  *
243  *	stream              ---1-----------1---           OTG Master pipe
244  *
245  *	OTG Master pipe     ---1--------1..N---           OPP Head pipes
246  *
247  *	OPP Head pipe       ---1--------0..N---           DPP pipes
248  *
249  *	stream              ---1--------0..N---           Planes
250  *
251  *	Plane               ---1--------1..N---           DPP pipes
252  *
253  */
254 enum pipe_type {
255 	/* free pipe - free pipe is an uninitialized pipe without a stream
256 	 * associated with it. It is a free DCN pipe resource. It can be
257 	 * acquired as any type of pipe.
258 	 */
259 	FREE_PIPE,
260 
261 	/* OTG master pipe - the master pipe of its OPP head pipes with a
262 	 * functional OTG. It merges all its OPP head pipes pixel data in ODM
263 	 * block and output to back end DIG. OTG master pipe is responsible for
264 	 * generating entire CRTC timing to back end DIG. An OTG master pipe may
265 	 * or may not have a plane. If it has a plane it blends it as the left
266 	 * most MPC slice of the top most layer. If it doesn't have a plane it
267 	 * can output pixel data from its OPP head pipes' test pattern
268 	 * generators (DPG) such as solid black pixel data to blank the screen.
269 	 */
270 	OTG_MASTER,
271 
272 	/* OPP head pipe - the head pipe of an MPC blending tree with a
273 	 * functional OPP outputting to an OTG. OPP head pipe is responsible for
274 	 * processing output pixels in its own ODM slice. It may or may not have
275 	 * a plane. If it has a plane it blends it as the top most layer within
276 	 * its own ODM slice. If it doesn't have a plane it can output pixel
277 	 * data from its DPG such as solid black pixel data to blank the pixel
278 	 * data in its own ODM slice. OTG master pipe is also an OPP head pipe
279 	 * but with more responsibility.
280 	 */
281 	OPP_HEAD,
282 
283 	/* DPP pipe - the pipe with a functional DPP outputting to an OPP head
284 	 * pipe's MPC. DPP pipe is responsible for processing pixel data from
285 	 * its own MPC slice of a plane. It must be connected to an OPP head
286 	 * pipe and it must have a plane associated with it.
287 	 */
288 	DPP_PIPE,
289 };
290 
291 /*
292  * Determine if the input pipe_ctx is of a pipe type.
293  * return - true if pipe_ctx is of the input type.
294  */
295 bool resource_is_pipe_type(const struct pipe_ctx *pipe_ctx, enum pipe_type type);
296 
297 /*
298  * Acquire a pipe as OTG master pipe and allocate pipe resources required to
299  * enable stream output.
300  */
301 enum dc_status resource_add_otg_master_for_stream_output(struct dc_state *new_ctx,
302 		const struct resource_pool *pool,
303 		struct dc_stream_state *stream);
304 
305 /*
306  * Release pipe resources and the OTG master pipe associated with the stream
307  * The stream must have all planes removed and ODM/MPC slice counts are reset
308  * to 1 before invoking this interface.
309  */
310 void resource_remove_otg_master_for_stream_output(struct dc_state *new_ctx,
311 		const struct resource_pool *pool,
312 		struct dc_stream_state *stream);
313 
314 /*
315  * Add plane to the bottom most layer in plane composition and allocate DPP pipe
316  * resources as needed.
317  * return - true if plane is added in plane composition, false otherwise.
318  */
319 bool resource_append_dpp_pipes_for_plane_composition(
320 		struct dc_state *new_ctx,
321 		struct dc_state *cur_ctx,
322 		struct resource_pool *pool,
323 		struct pipe_ctx *otg_master_pipe,
324 		struct dc_plane_state *plane_state);
325 
326 /*
327  * Add plane to the bottom most layer in plane composition and allocate DPP pipe
328  * resources as needed.
329  * return - true if plane is added in plane composition, false otherwise.
330  */
331 void resource_remove_dpp_pipes_for_plane_composition(
332 		struct dc_state *context,
333 		const struct resource_pool *pool,
334 		const struct dc_plane_state *plane_state);
335 
336 /*
337  * Update ODM slice count by acquiring or releasing pipes. If new slices need
338  * to be added, it is going to add them to the last ODM index. If existing
339  * slices need to be removed, it is going to remove them from the last ODM
340  * index.
341  *
342  * return - true if ODM slices are updated and required pipes are acquired. All
343  * affected pipe parameters are updated.
344  *
345  * false if resource fails to complete this update. The function is not designed
346  * to recover the creation of invalid topologies. Returning false is typically
347  * an indication of insufficient validation in caller's stack. new_ctx will be
348  * invalid. Caller may attempt to restore new_ctx by calling this function
349  * again with original slice count.
350  */
351 bool resource_update_pipes_for_stream_with_slice_count(
352 		struct dc_state *new_ctx,
353 		const struct dc_state *cur_ctx,
354 		const struct resource_pool *pool,
355 		const struct dc_stream_state *stream,
356 		int new_slice_count);
357 
358 /*
359  * Update MPC slice count by acquiring or releasing DPP pipes. If new slices
360  * need to be added it is going to add to the last MPC index. If existing
361  * slices need to be removed, it is going to remove them from the last MPC
362  * index.
363  *
364  * @dpp_pipe - top most dpp pipe for MPCC combine.
365  *
366  * return - true if MPC slices are updated and required pipes are acquired. All
367  * affected pipe parameters are updated.
368  *
369  * false if resource fails to complete this update. The function is not designed
370  * to recover the creation of invalid topologies. Returning false is typically
371  * an indication of insufficient validation in caller's stack. new_ctx will be
372  * invalid. Caller may attempt to restore new_ctx by calling this function
373  * again with original slice count.
374  */
375 bool resource_update_pipes_for_plane_with_slice_count(
376 		struct dc_state *new_ctx,
377 		const struct dc_state *cur_ctx,
378 		const struct resource_pool *pool,
379 		const struct dc_plane_state *plane,
380 		int slice_count);
381 
382 /*
383  * Get the OTG master pipe in resource context associated with the stream.
384  * return - NULL if not found. Otherwise the OTG master pipe associated with the
385  * stream.
386  */
387 struct pipe_ctx *resource_get_otg_master_for_stream(
388 		struct resource_context *res_ctx,
389 		const struct dc_stream_state *stream);
390 
391 /*
392  * Get an array of OPP heads in opp_heads ordered with index low to high for OTG
393  * master pipe in res_ctx.
394  * return - number of OPP heads in the array. If otg_master passed in is not
395  * an OTG master, the function returns 0.
396  */
397 int resource_get_opp_heads_for_otg_master(const struct pipe_ctx *otg_master,
398 		struct resource_context *res_ctx,
399 		struct pipe_ctx *opp_heads[MAX_PIPES]);
400 
401 /*
402  * Get an array of DPP pipes in dpp_pipes ordered with index low to high for OPP
403  * head pipe in res_ctx.
404  * return - number of DPP pipes in the array. If opp_head passed in is not
405  * an OPP pipe, the function returns 0.
406  */
407 int resource_get_dpp_pipes_for_opp_head(const struct pipe_ctx *opp_head,
408 		struct resource_context *res_ctx,
409 		struct pipe_ctx *dpp_pipes[MAX_PIPES]);
410 
411 /*
412  * Get an array of DPP pipes in dpp_pipes ordered with index low to high for
413  * plane in res_ctx.
414  * return - number of DPP pipes in the array.
415  */
416 int resource_get_dpp_pipes_for_plane(const struct dc_plane_state *plane,
417 		struct resource_context *res_ctx,
418 		struct pipe_ctx *dpp_pipes[MAX_PIPES]);
419 
420 /*
421  * Get the OTG master pipe for the input pipe context.
422  * return - the OTG master pipe for the input pipe
423  * context.
424  */
425 struct pipe_ctx *resource_get_otg_master(const struct pipe_ctx *pipe_ctx);
426 
427 /*
428  * Get the OPP head pipe for the input pipe context.
429  * return - the OPP head pipe for the input pipe
430  * context.
431  */
432 struct pipe_ctx *resource_get_opp_head(const struct pipe_ctx *pipe_ctx);
433 
434 /*
435  * Get the DPP pipe allocated for MPC slice 0 and ODM slice 0 of the plane
436  * associated with dpp_pipe.
437  */
438 struct pipe_ctx *resource_get_primary_dpp_pipe(const struct pipe_ctx *dpp_pipe);
439 
440 /*
441  * Get the MPC slice index counting from 0 from left most slice
442  * For example, if a DPP pipe is used as a secondary pipe in MPCC combine, MPC
443  * split index is greater than 0.
444  */
445 int resource_get_mpc_slice_index(const struct pipe_ctx *dpp_pipe);
446 
447 /*
448  * Get the number of MPC slices associated with the pipe.
449  * The function returns 0 if the pipe is not associated with an MPC combine
450  * pipe topology.
451  */
452 int resource_get_mpc_slice_count(const struct pipe_ctx *pipe);
453 
454 /*
455  * Get the number of ODM slices associated with the pipe.
456  * The function returns 0 if the pipe is not associated with an ODM combine
457  * pipe topology.
458  */
459 int resource_get_odm_slice_count(const struct pipe_ctx *pipe);
460 
461 /* Get the ODM slice index counting from 0 from left most slice */
462 int resource_get_odm_slice_index(const struct pipe_ctx *opp_head);
463 
464 /* Get ODM slice source rect in timing active as input to OPP block */
465 struct rect resource_get_odm_slice_src_rect(struct pipe_ctx *pipe_ctx);
466 
467 /* Get ODM slice destination rect in timing active as output from OPP block */
468 struct rect resource_get_odm_slice_dst_rect(struct pipe_ctx *pipe_ctx);
469 
470 /* Get ODM slice destination width in timing active as output from OPP block */
471 int resource_get_odm_slice_dst_width(struct pipe_ctx *otg_master,
472 		bool is_last_segment);
473 
474 /* determine if pipe topology is changed between state a and state b */
475 bool resource_is_pipe_topology_changed(const struct dc_state *state_a,
476 		const struct dc_state *state_b);
477 
478 /*
479  * determine if the two OTG master pipes have the same ODM topology
480  * return
481  * false - if pipes passed in are not OTG masters or ODM topology is
482  * changed.
483  * true - otherwise
484  */
485 bool resource_is_odm_topology_changed(const struct pipe_ctx *otg_master_a,
486 		const struct pipe_ctx *otg_master_b);
487 
488 /* log the pipe topology update in state */
489 void resource_log_pipe_topology_update(struct dc *dc, struct dc_state *state);
490 
491 /*
492  * Look for a free pipe in new resource context that is used as a secondary OPP
493  * head by cur_otg_master.
494  *
495  * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise
496  * pipe idx of the free pipe
497  */
498 int resource_find_free_pipe_used_as_sec_opp_head_by_cur_otg_master(
499 		const struct resource_context *cur_res_ctx,
500 		struct resource_context *new_res_ctx,
501 		const struct pipe_ctx *cur_otg_master);
502 
503 /*
504  * Look for a free pipe in new resource context that is used as a secondary DPP
505  * pipe in MPC blending tree associated with input OPP head pipe.
506  *
507  * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise
508  * pipe idx of the free pipe
509  */
510 int resource_find_free_pipe_used_in_cur_mpc_blending_tree(
511 		const struct resource_context *cur_res_ctx,
512 		struct resource_context *new_res_ctx,
513 		const struct pipe_ctx *cur_opp_head);
514 
515 /*
516  * Look for a free pipe in new resource context that is not used in current
517  * resource context.
518  *
519  * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise
520  * pipe idx of the free pipe
521  */
522 int recource_find_free_pipe_not_used_in_cur_res_ctx(
523 		const struct resource_context *cur_res_ctx,
524 		struct resource_context *new_res_ctx,
525 		const struct resource_pool *pool);
526 
527 /*
528  * Look for a free pipe in new resource context that is used in current resource
529  * context as an OTG master pipe.
530  *
531  * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise
532  * pipe idx of the free pipe
533  */
534 int recource_find_free_pipe_used_as_otg_master_in_cur_res_ctx(
535 		const struct resource_context *cur_res_ctx,
536 		struct resource_context *new_res_ctx,
537 		const struct resource_pool *pool);
538 
539 /*
540  * Look for a free pipe in new resource context that is used as a secondary DPP
541  * pipe in current resource context.
542  * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise
543  * pipe idx of the free pipe
544  */
545 int resource_find_free_pipe_used_as_cur_sec_dpp(
546 		const struct resource_context *cur_res_ctx,
547 		struct resource_context *new_res_ctx,
548 		const struct resource_pool *pool);
549 
550 /*
551  * Look for a free pipe in new resource context that is used as a secondary DPP
552  * pipe in any MPCC combine in current resource context.
553  * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise
554  * pipe idx of the free pipe
555  */
556 int resource_find_free_pipe_used_as_cur_sec_dpp_in_mpcc_combine(
557 		const struct resource_context *cur_res_ctx,
558 		struct resource_context *new_res_ctx,
559 		const struct resource_pool *pool);
560 
561 /*
562  * Look for any free pipe in new resource context.
563  * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise
564  * pipe idx of the free pipe
565  */
566 int resource_find_any_free_pipe(struct resource_context *new_res_ctx,
567 		const struct resource_pool *pool);
568 
569 /*
570  * Legacy find free secondary pipe logic deprecated for newer DCNs as it doesn't
571  * find the most optimal free pipe to prevent from time consuming hardware state
572  * transitions.
573  */
574 struct pipe_ctx *resource_find_free_secondary_pipe_legacy(
575 		struct resource_context *res_ctx,
576 		const struct resource_pool *pool,
577 		const struct pipe_ctx *primary_pipe);
578 
579 bool resource_validate_attach_surfaces(
580 		const struct dc_validation_set set[],
581 		int set_count,
582 		const struct dc_state *old_context,
583 		struct dc_state *context,
584 		const struct resource_pool *pool);
585 
586 enum dc_status resource_map_clock_resources(
587 		const struct dc *dc,
588 		struct dc_state *context,
589 		struct dc_stream_state *stream);
590 
591 enum dc_status resource_map_phy_clock_resources(
592 		const struct dc *dc,
593 		struct dc_state *context,
594 		struct dc_stream_state *stream);
595 
596 bool pipe_need_reprogram(
597 		struct pipe_ctx *pipe_ctx_old,
598 		struct pipe_ctx *pipe_ctx);
599 
600 void resource_build_bit_depth_reduction_params(struct dc_stream_state *stream,
601 		struct bit_depth_reduction_params *fmt_bit_depth);
602 
603 void update_audio_usage(
604 		struct resource_context *res_ctx,
605 		const struct resource_pool *pool,
606 		struct audio *audio,
607 		bool acquired);
608 
609 unsigned int resource_pixel_format_to_bpp(enum surface_pixel_format format);
610 
611 bool get_temp_dp_link_res(struct dc_link *link,
612 		struct link_resource *link_res,
613 		struct dc_link_settings *link_settings);
614 bool get_temp_frl_link_res(struct dc_link *link,
615 		struct link_resource *link_res);
616 
617 void reset_syncd_pipes_from_disabled_pipes(struct dc *dc,
618 	struct dc_state *context);
619 
620 void check_syncd_pipes_for_disabled_master_pipe(struct dc *dc,
621 	struct dc_state *context,
622 	uint8_t disabled_master_pipe_idx);
623 
624 void reset_sync_context_for_pipe(const struct dc *dc,
625 	struct dc_state *context,
626 	uint8_t pipe_idx);
627 
628 uint8_t resource_transmitter_to_phy_idx(const struct dc *dc, enum transmitter transmitter);
629 
630 const struct link_hwss *get_link_hwss(const struct dc_link *link,
631 		const struct link_resource *link_res);
632 
633 bool is_h_timing_divisible_by_2(struct dc_stream_state *stream);
634 
635 bool dc_resource_acquire_secondary_pipe_for_mpc_odm_legacy(
636 		const struct dc *dc,
637 		struct dc_state *state,
638 		struct pipe_ctx *pri_pipe,
639 		struct pipe_ctx *sec_pipe,
640 		bool odm);
641 
642 /* A test harness interface that modifies dp encoder resources in the given dc
643  * state and bypasses the need to revalidate. The interface assumes that the
644  * test harness interface is called with pre-validated link config stored in the
645  * pipe_ctx and updates dp encoder resources according to the link config.
646  */
647 enum dc_status update_dp_encoder_resources_for_test_harness(const struct dc *dc,
648 		struct dc_state *context,
649 		struct pipe_ctx *pipe_ctx);
650 
651 /* Get hw programming parameters container from pipe context
652  * @pipe_ctx: pipe context
653  * @dscl_prog_data: struct to hold programmable hw reg values
654  */
655 struct dscl_prog_data *resource_get_dscl_prog_data(struct pipe_ctx *pipe_ctx);
656 /* Setup dc callbacks for dml2
657  * @dc: the display core structure
658  * @dml2_options: struct to hold callbacks
659  */
660 void resource_init_common_dml2_callbacks(struct dc *dc, struct dml2_configuration_options *dml2_options);
661 
662 /*
663  *Calculate total DET allocated for all pipes for a given OTG_MASTER pipe
664  */
665 int resource_calculate_det_for_stream(struct dc_state *state, struct pipe_ctx *otg_master);
666 
667 bool resource_is_hpo_acquired(struct dc_state *context);
668 
669 struct link_encoder *get_temp_dio_link_enc(
670 		const struct resource_context *res_ctx,
671 		const struct resource_pool *const pool,
672 		const struct dc_link *link);
673 #endif /* DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_ */
674