1 /* 2 * Copyright 2015 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 */ 24 25 #ifndef DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_ 26 #define DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_ 27 28 #include "core_types.h" 29 #include "core_status.h" 30 #include "dal_asic_id.h" 31 #include "dm_pp_smu.h" 32 33 #define MEMORY_TYPE_MULTIPLIER_CZ 4 34 #define MEMORY_TYPE_HBM 2 35 36 37 #define IS_PIPE_SYNCD_VALID(pipe) ((((pipe)->pipe_idx_syncd) & 0x80)?1:0) 38 #define GET_PIPE_SYNCD_FROM_PIPE(pipe) ((pipe)->pipe_idx_syncd & 0x7F) 39 #define SET_PIPE_SYNCD_TO_PIPE(pipe, pipe_syncd) ((pipe)->pipe_idx_syncd = (0x80 | pipe_syncd)) 40 41 enum dce_version resource_parse_asic_id( 42 struct hw_asic_id asic_id); 43 44 struct resource_caps { 45 int num_timing_generator; 46 int num_opp; 47 int num_video_plane; 48 int num_audio; 49 int num_stream_encoder; 50 int num_pll; 51 int num_dwb; 52 int num_ddc; 53 int num_vmid; 54 int num_dsc; 55 unsigned int num_dig_link_enc; // Total number of DIGs (digital encoders) in DIO (Display Input/Output). 56 unsigned int num_usb4_dpia; // Total number of USB4 DPIA (DisplayPort Input Adapters). 57 int num_hpo_dp_stream_encoder; 58 int num_hpo_dp_link_encoder; 59 int num_mpc_3dlut; 60 }; 61 62 struct resource_straps { 63 uint32_t hdmi_disable; 64 uint32_t dc_pinstraps_audio; 65 uint32_t audio_stream_number; 66 }; 67 68 struct resource_create_funcs { 69 void (*read_dce_straps)( 70 struct dc_context *ctx, struct resource_straps *straps); 71 72 struct audio *(*create_audio)( 73 struct dc_context *ctx, unsigned int inst); 74 75 struct stream_encoder *(*create_stream_encoder)( 76 enum engine_id eng_id, struct dc_context *ctx); 77 78 struct hpo_dp_stream_encoder *(*create_hpo_dp_stream_encoder)( 79 enum engine_id eng_id, struct dc_context *ctx); 80 81 struct hpo_dp_link_encoder *(*create_hpo_dp_link_encoder)( 82 uint8_t inst, 83 struct dc_context *ctx); 84 85 struct dce_hwseq *(*create_hwseq)( 86 struct dc_context *ctx); 87 }; 88 89 bool resource_construct( 90 unsigned int num_virtual_links, 91 struct dc *dc, 92 struct resource_pool *pool, 93 const struct resource_create_funcs *create_funcs); 94 95 struct resource_pool *dc_create_resource_pool(struct dc *dc, 96 const struct dc_init_data *init_data, 97 enum dce_version dc_version); 98 99 void dc_destroy_resource_pool(struct dc *dc); 100 101 enum dc_status resource_map_pool_resources( 102 const struct dc *dc, 103 struct dc_state *context, 104 struct dc_stream_state *stream); 105 106 bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx); 107 108 enum dc_status resource_build_scaling_params_for_context( 109 const struct dc *dc, 110 struct dc_state *context); 111 112 void resource_build_info_frame(struct pipe_ctx *pipe_ctx); 113 114 void resource_unreference_clock_source( 115 struct resource_context *res_ctx, 116 const struct resource_pool *pool, 117 struct clock_source *clock_source); 118 119 void resource_reference_clock_source( 120 struct resource_context *res_ctx, 121 const struct resource_pool *pool, 122 struct clock_source *clock_source); 123 124 int resource_get_clock_source_reference( 125 struct resource_context *res_ctx, 126 const struct resource_pool *pool, 127 struct clock_source *clock_source); 128 129 bool resource_are_streams_timing_synchronizable( 130 struct dc_stream_state *stream1, 131 struct dc_stream_state *stream2); 132 133 bool resource_are_vblanks_synchronizable( 134 struct dc_stream_state *stream1, 135 struct dc_stream_state *stream2); 136 137 struct clock_source *resource_find_used_clk_src_for_sharing( 138 struct resource_context *res_ctx, 139 struct pipe_ctx *pipe_ctx); 140 141 struct clock_source *dc_resource_find_first_free_pll( 142 struct resource_context *res_ctx, 143 const struct resource_pool *pool); 144 145 bool resource_attach_surfaces_to_context( 146 struct dc_plane_state *const *plane_state, 147 int surface_count, 148 struct dc_stream_state *dc_stream, 149 struct dc_state *context, 150 const struct resource_pool *pool); 151 152 #define FREE_PIPE_INDEX_NOT_FOUND -1 153 154 /* 155 * pipe types are identified based on MUXes in DCN front end that are capable 156 * of taking input from one DCN pipeline to another DCN pipeline. The name is 157 * in a form of XXXX_YYYY, where XXXX is the DCN front end hardware block the 158 * pipeline ends with and YYYY is the rendering role that the pipe is in. 159 * 160 * For instance OTG_MASTER is a pipe ending with OTG hardware block in its 161 * pipeline and it is in a role of a master pipe for timing generation. 162 * 163 * For quick reference a diagram of each pipe type's areas of responsibility 164 * for outputting timings on the screen is shown below: 165 * 166 * Timing Active for Stream 0 167 * __________________________________________________ 168 * |OTG master 0 (OPP head 0)|OPP head 2 (DPP pipe 2) | 169 * | (DPP pipe 0)| | 170 * | Top Plane 0 | | 171 * | ______________|____ | 172 * | |DPP pipe 1 |DPP | | 173 * | | |pipe| | 174 * | | Bottom |3 | | 175 * | | Plane 1 | | | 176 * | | | | | 177 * | |______________|____| | 178 * | | | 179 * | | | 180 * | ODM slice 0 | ODM slice 1 | 181 * |_________________________|________________________| 182 * 183 * Timing Active for Stream 1 184 * __________________________________________________ 185 * |OTG master 4 (OPP head 4) | 186 * | | 187 * | | 188 * | | 189 * | | 190 * | | 191 * | Blank Pixel Data | 192 * | (generated by DPG4) | 193 * | | 194 * | | 195 * | | 196 * | | 197 * | | 198 * |__________________________________________________| 199 * 200 * Inter-pipe Relation 201 * __________________________________________________ 202 * |PIPE IDX| DPP PIPES | OPP HEADS | OTG MASTER | 203 * | | plane 0 | slice 0 | | 204 * | 0 | -------------MPC---------ODM----------- | 205 * | | plane 1 | | | | | 206 * | 1 | ------------- | | | | 207 * | | plane 0 | slice 1 | | | 208 * | 2 | -------------MPC--------- | | 209 * | | plane 1 | | | | 210 * | 3 | ------------- | | | 211 * | | | blank | | 212 * | 4 | | ----------------------- | 213 * | | | | | 214 * | 5 | (FREE) | | | 215 * |________|_______________|___________|_____________| 216 * 217 * The following is a quick reference of the class relation: 218 * 219 * DC state ---1--------0..N--- streams 220 * 221 * stream ---1-----------1--- OTG Master pipe 222 * 223 * OTG Master pipe ---1--------1..N--- OPP Head pipes 224 * 225 * OPP Head pipe ---1--------0..N--- DPP pipes 226 * 227 * stream ---1--------0..N--- Planes 228 * 229 * Plane ---1--------1..N--- DPP pipes 230 * 231 */ 232 enum pipe_type { 233 /* free pipe - free pipe is an uninitialized pipe without a stream 234 * associated with it. It is a free DCN pipe resource. It can be 235 * acquired as any type of pipe. 236 */ 237 FREE_PIPE, 238 239 /* OTG master pipe - the master pipe of its OPP head pipes with a 240 * functional OTG. It merges all its OPP head pipes pixel data in ODM 241 * block and output to back end DIG. OTG master pipe is responsible for 242 * generating entire CRTC timing to back end DIG. An OTG master pipe may 243 * or may not have a plane. If it has a plane it blends it as the left 244 * most MPC slice of the top most layer. If it doesn't have a plane it 245 * can output pixel data from its OPP head pipes' test pattern 246 * generators (DPG) such as solid black pixel data to blank the screen. 247 */ 248 OTG_MASTER, 249 250 /* OPP head pipe - the head pipe of an MPC blending tree with a 251 * functional OPP outputting to an OTG. OPP head pipe is responsible for 252 * processing output pixels in its own ODM slice. It may or may not have 253 * a plane. If it has a plane it blends it as the top most layer within 254 * its own ODM slice. If it doesn't have a plane it can output pixel 255 * data from its DPG such as solid black pixel data to blank the pixel 256 * data in its own ODM slice. OTG master pipe is also an OPP head pipe 257 * but with more responsibility. 258 */ 259 OPP_HEAD, 260 261 /* DPP pipe - the pipe with a functional DPP outputting to an OPP head 262 * pipe's MPC. DPP pipe is responsible for processing pixel data from 263 * its own MPC slice of a plane. It must be connected to an OPP head 264 * pipe and it must have a plane associated with it. 265 */ 266 DPP_PIPE, 267 }; 268 269 /* 270 * Determine if the input pipe_ctx is of a pipe type. 271 * return - true if pipe_ctx is of the input type. 272 */ 273 bool resource_is_pipe_type(const struct pipe_ctx *pipe_ctx, enum pipe_type type); 274 275 /* 276 * Acquire a pipe as OTG master pipe and allocate pipe resources required to 277 * enable stream output. 278 */ 279 enum dc_status resource_add_otg_master_for_stream_output(struct dc_state *new_ctx, 280 const struct resource_pool *pool, 281 struct dc_stream_state *stream); 282 283 /* 284 * Release pipe resources and the OTG master pipe associated with the stream 285 * The stream must have all planes removed and ODM/MPC slice counts are reset 286 * to 1 before invoking this interface. 287 */ 288 void resource_remove_otg_master_for_stream_output(struct dc_state *new_ctx, 289 const struct resource_pool *pool, 290 struct dc_stream_state *stream); 291 292 /* 293 * Add plane to the bottom most layer in plane composition and allocate DPP pipe 294 * resources as needed. 295 * return - true if plane is added in plane composition, false otherwise. 296 */ 297 bool resource_append_dpp_pipes_for_plane_composition( 298 struct dc_state *new_ctx, 299 struct dc_state *cur_ctx, 300 struct resource_pool *pool, 301 struct pipe_ctx *otg_master_pipe, 302 struct dc_plane_state *plane_state); 303 304 /* 305 * Add plane to the bottom most layer in plane composition and allocate DPP pipe 306 * resources as needed. 307 * return - true if plane is added in plane composition, false otherwise. 308 */ 309 void resource_remove_dpp_pipes_for_plane_composition( 310 struct dc_state *context, 311 const struct resource_pool *pool, 312 const struct dc_plane_state *plane_state); 313 314 /* 315 * Update ODM slice count by acquiring or releasing pipes. If new slices need 316 * to be added, it is going to add them to the last ODM index. If existing 317 * slices need to be removed, it is going to remove them from the last ODM 318 * index. 319 * 320 * return - true if ODM slices are updated and required pipes are acquired. All 321 * affected pipe parameters are updated. 322 * 323 * false if resource fails to complete this update. The function is not designed 324 * to recover the creation of invalid topologies. Returning false is typically 325 * an indication of insufficient validation in caller's stack. new_ctx will be 326 * invalid. Caller may attempt to restore new_ctx by calling this function 327 * again with original slice count. 328 */ 329 bool resource_update_pipes_for_stream_with_slice_count( 330 struct dc_state *new_ctx, 331 const struct dc_state *cur_ctx, 332 const struct resource_pool *pool, 333 const struct dc_stream_state *stream, 334 int new_slice_count); 335 336 /* 337 * Update MPC slice count by acquiring or releasing DPP pipes. If new slices 338 * need to be added it is going to add to the last MPC index. If existing 339 * slices need to be removed, it is going to remove them from the last MPC 340 * index. 341 * 342 * @dpp_pipe - top most dpp pipe for MPCC combine. 343 * 344 * return - true if MPC slices are updated and required pipes are acquired. All 345 * affected pipe parameters are updated. 346 * 347 * false if resource fails to complete this update. The function is not designed 348 * to recover the creation of invalid topologies. Returning false is typically 349 * an indication of insufficient validation in caller's stack. new_ctx will be 350 * invalid. Caller may attempt to restore new_ctx by calling this function 351 * again with original slice count. 352 */ 353 bool resource_update_pipes_for_plane_with_slice_count( 354 struct dc_state *new_ctx, 355 const struct dc_state *cur_ctx, 356 const struct resource_pool *pool, 357 const struct dc_plane_state *plane, 358 int slice_count); 359 360 /* 361 * Get the OTG master pipe in resource context associated with the stream. 362 * return - NULL if not found. Otherwise the OTG master pipe associated with the 363 * stream. 364 */ 365 struct pipe_ctx *resource_get_otg_master_for_stream( 366 struct resource_context *res_ctx, 367 const struct dc_stream_state *stream); 368 369 /* 370 * Get an array of OPP heads in opp_heads ordered with index low to high for OTG 371 * master pipe in res_ctx. 372 * return - number of OPP heads in the array. If otg_master passed in is not 373 * an OTG master, the function returns 0. 374 */ 375 int resource_get_opp_heads_for_otg_master(const struct pipe_ctx *otg_master, 376 struct resource_context *res_ctx, 377 struct pipe_ctx *opp_heads[MAX_PIPES]); 378 379 /* 380 * Get an array of DPP pipes in dpp_pipes ordered with index low to high for OPP 381 * head pipe in res_ctx. 382 * return - number of DPP pipes in the array. If opp_head passed in is not 383 * an OPP pipe, the function returns 0. 384 */ 385 int resource_get_dpp_pipes_for_opp_head(const struct pipe_ctx *opp_head, 386 struct resource_context *res_ctx, 387 struct pipe_ctx *dpp_pipes[MAX_PIPES]); 388 389 /* 390 * Get an array of DPP pipes in dpp_pipes ordered with index low to high for 391 * plane in res_ctx. 392 * return - number of DPP pipes in the array. 393 */ 394 int resource_get_dpp_pipes_for_plane(const struct dc_plane_state *plane, 395 struct resource_context *res_ctx, 396 struct pipe_ctx *dpp_pipes[MAX_PIPES]); 397 398 /* 399 * Get the OTG master pipe for the input pipe context. 400 * return - the OTG master pipe for the input pipe 401 * context. 402 */ 403 struct pipe_ctx *resource_get_otg_master(const struct pipe_ctx *pipe_ctx); 404 405 /* 406 * Get the OPP head pipe for the input pipe context. 407 * return - the OPP head pipe for the input pipe 408 * context. 409 */ 410 struct pipe_ctx *resource_get_opp_head(const struct pipe_ctx *pipe_ctx); 411 412 /* 413 * Get the DPP pipe allocated for MPC slice 0 and ODM slice 0 of the plane 414 * associated with dpp_pipe. 415 */ 416 struct pipe_ctx *resource_get_primary_dpp_pipe(const struct pipe_ctx *dpp_pipe); 417 418 /* 419 * Get the MPC slice index counting from 0 from left most slice 420 * For example, if a DPP pipe is used as a secondary pipe in MPCC combine, MPC 421 * split index is greater than 0. 422 */ 423 int resource_get_mpc_slice_index(const struct pipe_ctx *dpp_pipe); 424 425 /* 426 * Get number of MPC "cuts" of the plane associated with the pipe. MPC slice 427 * count is equal to MPC splits + 1. For example if a plane is cut 3 times, it 428 * will have 4 pieces of slice. 429 * return - 0 if pipe is not used for a plane with MPCC combine. otherwise 430 * the number of MPC "cuts" for the plane. 431 */ 432 int resource_get_mpc_slice_count(const struct pipe_ctx *opp_head); 433 434 /* 435 * Get number of ODM "cuts" of the timing associated with the pipe. ODM slice 436 * count is equal to ODM splits + 1. For example if a timing is cut 3 times, it 437 * will have 4 pieces of slice. 438 * return - 0 if pipe is not used for ODM combine. otherwise 439 * the number of ODM "cuts" for the timing. 440 */ 441 int resource_get_odm_slice_count(const struct pipe_ctx *otg_master); 442 443 /* Get the ODM slice index counting from 0 from left most slice */ 444 int resource_get_odm_slice_index(const struct pipe_ctx *opp_head); 445 446 /* determine if pipe topology is changed between state a and state b */ 447 bool resource_is_pipe_topology_changed(const struct dc_state *state_a, 448 const struct dc_state *state_b); 449 450 /* 451 * determine if the two OTG master pipes have the same ODM topology 452 * return 453 * false - if pipes passed in are not OTG masters or ODM topology is 454 * changed. 455 * true - otherwise 456 */ 457 bool resource_is_odm_topology_changed(const struct pipe_ctx *otg_master_a, 458 const struct pipe_ctx *otg_master_b); 459 460 /* log the pipe topology update in state */ 461 void resource_log_pipe_topology_update(struct dc *dc, struct dc_state *state); 462 463 /* 464 * Look for a free pipe in new resource context that is used as a secondary OPP 465 * head by cur_otg_master. 466 * 467 * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise 468 * pipe idx of the free pipe 469 */ 470 int resource_find_free_pipe_used_as_sec_opp_head_by_cur_otg_master( 471 const struct resource_context *cur_res_ctx, 472 struct resource_context *new_res_ctx, 473 const struct pipe_ctx *cur_otg_master); 474 475 /* 476 * Look for a free pipe in new resource context that is used as a secondary DPP 477 * pipe in MPC blending tree associated with input OPP head pipe. 478 * 479 * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise 480 * pipe idx of the free pipe 481 */ 482 int resource_find_free_pipe_used_in_cur_mpc_blending_tree( 483 const struct resource_context *cur_res_ctx, 484 struct resource_context *new_res_ctx, 485 const struct pipe_ctx *cur_opp_head); 486 487 /* 488 * Look for a free pipe in new resource context that is not used in current 489 * resource context. 490 * 491 * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise 492 * pipe idx of the free pipe 493 */ 494 int recource_find_free_pipe_not_used_in_cur_res_ctx( 495 const struct resource_context *cur_res_ctx, 496 struct resource_context *new_res_ctx, 497 const struct resource_pool *pool); 498 499 /* 500 * Look for a free pipe in new resource context that is used as a secondary DPP 501 * pipe in any MPCC combine in current resource context. 502 * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise 503 * pipe idx of the free pipe 504 */ 505 int resource_find_free_pipe_used_as_cur_sec_dpp_in_mpcc_combine( 506 const struct resource_context *cur_res_ctx, 507 struct resource_context *new_res_ctx, 508 const struct resource_pool *pool); 509 510 /* 511 * Look for any free pipe in new resource context. 512 * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise 513 * pipe idx of the free pipe 514 */ 515 int resource_find_any_free_pipe(struct resource_context *new_res_ctx, 516 const struct resource_pool *pool); 517 518 /* 519 * Legacy find free secondary pipe logic deprecated for newer DCNs as it doesn't 520 * find the most optimal free pipe to prevent from time consuming hardware state 521 * transitions. 522 */ 523 struct pipe_ctx *resource_find_free_secondary_pipe_legacy( 524 struct resource_context *res_ctx, 525 const struct resource_pool *pool, 526 const struct pipe_ctx *primary_pipe); 527 528 bool resource_validate_attach_surfaces( 529 const struct dc_validation_set set[], 530 int set_count, 531 const struct dc_state *old_context, 532 struct dc_state *context, 533 const struct resource_pool *pool); 534 535 enum dc_status resource_map_clock_resources( 536 const struct dc *dc, 537 struct dc_state *context, 538 struct dc_stream_state *stream); 539 540 enum dc_status resource_map_phy_clock_resources( 541 const struct dc *dc, 542 struct dc_state *context, 543 struct dc_stream_state *stream); 544 545 bool pipe_need_reprogram( 546 struct pipe_ctx *pipe_ctx_old, 547 struct pipe_ctx *pipe_ctx); 548 549 void resource_build_bit_depth_reduction_params(struct dc_stream_state *stream, 550 struct bit_depth_reduction_params *fmt_bit_depth); 551 552 void update_audio_usage( 553 struct resource_context *res_ctx, 554 const struct resource_pool *pool, 555 struct audio *audio, 556 bool acquired); 557 558 unsigned int resource_pixel_format_to_bpp(enum surface_pixel_format format); 559 560 void get_audio_check(struct audio_info *aud_modes, 561 struct audio_check *aud_chk); 562 563 bool get_temp_dp_link_res(struct dc_link *link, 564 struct link_resource *link_res, 565 struct dc_link_settings *link_settings); 566 567 #if defined(CONFIG_DRM_AMD_DC_FP) 568 struct hpo_dp_link_encoder *resource_get_hpo_dp_link_enc_for_det_lt( 569 const struct resource_context *res_ctx, 570 const struct resource_pool *pool, 571 const struct dc_link *link); 572 #endif 573 574 void reset_syncd_pipes_from_disabled_pipes(struct dc *dc, 575 struct dc_state *context); 576 577 void check_syncd_pipes_for_disabled_master_pipe(struct dc *dc, 578 struct dc_state *context, 579 uint8_t disabled_master_pipe_idx); 580 581 void reset_sync_context_for_pipe(const struct dc *dc, 582 struct dc_state *context, 583 uint8_t pipe_idx); 584 585 uint8_t resource_transmitter_to_phy_idx(const struct dc *dc, enum transmitter transmitter); 586 587 const struct link_hwss *get_link_hwss(const struct dc_link *link, 588 const struct link_resource *link_res); 589 590 bool is_h_timing_divisible_by_2(struct dc_stream_state *stream); 591 592 bool dc_resource_acquire_secondary_pipe_for_mpc_odm_legacy( 593 const struct dc *dc, 594 struct dc_state *state, 595 struct pipe_ctx *pri_pipe, 596 struct pipe_ctx *sec_pipe, 597 bool odm); 598 599 /* A test harness interface that modifies dp encoder resources in the given dc 600 * state and bypasses the need to revalidate. The interface assumes that the 601 * test harness interface is called with pre-validated link config stored in the 602 * pipe_ctx and updates dp encoder resources according to the link config. 603 */ 604 enum dc_status update_dp_encoder_resources_for_test_harness(const struct dc *dc, 605 struct dc_state *context, 606 struct pipe_ctx *pipe_ctx); 607 #endif /* DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_ */ 608