xref: /linux/drivers/gpu/drm/amd/display/dc/inc/resource.h (revision 6a143a7cf94730f57544ea14a987dc025364dbb8)
1 /*
2  * Copyright 2015 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  */
24 
25 #ifndef DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_
26 #define DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_
27 
28 #include "core_types.h"
29 #include "core_status.h"
30 #include "dal_asic_id.h"
31 #include "dm_pp_smu.h"
32 
33 #define MEMORY_TYPE_MULTIPLIER_CZ 4
34 #define MEMORY_TYPE_HBM 2
35 
36 
37 enum dce_version resource_parse_asic_id(
38 		struct hw_asic_id asic_id);
39 
40 struct resource_caps {
41 	int num_timing_generator;
42 	int num_opp;
43 	int num_video_plane;
44 	int num_audio;
45 	int num_stream_encoder;
46 	int num_pll;
47 	int num_dwb;
48 	int num_ddc;
49 	int num_vmid;
50 	int num_dsc;
51 	int num_mpc_3dlut;
52 };
53 
54 struct resource_straps {
55 	uint32_t hdmi_disable;
56 	uint32_t dc_pinstraps_audio;
57 	uint32_t audio_stream_number;
58 };
59 
60 struct resource_create_funcs {
61 	void (*read_dce_straps)(
62 			struct dc_context *ctx, struct resource_straps *straps);
63 
64 	struct audio *(*create_audio)(
65 			struct dc_context *ctx, unsigned int inst);
66 
67 	struct stream_encoder *(*create_stream_encoder)(
68 			enum engine_id eng_id, struct dc_context *ctx);
69 
70 	struct dce_hwseq *(*create_hwseq)(
71 			struct dc_context *ctx);
72 };
73 
74 bool resource_construct(
75 	unsigned int num_virtual_links,
76 	struct dc *dc,
77 	struct resource_pool *pool,
78 	const struct resource_create_funcs *create_funcs);
79 
80 struct resource_pool *dc_create_resource_pool(struct dc  *dc,
81 					      const struct dc_init_data *init_data,
82 					      enum dce_version dc_version);
83 
84 void dc_destroy_resource_pool(struct dc *dc);
85 
86 enum dc_status resource_map_pool_resources(
87 		const struct dc *dc,
88 		struct dc_state *context,
89 		struct dc_stream_state *stream);
90 
91 bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx);
92 
93 enum dc_status resource_build_scaling_params_for_context(
94 		const struct dc *dc,
95 		struct dc_state *context);
96 
97 void resource_build_info_frame(struct pipe_ctx *pipe_ctx);
98 
99 void resource_unreference_clock_source(
100 		struct resource_context *res_ctx,
101 		const struct resource_pool *pool,
102 		struct clock_source *clock_source);
103 
104 void resource_reference_clock_source(
105 		struct resource_context *res_ctx,
106 		const struct resource_pool *pool,
107 		struct clock_source *clock_source);
108 
109 int resource_get_clock_source_reference(
110 		struct resource_context *res_ctx,
111 		const struct resource_pool *pool,
112 		struct clock_source *clock_source);
113 
114 bool resource_are_streams_timing_synchronizable(
115 		struct dc_stream_state *stream1,
116 		struct dc_stream_state *stream2);
117 
118 struct clock_source *resource_find_used_clk_src_for_sharing(
119 		struct resource_context *res_ctx,
120 		struct pipe_ctx *pipe_ctx);
121 
122 struct clock_source *dc_resource_find_first_free_pll(
123 		struct resource_context *res_ctx,
124 		const struct resource_pool *pool);
125 
126 struct pipe_ctx *resource_get_head_pipe_for_stream(
127 		struct resource_context *res_ctx,
128 		struct dc_stream_state *stream);
129 
130 bool resource_attach_surfaces_to_context(
131 		struct dc_plane_state *const *plane_state,
132 		int surface_count,
133 		struct dc_stream_state *dc_stream,
134 		struct dc_state *context,
135 		const struct resource_pool *pool);
136 
137 struct pipe_ctx *find_idle_secondary_pipe(
138 		struct resource_context *res_ctx,
139 		const struct resource_pool *pool,
140 		const struct pipe_ctx *primary_pipe);
141 
142 bool resource_validate_attach_surfaces(
143 		const struct dc_validation_set set[],
144 		int set_count,
145 		const struct dc_state *old_context,
146 		struct dc_state *context,
147 		const struct resource_pool *pool);
148 
149 void resource_validate_ctx_update_pointer_after_copy(
150 		const struct dc_state *src_ctx,
151 		struct dc_state *dst_ctx);
152 
153 enum dc_status resource_map_clock_resources(
154 		const struct dc *dc,
155 		struct dc_state *context,
156 		struct dc_stream_state *stream);
157 
158 enum dc_status resource_map_phy_clock_resources(
159 		const struct dc *dc,
160 		struct dc_state *context,
161 		struct dc_stream_state *stream);
162 
163 bool pipe_need_reprogram(
164 		struct pipe_ctx *pipe_ctx_old,
165 		struct pipe_ctx *pipe_ctx);
166 
167 void resource_build_bit_depth_reduction_params(struct dc_stream_state *stream,
168 		struct bit_depth_reduction_params *fmt_bit_depth);
169 
170 void update_audio_usage(
171 		struct resource_context *res_ctx,
172 		const struct resource_pool *pool,
173 		struct audio *audio,
174 		bool acquired);
175 
176 unsigned int resource_pixel_format_to_bpp(enum surface_pixel_format format);
177 
178 void get_audio_check(struct audio_info *aud_modes,
179 	struct audio_check *aud_chk);
180 
181 int get_num_mpc_splits(struct pipe_ctx *pipe);
182 
183 int get_num_odm_splits(struct pipe_ctx *pipe);
184 
185 #endif /* DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_ */
186