xref: /linux/drivers/gpu/drm/amd/display/dc/inc/resource.h (revision 5ea5880764cbb164afb17a62e76ca75dc371409d)
1 /*
2  * Copyright 2015 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  */
24 
25 #ifndef DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_
26 #define DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_
27 
28 #include "core_types.h"
29 #include "core_status.h"
30 #include "dal_asic_id.h"
31 #include "dm_pp_smu.h"
32 
33 #define MEMORY_TYPE_MULTIPLIER_CZ 4
34 #define MEMORY_TYPE_HBM 2
35 #define MAX_MCACHES 8
36 
37 
38 #define IS_PIPE_SYNCD_VALID(pipe) ((((pipe)->pipe_idx_syncd) & 0x80)?1:0)
39 #define GET_PIPE_SYNCD_FROM_PIPE(pipe) ((pipe)->pipe_idx_syncd & 0x7F)
40 #define SET_PIPE_SYNCD_TO_PIPE(pipe, pipe_syncd) ((pipe)->pipe_idx_syncd = (0x80 | pipe_syncd))
41 
42 enum dce_version resource_parse_asic_id(
43 		struct hw_asic_id asic_id);
44 
45 struct resource_caps {
46 	int num_timing_generator;
47 	int num_opp;
48 	int num_dpp;
49 	int num_video_plane;
50 	int num_audio;
51 	int num_stream_encoder;
52 	int num_analog_stream_encoder;
53 	int num_pll;
54 	int num_dwb;
55 	int num_ddc;
56 	int num_vmid;
57 	int num_dsc;
58 	unsigned int num_dig_link_enc; // Total number of DIGs (digital encoders) in DIO (Display Input/Output).
59 	unsigned int num_usb4_dpia; // Total number of USB4 DPIA (DisplayPort Input Adapters).
60 	int num_hpo_dp_stream_encoder;
61 	int num_hpo_dp_link_encoder;
62 	int num_mpc_3dlut;
63 	int num_rmcm;
64 };
65 
66 struct resource_straps {
67 	uint32_t hdmi_disable;
68 	uint32_t dc_pinstraps_audio;
69 	uint32_t audio_stream_number;
70 };
71 
72 struct dc_mcache_allocations {
73 	int global_mcache_ids_plane0[MAX_MCACHES + 1];
74 	int global_mcache_ids_plane1[MAX_MCACHES + 1];
75 	int global_mcache_ids_mall_plane0[MAX_MCACHES + 1];
76 	int global_mcache_ids_mall_plane1[MAX_MCACHES + 1];
77 };
78 
79 struct resource_create_funcs {
80 	void (*read_dce_straps)(
81 			struct dc_context *ctx, struct resource_straps *straps);
82 
83 	struct audio *(*create_audio)(
84 			struct dc_context *ctx, unsigned int inst);
85 
86 	struct stream_encoder *(*create_stream_encoder)(
87 			enum engine_id eng_id, struct dc_context *ctx);
88 
89 	struct hpo_dp_stream_encoder *(*create_hpo_dp_stream_encoder)(
90 			enum engine_id eng_id, struct dc_context *ctx);
91 	struct hpo_dp_link_encoder *(*create_hpo_dp_link_encoder)(
92 			uint8_t inst,
93 			struct dc_context *ctx);
94 	struct dce_hwseq *(*create_hwseq)(
95 			struct dc_context *ctx);
96 };
97 
98 bool resource_construct(
99 	unsigned int num_virtual_links,
100 	struct dc *dc,
101 	struct resource_pool *pool,
102 	const struct resource_create_funcs *create_funcs);
103 
104 struct resource_pool *dc_create_resource_pool(struct dc  *dc,
105 					      const struct dc_init_data *init_data,
106 					      enum dce_version dc_version);
107 
108 void dc_destroy_resource_pool(struct dc *dc);
109 
110 enum dc_status resource_map_pool_resources(
111 		const struct dc *dc,
112 		struct dc_state *context,
113 		struct dc_stream_state *stream);
114 
115 void resource_build_test_pattern_params(
116 		struct resource_context *res_ctx,
117 		struct pipe_ctx *pipe_ctx);
118 
119 bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx);
120 
121 enum dc_status resource_build_scaling_params_for_context(
122 		const struct dc *dc,
123 		struct dc_state *context);
124 
125 void resource_build_info_frame(struct pipe_ctx *pipe_ctx);
126 
127 void resource_unreference_clock_source(
128 		struct resource_context *res_ctx,
129 		const struct resource_pool *pool,
130 		struct clock_source *clock_source);
131 
132 void resource_reference_clock_source(
133 		struct resource_context *res_ctx,
134 		const struct resource_pool *pool,
135 		struct clock_source *clock_source);
136 
137 int resource_get_clock_source_reference(
138 		struct resource_context *res_ctx,
139 		const struct resource_pool *pool,
140 		struct clock_source *clock_source);
141 
142 bool resource_are_streams_timing_synchronizable(
143 		struct dc_stream_state *stream1,
144 		struct dc_stream_state *stream2);
145 
146 bool resource_are_vblanks_synchronizable(
147 		struct dc_stream_state *stream1,
148 		struct dc_stream_state *stream2);
149 
150 struct clock_source *resource_find_used_clk_src_for_sharing(
151 		struct resource_context *res_ctx,
152 		struct pipe_ctx *pipe_ctx);
153 
154 struct clock_source *dc_resource_find_first_free_pll(
155 		struct resource_context *res_ctx,
156 		const struct resource_pool *pool);
157 
158 bool resource_attach_surfaces_to_context(
159 		struct dc_plane_state *const *plane_state,
160 		int surface_count,
161 		struct dc_stream_state *dc_stream,
162 		struct dc_state *context,
163 		const struct resource_pool *pool);
164 
165 bool resource_can_pipe_disable_cursor(struct pipe_ctx *pipe_ctx);
166 
167 #define FREE_PIPE_INDEX_NOT_FOUND -1
168 
169 /*
170  * pipe types are identified based on MUXes in DCN front end that are capable
171  * of taking input from one DCN pipeline to another DCN pipeline. The name is
172  * in a form of XXXX_YYYY, where XXXX is the DCN front end hardware block the
173  * pipeline ends with and YYYY is the rendering role that the pipe is in.
174  *
175  * For instance OTG_MASTER is a pipe ending with OTG hardware block in its
176  * pipeline and it is in a role of a master pipe for timing generation.
177  *
178  * For quick reference a diagram of each pipe type's areas of responsibility
179  * for outputting timings on the screen is shown below:
180  *
181  *       Timing Active for Stream 0
182  *        __________________________________________________
183  *       |OTG master 0 (OPP head 0)|OPP head 2 (DPP pipe 2) |
184  *       |             (DPP pipe 0)|                        |
185  *       | Top Plane 0             |                        |
186  *       |           ______________|____                    |
187  *       |          |DPP pipe 1    |DPP |                   |
188  *       |          |              |pipe|                   |
189  *       |          |  Bottom      |3   |                   |
190  *       |          |  Plane 1     |    |                   |
191  *       |          |              |    |                   |
192  *       |          |______________|____|                   |
193  *       |                         |                        |
194  *       |                         |                        |
195  *       | ODM slice 0             | ODM slice 1            |
196  *       |_________________________|________________________|
197  *
198  *       Timing Active for Stream 1
199  *        __________________________________________________
200  *       |OTG master 4 (OPP head 4)                         |
201  *       |                                                  |
202  *       |                                                  |
203  *       |                                                  |
204  *       |                                                  |
205  *       |                                                  |
206  *       |               Blank Pixel Data                   |
207  *       |              (generated by DPG4)                 |
208  *       |                                                  |
209  *       |                                                  |
210  *       |                                                  |
211  *       |                                                  |
212  *       |                                                  |
213  *       |__________________________________________________|
214  *
215  *       Inter-pipe Relation
216  *        __________________________________________________
217  *       |PIPE IDX|   DPP PIPES   | OPP HEADS | OTG MASTER  |
218  *       |        |  plane 0      | slice 0   |             |
219  *       |   0    | -------------MPC---------ODM----------- |
220  *       |        |  plane 1    | |         | |             |
221  *       |   1    | ------------- |         | |             |
222  *       |        |  plane 0      | slice 1 | |             |
223  *       |   2    | -------------MPC--------- |             |
224  *       |        |  plane 1    | |           |             |
225  *       |   3    | ------------- |           |             |
226  *       |        |               | blank     |             |
227  *       |   4    |               | ----------------------- |
228  *       |        |               |           |             |
229  *       |   5    |  (FREE)       |           |             |
230  *       |________|_______________|___________|_____________|
231  *
232  * The following is a quick reference of the class relation:
233  *
234  *	DC state            ---1--------0..N---           streams
235  *
236  *	stream              ---1-----------1---           OTG Master pipe
237  *
238  *	OTG Master pipe     ---1--------1..N---           OPP Head pipes
239  *
240  *	OPP Head pipe       ---1--------0..N---           DPP pipes
241  *
242  *	stream              ---1--------0..N---           Planes
243  *
244  *	Plane               ---1--------1..N---           DPP pipes
245  *
246  */
247 enum pipe_type {
248 	/* free pipe - free pipe is an uninitialized pipe without a stream
249 	 * associated with it. It is a free DCN pipe resource. It can be
250 	 * acquired as any type of pipe.
251 	 */
252 	FREE_PIPE,
253 
254 	/* OTG master pipe - the master pipe of its OPP head pipes with a
255 	 * functional OTG. It merges all its OPP head pipes pixel data in ODM
256 	 * block and output to back end DIG. OTG master pipe is responsible for
257 	 * generating entire CRTC timing to back end DIG. An OTG master pipe may
258 	 * or may not have a plane. If it has a plane it blends it as the left
259 	 * most MPC slice of the top most layer. If it doesn't have a plane it
260 	 * can output pixel data from its OPP head pipes' test pattern
261 	 * generators (DPG) such as solid black pixel data to blank the screen.
262 	 */
263 	OTG_MASTER,
264 
265 	/* OPP head pipe - the head pipe of an MPC blending tree with a
266 	 * functional OPP outputting to an OTG. OPP head pipe is responsible for
267 	 * processing output pixels in its own ODM slice. It may or may not have
268 	 * a plane. If it has a plane it blends it as the top most layer within
269 	 * its own ODM slice. If it doesn't have a plane it can output pixel
270 	 * data from its DPG such as solid black pixel data to blank the pixel
271 	 * data in its own ODM slice. OTG master pipe is also an OPP head pipe
272 	 * but with more responsibility.
273 	 */
274 	OPP_HEAD,
275 
276 	/* DPP pipe - the pipe with a functional DPP outputting to an OPP head
277 	 * pipe's MPC. DPP pipe is responsible for processing pixel data from
278 	 * its own MPC slice of a plane. It must be connected to an OPP head
279 	 * pipe and it must have a plane associated with it.
280 	 */
281 	DPP_PIPE,
282 };
283 
284 /*
285  * Determine if the input pipe_ctx is of a pipe type.
286  * return - true if pipe_ctx is of the input type.
287  */
288 bool resource_is_pipe_type(const struct pipe_ctx *pipe_ctx, enum pipe_type type);
289 
290 /*
291  * Acquire a pipe as OTG master pipe and allocate pipe resources required to
292  * enable stream output.
293  */
294 enum dc_status resource_add_otg_master_for_stream_output(struct dc_state *new_ctx,
295 		const struct resource_pool *pool,
296 		struct dc_stream_state *stream);
297 
298 /*
299  * Release pipe resources and the OTG master pipe associated with the stream
300  * The stream must have all planes removed and ODM/MPC slice counts are reset
301  * to 1 before invoking this interface.
302  */
303 void resource_remove_otg_master_for_stream_output(struct dc_state *new_ctx,
304 		const struct resource_pool *pool,
305 		struct dc_stream_state *stream);
306 
307 /*
308  * Add plane to the bottom most layer in plane composition and allocate DPP pipe
309  * resources as needed.
310  * return - true if plane is added in plane composition, false otherwise.
311  */
312 bool resource_append_dpp_pipes_for_plane_composition(
313 		struct dc_state *new_ctx,
314 		struct dc_state *cur_ctx,
315 		struct resource_pool *pool,
316 		struct pipe_ctx *otg_master_pipe,
317 		struct dc_plane_state *plane_state);
318 
319 /*
320  * Add plane to the bottom most layer in plane composition and allocate DPP pipe
321  * resources as needed.
322  * return - true if plane is added in plane composition, false otherwise.
323  */
324 void resource_remove_dpp_pipes_for_plane_composition(
325 		struct dc_state *context,
326 		const struct resource_pool *pool,
327 		const struct dc_plane_state *plane_state);
328 
329 /*
330  * Update ODM slice count by acquiring or releasing pipes. If new slices need
331  * to be added, it is going to add them to the last ODM index. If existing
332  * slices need to be removed, it is going to remove them from the last ODM
333  * index.
334  *
335  * return - true if ODM slices are updated and required pipes are acquired. All
336  * affected pipe parameters are updated.
337  *
338  * false if resource fails to complete this update. The function is not designed
339  * to recover the creation of invalid topologies. Returning false is typically
340  * an indication of insufficient validation in caller's stack. new_ctx will be
341  * invalid. Caller may attempt to restore new_ctx by calling this function
342  * again with original slice count.
343  */
344 bool resource_update_pipes_for_stream_with_slice_count(
345 		struct dc_state *new_ctx,
346 		const struct dc_state *cur_ctx,
347 		const struct resource_pool *pool,
348 		const struct dc_stream_state *stream,
349 		int new_slice_count);
350 
351 /*
352  * Update MPC slice count by acquiring or releasing DPP pipes. If new slices
353  * need to be added it is going to add to the last MPC index. If existing
354  * slices need to be removed, it is going to remove them from the last MPC
355  * index.
356  *
357  * @dpp_pipe - top most dpp pipe for MPCC combine.
358  *
359  * return - true if MPC slices are updated and required pipes are acquired. All
360  * affected pipe parameters are updated.
361  *
362  * false if resource fails to complete this update. The function is not designed
363  * to recover the creation of invalid topologies. Returning false is typically
364  * an indication of insufficient validation in caller's stack. new_ctx will be
365  * invalid. Caller may attempt to restore new_ctx by calling this function
366  * again with original slice count.
367  */
368 bool resource_update_pipes_for_plane_with_slice_count(
369 		struct dc_state *new_ctx,
370 		const struct dc_state *cur_ctx,
371 		const struct resource_pool *pool,
372 		const struct dc_plane_state *plane,
373 		int slice_count);
374 
375 /*
376  * Get the OTG master pipe in resource context associated with the stream.
377  * return - NULL if not found. Otherwise the OTG master pipe associated with the
378  * stream.
379  */
380 struct pipe_ctx *resource_get_otg_master_for_stream(
381 		struct resource_context *res_ctx,
382 		const struct dc_stream_state *stream);
383 
384 /*
385  * Get an array of OPP heads in opp_heads ordered with index low to high for OTG
386  * master pipe in res_ctx.
387  * return - number of OPP heads in the array. If otg_master passed in is not
388  * an OTG master, the function returns 0.
389  */
390 int resource_get_opp_heads_for_otg_master(const struct pipe_ctx *otg_master,
391 		struct resource_context *res_ctx,
392 		struct pipe_ctx *opp_heads[MAX_PIPES]);
393 
394 /*
395  * Get an array of DPP pipes in dpp_pipes ordered with index low to high for OPP
396  * head pipe in res_ctx.
397  * return - number of DPP pipes in the array. If opp_head passed in is not
398  * an OPP pipe, the function returns 0.
399  */
400 int resource_get_dpp_pipes_for_opp_head(const struct pipe_ctx *opp_head,
401 		struct resource_context *res_ctx,
402 		struct pipe_ctx *dpp_pipes[MAX_PIPES]);
403 
404 /*
405  * Get an array of DPP pipes in dpp_pipes ordered with index low to high for
406  * plane in res_ctx.
407  * return - number of DPP pipes in the array.
408  */
409 int resource_get_dpp_pipes_for_plane(const struct dc_plane_state *plane,
410 		struct resource_context *res_ctx,
411 		struct pipe_ctx *dpp_pipes[MAX_PIPES]);
412 
413 /*
414  * Get the OTG master pipe for the input pipe context.
415  * return - the OTG master pipe for the input pipe
416  * context.
417  */
418 struct pipe_ctx *resource_get_otg_master(const struct pipe_ctx *pipe_ctx);
419 
420 /*
421  * Get the OPP head pipe for the input pipe context.
422  * return - the OPP head pipe for the input pipe
423  * context.
424  */
425 struct pipe_ctx *resource_get_opp_head(const struct pipe_ctx *pipe_ctx);
426 
427 /*
428  * Get the DPP pipe allocated for MPC slice 0 and ODM slice 0 of the plane
429  * associated with dpp_pipe.
430  */
431 struct pipe_ctx *resource_get_primary_dpp_pipe(const struct pipe_ctx *dpp_pipe);
432 
433 /*
434  * Get the MPC slice index counting from 0 from left most slice
435  * For example, if a DPP pipe is used as a secondary pipe in MPCC combine, MPC
436  * split index is greater than 0.
437  */
438 int resource_get_mpc_slice_index(const struct pipe_ctx *dpp_pipe);
439 
440 /*
441  * Get the number of MPC slices associated with the pipe.
442  * The function returns 0 if the pipe is not associated with an MPC combine
443  * pipe topology.
444  */
445 int resource_get_mpc_slice_count(const struct pipe_ctx *pipe);
446 
447 /*
448  * Get the number of ODM slices associated with the pipe.
449  * The function returns 0 if the pipe is not associated with an ODM combine
450  * pipe topology.
451  */
452 int resource_get_odm_slice_count(const struct pipe_ctx *pipe);
453 
454 /* Get the ODM slice index counting from 0 from left most slice */
455 int resource_get_odm_slice_index(const struct pipe_ctx *opp_head);
456 
457 /* Get ODM slice source rect in timing active as input to OPP block */
458 struct rect resource_get_odm_slice_src_rect(struct pipe_ctx *pipe_ctx);
459 
460 /* Get ODM slice destination rect in timing active as output from OPP block */
461 struct rect resource_get_odm_slice_dst_rect(struct pipe_ctx *pipe_ctx);
462 
463 /* Get ODM slice destination width in timing active as output from OPP block */
464 int resource_get_odm_slice_dst_width(struct pipe_ctx *otg_master,
465 		bool is_last_segment);
466 
467 /* determine if pipe topology is changed between state a and state b */
468 bool resource_is_pipe_topology_changed(const struct dc_state *state_a,
469 		const struct dc_state *state_b);
470 
471 /*
472  * determine if the two OTG master pipes have the same ODM topology
473  * return
474  * false - if pipes passed in are not OTG masters or ODM topology is
475  * changed.
476  * true - otherwise
477  */
478 bool resource_is_odm_topology_changed(const struct pipe_ctx *otg_master_a,
479 		const struct pipe_ctx *otg_master_b);
480 
481 /* log the pipe topology update in state */
482 void resource_log_pipe_topology_update(struct dc *dc, struct dc_state *state);
483 
484 /*
485  * Look for a free pipe in new resource context that is used as a secondary OPP
486  * head by cur_otg_master.
487  *
488  * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise
489  * pipe idx of the free pipe
490  */
491 int resource_find_free_pipe_used_as_sec_opp_head_by_cur_otg_master(
492 		const struct resource_context *cur_res_ctx,
493 		struct resource_context *new_res_ctx,
494 		const struct pipe_ctx *cur_otg_master);
495 
496 /*
497  * Look for a free pipe in new resource context that is used as a secondary DPP
498  * pipe in MPC blending tree associated with input OPP head pipe.
499  *
500  * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise
501  * pipe idx of the free pipe
502  */
503 int resource_find_free_pipe_used_in_cur_mpc_blending_tree(
504 		const struct resource_context *cur_res_ctx,
505 		struct resource_context *new_res_ctx,
506 		const struct pipe_ctx *cur_opp_head);
507 
508 /*
509  * Look for a free pipe in new resource context that is not used in current
510  * resource context.
511  *
512  * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise
513  * pipe idx of the free pipe
514  */
515 int recource_find_free_pipe_not_used_in_cur_res_ctx(
516 		const struct resource_context *cur_res_ctx,
517 		struct resource_context *new_res_ctx,
518 		const struct resource_pool *pool);
519 
520 /*
521  * Look for a free pipe in new resource context that is used in current resource
522  * context as an OTG master pipe.
523  *
524  * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise
525  * pipe idx of the free pipe
526  */
527 int recource_find_free_pipe_used_as_otg_master_in_cur_res_ctx(
528 		const struct resource_context *cur_res_ctx,
529 		struct resource_context *new_res_ctx,
530 		const struct resource_pool *pool);
531 
532 /*
533  * Look for a free pipe in new resource context that is used as a secondary DPP
534  * pipe in current resource context.
535  * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise
536  * pipe idx of the free pipe
537  */
538 int resource_find_free_pipe_used_as_cur_sec_dpp(
539 		const struct resource_context *cur_res_ctx,
540 		struct resource_context *new_res_ctx,
541 		const struct resource_pool *pool);
542 
543 /*
544  * Look for a free pipe in new resource context that is used as a secondary DPP
545  * pipe in any MPCC combine in current resource context.
546  * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise
547  * pipe idx of the free pipe
548  */
549 int resource_find_free_pipe_used_as_cur_sec_dpp_in_mpcc_combine(
550 		const struct resource_context *cur_res_ctx,
551 		struct resource_context *new_res_ctx,
552 		const struct resource_pool *pool);
553 
554 /*
555  * Look for any free pipe in new resource context.
556  * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise
557  * pipe idx of the free pipe
558  */
559 int resource_find_any_free_pipe(struct resource_context *new_res_ctx,
560 		const struct resource_pool *pool);
561 
562 /*
563  * Legacy find free secondary pipe logic deprecated for newer DCNs as it doesn't
564  * find the most optimal free pipe to prevent from time consuming hardware state
565  * transitions.
566  */
567 struct pipe_ctx *resource_find_free_secondary_pipe_legacy(
568 		struct resource_context *res_ctx,
569 		const struct resource_pool *pool,
570 		const struct pipe_ctx *primary_pipe);
571 
572 bool resource_validate_attach_surfaces(
573 		const struct dc_validation_set set[],
574 		int set_count,
575 		const struct dc_state *old_context,
576 		struct dc_state *context,
577 		const struct resource_pool *pool);
578 
579 enum dc_status resource_map_clock_resources(
580 		const struct dc *dc,
581 		struct dc_state *context,
582 		struct dc_stream_state *stream);
583 
584 enum dc_status resource_map_phy_clock_resources(
585 		const struct dc *dc,
586 		struct dc_state *context,
587 		struct dc_stream_state *stream);
588 
589 bool pipe_need_reprogram(
590 		struct pipe_ctx *pipe_ctx_old,
591 		struct pipe_ctx *pipe_ctx);
592 
593 void resource_build_bit_depth_reduction_params(struct dc_stream_state *stream,
594 		struct bit_depth_reduction_params *fmt_bit_depth);
595 
596 void update_audio_usage(
597 		struct resource_context *res_ctx,
598 		const struct resource_pool *pool,
599 		struct audio *audio,
600 		bool acquired);
601 
602 unsigned int resource_pixel_format_to_bpp(enum surface_pixel_format format);
603 
604 bool get_temp_dp_link_res(struct dc_link *link,
605 		struct link_resource *link_res,
606 		struct dc_link_settings *link_settings);
607 
608 void reset_syncd_pipes_from_disabled_pipes(struct dc *dc,
609 	struct dc_state *context);
610 
611 void check_syncd_pipes_for_disabled_master_pipe(struct dc *dc,
612 	struct dc_state *context,
613 	uint8_t disabled_master_pipe_idx);
614 
615 void reset_sync_context_for_pipe(const struct dc *dc,
616 	struct dc_state *context,
617 	uint8_t pipe_idx);
618 
619 uint8_t resource_transmitter_to_phy_idx(const struct dc *dc, enum transmitter transmitter);
620 
621 const struct link_hwss *get_link_hwss(const struct dc_link *link,
622 		const struct link_resource *link_res);
623 
624 bool is_h_timing_divisible_by_2(struct dc_stream_state *stream);
625 
626 bool dc_resource_acquire_secondary_pipe_for_mpc_odm_legacy(
627 		const struct dc *dc,
628 		struct dc_state *state,
629 		struct pipe_ctx *pri_pipe,
630 		struct pipe_ctx *sec_pipe,
631 		bool odm);
632 
633 /* A test harness interface that modifies dp encoder resources in the given dc
634  * state and bypasses the need to revalidate. The interface assumes that the
635  * test harness interface is called with pre-validated link config stored in the
636  * pipe_ctx and updates dp encoder resources according to the link config.
637  */
638 enum dc_status update_dp_encoder_resources_for_test_harness(const struct dc *dc,
639 		struct dc_state *context,
640 		struct pipe_ctx *pipe_ctx);
641 
642 /* Get hw programming parameters container from pipe context
643  * @pipe_ctx: pipe context
644  * @dscl_prog_data: struct to hold programmable hw reg values
645  */
646 struct dscl_prog_data *resource_get_dscl_prog_data(struct pipe_ctx *pipe_ctx);
647 /* Setup dc callbacks for dml2
648  * @dc: the display core structure
649  * @dml2_options: struct to hold callbacks
650  */
651 void resource_init_common_dml2_callbacks(struct dc *dc, struct dml2_configuration_options *dml2_options);
652 
653 /*
654  *Calculate total DET allocated for all pipes for a given OTG_MASTER pipe
655  */
656 int resource_calculate_det_for_stream(struct dc_state *state, struct pipe_ctx *otg_master);
657 
658 bool resource_is_hpo_acquired(struct dc_state *context);
659 
660 struct link_encoder *get_temp_dio_link_enc(
661 		const struct resource_context *res_ctx,
662 		const struct resource_pool *const pool,
663 		const struct dc_link *link);
664 #endif /* DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_ */
665