1 /* 2 * Copyright 2015 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 */ 24 25 #ifndef DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_ 26 #define DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_ 27 28 #include "core_types.h" 29 #include "core_status.h" 30 #include "dal_asic_id.h" 31 #include "dm_pp_smu.h" 32 33 #define MEMORY_TYPE_MULTIPLIER_CZ 4 34 #define MEMORY_TYPE_HBM 2 35 #define MAX_MCACHES 8 36 37 38 #define IS_PIPE_SYNCD_VALID(pipe) ((((pipe)->pipe_idx_syncd) & 0x80)?1:0) 39 #define GET_PIPE_SYNCD_FROM_PIPE(pipe) ((pipe)->pipe_idx_syncd & 0x7F) 40 #define SET_PIPE_SYNCD_TO_PIPE(pipe, pipe_syncd) ((pipe)->pipe_idx_syncd = (0x80 | pipe_syncd)) 41 42 enum dce_version resource_parse_asic_id( 43 struct hw_asic_id asic_id); 44 45 struct resource_caps { 46 int num_timing_generator; 47 int num_opp; 48 int num_dpp; 49 int num_video_plane; 50 int num_audio; 51 int num_stream_encoder; 52 int num_pll; 53 int num_dwb; 54 int num_ddc; 55 int num_vmid; 56 int num_dsc; 57 unsigned int num_dig_link_enc; // Total number of DIGs (digital encoders) in DIO (Display Input/Output). 58 unsigned int num_usb4_dpia; // Total number of USB4 DPIA (DisplayPort Input Adapters). 59 int num_hpo_dp_stream_encoder; 60 int num_hpo_dp_link_encoder; 61 int num_mpc_3dlut; 62 }; 63 64 struct resource_straps { 65 uint32_t hdmi_disable; 66 uint32_t dc_pinstraps_audio; 67 uint32_t audio_stream_number; 68 }; 69 70 struct dc_mcache_allocations { 71 int global_mcache_ids_plane0[MAX_MCACHES + 1]; 72 int global_mcache_ids_plane1[MAX_MCACHES + 1]; 73 int global_mcache_ids_mall_plane0[MAX_MCACHES + 1]; 74 int global_mcache_ids_mall_plane1[MAX_MCACHES + 1]; 75 }; 76 77 struct resource_create_funcs { 78 void (*read_dce_straps)( 79 struct dc_context *ctx, struct resource_straps *straps); 80 81 struct audio *(*create_audio)( 82 struct dc_context *ctx, unsigned int inst); 83 84 struct stream_encoder *(*create_stream_encoder)( 85 enum engine_id eng_id, struct dc_context *ctx); 86 87 struct hpo_dp_stream_encoder *(*create_hpo_dp_stream_encoder)( 88 enum engine_id eng_id, struct dc_context *ctx); 89 struct hpo_dp_link_encoder *(*create_hpo_dp_link_encoder)( 90 uint8_t inst, 91 struct dc_context *ctx); 92 struct dce_hwseq *(*create_hwseq)( 93 struct dc_context *ctx); 94 }; 95 96 bool resource_construct( 97 unsigned int num_virtual_links, 98 struct dc *dc, 99 struct resource_pool *pool, 100 const struct resource_create_funcs *create_funcs); 101 102 struct resource_pool *dc_create_resource_pool(struct dc *dc, 103 const struct dc_init_data *init_data, 104 enum dce_version dc_version); 105 106 void dc_destroy_resource_pool(struct dc *dc); 107 108 enum dc_status resource_map_pool_resources( 109 const struct dc *dc, 110 struct dc_state *context, 111 struct dc_stream_state *stream); 112 113 void resource_build_test_pattern_params( 114 struct resource_context *res_ctx, 115 struct pipe_ctx *pipe_ctx); 116 117 bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx); 118 119 enum dc_status resource_build_scaling_params_for_context( 120 const struct dc *dc, 121 struct dc_state *context); 122 123 void resource_build_info_frame(struct pipe_ctx *pipe_ctx); 124 125 void resource_unreference_clock_source( 126 struct resource_context *res_ctx, 127 const struct resource_pool *pool, 128 struct clock_source *clock_source); 129 130 void resource_reference_clock_source( 131 struct resource_context *res_ctx, 132 const struct resource_pool *pool, 133 struct clock_source *clock_source); 134 135 int resource_get_clock_source_reference( 136 struct resource_context *res_ctx, 137 const struct resource_pool *pool, 138 struct clock_source *clock_source); 139 140 bool resource_are_streams_timing_synchronizable( 141 struct dc_stream_state *stream1, 142 struct dc_stream_state *stream2); 143 144 bool resource_are_vblanks_synchronizable( 145 struct dc_stream_state *stream1, 146 struct dc_stream_state *stream2); 147 148 struct clock_source *resource_find_used_clk_src_for_sharing( 149 struct resource_context *res_ctx, 150 struct pipe_ctx *pipe_ctx); 151 152 struct clock_source *dc_resource_find_first_free_pll( 153 struct resource_context *res_ctx, 154 const struct resource_pool *pool); 155 156 bool resource_attach_surfaces_to_context( 157 struct dc_plane_state *const *plane_state, 158 int surface_count, 159 struct dc_stream_state *dc_stream, 160 struct dc_state *context, 161 const struct resource_pool *pool); 162 163 bool resource_can_pipe_disable_cursor(struct pipe_ctx *pipe_ctx); 164 165 #define FREE_PIPE_INDEX_NOT_FOUND -1 166 167 /* 168 * pipe types are identified based on MUXes in DCN front end that are capable 169 * of taking input from one DCN pipeline to another DCN pipeline. The name is 170 * in a form of XXXX_YYYY, where XXXX is the DCN front end hardware block the 171 * pipeline ends with and YYYY is the rendering role that the pipe is in. 172 * 173 * For instance OTG_MASTER is a pipe ending with OTG hardware block in its 174 * pipeline and it is in a role of a master pipe for timing generation. 175 * 176 * For quick reference a diagram of each pipe type's areas of responsibility 177 * for outputting timings on the screen is shown below: 178 * 179 * Timing Active for Stream 0 180 * __________________________________________________ 181 * |OTG master 0 (OPP head 0)|OPP head 2 (DPP pipe 2) | 182 * | (DPP pipe 0)| | 183 * | Top Plane 0 | | 184 * | ______________|____ | 185 * | |DPP pipe 1 |DPP | | 186 * | | |pipe| | 187 * | | Bottom |3 | | 188 * | | Plane 1 | | | 189 * | | | | | 190 * | |______________|____| | 191 * | | | 192 * | | | 193 * | ODM slice 0 | ODM slice 1 | 194 * |_________________________|________________________| 195 * 196 * Timing Active for Stream 1 197 * __________________________________________________ 198 * |OTG master 4 (OPP head 4) | 199 * | | 200 * | | 201 * | | 202 * | | 203 * | | 204 * | Blank Pixel Data | 205 * | (generated by DPG4) | 206 * | | 207 * | | 208 * | | 209 * | | 210 * | | 211 * |__________________________________________________| 212 * 213 * Inter-pipe Relation 214 * __________________________________________________ 215 * |PIPE IDX| DPP PIPES | OPP HEADS | OTG MASTER | 216 * | | plane 0 | slice 0 | | 217 * | 0 | -------------MPC---------ODM----------- | 218 * | | plane 1 | | | | | 219 * | 1 | ------------- | | | | 220 * | | plane 0 | slice 1 | | | 221 * | 2 | -------------MPC--------- | | 222 * | | plane 1 | | | | 223 * | 3 | ------------- | | | 224 * | | | blank | | 225 * | 4 | | ----------------------- | 226 * | | | | | 227 * | 5 | (FREE) | | | 228 * |________|_______________|___________|_____________| 229 * 230 * The following is a quick reference of the class relation: 231 * 232 * DC state ---1--------0..N--- streams 233 * 234 * stream ---1-----------1--- OTG Master pipe 235 * 236 * OTG Master pipe ---1--------1..N--- OPP Head pipes 237 * 238 * OPP Head pipe ---1--------0..N--- DPP pipes 239 * 240 * stream ---1--------0..N--- Planes 241 * 242 * Plane ---1--------1..N--- DPP pipes 243 * 244 */ 245 enum pipe_type { 246 /* free pipe - free pipe is an uninitialized pipe without a stream 247 * associated with it. It is a free DCN pipe resource. It can be 248 * acquired as any type of pipe. 249 */ 250 FREE_PIPE, 251 252 /* OTG master pipe - the master pipe of its OPP head pipes with a 253 * functional OTG. It merges all its OPP head pipes pixel data in ODM 254 * block and output to back end DIG. OTG master pipe is responsible for 255 * generating entire CRTC timing to back end DIG. An OTG master pipe may 256 * or may not have a plane. If it has a plane it blends it as the left 257 * most MPC slice of the top most layer. If it doesn't have a plane it 258 * can output pixel data from its OPP head pipes' test pattern 259 * generators (DPG) such as solid black pixel data to blank the screen. 260 */ 261 OTG_MASTER, 262 263 /* OPP head pipe - the head pipe of an MPC blending tree with a 264 * functional OPP outputting to an OTG. OPP head pipe is responsible for 265 * processing output pixels in its own ODM slice. It may or may not have 266 * a plane. If it has a plane it blends it as the top most layer within 267 * its own ODM slice. If it doesn't have a plane it can output pixel 268 * data from its DPG such as solid black pixel data to blank the pixel 269 * data in its own ODM slice. OTG master pipe is also an OPP head pipe 270 * but with more responsibility. 271 */ 272 OPP_HEAD, 273 274 /* DPP pipe - the pipe with a functional DPP outputting to an OPP head 275 * pipe's MPC. DPP pipe is responsible for processing pixel data from 276 * its own MPC slice of a plane. It must be connected to an OPP head 277 * pipe and it must have a plane associated with it. 278 */ 279 DPP_PIPE, 280 }; 281 282 /* 283 * Determine if the input pipe_ctx is of a pipe type. 284 * return - true if pipe_ctx is of the input type. 285 */ 286 bool resource_is_pipe_type(const struct pipe_ctx *pipe_ctx, enum pipe_type type); 287 288 /* 289 * Acquire a pipe as OTG master pipe and allocate pipe resources required to 290 * enable stream output. 291 */ 292 enum dc_status resource_add_otg_master_for_stream_output(struct dc_state *new_ctx, 293 const struct resource_pool *pool, 294 struct dc_stream_state *stream); 295 296 /* 297 * Release pipe resources and the OTG master pipe associated with the stream 298 * The stream must have all planes removed and ODM/MPC slice counts are reset 299 * to 1 before invoking this interface. 300 */ 301 void resource_remove_otg_master_for_stream_output(struct dc_state *new_ctx, 302 const struct resource_pool *pool, 303 struct dc_stream_state *stream); 304 305 /* 306 * Add plane to the bottom most layer in plane composition and allocate DPP pipe 307 * resources as needed. 308 * return - true if plane is added in plane composition, false otherwise. 309 */ 310 bool resource_append_dpp_pipes_for_plane_composition( 311 struct dc_state *new_ctx, 312 struct dc_state *cur_ctx, 313 struct resource_pool *pool, 314 struct pipe_ctx *otg_master_pipe, 315 struct dc_plane_state *plane_state); 316 317 /* 318 * Add plane to the bottom most layer in plane composition and allocate DPP pipe 319 * resources as needed. 320 * return - true if plane is added in plane composition, false otherwise. 321 */ 322 void resource_remove_dpp_pipes_for_plane_composition( 323 struct dc_state *context, 324 const struct resource_pool *pool, 325 const struct dc_plane_state *plane_state); 326 327 /* 328 * Update ODM slice count by acquiring or releasing pipes. If new slices need 329 * to be added, it is going to add them to the last ODM index. If existing 330 * slices need to be removed, it is going to remove them from the last ODM 331 * index. 332 * 333 * return - true if ODM slices are updated and required pipes are acquired. All 334 * affected pipe parameters are updated. 335 * 336 * false if resource fails to complete this update. The function is not designed 337 * to recover the creation of invalid topologies. Returning false is typically 338 * an indication of insufficient validation in caller's stack. new_ctx will be 339 * invalid. Caller may attempt to restore new_ctx by calling this function 340 * again with original slice count. 341 */ 342 bool resource_update_pipes_for_stream_with_slice_count( 343 struct dc_state *new_ctx, 344 const struct dc_state *cur_ctx, 345 const struct resource_pool *pool, 346 const struct dc_stream_state *stream, 347 int new_slice_count); 348 349 /* 350 * Update MPC slice count by acquiring or releasing DPP pipes. If new slices 351 * need to be added it is going to add to the last MPC index. If existing 352 * slices need to be removed, it is going to remove them from the last MPC 353 * index. 354 * 355 * @dpp_pipe - top most dpp pipe for MPCC combine. 356 * 357 * return - true if MPC slices are updated and required pipes are acquired. All 358 * affected pipe parameters are updated. 359 * 360 * false if resource fails to complete this update. The function is not designed 361 * to recover the creation of invalid topologies. Returning false is typically 362 * an indication of insufficient validation in caller's stack. new_ctx will be 363 * invalid. Caller may attempt to restore new_ctx by calling this function 364 * again with original slice count. 365 */ 366 bool resource_update_pipes_for_plane_with_slice_count( 367 struct dc_state *new_ctx, 368 const struct dc_state *cur_ctx, 369 const struct resource_pool *pool, 370 const struct dc_plane_state *plane, 371 int slice_count); 372 373 /* 374 * Get the OTG master pipe in resource context associated with the stream. 375 * return - NULL if not found. Otherwise the OTG master pipe associated with the 376 * stream. 377 */ 378 struct pipe_ctx *resource_get_otg_master_for_stream( 379 struct resource_context *res_ctx, 380 const struct dc_stream_state *stream); 381 382 /* 383 * Get an array of OPP heads in opp_heads ordered with index low to high for OTG 384 * master pipe in res_ctx. 385 * return - number of OPP heads in the array. If otg_master passed in is not 386 * an OTG master, the function returns 0. 387 */ 388 int resource_get_opp_heads_for_otg_master(const struct pipe_ctx *otg_master, 389 struct resource_context *res_ctx, 390 struct pipe_ctx *opp_heads[MAX_PIPES]); 391 392 /* 393 * Get an array of DPP pipes in dpp_pipes ordered with index low to high for OPP 394 * head pipe in res_ctx. 395 * return - number of DPP pipes in the array. If opp_head passed in is not 396 * an OPP pipe, the function returns 0. 397 */ 398 int resource_get_dpp_pipes_for_opp_head(const struct pipe_ctx *opp_head, 399 struct resource_context *res_ctx, 400 struct pipe_ctx *dpp_pipes[MAX_PIPES]); 401 402 /* 403 * Get an array of DPP pipes in dpp_pipes ordered with index low to high for 404 * plane in res_ctx. 405 * return - number of DPP pipes in the array. 406 */ 407 int resource_get_dpp_pipes_for_plane(const struct dc_plane_state *plane, 408 struct resource_context *res_ctx, 409 struct pipe_ctx *dpp_pipes[MAX_PIPES]); 410 411 /* 412 * Get the OTG master pipe for the input pipe context. 413 * return - the OTG master pipe for the input pipe 414 * context. 415 */ 416 struct pipe_ctx *resource_get_otg_master(const struct pipe_ctx *pipe_ctx); 417 418 /* 419 * Get the OPP head pipe for the input pipe context. 420 * return - the OPP head pipe for the input pipe 421 * context. 422 */ 423 struct pipe_ctx *resource_get_opp_head(const struct pipe_ctx *pipe_ctx); 424 425 /* 426 * Get the DPP pipe allocated for MPC slice 0 and ODM slice 0 of the plane 427 * associated with dpp_pipe. 428 */ 429 struct pipe_ctx *resource_get_primary_dpp_pipe(const struct pipe_ctx *dpp_pipe); 430 431 /* 432 * Get the MPC slice index counting from 0 from left most slice 433 * For example, if a DPP pipe is used as a secondary pipe in MPCC combine, MPC 434 * split index is greater than 0. 435 */ 436 int resource_get_mpc_slice_index(const struct pipe_ctx *dpp_pipe); 437 438 /* 439 * Get the number of MPC slices associated with the pipe. 440 * The function returns 0 if the pipe is not associated with an MPC combine 441 * pipe topology. 442 */ 443 int resource_get_mpc_slice_count(const struct pipe_ctx *pipe); 444 445 /* 446 * Get the number of ODM slices associated with the pipe. 447 * The function returns 0 if the pipe is not associated with an ODM combine 448 * pipe topology. 449 */ 450 int resource_get_odm_slice_count(const struct pipe_ctx *pipe); 451 452 /* Get the ODM slice index counting from 0 from left most slice */ 453 int resource_get_odm_slice_index(const struct pipe_ctx *opp_head); 454 455 /* Get ODM slice source rect in timing active as input to OPP block */ 456 struct rect resource_get_odm_slice_src_rect(struct pipe_ctx *pipe_ctx); 457 458 /* Get ODM slice destination rect in timing active as output from OPP block */ 459 struct rect resource_get_odm_slice_dst_rect(struct pipe_ctx *pipe_ctx); 460 461 /* Get ODM slice destination width in timing active as output from OPP block */ 462 int resource_get_odm_slice_dst_width(struct pipe_ctx *otg_master, 463 bool is_last_segment); 464 465 /* determine if pipe topology is changed between state a and state b */ 466 bool resource_is_pipe_topology_changed(const struct dc_state *state_a, 467 const struct dc_state *state_b); 468 469 /* 470 * determine if the two OTG master pipes have the same ODM topology 471 * return 472 * false - if pipes passed in are not OTG masters or ODM topology is 473 * changed. 474 * true - otherwise 475 */ 476 bool resource_is_odm_topology_changed(const struct pipe_ctx *otg_master_a, 477 const struct pipe_ctx *otg_master_b); 478 479 /* log the pipe topology update in state */ 480 void resource_log_pipe_topology_update(struct dc *dc, struct dc_state *state); 481 482 /* 483 * Look for a free pipe in new resource context that is used as a secondary OPP 484 * head by cur_otg_master. 485 * 486 * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise 487 * pipe idx of the free pipe 488 */ 489 int resource_find_free_pipe_used_as_sec_opp_head_by_cur_otg_master( 490 const struct resource_context *cur_res_ctx, 491 struct resource_context *new_res_ctx, 492 const struct pipe_ctx *cur_otg_master); 493 494 /* 495 * Look for a free pipe in new resource context that is used as a secondary DPP 496 * pipe in MPC blending tree associated with input OPP head pipe. 497 * 498 * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise 499 * pipe idx of the free pipe 500 */ 501 int resource_find_free_pipe_used_in_cur_mpc_blending_tree( 502 const struct resource_context *cur_res_ctx, 503 struct resource_context *new_res_ctx, 504 const struct pipe_ctx *cur_opp_head); 505 506 /* 507 * Look for a free pipe in new resource context that is not used in current 508 * resource context. 509 * 510 * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise 511 * pipe idx of the free pipe 512 */ 513 int recource_find_free_pipe_not_used_in_cur_res_ctx( 514 const struct resource_context *cur_res_ctx, 515 struct resource_context *new_res_ctx, 516 const struct resource_pool *pool); 517 518 /* 519 * Look for a free pipe in new resource context that is used in current resource 520 * context as an OTG master pipe. 521 * 522 * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise 523 * pipe idx of the free pipe 524 */ 525 int recource_find_free_pipe_used_as_otg_master_in_cur_res_ctx( 526 const struct resource_context *cur_res_ctx, 527 struct resource_context *new_res_ctx, 528 const struct resource_pool *pool); 529 530 /* 531 * Look for a free pipe in new resource context that is used as a secondary DPP 532 * pipe in current resource context. 533 * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise 534 * pipe idx of the free pipe 535 */ 536 int resource_find_free_pipe_used_as_cur_sec_dpp( 537 const struct resource_context *cur_res_ctx, 538 struct resource_context *new_res_ctx, 539 const struct resource_pool *pool); 540 541 /* 542 * Look for a free pipe in new resource context that is used as a secondary DPP 543 * pipe in any MPCC combine in current resource context. 544 * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise 545 * pipe idx of the free pipe 546 */ 547 int resource_find_free_pipe_used_as_cur_sec_dpp_in_mpcc_combine( 548 const struct resource_context *cur_res_ctx, 549 struct resource_context *new_res_ctx, 550 const struct resource_pool *pool); 551 552 /* 553 * Look for any free pipe in new resource context. 554 * return - FREE_PIPE_INDEX_NOT_FOUND if free pipe is not found, otherwise 555 * pipe idx of the free pipe 556 */ 557 int resource_find_any_free_pipe(struct resource_context *new_res_ctx, 558 const struct resource_pool *pool); 559 560 /* 561 * Legacy find free secondary pipe logic deprecated for newer DCNs as it doesn't 562 * find the most optimal free pipe to prevent from time consuming hardware state 563 * transitions. 564 */ 565 struct pipe_ctx *resource_find_free_secondary_pipe_legacy( 566 struct resource_context *res_ctx, 567 const struct resource_pool *pool, 568 const struct pipe_ctx *primary_pipe); 569 570 bool resource_validate_attach_surfaces( 571 const struct dc_validation_set set[], 572 int set_count, 573 const struct dc_state *old_context, 574 struct dc_state *context, 575 const struct resource_pool *pool); 576 577 enum dc_status resource_map_clock_resources( 578 const struct dc *dc, 579 struct dc_state *context, 580 struct dc_stream_state *stream); 581 582 enum dc_status resource_map_phy_clock_resources( 583 const struct dc *dc, 584 struct dc_state *context, 585 struct dc_stream_state *stream); 586 587 bool pipe_need_reprogram( 588 struct pipe_ctx *pipe_ctx_old, 589 struct pipe_ctx *pipe_ctx); 590 591 void resource_build_bit_depth_reduction_params(struct dc_stream_state *stream, 592 struct bit_depth_reduction_params *fmt_bit_depth); 593 594 void update_audio_usage( 595 struct resource_context *res_ctx, 596 const struct resource_pool *pool, 597 struct audio *audio, 598 bool acquired); 599 600 unsigned int resource_pixel_format_to_bpp(enum surface_pixel_format format); 601 602 bool get_temp_dp_link_res(struct dc_link *link, 603 struct link_resource *link_res, 604 struct dc_link_settings *link_settings); 605 606 void reset_syncd_pipes_from_disabled_pipes(struct dc *dc, 607 struct dc_state *context); 608 609 void check_syncd_pipes_for_disabled_master_pipe(struct dc *dc, 610 struct dc_state *context, 611 uint8_t disabled_master_pipe_idx); 612 613 void reset_sync_context_for_pipe(const struct dc *dc, 614 struct dc_state *context, 615 uint8_t pipe_idx); 616 617 uint8_t resource_transmitter_to_phy_idx(const struct dc *dc, enum transmitter transmitter); 618 619 const struct link_hwss *get_link_hwss(const struct dc_link *link, 620 const struct link_resource *link_res); 621 622 bool is_h_timing_divisible_by_2(struct dc_stream_state *stream); 623 624 bool dc_resource_acquire_secondary_pipe_for_mpc_odm_legacy( 625 const struct dc *dc, 626 struct dc_state *state, 627 struct pipe_ctx *pri_pipe, 628 struct pipe_ctx *sec_pipe, 629 bool odm); 630 631 /* A test harness interface that modifies dp encoder resources in the given dc 632 * state and bypasses the need to revalidate. The interface assumes that the 633 * test harness interface is called with pre-validated link config stored in the 634 * pipe_ctx and updates dp encoder resources according to the link config. 635 */ 636 enum dc_status update_dp_encoder_resources_for_test_harness(const struct dc *dc, 637 struct dc_state *context, 638 struct pipe_ctx *pipe_ctx); 639 640 /* Get hw programming parameters container from pipe context 641 * @pipe_ctx: pipe context 642 * @dscl_prog_data: struct to hold programmable hw reg values 643 */ 644 struct dscl_prog_data *resource_get_dscl_prog_data(struct pipe_ctx *pipe_ctx); 645 /* Setup dc callbacks for dml2 646 * @dc: the display core structure 647 * @dml2_options: struct to hold callbacks 648 */ 649 void resource_init_common_dml2_callbacks(struct dc *dc, struct dml2_configuration_options *dml2_options); 650 651 /* 652 *Calculate total DET allocated for all pipes for a given OTG_MASTER pipe 653 */ 654 int resource_calculate_det_for_stream(struct dc_state *state, struct pipe_ctx *otg_master); 655 656 bool resource_is_hpo_acquired(struct dc_state *context); 657 658 struct link_encoder *get_temp_dio_link_enc( 659 const struct resource_context *res_ctx, 660 const struct resource_pool *const pool, 661 const struct dc_link *link); 662 #endif /* DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_ */ 663