1 /* 2 * Copyright 2012-2026 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 /** 27 * DOC: overview 28 * 29 * Multiple Pipe/Plane Combiner (MPC) is a component in the hardware pipeline 30 * that performs blending of multiple planes, using global and per-pixel alpha. 31 * It also performs post-blending color correction operations according to the 32 * hardware capabilities, such as color transformation matrix and gamma 1D and 33 * 3D LUT. 34 * 35 * MPC receives output from all DPP pipes and combines them to multiple outputs 36 * supporting "M MPC inputs -> N MPC outputs" flexible composition 37 * architecture. It features: 38 * 39 * - Programmable blending structure to allow software controlled blending and 40 * cascading; 41 * - Programmable window location of each DPP in active region of display; 42 * - Combining multiple DPP pipes in one active region when a single DPP pipe 43 * cannot process very large surface; 44 * - Combining multiple DPP from different SLS with blending; 45 * - Stereo formats from single DPP in top-bottom or side-by-side modes; 46 * - Stereo formats from 2 DPPs; 47 * - Alpha blending of multiple layers from different DPP pipes; 48 * - Programmable background color; 49 */ 50 51 #ifndef __DC_MPCC_H__ 52 #define __DC_MPCC_H__ 53 54 #include "dc_hw_types.h" 55 #include "hw_shared.h" 56 #include "transform.h" 57 58 #define MAX_MPCC 6 59 #define MAX_OPP 6 60 61 #define MAX_DWB 2 62 63 enum mpc_output_csc_mode { 64 MPC_OUTPUT_CSC_DISABLE = 0, 65 MPC_OUTPUT_CSC_COEF_A, 66 MPC_OUTPUT_CSC_COEF_B 67 }; 68 69 enum mpcc_blend_mode { 70 MPCC_BLEND_MODE_BYPASS, 71 MPCC_BLEND_MODE_TOP_LAYER_PASSTHROUGH, 72 MPCC_BLEND_MODE_TOP_LAYER_ONLY, 73 MPCC_BLEND_MODE_TOP_BOT_BLENDING 74 }; 75 76 /** 77 * enum mpcc_alpha_blend_mode - define the alpha blend mode regarding pixel 78 * alpha and plane alpha values 79 */ 80 enum mpcc_alpha_blend_mode { 81 /** 82 * @MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA: per pixel alpha using DPP 83 * alpha value 84 */ 85 MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA, 86 /** 87 * @MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA_COMBINED_GLOBAL_GAIN: per 88 * pixel alpha using DPP alpha value multiplied by a global gain (plane 89 * alpha) 90 */ 91 MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA_COMBINED_GLOBAL_GAIN, 92 /** 93 * @MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA: global alpha value, ignores 94 * pixel alpha and consider only plane alpha 95 */ 96 MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA 97 }; 98 99 enum mpcc_movable_cm_location { 100 MPCC_MOVABLE_CM_LOCATION_BEFORE, 101 MPCC_MOVABLE_CM_LOCATION_AFTER, 102 }; 103 104 enum MCM_LUT_XABLE { 105 MCM_LUT_DISABLE, 106 MCM_LUT_DISABLED = MCM_LUT_DISABLE, 107 MCM_LUT_ENABLE, 108 MCM_LUT_ENABLED = MCM_LUT_ENABLE, 109 }; 110 111 enum MCM_LUT_ID { 112 MCM_LUT_3DLUT, 113 MCM_LUT_1DLUT, 114 MCM_LUT_SHAPER 115 }; 116 117 struct mpc_fl_3dlut_config { 118 bool enabled; 119 uint16_t width; 120 bool select_lut_bank_a; 121 uint16_t bit_depth; 122 int hubp_index; 123 uint16_t bias; 124 uint16_t scale; 125 }; 126 127 union mcm_lut_params { 128 const struct pwl_params *pwl; 129 const struct tetrahedral_params *lut3d; 130 }; 131 132 /** 133 * struct mpcc_blnd_cfg - MPCC blending configuration 134 */ 135 struct mpcc_blnd_cfg { 136 /** 137 * @black_color: background color. 138 */ 139 struct tg_color black_color; 140 141 /** 142 * @alpha_mode: alpha blend mode (MPCC_ALPHA_BLND_MODE). 143 */ 144 enum mpcc_alpha_blend_mode alpha_mode; 145 146 /** 147 * @pre_multiplied_alpha: 148 * Whether pixel color values were pre-multiplied by the alpha channel 149 * (MPCC_ALPHA_MULTIPLIED_MODE). 150 */ 151 bool pre_multiplied_alpha; 152 153 /** 154 * @global_gain: Used when blend mode considers both pixel alpha and plane. 155 */ 156 int global_gain; 157 158 /** 159 * @global_alpha: Plane alpha value. 160 */ 161 int global_alpha; 162 163 /** 164 * @overlap_only: Whether overlapping of different planes is allowed. 165 */ 166 bool overlap_only; 167 168 /* MPCC top/bottom gain settings */ 169 170 /** 171 * @bottom_gain_mode: Blend mode for bottom gain setting. 172 */ 173 int bottom_gain_mode; 174 175 /** 176 * @background_color_bpc: Background color for bpc. 177 */ 178 int background_color_bpc; 179 180 /** 181 * @top_gain: Top gain setting. 182 */ 183 int top_gain; 184 185 /** 186 * @bottom_inside_gain: Blend mode for bottom inside. 187 */ 188 int bottom_inside_gain; 189 190 /** 191 * @bottom_outside_gain: Blend mode for bottom outside. 192 */ 193 int bottom_outside_gain; 194 }; 195 196 struct mpc_grph_gamut_adjustment { 197 struct fixed31_32 temperature_matrix[CSC_TEMPERATURE_MATRIX_SIZE]; 198 enum graphics_gamut_adjust_type gamut_adjust_type; 199 enum mpcc_gamut_remap_id mpcc_gamut_remap_block_id; 200 }; 201 202 struct mpc_rmcm_regs { 203 uint32_t rmcm_3dlut_mem_pwr_state; 204 uint32_t rmcm_3dlut_mem_pwr_force; 205 uint32_t rmcm_3dlut_mem_pwr_dis; 206 uint32_t rmcm_3dlut_mem_pwr_mode; 207 uint32_t rmcm_3dlut_size; 208 uint32_t rmcm_3dlut_mode; 209 uint32_t rmcm_3dlut_mode_cur; 210 uint32_t rmcm_3dlut_read_sel; 211 uint32_t rmcm_3dlut_30bit_en; 212 uint32_t rmcm_3dlut_wr_en_mask; 213 uint32_t rmcm_3dlut_ram_sel; 214 uint32_t rmcm_3dlut_out_norm_factor; 215 uint32_t rmcm_3dlut_fl_sel; 216 uint32_t rmcm_3dlut_out_offset_r; 217 uint32_t rmcm_3dlut_out_scale_r; 218 uint32_t rmcm_3dlut_fl_done; 219 uint32_t rmcm_3dlut_fl_soft_underflow; 220 uint32_t rmcm_3dlut_fl_hard_underflow; 221 uint32_t rmcm_cntl; 222 uint32_t rmcm_shaper_mem_pwr_state; 223 uint32_t rmcm_shaper_mem_pwr_force; 224 uint32_t rmcm_shaper_mem_pwr_dis; 225 uint32_t rmcm_shaper_mem_pwr_mode; 226 uint32_t rmcm_shaper_lut_mode; 227 uint32_t rmcm_shaper_mode_cur; 228 uint32_t rmcm_shaper_lut_write_en_mask; 229 uint32_t rmcm_shaper_lut_write_sel; 230 uint32_t rmcm_shaper_offset_b; 231 uint32_t rmcm_shaper_scale_b; 232 uint32_t rmcm_shaper_rama_exp_region_start_b; 233 uint32_t rmcm_shaper_rama_exp_region_start_seg_b; 234 uint32_t rmcm_shaper_rama_exp_region_end_b; 235 uint32_t rmcm_shaper_rama_exp_region_end_base_b; 236 }; 237 238 struct mpcc_sm_cfg { 239 bool enable; 240 /* 0-single plane,2-row subsampling,4-column subsampling,6-checkboard subsampling */ 241 int sm_mode; 242 /* 0- disable frame alternate, 1- enable frame alternate */ 243 bool frame_alt; 244 /* 0- disable field alternate, 1- enable field alternate */ 245 bool field_alt; 246 /* 0-no force,2-force frame polarity from top,3-force frame polarity from bottom */ 247 int force_next_frame_porlarity; 248 /* 0-no force,2-force field polarity from top,3-force field polarity from bottom */ 249 int force_next_field_polarity; 250 }; 251 252 struct mpc_denorm_clamp { 253 int clamp_max_r_cr; 254 int clamp_min_r_cr; 255 int clamp_max_g_y; 256 int clamp_min_g_y; 257 int clamp_max_b_cb; 258 int clamp_min_b_cb; 259 }; 260 261 struct mpc_dwb_flow_control { 262 int flow_ctrl_mode; 263 int flow_ctrl_cnt0; 264 int flow_ctrl_cnt1; 265 }; 266 267 /** 268 * struct mpcc - MPCC connection and blending configuration for a single MPCC instance. 269 * 270 * This struct is used as a node in an MPC tree. 271 */ 272 struct mpcc { 273 /** 274 * @mpcc_id: MPCC physical instance. 275 */ 276 int mpcc_id; 277 278 /** 279 * @dpp_id: DPP input to this MPCC 280 */ 281 int dpp_id; 282 283 /** 284 * @mpcc_bot: Pointer to bottom layer MPCC. NULL when not connected. 285 */ 286 struct mpcc *mpcc_bot; 287 288 /** 289 * @blnd_cfg: The blending configuration for this MPCC. 290 */ 291 struct mpcc_blnd_cfg blnd_cfg; 292 293 /** 294 * @sm_cfg: stereo mix setting for this MPCC 295 */ 296 struct mpcc_sm_cfg sm_cfg; 297 298 /** 299 * @shared_bottom: 300 * 301 * If MPCC output to both OPP and DWB endpoints, true. Otherwise, false. 302 */ 303 bool shared_bottom; 304 }; 305 306 /** 307 * struct mpc_tree - MPC tree represents all MPCC connections for a pipe. 308 * 309 * 310 */ 311 struct mpc_tree { 312 /** 313 * @opp_id: The OPP instance that owns this MPC tree. 314 */ 315 int opp_id; 316 317 /** 318 * @opp_list: the top MPCC layer of the MPC tree that outputs to OPP endpoint 319 */ 320 struct mpcc *opp_list; 321 }; 322 323 struct mpc { 324 const struct mpc_funcs *funcs; 325 struct dc_context *ctx; 326 327 struct mpcc mpcc_array[MAX_MPCC]; 328 struct pwl_params blender_params; 329 bool cm_bypass_mode; 330 }; 331 332 struct mpcc_state { 333 uint32_t opp_id; 334 uint32_t dpp_id; 335 uint32_t bot_mpcc_id; 336 uint32_t mode; 337 uint32_t alpha_mode; 338 uint32_t pre_multiplied_alpha; 339 uint32_t overlap_only; 340 uint32_t idle; 341 uint32_t busy; 342 uint32_t shaper_lut_mode; 343 uint32_t lut3d_mode; 344 uint32_t lut3d_bit_depth; 345 uint32_t lut3d_size; 346 uint32_t rgam_mode; 347 uint32_t rgam_lut; 348 struct mpc_grph_gamut_adjustment gamut_remap; 349 struct mpc_rmcm_regs rmcm_regs; 350 }; 351 352 struct dcn_mpc_reg_state { 353 uint32_t mpcc_bot_sel; 354 uint32_t mpcc_control; 355 uint32_t mpcc_status; 356 uint32_t mpcc_top_sel; 357 uint32_t mpcc_opp_id; 358 uint32_t mpcc_ogam_control; 359 }; 360 361 /** 362 * struct mpc_funcs - funcs 363 */ 364 struct mpc_funcs { 365 /** 366 * @read_mpcc_state: 367 * 368 * Read register content from given MPCC physical instance. 369 * 370 * Parameters: 371 * 372 * - [in/out] mpc - MPC context 373 * - [in] mpcc_instance - MPC context instance 374 * - [in] mpcc_state - MPC context state 375 * 376 * Return: 377 * 378 * void 379 */ 380 void (*read_mpcc_state)( 381 struct mpc *mpc, 382 int mpcc_inst, 383 struct mpcc_state *s); 384 /** 385 * @mpc_read_reg_state: 386 * 387 * Read MPC register state for debugging underflow purposes. 388 * 389 * Parameters: 390 * 391 * - [in] mpc - MPC context 392 * - [out] reg_state - MPC register state structure 393 * 394 * Return: 395 * 396 * void 397 */ 398 void (*mpc_read_reg_state)( 399 struct mpc *mpc, 400 int mpcc_inst, 401 struct dcn_mpc_reg_state *mpc_reg_state); 402 403 /** 404 * @insert_plane: 405 * 406 * Insert DPP into MPC tree based on specified blending position. 407 * Only used for planes that are part of blending chain for OPP output 408 * 409 * Parameters: 410 * 411 * - [in/out] mpc - MPC context. 412 * - [in/out] tree - MPC tree structure that plane will be added to. 413 * - [in] blnd_cfg - MPCC blending configuration for the new blending layer. 414 * - [in] sm_cfg - MPCC stereo mix configuration for the new blending layer. 415 * stereo mix must disable for the very bottom layer of the tree config. 416 * - [in] insert_above_mpcc - Insert new plane above this MPCC. 417 * If NULL, insert as bottom plane. 418 * - [in] dpp_id - DPP instance for the plane to be added. 419 * - [in] mpcc_id - The MPCC physical instance to use for blending. 420 * 421 * Return: 422 * 423 * struct mpcc* - MPCC that was added. 424 */ 425 struct mpcc* (*insert_plane)( 426 struct mpc *mpc, 427 struct mpc_tree *tree, 428 struct mpcc_blnd_cfg *blnd_cfg, 429 struct mpcc_sm_cfg *sm_cfg, 430 struct mpcc *insert_above_mpcc, 431 int dpp_id, 432 int mpcc_id); 433 434 /** 435 * @remove_mpcc: 436 * 437 * Remove a specified MPCC from the MPC tree. 438 * 439 * Parameters: 440 * 441 * - [in/out] mpc - MPC context. 442 * - [in/out] tree - MPC tree structure that plane will be removed from. 443 * - [in/out] mpcc - MPCC to be removed from tree. 444 * 445 * Return: 446 * 447 * void 448 */ 449 void (*remove_mpcc)( 450 struct mpc *mpc, 451 struct mpc_tree *tree, 452 struct mpcc *mpcc); 453 454 /** 455 * @mpc_init: 456 * 457 * Reset the MPCC HW status by disconnecting all muxes. 458 * 459 * Parameters: 460 * 461 * - [in/out] mpc - MPC context. 462 * 463 * Return: 464 * 465 * void 466 */ 467 void (*mpc_init)(struct mpc *mpc); 468 469 /** 470 * @mpc_init_single_inst: 471 * 472 * Initialize given MPCC physical instance. 473 * 474 * Parameters: 475 * - [in/out] mpc - MPC context. 476 * - [in] mpcc_id - The MPCC physical instance to be initialized. 477 */ 478 void (*mpc_init_single_inst)( 479 struct mpc *mpc, 480 unsigned int mpcc_id); 481 482 /** 483 * @update_blending: 484 * 485 * Update the blending configuration for a specified MPCC. 486 * 487 * Parameters: 488 * 489 * - [in/out] mpc - MPC context. 490 * - [in] blnd_cfg - MPCC blending configuration. 491 * - [in] mpcc_id - The MPCC physical instance. 492 * 493 * Return: 494 * 495 * void 496 */ 497 void (*update_blending)( 498 struct mpc *mpc, 499 struct mpcc_blnd_cfg *blnd_cfg, 500 int mpcc_id); 501 502 /** 503 * @cursor_lock: 504 * 505 * Lock cursor updates for the specified OPP. OPP defines the set of 506 * MPCC that are locked together for cursor. 507 * 508 * Parameters: 509 * 510 * - [in] mpc - MPC context. 511 * - [in] opp_id - The OPP to lock cursor updates on 512 * - [in] lock - lock/unlock the OPP 513 * 514 * Return: 515 * 516 * void 517 */ 518 void (*cursor_lock)( 519 struct mpc *mpc, 520 int opp_id, 521 bool lock); 522 523 /** 524 * @insert_plane_to_secondary: 525 * 526 * Add DPP into secondary MPC tree based on specified blending 527 * position. Only used for planes that are part of blending chain for 528 * DWB output 529 * 530 * Parameters: 531 * 532 * - [in/out] mpc - MPC context. 533 * - [in/out] tree - MPC tree structure that plane will be added to. 534 * - [in] blnd_cfg - MPCC blending configuration for the new blending layer. 535 * - [in] sm_cfg - MPCC stereo mix configuration for the new blending layer. 536 * stereo mix must disable for the very bottom layer of the tree config. 537 * - [in] insert_above_mpcc - Insert new plane above this MPCC. If 538 * NULL, insert as bottom plane. 539 * - [in] dpp_id - DPP instance for the plane to be added. 540 * - [in] mpcc_id - The MPCC physical instance to use for blending. 541 * 542 * Return: 543 * 544 * struct mpcc* - MPCC that was added. 545 */ 546 struct mpcc* (*insert_plane_to_secondary)( 547 struct mpc *mpc, 548 struct mpc_tree *tree, 549 struct mpcc_blnd_cfg *blnd_cfg, 550 struct mpcc_sm_cfg *sm_cfg, 551 struct mpcc *insert_above_mpcc, 552 int dpp_id, 553 int mpcc_id); 554 555 /** 556 * @remove_mpcc_from_secondary: 557 * 558 * Remove a specified DPP from the 'secondary' MPC tree. 559 * 560 * Parameters: 561 * 562 * - [in/out] mpc - MPC context. 563 * - [in/out] tree - MPC tree structure that plane will be removed from. 564 * - [in] mpcc - MPCC to be removed from tree. 565 * 566 * Return: 567 * 568 * void 569 */ 570 void (*remove_mpcc_from_secondary)( 571 struct mpc *mpc, 572 struct mpc_tree *tree, 573 struct mpcc *mpcc); 574 575 /** 576 * @get_mpcc_for_dpp_from_secondary: 577 * 578 * Find, if it exists, a MPCC from a given 'secondary' MPC tree that 579 * is associated with specified plane. 580 * 581 * Parameters: 582 * - [in/out] tree - MPC tree structure to search for plane. 583 * - [in] dpp_id - DPP to be searched. 584 * 585 * Return: 586 * 587 * struct mpcc* - pointer to plane or NULL if no plane found. 588 */ 589 struct mpcc* (*get_mpcc_for_dpp_from_secondary)( 590 struct mpc_tree *tree, 591 int dpp_id); 592 593 /** 594 * @get_mpcc_for_dpp: 595 * 596 * Find, if it exists, a MPCC from a given MPC tree that 597 * is associated with specified plane. 598 * 599 * Parameters: 600 * - [in/out] tree - MPC tree structure to search for plane. 601 * - [in] dpp_id - DPP to be searched. 602 * 603 * Return: 604 * 605 * struct mpcc* - pointer to plane or NULL if no plane found. 606 */ 607 struct mpcc* (*get_mpcc_for_dpp)( 608 struct mpc_tree *tree, 609 int dpp_id); 610 611 /** 612 * @wait_for_idle: 613 * 614 * Wait for a MPCC in MPC context to enter idle state. 615 * 616 * Parameters: 617 * - [in/out] mpc - MPC Context. 618 * - [in] id - MPCC to wait for idle state. 619 * 620 * Return: 621 * 622 * void 623 */ 624 void (*wait_for_idle)(struct mpc *mpc, int id); 625 626 /** 627 * @assert_mpcc_idle_before_connect: 628 * 629 * Assert if MPCC in MPC context is in idle state. 630 * 631 * Parameters: 632 * - [in/out] mpc - MPC context. 633 * - [in] id - MPCC to assert idle state. 634 * 635 * Return: 636 * 637 * void 638 */ 639 void (*assert_mpcc_idle_before_connect)(struct mpc *mpc, int mpcc_id); 640 641 /** 642 * @init_mpcc_list_from_hw: 643 * 644 * Iterate through the MPCC array from a given MPC context struct 645 * and configure each MPCC according to its registers' values. 646 * 647 * Parameters: 648 * - [in/out] mpc - MPC context to initialize MPCC array. 649 * - [in/out] tree - MPC tree structure containing MPCC contexts to initialize. 650 * 651 * Return: 652 * 653 * void 654 */ 655 void (*init_mpcc_list_from_hw)( 656 struct mpc *mpc, 657 struct mpc_tree *tree); 658 659 /** 660 * @set_denorm: 661 * 662 * Set corresponding OPP DENORM_CONTROL register value to specific denorm_mode 663 * based on given color depth. 664 * 665 * Parameters: 666 * - [in/out] mpc - MPC context. 667 * - [in] opp_id - Corresponding OPP to update register. 668 * - [in] output_depth - Arbitrary color depth to set denorm_mode. 669 * 670 * Return: 671 * 672 * void 673 */ 674 void (*set_denorm)(struct mpc *mpc, 675 int opp_id, 676 enum dc_color_depth output_depth); 677 678 /** 679 * @set_denorm_clamp: 680 * 681 * Set denorm clamp values on corresponding OPP DENORM CONTROL register. 682 * 683 * Parameters: 684 * - [in/out] mpc - MPC context. 685 * - [in] opp_id - Corresponding OPP to update register. 686 * - [in] denorm_clamp - Arbitrary denorm clamp to be set. 687 * 688 * Return: 689 * 690 * void 691 */ 692 void (*set_denorm_clamp)( 693 struct mpc *mpc, 694 int opp_id, 695 struct mpc_denorm_clamp denorm_clamp); 696 697 /** 698 * @set_output_csc: 699 * 700 * Set the Output Color Space Conversion matrix 701 * with given values and mode. 702 * 703 * Parameters: 704 * - [in/out] mpc - MPC context. 705 * - [in] opp_id - Corresponding OPP to update register. 706 * - [in] regval - Values to set in CSC matrix. 707 * - [in] ocsc_mode - Mode to set CSC. 708 * 709 * Return: 710 * 711 * void 712 */ 713 void (*set_output_csc)(struct mpc *mpc, 714 int opp_id, 715 const uint16_t *regval, 716 enum mpc_output_csc_mode ocsc_mode); 717 718 /** 719 * @set_ocsc_default: 720 * 721 * Set the Output Color Space Conversion matrix 722 * to default values according to color space. 723 * 724 * Parameters: 725 * - [in/out] mpc - MPC context. 726 * - [in] opp_id - Corresponding OPP to update register. 727 * - [in] color_space - OCSC color space. 728 * - [in] ocsc_mode - Mode to set CSC. 729 * 730 * Return: 731 * 732 * void 733 * 734 */ 735 void (*set_ocsc_default)(struct mpc *mpc, 736 int opp_id, 737 enum dc_color_space color_space, 738 enum mpc_output_csc_mode ocsc_mode); 739 740 /** 741 * @set_output_gamma: 742 * 743 * Set Output Gamma with given curve parameters. 744 * 745 * Parameters: 746 * - [in/out] mpc - MPC context. 747 * - [in] mpcc_id - Corresponding MPC to update registers. 748 * - [in] params - Parameters. 749 * 750 * Return: 751 * 752 * void 753 * 754 */ 755 void (*set_output_gamma)( 756 struct mpc *mpc, 757 int mpcc_id, 758 const struct pwl_params *params); 759 /** 760 * @power_on_mpc_mem_pwr: 761 * 762 * Power on/off memory LUT for given MPCC. 763 * Powering on enables LUT to be updated. 764 * Powering off allows entering low power mode. 765 * 766 * Parameters: 767 * - [in/out] mpc - MPC context. 768 * - [in] mpcc_id - MPCC to power on. 769 * - [in] power_on 770 * 771 * Return: 772 * 773 * void 774 */ 775 void (*power_on_mpc_mem_pwr)( 776 struct mpc *mpc, 777 int mpcc_id, 778 bool power_on); 779 /** 780 * @set_dwb_mux: 781 * 782 * Set corresponding Display Writeback mux 783 * MPC register field to given MPCC id. 784 * 785 * Parameters: 786 * - [in/out] mpc - MPC context. 787 * - [in] dwb_id - DWB to be set. 788 * - [in] mpcc_id - MPCC id to be stored in DWB mux register. 789 * 790 * Return: 791 * 792 * void 793 */ 794 void (*set_dwb_mux)( 795 struct mpc *mpc, 796 int dwb_id, 797 int mpcc_id); 798 799 /** 800 * @disable_dwb_mux: 801 * 802 * Reset corresponding Display Writeback mux 803 * MPC register field. 804 * 805 * Parameters: 806 * - [in/out] mpc - MPC context. 807 * - [in] dwb_id - DWB to be set. 808 * 809 * Return: 810 * 811 * void 812 */ 813 void (*disable_dwb_mux)( 814 struct mpc *mpc, 815 int dwb_id); 816 817 /** 818 * @is_dwb_idle: 819 * 820 * Check DWB status on MPC_DWB0_MUX_STATUS register field. 821 * Return if it is null. 822 * 823 * Parameters: 824 * - [in/out] mpc - MPC context. 825 * - [in] dwb_id - DWB to be checked. 826 * 827 * Return: 828 * 829 * bool - wheter DWB is idle or not 830 */ 831 bool (*is_dwb_idle)( 832 struct mpc *mpc, 833 int dwb_id); 834 835 /** 836 * @set_out_rate_control: 837 * 838 * Set display output rate control. 839 * 840 * Parameters: 841 * - [in/out] mpc - MPC context. 842 * - [in] opp_id - OPP to be set. 843 * - [in] enable 844 * - [in] rate_2x_mode 845 * - [in] flow_control 846 * 847 * Return: 848 * 849 * void 850 */ 851 void (*set_out_rate_control)( 852 struct mpc *mpc, 853 int opp_id, 854 bool enable, 855 bool rate_2x_mode, 856 struct mpc_dwb_flow_control *flow_control); 857 858 /** 859 * @set_gamut_remap: 860 * 861 * Set post-blending CTM for given MPCC. 862 * 863 * Parameters: 864 * - [in] mpc - MPC context. 865 * - [in] mpcc_id - MPCC to set gamut map. 866 * - [in] adjust 867 * 868 * Return: 869 * 870 * void 871 */ 872 void (*set_gamut_remap)( 873 struct mpc *mpc, 874 int mpcc_id, 875 const struct mpc_grph_gamut_adjustment *adjust); 876 877 /** 878 * @program_1dlut: 879 * 880 * Set 1 dimensional Lookup Table. 881 * 882 * Parameters: 883 * - [in/out] mpc - MPC context 884 * - [in] params - curve parameters for the LUT configuration 885 * - [in] rmu_idx 886 * 887 * bool - wheter LUT was set (set with given parameters) or not (params is NULL and LUT is disabled). 888 */ 889 bool (*program_1dlut)( 890 struct mpc *mpc, 891 const struct pwl_params *params, 892 uint32_t rmu_idx); 893 894 /** 895 * @program_shaper: 896 * 897 * Set shaper. 898 * 899 * Parameters: 900 * - [in/out] mpc - MPC context 901 * - [in] params - curve parameters to be set 902 * - [in] rmu_idx 903 * 904 * Return: 905 * 906 * bool - wheter shaper was set (set with given parameters) or not (params is NULL and LUT is disabled). 907 */ 908 bool (*program_shaper)( 909 struct mpc *mpc, 910 const struct pwl_params *params, 911 uint32_t rmu_idx); 912 913 /** 914 * @acquire_rmu: 915 * 916 * Set given MPCC to be multiplexed to given RMU unit. 917 * 918 * Parameters: 919 * - [in/out] mpc - MPC context 920 * - [in] mpcc_id - MPCC 921 * - [in] rmu_idx - Given RMU unit to set MPCC to be multiplexed to. 922 * 923 * Return: 924 * 925 * unit32_t - rmu_idx if operation was successful, -1 else. 926 */ 927 uint32_t (*acquire_rmu)(struct mpc *mpc, int mpcc_id, int rmu_idx); 928 929 /** 930 * @program_3dlut: 931 * 932 * Set 3 dimensional Lookup Table. 933 * 934 * Parameters: 935 * - [in/out] mpc - MPC context 936 * - [in] params - tetrahedral parameters for the LUT configuration 937 * - [in] rmu_idx 938 * 939 * bool - wheter LUT was set (set with given parameters) or not (params is NULL and LUT is disabled). 940 */ 941 bool (*program_3dlut)( 942 struct mpc *mpc, 943 const struct tetrahedral_params *params, 944 int rmu_idx); 945 946 /** 947 * @release_rmu: 948 * 949 * For a given MPCC, release the RMU unit it muliplexes to. 950 * 951 * Parameters: 952 * - [in/out] mpc - MPC context 953 * - [in] mpcc_id - MPCC 954 * 955 * Return: 956 * 957 * int - a valid rmu_idx representing released RMU unit or -1 if there was no RMU unit to release. 958 */ 959 int (*release_rmu)(struct mpc *mpc, int mpcc_id); 960 961 /** 962 * @get_mpc_out_mux: 963 * 964 * Return MPC out mux. 965 * 966 * Parameters: 967 * - [in] mpc - MPC context. 968 * - [in] opp_id - OPP 969 * 970 * Return: 971 * 972 * unsigned int - Out Mux 973 */ 974 unsigned int (*get_mpc_out_mux)( 975 struct mpc *mpc, 976 int opp_id); 977 978 /** 979 * @set_bg_color: 980 * 981 * Find corresponding bottommost MPCC and 982 * set its bg color. 983 * 984 * Parameters: 985 * - [in/out] mpc - MPC context. 986 * - [in] bg_color - background color to be set. 987 * - [in] mpcc_id 988 * 989 * Return: 990 * 991 * void 992 */ 993 void (*set_bg_color)(struct mpc *mpc, 994 struct tg_color *bg_color, 995 int mpcc_id); 996 997 /** 998 * @set_mpc_mem_lp_mode: 999 * 1000 * Set mpc_mem_lp_mode. 1001 * 1002 * Parameters: 1003 * - [in/out] mpc - MPC context. 1004 * 1005 * Return: 1006 * 1007 * void 1008 */ 1009 1010 void (*set_mpc_mem_lp_mode)(struct mpc *mpc); 1011 /** 1012 * @set_movable_cm_location: 1013 * 1014 * Set Movable CM Location. 1015 * 1016 * Parameters: 1017 * - [in/out] mpc - MPC context. 1018 * - [in] location 1019 * - [in] mpcc_id 1020 * 1021 * Return: 1022 * 1023 * void 1024 */ 1025 1026 void (*set_movable_cm_location)(struct mpc *mpc, enum mpcc_movable_cm_location location, int mpcc_id); 1027 /** 1028 * @update_3dlut_fast_load_select: 1029 * 1030 * Update 3D LUT fast load select. 1031 * 1032 * Parameters: 1033 * - [in/out] mpc - MPC context. 1034 * - [in] mpcc_id 1035 * - [in] hubp_idx 1036 * 1037 * Return: 1038 * 1039 * void 1040 */ 1041 1042 void (*update_3dlut_fast_load_select)(struct mpc *mpc, int mpcc_id, int hubp_idx); 1043 1044 /** 1045 * @get_3dlut_fast_load_status: 1046 * 1047 * Get 3D LUT fast load status and reference them with done, soft_underflow and hard_underflow pointers. 1048 * 1049 * Parameters: 1050 * - [in/out] mpc - MPC context. 1051 * - [in] mpcc_id 1052 * - [in/out] done 1053 * - [in/out] soft_underflow 1054 * - [in/out] hard_underflow 1055 * 1056 * Return: 1057 * 1058 * void 1059 */ 1060 void (*get_3dlut_fast_load_status)(struct mpc *mpc, int mpcc_id, uint32_t *done, uint32_t *soft_underflow, uint32_t *hard_underflow); 1061 1062 /** 1063 * @populate_lut: 1064 * 1065 * Populate LUT with given tetrahedral parameters. 1066 * 1067 * Parameters: 1068 * - [in/out] mpc - MPC context. 1069 * - [in] id 1070 * - [in] params 1071 * - [in] lut_bank_a 1072 * - [in] mpcc_id 1073 * 1074 * Return: 1075 * 1076 * void 1077 */ 1078 void (*populate_lut)(struct mpc *mpc, const enum MCM_LUT_ID id, const union mcm_lut_params params, 1079 bool lut_bank_a, int mpcc_id); 1080 1081 /** 1082 * @program_lut_read_write_control: 1083 * 1084 * Program LUT RW control. 1085 * 1086 * Parameters: 1087 * - [in/out] mpc - MPC context. 1088 * - [in] id 1089 * - [in] lut_bank_a 1090 * - [in] mpcc_id 1091 * 1092 * Return: 1093 * 1094 * void 1095 */ 1096 void (*program_lut_read_write_control)(struct mpc *mpc, const enum MCM_LUT_ID id, bool lut_bank_a, int mpcc_id); 1097 1098 /** 1099 * @program_lut_mode: 1100 * 1101 * Program LUT mode. 1102 * 1103 * Parameters: 1104 * - [in/out] mpc - MPC context. 1105 * - [in] id 1106 * - [in] xable 1107 * - [in] lut_bank_a 1108 * - [in] mpcc_id 1109 * 1110 * Return: 1111 * 1112 * void 1113 */ 1114 void (*program_lut_mode)(struct mpc *mpc, const enum MCM_LUT_ID id, const enum MCM_LUT_XABLE xable, 1115 bool lut_bank_a, int mpcc_id); 1116 1117 /** 1118 * @mcm: 1119 * 1120 * MPC MCM new HW sequential programming functions 1121 */ 1122 struct { 1123 void (*program_3dlut_size)(struct mpc *mpc, uint32_t width, int mpcc_id); 1124 void (*program_bias_scale)(struct mpc *mpc, uint16_t bias, uint16_t scale, int mpcc_id); 1125 void (*program_bit_depth)(struct mpc *mpc, uint16_t bit_depth, int mpcc_id); 1126 bool (*is_config_supported)(uint32_t width); 1127 void (*program_lut_read_write_control)(struct mpc *mpc, const enum MCM_LUT_ID id, 1128 bool lut_bank_a, bool enabled, int mpcc_id); 1129 1130 void (*populate_lut)(struct mpc *mpc, const union mcm_lut_params params, 1131 bool lut_bank_a, int mpcc_id); 1132 } mcm; 1133 1134 /** 1135 * @rmcm: 1136 * 1137 * MPC RMCM new HW sequential programming functions 1138 */ 1139 struct { 1140 void (*fl_3dlut_configure)(struct mpc *mpc, struct mpc_fl_3dlut_config *cfg, int mpcc_id); 1141 void (*enable_3dlut_fl)(struct mpc *mpc, bool enable, int mpcc_id); 1142 void (*update_3dlut_fast_load_select)(struct mpc *mpc, int mpcc_id, int hubp_idx); 1143 void (*program_lut_read_write_control)(struct mpc *mpc, const enum MCM_LUT_ID id, 1144 bool lut_bank_a, bool enabled, int mpcc_id); 1145 void (*program_lut_mode)(struct mpc *mpc, const enum MCM_LUT_XABLE xable, 1146 bool lut_bank_a, int mpcc_id); 1147 void (*program_3dlut_size)(struct mpc *mpc, uint32_t width, int mpcc_id); 1148 void (*program_bias_scale)(struct mpc *mpc, uint16_t bias, uint16_t scale, int mpcc_id); 1149 void (*program_bit_depth)(struct mpc *mpc, uint16_t bit_depth, int mpcc_id); 1150 bool (*is_config_supported)(uint32_t width); 1151 1152 void (*power_on_shaper_3dlut)(struct mpc *mpc, uint32_t mpcc_id, bool power_on); 1153 void (*populate_lut)(struct mpc *mpc, const union mcm_lut_params params, 1154 bool lut_bank_a, int mpcc_id); 1155 } rmcm; 1156 }; 1157 1158 #endif 1159