1 /* 2 * Copyright 2012-15 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 /** 27 * DOC: overview 28 * 29 * Multiple Pipe/Plane Combiner (MPC) is a component in the hardware pipeline 30 * that performs blending of multiple planes, using global and per-pixel alpha. 31 * It also performs post-blending color correction operations according to the 32 * hardware capabilities, such as color transformation matrix and gamma 1D and 33 * 3D LUT. 34 * 35 * MPC receives output from all DPP pipes and combines them to multiple outputs 36 * supporting "M MPC inputs -> N MPC outputs" flexible composition 37 * architecture. It features: 38 * 39 * - Programmable blending structure to allow software controlled blending and 40 * cascading; 41 * - Programmable window location of each DPP in active region of display; 42 * - Combining multiple DPP pipes in one active region when a single DPP pipe 43 * cannot process very large surface; 44 * - Combining multiple DPP from different SLS with blending; 45 * - Stereo formats from single DPP in top-bottom or side-by-side modes; 46 * - Stereo formats from 2 DPPs; 47 * - Alpha blending of multiple layers from different DPP pipes; 48 * - Programmable background color; 49 */ 50 51 #ifndef __DC_MPCC_H__ 52 #define __DC_MPCC_H__ 53 54 #include "dc_hw_types.h" 55 #include "hw_shared.h" 56 #include "transform.h" 57 58 #define MAX_MPCC 6 59 #define MAX_OPP 6 60 61 #define MAX_DWB 2 62 63 enum mpc_output_csc_mode { 64 MPC_OUTPUT_CSC_DISABLE = 0, 65 MPC_OUTPUT_CSC_COEF_A, 66 MPC_OUTPUT_CSC_COEF_B 67 }; 68 69 70 enum mpcc_blend_mode { 71 MPCC_BLEND_MODE_BYPASS, 72 MPCC_BLEND_MODE_TOP_LAYER_PASSTHROUGH, 73 MPCC_BLEND_MODE_TOP_LAYER_ONLY, 74 MPCC_BLEND_MODE_TOP_BOT_BLENDING 75 }; 76 77 /** 78 * enum mpcc_alpha_blend_mode - define the alpha blend mode regarding pixel 79 * alpha and plane alpha values 80 */ 81 enum mpcc_alpha_blend_mode { 82 /** 83 * @MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA: per pixel alpha using DPP 84 * alpha value 85 */ 86 MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA, 87 /** 88 * @MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA_COMBINED_GLOBAL_GAIN: per 89 * pixel alpha using DPP alpha value multiplied by a global gain (plane 90 * alpha) 91 */ 92 MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA_COMBINED_GLOBAL_GAIN, 93 /** 94 * @MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA: global alpha value, ignores 95 * pixel alpha and consider only plane alpha 96 */ 97 MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA 98 }; 99 100 enum mpcc_movable_cm_location { 101 MPCC_MOVABLE_CM_LOCATION_BEFORE, 102 MPCC_MOVABLE_CM_LOCATION_AFTER, 103 }; 104 105 enum MCM_LUT_XABLE { 106 MCM_LUT_DISABLE, 107 MCM_LUT_DISABLED = MCM_LUT_DISABLE, 108 MCM_LUT_ENABLE, 109 MCM_LUT_ENABLED = MCM_LUT_ENABLE, 110 }; 111 112 enum MCM_LUT_ID { 113 MCM_LUT_3DLUT, 114 MCM_LUT_1DLUT, 115 MCM_LUT_SHAPER 116 }; 117 118 struct mpc_fl_3dlut_config { 119 bool enabled; 120 uint16_t width; 121 bool select_lut_bank_a; 122 uint16_t bit_depth; 123 int hubp_index; 124 uint16_t bias; 125 uint16_t scale; 126 }; 127 128 union mcm_lut_params { 129 const struct pwl_params *pwl; 130 const struct tetrahedral_params *lut3d; 131 }; 132 133 /** 134 * struct mpcc_blnd_cfg - MPCC blending configuration 135 */ 136 struct mpcc_blnd_cfg { 137 /** 138 * @black_color: background color. 139 */ 140 struct tg_color black_color; 141 142 /** 143 * @alpha_mode: alpha blend mode (MPCC_ALPHA_BLND_MODE). 144 */ 145 enum mpcc_alpha_blend_mode alpha_mode; 146 147 /** 148 * @pre_multiplied_alpha: 149 * Whether pixel color values were pre-multiplied by the alpha channel 150 * (MPCC_ALPHA_MULTIPLIED_MODE). 151 */ 152 bool pre_multiplied_alpha; 153 154 /** 155 * @global_gain: Used when blend mode considers both pixel alpha and plane. 156 */ 157 int global_gain; 158 159 /** 160 * @global_alpha: Plane alpha value. 161 */ 162 int global_alpha; 163 164 /** 165 * @overlap_only: Whether overlapping of different planes is allowed. 166 */ 167 bool overlap_only; 168 169 /* MPCC top/bottom gain settings */ 170 171 /** 172 * @bottom_gain_mode: Blend mode for bottom gain setting. 173 */ 174 int bottom_gain_mode; 175 176 /** 177 * @background_color_bpc: Background color for bpc. 178 */ 179 int background_color_bpc; 180 181 /** 182 * @top_gain: Top gain setting. 183 */ 184 int top_gain; 185 186 /** 187 * @bottom_inside_gain: Blend mode for bottom inside. 188 */ 189 int bottom_inside_gain; 190 191 /** 192 * @bottom_outside_gain: Blend mode for bottom outside. 193 */ 194 int bottom_outside_gain; 195 }; 196 197 struct mpc_grph_gamut_adjustment { 198 struct fixed31_32 temperature_matrix[CSC_TEMPERATURE_MATRIX_SIZE]; 199 enum graphics_gamut_adjust_type gamut_adjust_type; 200 enum mpcc_gamut_remap_id mpcc_gamut_remap_block_id; 201 }; 202 203 struct mpc_rmcm_regs { 204 uint32_t rmcm_3dlut_mem_pwr_state; 205 uint32_t rmcm_3dlut_mem_pwr_force; 206 uint32_t rmcm_3dlut_mem_pwr_dis; 207 uint32_t rmcm_3dlut_mem_pwr_mode; 208 uint32_t rmcm_3dlut_size; 209 uint32_t rmcm_3dlut_mode; 210 uint32_t rmcm_3dlut_mode_cur; 211 uint32_t rmcm_3dlut_read_sel; 212 uint32_t rmcm_3dlut_30bit_en; 213 uint32_t rmcm_3dlut_wr_en_mask; 214 uint32_t rmcm_3dlut_ram_sel; 215 uint32_t rmcm_3dlut_out_norm_factor; 216 uint32_t rmcm_3dlut_fl_sel; 217 uint32_t rmcm_3dlut_out_offset_r; 218 uint32_t rmcm_3dlut_out_scale_r; 219 uint32_t rmcm_3dlut_fl_done; 220 uint32_t rmcm_3dlut_fl_soft_underflow; 221 uint32_t rmcm_3dlut_fl_hard_underflow; 222 uint32_t rmcm_cntl; 223 uint32_t rmcm_shaper_mem_pwr_state; 224 uint32_t rmcm_shaper_mem_pwr_force; 225 uint32_t rmcm_shaper_mem_pwr_dis; 226 uint32_t rmcm_shaper_mem_pwr_mode; 227 uint32_t rmcm_shaper_lut_mode; 228 uint32_t rmcm_shaper_mode_cur; 229 uint32_t rmcm_shaper_lut_write_en_mask; 230 uint32_t rmcm_shaper_lut_write_sel; 231 uint32_t rmcm_shaper_offset_b; 232 uint32_t rmcm_shaper_scale_b; 233 uint32_t rmcm_shaper_rama_exp_region_start_b; 234 uint32_t rmcm_shaper_rama_exp_region_start_seg_b; 235 uint32_t rmcm_shaper_rama_exp_region_end_b; 236 uint32_t rmcm_shaper_rama_exp_region_end_base_b; 237 }; 238 239 struct mpcc_sm_cfg { 240 bool enable; 241 /* 0-single plane,2-row subsampling,4-column subsampling,6-checkboard subsampling */ 242 int sm_mode; 243 /* 0- disable frame alternate, 1- enable frame alternate */ 244 bool frame_alt; 245 /* 0- disable field alternate, 1- enable field alternate */ 246 bool field_alt; 247 /* 0-no force,2-force frame polarity from top,3-force frame polarity from bottom */ 248 int force_next_frame_porlarity; 249 /* 0-no force,2-force field polarity from top,3-force field polarity from bottom */ 250 int force_next_field_polarity; 251 }; 252 253 struct mpc_denorm_clamp { 254 int clamp_max_r_cr; 255 int clamp_min_r_cr; 256 int clamp_max_g_y; 257 int clamp_min_g_y; 258 int clamp_max_b_cb; 259 int clamp_min_b_cb; 260 }; 261 262 struct mpc_dwb_flow_control { 263 int flow_ctrl_mode; 264 int flow_ctrl_cnt0; 265 int flow_ctrl_cnt1; 266 }; 267 268 /** 269 * struct mpcc - MPCC connection and blending configuration for a single MPCC instance. 270 * 271 * This struct is used as a node in an MPC tree. 272 */ 273 struct mpcc { 274 /** 275 * @mpcc_id: MPCC physical instance. 276 */ 277 int mpcc_id; 278 279 /** 280 * @dpp_id: DPP input to this MPCC 281 */ 282 int dpp_id; 283 284 /** 285 * @mpcc_bot: Pointer to bottom layer MPCC. NULL when not connected. 286 */ 287 struct mpcc *mpcc_bot; 288 289 /** 290 * @blnd_cfg: The blending configuration for this MPCC. 291 */ 292 struct mpcc_blnd_cfg blnd_cfg; 293 294 /** 295 * @sm_cfg: stereo mix setting for this MPCC 296 */ 297 struct mpcc_sm_cfg sm_cfg; 298 299 /** 300 * @shared_bottom: 301 * 302 * If MPCC output to both OPP and DWB endpoints, true. Otherwise, false. 303 */ 304 bool shared_bottom; 305 }; 306 307 /** 308 * struct mpc_tree - MPC tree represents all MPCC connections for a pipe. 309 * 310 * 311 */ 312 struct mpc_tree { 313 /** 314 * @opp_id: The OPP instance that owns this MPC tree. 315 */ 316 int opp_id; 317 318 /** 319 * @opp_list: the top MPCC layer of the MPC tree that outputs to OPP endpoint 320 */ 321 struct mpcc *opp_list; 322 }; 323 324 struct mpc { 325 const struct mpc_funcs *funcs; 326 struct dc_context *ctx; 327 328 struct mpcc mpcc_array[MAX_MPCC]; 329 struct pwl_params blender_params; 330 bool cm_bypass_mode; 331 }; 332 333 struct mpcc_state { 334 uint32_t opp_id; 335 uint32_t dpp_id; 336 uint32_t bot_mpcc_id; 337 uint32_t mode; 338 uint32_t alpha_mode; 339 uint32_t pre_multiplied_alpha; 340 uint32_t overlap_only; 341 uint32_t idle; 342 uint32_t busy; 343 uint32_t shaper_lut_mode; 344 uint32_t lut3d_mode; 345 uint32_t lut3d_bit_depth; 346 uint32_t lut3d_size; 347 uint32_t rgam_mode; 348 uint32_t rgam_lut; 349 struct mpc_grph_gamut_adjustment gamut_remap; 350 struct mpc_rmcm_regs rmcm_regs; 351 }; 352 353 /** 354 * struct mpc_funcs - funcs 355 */ 356 struct mpc_funcs { 357 /** 358 * @read_mpcc_state: 359 * 360 * Read register content from given MPCC physical instance. 361 * 362 * Parameters: 363 * 364 * - [in/out] mpc - MPC context 365 * - [in] mpcc_instance - MPC context instance 366 * - [in] mpcc_state - MPC context state 367 * 368 * Return: 369 * 370 * void 371 */ 372 void (*read_mpcc_state)( 373 struct mpc *mpc, 374 int mpcc_inst, 375 struct mpcc_state *s); 376 377 /** 378 * @insert_plane: 379 * 380 * Insert DPP into MPC tree based on specified blending position. 381 * Only used for planes that are part of blending chain for OPP output 382 * 383 * Parameters: 384 * 385 * - [in/out] mpc - MPC context. 386 * - [in/out] tree - MPC tree structure that plane will be added to. 387 * - [in] blnd_cfg - MPCC blending configuration for the new blending layer. 388 * - [in] sm_cfg - MPCC stereo mix configuration for the new blending layer. 389 * stereo mix must disable for the very bottom layer of the tree config. 390 * - [in] insert_above_mpcc - Insert new plane above this MPCC. 391 * If NULL, insert as bottom plane. 392 * - [in] dpp_id - DPP instance for the plane to be added. 393 * - [in] mpcc_id - The MPCC physical instance to use for blending. 394 * 395 * Return: 396 * 397 * struct mpcc* - MPCC that was added. 398 */ 399 struct mpcc* (*insert_plane)( 400 struct mpc *mpc, 401 struct mpc_tree *tree, 402 struct mpcc_blnd_cfg *blnd_cfg, 403 struct mpcc_sm_cfg *sm_cfg, 404 struct mpcc *insert_above_mpcc, 405 int dpp_id, 406 int mpcc_id); 407 408 /** 409 * @remove_mpcc: 410 * 411 * Remove a specified MPCC from the MPC tree. 412 * 413 * Parameters: 414 * 415 * - [in/out] mpc - MPC context. 416 * - [in/out] tree - MPC tree structure that plane will be removed from. 417 * - [in/out] mpcc - MPCC to be removed from tree. 418 * 419 * Return: 420 * 421 * void 422 */ 423 void (*remove_mpcc)( 424 struct mpc *mpc, 425 struct mpc_tree *tree, 426 struct mpcc *mpcc); 427 428 /** 429 * @mpc_init: 430 * 431 * Reset the MPCC HW status by disconnecting all muxes. 432 * 433 * Parameters: 434 * 435 * - [in/out] mpc - MPC context. 436 * 437 * Return: 438 * 439 * void 440 */ 441 void (*mpc_init)(struct mpc *mpc); 442 443 /** 444 * @mpc_init_single_inst: 445 * 446 * Initialize given MPCC physical instance. 447 * 448 * Parameters: 449 * - [in/out] mpc - MPC context. 450 * - [in] mpcc_id - The MPCC physical instance to be initialized. 451 */ 452 void (*mpc_init_single_inst)( 453 struct mpc *mpc, 454 unsigned int mpcc_id); 455 456 /** 457 * @update_blending: 458 * 459 * Update the blending configuration for a specified MPCC. 460 * 461 * Parameters: 462 * 463 * - [in/out] mpc - MPC context. 464 * - [in] blnd_cfg - MPCC blending configuration. 465 * - [in] mpcc_id - The MPCC physical instance. 466 * 467 * Return: 468 * 469 * void 470 */ 471 void (*update_blending)( 472 struct mpc *mpc, 473 struct mpcc_blnd_cfg *blnd_cfg, 474 int mpcc_id); 475 476 /** 477 * @cursor_lock: 478 * 479 * Lock cursor updates for the specified OPP. OPP defines the set of 480 * MPCC that are locked together for cursor. 481 * 482 * Parameters: 483 * 484 * - [in] mpc - MPC context. 485 * - [in] opp_id - The OPP to lock cursor updates on 486 * - [in] lock - lock/unlock the OPP 487 * 488 * Return: 489 * 490 * void 491 */ 492 void (*cursor_lock)( 493 struct mpc *mpc, 494 int opp_id, 495 bool lock); 496 497 /** 498 * @insert_plane_to_secondary: 499 * 500 * Add DPP into secondary MPC tree based on specified blending 501 * position. Only used for planes that are part of blending chain for 502 * DWB output 503 * 504 * Parameters: 505 * 506 * - [in/out] mpc - MPC context. 507 * - [in/out] tree - MPC tree structure that plane will be added to. 508 * - [in] blnd_cfg - MPCC blending configuration for the new blending layer. 509 * - [in] sm_cfg - MPCC stereo mix configuration for the new blending layer. 510 * stereo mix must disable for the very bottom layer of the tree config. 511 * - [in] insert_above_mpcc - Insert new plane above this MPCC. If 512 * NULL, insert as bottom plane. 513 * - [in] dpp_id - DPP instance for the plane to be added. 514 * - [in] mpcc_id - The MPCC physical instance to use for blending. 515 * 516 * Return: 517 * 518 * struct mpcc* - MPCC that was added. 519 */ 520 struct mpcc* (*insert_plane_to_secondary)( 521 struct mpc *mpc, 522 struct mpc_tree *tree, 523 struct mpcc_blnd_cfg *blnd_cfg, 524 struct mpcc_sm_cfg *sm_cfg, 525 struct mpcc *insert_above_mpcc, 526 int dpp_id, 527 int mpcc_id); 528 529 /** 530 * @remove_mpcc_from_secondary: 531 * 532 * Remove a specified DPP from the 'secondary' MPC tree. 533 * 534 * Parameters: 535 * 536 * - [in/out] mpc - MPC context. 537 * - [in/out] tree - MPC tree structure that plane will be removed from. 538 * - [in] mpcc - MPCC to be removed from tree. 539 * 540 * Return: 541 * 542 * void 543 */ 544 void (*remove_mpcc_from_secondary)( 545 struct mpc *mpc, 546 struct mpc_tree *tree, 547 struct mpcc *mpcc); 548 549 /** 550 * @get_mpcc_for_dpp_from_secondary: 551 * 552 * Find, if it exists, a MPCC from a given 'secondary' MPC tree that 553 * is associated with specified plane. 554 * 555 * Parameters: 556 * - [in/out] tree - MPC tree structure to search for plane. 557 * - [in] dpp_id - DPP to be searched. 558 * 559 * Return: 560 * 561 * struct mpcc* - pointer to plane or NULL if no plane found. 562 */ 563 struct mpcc* (*get_mpcc_for_dpp_from_secondary)( 564 struct mpc_tree *tree, 565 int dpp_id); 566 567 /** 568 * @get_mpcc_for_dpp: 569 * 570 * Find, if it exists, a MPCC from a given MPC tree that 571 * is associated with specified plane. 572 * 573 * Parameters: 574 * - [in/out] tree - MPC tree structure to search for plane. 575 * - [in] dpp_id - DPP to be searched. 576 * 577 * Return: 578 * 579 * struct mpcc* - pointer to plane or NULL if no plane found. 580 */ 581 struct mpcc* (*get_mpcc_for_dpp)( 582 struct mpc_tree *tree, 583 int dpp_id); 584 585 /** 586 * @wait_for_idle: 587 * 588 * Wait for a MPCC in MPC context to enter idle state. 589 * 590 * Parameters: 591 * - [in/out] mpc - MPC Context. 592 * - [in] id - MPCC to wait for idle state. 593 * 594 * Return: 595 * 596 * void 597 */ 598 void (*wait_for_idle)(struct mpc *mpc, int id); 599 600 /** 601 * @assert_mpcc_idle_before_connect: 602 * 603 * Assert if MPCC in MPC context is in idle state. 604 * 605 * Parameters: 606 * - [in/out] mpc - MPC context. 607 * - [in] id - MPCC to assert idle state. 608 * 609 * Return: 610 * 611 * void 612 */ 613 void (*assert_mpcc_idle_before_connect)(struct mpc *mpc, int mpcc_id); 614 615 /** 616 * @init_mpcc_list_from_hw: 617 * 618 * Iterate through the MPCC array from a given MPC context struct 619 * and configure each MPCC according to its registers' values. 620 * 621 * Parameters: 622 * - [in/out] mpc - MPC context to initialize MPCC array. 623 * - [in/out] tree - MPC tree structure containing MPCC contexts to initialize. 624 * 625 * Return: 626 * 627 * void 628 */ 629 void (*init_mpcc_list_from_hw)( 630 struct mpc *mpc, 631 struct mpc_tree *tree); 632 633 /** 634 * @set_denorm: 635 * 636 * Set corresponding OPP DENORM_CONTROL register value to specific denorm_mode 637 * based on given color depth. 638 * 639 * Parameters: 640 * - [in/out] mpc - MPC context. 641 * - [in] opp_id - Corresponding OPP to update register. 642 * - [in] output_depth - Arbitrary color depth to set denorm_mode. 643 * 644 * Return: 645 * 646 * void 647 */ 648 void (*set_denorm)(struct mpc *mpc, 649 int opp_id, 650 enum dc_color_depth output_depth); 651 652 /** 653 * @set_denorm_clamp: 654 * 655 * Set denorm clamp values on corresponding OPP DENORM CONTROL register. 656 * 657 * Parameters: 658 * - [in/out] mpc - MPC context. 659 * - [in] opp_id - Corresponding OPP to update register. 660 * - [in] denorm_clamp - Arbitrary denorm clamp to be set. 661 * 662 * Return: 663 * 664 * void 665 */ 666 void (*set_denorm_clamp)( 667 struct mpc *mpc, 668 int opp_id, 669 struct mpc_denorm_clamp denorm_clamp); 670 671 /** 672 * @set_output_csc: 673 * 674 * Set the Output Color Space Conversion matrix 675 * with given values and mode. 676 * 677 * Parameters: 678 * - [in/out] mpc - MPC context. 679 * - [in] opp_id - Corresponding OPP to update register. 680 * - [in] regval - Values to set in CSC matrix. 681 * - [in] ocsc_mode - Mode to set CSC. 682 * 683 * Return: 684 * 685 * void 686 */ 687 void (*set_output_csc)(struct mpc *mpc, 688 int opp_id, 689 const uint16_t *regval, 690 enum mpc_output_csc_mode ocsc_mode); 691 692 /** 693 * @set_ocsc_default: 694 * 695 * Set the Output Color Space Conversion matrix 696 * to default values according to color space. 697 * 698 * Parameters: 699 * - [in/out] mpc - MPC context. 700 * - [in] opp_id - Corresponding OPP to update register. 701 * - [in] color_space - OCSC color space. 702 * - [in] ocsc_mode - Mode to set CSC. 703 * 704 * Return: 705 * 706 * void 707 * 708 */ 709 void (*set_ocsc_default)(struct mpc *mpc, 710 int opp_id, 711 enum dc_color_space color_space, 712 enum mpc_output_csc_mode ocsc_mode); 713 714 /** 715 * @set_output_gamma: 716 * 717 * Set Output Gamma with given curve parameters. 718 * 719 * Parameters: 720 * - [in/out] mpc - MPC context. 721 * - [in] mpcc_id - Corresponding MPC to update registers. 722 * - [in] params - Parameters. 723 * 724 * Return: 725 * 726 * void 727 * 728 */ 729 void (*set_output_gamma)( 730 struct mpc *mpc, 731 int mpcc_id, 732 const struct pwl_params *params); 733 /** 734 * @power_on_mpc_mem_pwr: 735 * 736 * Power on/off memory LUT for given MPCC. 737 * Powering on enables LUT to be updated. 738 * Powering off allows entering low power mode. 739 * 740 * Parameters: 741 * - [in/out] mpc - MPC context. 742 * - [in] mpcc_id - MPCC to power on. 743 * - [in] power_on 744 * 745 * Return: 746 * 747 * void 748 */ 749 void (*power_on_mpc_mem_pwr)( 750 struct mpc *mpc, 751 int mpcc_id, 752 bool power_on); 753 /** 754 * @set_dwb_mux: 755 * 756 * Set corresponding Display Writeback mux 757 * MPC register field to given MPCC id. 758 * 759 * Parameters: 760 * - [in/out] mpc - MPC context. 761 * - [in] dwb_id - DWB to be set. 762 * - [in] mpcc_id - MPCC id to be stored in DWB mux register. 763 * 764 * Return: 765 * 766 * void 767 */ 768 void (*set_dwb_mux)( 769 struct mpc *mpc, 770 int dwb_id, 771 int mpcc_id); 772 773 /** 774 * @disable_dwb_mux: 775 * 776 * Reset corresponding Display Writeback mux 777 * MPC register field. 778 * 779 * Parameters: 780 * - [in/out] mpc - MPC context. 781 * - [in] dwb_id - DWB to be set. 782 * 783 * Return: 784 * 785 * void 786 */ 787 void (*disable_dwb_mux)( 788 struct mpc *mpc, 789 int dwb_id); 790 791 /** 792 * @is_dwb_idle: 793 * 794 * Check DWB status on MPC_DWB0_MUX_STATUS register field. 795 * Return if it is null. 796 * 797 * Parameters: 798 * - [in/out] mpc - MPC context. 799 * - [in] dwb_id - DWB to be checked. 800 * 801 * Return: 802 * 803 * bool - wheter DWB is idle or not 804 */ 805 bool (*is_dwb_idle)( 806 struct mpc *mpc, 807 int dwb_id); 808 809 /** 810 * @set_out_rate_control: 811 * 812 * Set display output rate control. 813 * 814 * Parameters: 815 * - [in/out] mpc - MPC context. 816 * - [in] opp_id - OPP to be set. 817 * - [in] enable 818 * - [in] rate_2x_mode 819 * - [in] flow_control 820 * 821 * Return: 822 * 823 * void 824 */ 825 void (*set_out_rate_control)( 826 struct mpc *mpc, 827 int opp_id, 828 bool enable, 829 bool rate_2x_mode, 830 struct mpc_dwb_flow_control *flow_control); 831 832 /** 833 * @set_gamut_remap: 834 * 835 * Set post-blending CTM for given MPCC. 836 * 837 * Parameters: 838 * - [in] mpc - MPC context. 839 * - [in] mpcc_id - MPCC to set gamut map. 840 * - [in] adjust 841 * 842 * Return: 843 * 844 * void 845 */ 846 void (*set_gamut_remap)( 847 struct mpc *mpc, 848 int mpcc_id, 849 const struct mpc_grph_gamut_adjustment *adjust); 850 851 /** 852 * @program_1dlut: 853 * 854 * Set 1 dimensional Lookup Table. 855 * 856 * Parameters: 857 * - [in/out] mpc - MPC context 858 * - [in] params - curve parameters for the LUT configuration 859 * - [in] rmu_idx 860 * 861 * bool - wheter LUT was set (set with given parameters) or not (params is NULL and LUT is disabled). 862 */ 863 bool (*program_1dlut)( 864 struct mpc *mpc, 865 const struct pwl_params *params, 866 uint32_t rmu_idx); 867 868 /** 869 * @program_shaper: 870 * 871 * Set shaper. 872 * 873 * Parameters: 874 * - [in/out] mpc - MPC context 875 * - [in] params - curve parameters to be set 876 * - [in] rmu_idx 877 * 878 * Return: 879 * 880 * bool - wheter shaper was set (set with given parameters) or not (params is NULL and LUT is disabled). 881 */ 882 bool (*program_shaper)( 883 struct mpc *mpc, 884 const struct pwl_params *params, 885 uint32_t rmu_idx); 886 887 /** 888 * @acquire_rmu: 889 * 890 * Set given MPCC to be multiplexed to given RMU unit. 891 * 892 * Parameters: 893 * - [in/out] mpc - MPC context 894 * - [in] mpcc_id - MPCC 895 * - [in] rmu_idx - Given RMU unit to set MPCC to be multiplexed to. 896 * 897 * Return: 898 * 899 * unit32_t - rmu_idx if operation was successful, -1 else. 900 */ 901 uint32_t (*acquire_rmu)(struct mpc *mpc, int mpcc_id, int rmu_idx); 902 903 /** 904 * @program_3dlut: 905 * 906 * Set 3 dimensional Lookup Table. 907 * 908 * Parameters: 909 * - [in/out] mpc - MPC context 910 * - [in] params - tetrahedral parameters for the LUT configuration 911 * - [in] rmu_idx 912 * 913 * bool - wheter LUT was set (set with given parameters) or not (params is NULL and LUT is disabled). 914 */ 915 bool (*program_3dlut)( 916 struct mpc *mpc, 917 const struct tetrahedral_params *params, 918 int rmu_idx); 919 920 /** 921 * @release_rmu: 922 * 923 * For a given MPCC, release the RMU unit it muliplexes to. 924 * 925 * Parameters: 926 * - [in/out] mpc - MPC context 927 * - [in] mpcc_id - MPCC 928 * 929 * Return: 930 * 931 * int - a valid rmu_idx representing released RMU unit or -1 if there was no RMU unit to release. 932 */ 933 int (*release_rmu)(struct mpc *mpc, int mpcc_id); 934 935 /** 936 * @get_mpc_out_mux: 937 * 938 * Return MPC out mux. 939 * 940 * Parameters: 941 * - [in] mpc - MPC context. 942 * - [in] opp_id - OPP 943 * 944 * Return: 945 * 946 * unsigned int - Out Mux 947 */ 948 unsigned int (*get_mpc_out_mux)( 949 struct mpc *mpc, 950 int opp_id); 951 952 /** 953 * @set_bg_color: 954 * 955 * Find corresponding bottommost MPCC and 956 * set its bg color. 957 * 958 * Parameters: 959 * - [in/out] mpc - MPC context. 960 * - [in] bg_color - background color to be set. 961 * - [in] mpcc_id 962 * 963 * Return: 964 * 965 * void 966 */ 967 void (*set_bg_color)(struct mpc *mpc, 968 struct tg_color *bg_color, 969 int mpcc_id); 970 971 /** 972 * @set_mpc_mem_lp_mode: 973 * 974 * Set mpc_mem_lp_mode. 975 * 976 * Parameters: 977 * - [in/out] mpc - MPC context. 978 * 979 * Return: 980 * 981 * void 982 */ 983 984 void (*set_mpc_mem_lp_mode)(struct mpc *mpc); 985 /** 986 * @set_movable_cm_location: 987 * 988 * Set Movable CM Location. 989 * 990 * Parameters: 991 * - [in/out] mpc - MPC context. 992 * - [in] location 993 * - [in] mpcc_id 994 * 995 * Return: 996 * 997 * void 998 */ 999 1000 void (*set_movable_cm_location)(struct mpc *mpc, enum mpcc_movable_cm_location location, int mpcc_id); 1001 /** 1002 * @update_3dlut_fast_load_select: 1003 * 1004 * Update 3D LUT fast load select. 1005 * 1006 * Parameters: 1007 * - [in/out] mpc - MPC context. 1008 * - [in] mpcc_id 1009 * - [in] hubp_idx 1010 * 1011 * Return: 1012 * 1013 * void 1014 */ 1015 1016 void (*update_3dlut_fast_load_select)(struct mpc *mpc, int mpcc_id, int hubp_idx); 1017 1018 /** 1019 * @populate_lut: 1020 * 1021 * Populate LUT with given tetrahedral parameters. 1022 * 1023 * Parameters: 1024 * - [in/out] mpc - MPC context. 1025 * - [in] id 1026 * - [in] params 1027 * - [in] lut_bank_a 1028 * - [in] mpcc_id 1029 * 1030 * Return: 1031 * 1032 * void 1033 */ 1034 void (*populate_lut)(struct mpc *mpc, const enum MCM_LUT_ID id, const union mcm_lut_params params, 1035 bool lut_bank_a, int mpcc_id); 1036 1037 /** 1038 * @program_lut_read_write_control: 1039 * 1040 * Program LUT RW control. 1041 * 1042 * Parameters: 1043 * - [in/out] mpc - MPC context. 1044 * - [in] id 1045 * - [in] lut_bank_a 1046 * - [in] mpcc_id 1047 * 1048 * Return: 1049 * 1050 * void 1051 */ 1052 void (*program_lut_read_write_control)(struct mpc *mpc, const enum MCM_LUT_ID id, bool lut_bank_a, int mpcc_id); 1053 1054 /** 1055 * @program_lut_mode: 1056 * 1057 * Program LUT mode. 1058 * 1059 * Parameters: 1060 * - [in/out] mpc - MPC context. 1061 * - [in] id 1062 * - [in] xable 1063 * - [in] lut_bank_a 1064 * - [in] mpcc_id 1065 * 1066 * Return: 1067 * 1068 * void 1069 */ 1070 void (*program_lut_mode)(struct mpc *mpc, const enum MCM_LUT_ID id, const enum MCM_LUT_XABLE xable, 1071 bool lut_bank_a, int mpcc_id); 1072 1073 /** 1074 * @mcm: 1075 * 1076 * MPC MCM new HW sequential programming functions 1077 */ 1078 struct { 1079 void (*program_3dlut_size)(struct mpc *mpc, uint32_t width, int mpcc_id); 1080 void (*program_bias_scale)(struct mpc *mpc, uint16_t bias, uint16_t scale, int mpcc_id); 1081 void (*program_bit_depth)(struct mpc *mpc, uint16_t bit_depth, int mpcc_id); 1082 bool (*is_config_supported)(uint32_t width); 1083 void (*program_lut_read_write_control)(struct mpc *mpc, const enum MCM_LUT_ID id, 1084 bool lut_bank_a, bool enabled, int mpcc_id); 1085 1086 void (*populate_lut)(struct mpc *mpc, const union mcm_lut_params params, 1087 bool lut_bank_a, int mpcc_id); 1088 } mcm; 1089 1090 /** 1091 * @rmcm: 1092 * 1093 * MPC RMCM new HW sequential programming functions 1094 */ 1095 struct { 1096 void (*fl_3dlut_configure)(struct mpc *mpc, struct mpc_fl_3dlut_config *cfg, int mpcc_id); 1097 void (*enable_3dlut_fl)(struct mpc *mpc, bool enable, int mpcc_id); 1098 void (*update_3dlut_fast_load_select)(struct mpc *mpc, int mpcc_id, int hubp_idx); 1099 void (*program_lut_read_write_control)(struct mpc *mpc, const enum MCM_LUT_ID id, 1100 bool lut_bank_a, bool enabled, int mpcc_id); 1101 void (*program_lut_mode)(struct mpc *mpc, const enum MCM_LUT_XABLE xable, 1102 bool lut_bank_a, int mpcc_id); 1103 void (*program_3dlut_size)(struct mpc *mpc, uint32_t width, int mpcc_id); 1104 void (*program_bias_scale)(struct mpc *mpc, uint16_t bias, uint16_t scale, int mpcc_id); 1105 void (*program_bit_depth)(struct mpc *mpc, uint16_t bit_depth, int mpcc_id); 1106 bool (*is_config_supported)(uint32_t width); 1107 1108 void (*power_on_shaper_3dlut)(struct mpc *mpc, uint32_t mpcc_id, bool power_on); 1109 void (*populate_lut)(struct mpc *mpc, const union mcm_lut_params params, 1110 bool lut_bank_a, int mpcc_id); 1111 } rmcm; 1112 }; 1113 1114 #endif 1115