xref: /linux/drivers/gpu/drm/amd/display/dc/inc/hw/ipp.h (revision ef40b2346563aa11575446c8e3b04af44c31abb5)
1 /*
2  * Copyright 2015 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #ifndef __DAL_IPP_H__
27 #define __DAL_IPP_H__
28 
29 #include "hw_shared.h"
30 
31 #define MAXTRIX_COEFFICIENTS_NUMBER 12
32 #define MAXTRIX_COEFFICIENTS_WRAP_NUMBER (MAXTRIX_COEFFICIENTS_NUMBER + 4)
33 #define MAX_OVL_MATRIX_COUNT 12
34 
35 /* IPP RELATED */
36 struct input_pixel_processor {
37 	struct  dc_context *ctx;
38 	unsigned int inst;
39 	const struct ipp_funcs *funcs;
40 
41 	unsigned int cusor_width;
42 };
43 
44 enum ipp_prescale_mode {
45 	IPP_PRESCALE_MODE_BYPASS,
46 	IPP_PRESCALE_MODE_FIXED_SIGNED,
47 	IPP_PRESCALE_MODE_FLOAT_SIGNED,
48 	IPP_PRESCALE_MODE_FIXED_UNSIGNED,
49 	IPP_PRESCALE_MODE_FLOAT_UNSIGNED
50 };
51 
52 struct ipp_prescale_params {
53 	enum ipp_prescale_mode mode;
54 	uint16_t bias;
55 	uint16_t scale;
56 };
57 
58 enum ipp_degamma_mode {
59 	IPP_DEGAMMA_MODE_BYPASS,
60 	IPP_DEGAMMA_MODE_HW_sRGB,
61 	IPP_DEGAMMA_MODE_HW_xvYCC,
62 	IPP_DEGAMMA_MODE_USER_PWL
63 };
64 
65 enum ovl_color_space {
66 	OVL_COLOR_SPACE_UNKNOWN = 0,
67 	OVL_COLOR_SPACE_RGB,
68 	OVL_COLOR_SPACE_YUV601,
69 	OVL_COLOR_SPACE_YUV709
70 };
71 
72 enum expansion_mode {
73 	EXPANSION_MODE_DYNAMIC,
74 	EXPANSION_MODE_ZERO
75 };
76 
77 enum ipp_output_format {
78 	IPP_OUTPUT_FORMAT_12_BIT_FIX,
79 	IPP_OUTPUT_FORMAT_16_BIT_BYPASS,
80 	IPP_OUTPUT_FORMAT_FLOAT
81 };
82 
83 struct ipp_funcs {
84 
85 	/*** cursor ***/
86 	void (*ipp_cursor_set_position)(
87 		struct input_pixel_processor *ipp,
88 		const struct dc_cursor_position *position,
89 		const struct dc_cursor_mi_param *param);
90 
91 	bool (*ipp_cursor_set_attributes)(
92 		struct input_pixel_processor *ipp,
93 		const struct dc_cursor_attributes *attributes);
94 
95 	/*** setup input pixel processing ***/
96 
97 	/* put the entire pixel processor to bypass */
98 	void (*ipp_full_bypass)(
99 			struct input_pixel_processor *ipp);
100 
101 	/* setup ipp to expand/convert input to pixel processor internal format */
102 	void (*ipp_setup)(
103 		struct input_pixel_processor *ipp,
104 		enum surface_pixel_format input_format,
105 		enum expansion_mode mode,
106 		enum ipp_output_format output_format);
107 
108 	/* DCE function to setup IPP.  TODO: see if we can consolidate to setup */
109 	void (*ipp_program_prescale)(
110 			struct input_pixel_processor *ipp,
111 			struct ipp_prescale_params *params);
112 
113 	void (*ipp_program_input_lut)(
114 			struct input_pixel_processor *ipp,
115 			const struct dc_gamma *gamma);
116 
117 	/*** DEGAMMA RELATED ***/
118 	bool (*ipp_set_degamma)(
119 		struct input_pixel_processor *ipp,
120 		enum ipp_degamma_mode mode);
121 
122 	bool (*ipp_program_degamma_pwl)(
123 		struct input_pixel_processor *ipp,
124 		const struct pwl_params *params);
125 
126 };
127 
128 #endif /* __DAL_IPP_H__ */
129