1 /* 2 * Copyright 2012-15 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef __DAL_HUBP_H__ 27 #define __DAL_HUBP_H__ 28 29 /** 30 * DOC: overview 31 * 32 * Display Controller Hub (DCHUB) is the gateway between the Scalable Data Port 33 * (SDP) and DCN. This component has multiple features, such as memory 34 * arbitration, rotation, and cursor manipulation. 35 * 36 * There is one HUBP allocated per pipe, which fetches data and converts 37 * different pixel formats (i.e. ARGB8888, NV12, etc) into linear, interleaved 38 * and fixed-depth streams of pixel data. 39 */ 40 41 #include "mem_input.h" 42 #include "cursor_reg_cache.h" 43 44 #include "dml2_0/dml21/inc/dml_top_dchub_registers.h" 45 #include "dml2_0/dml21/inc/dml_top_types.h" 46 47 #define OPP_ID_INVALID 0xf 48 #define MAX_TTU 0xffffff 49 50 enum cursor_pitch { 51 CURSOR_PITCH_64_PIXELS = 0, 52 CURSOR_PITCH_128_PIXELS, 53 CURSOR_PITCH_256_PIXELS 54 }; 55 56 enum cursor_lines_per_chunk { 57 CURSOR_LINE_PER_CHUNK_1 = 0, /* new for DCN2 */ 58 CURSOR_LINE_PER_CHUNK_2 = 1, 59 CURSOR_LINE_PER_CHUNK_4, 60 CURSOR_LINE_PER_CHUNK_8, 61 CURSOR_LINE_PER_CHUNK_16 62 }; 63 64 enum hubp_ind_block_size { 65 hubp_ind_block_unconstrained = 0, 66 hubp_ind_block_64b, 67 hubp_ind_block_128b, 68 hubp_ind_block_64b_no_128bcl, 69 }; 70 71 enum hubp_3dlut_fl_mode { 72 hubp_3dlut_fl_mode_disable = 0, 73 hubp_3dlut_fl_mode_native_1 = 1, 74 hubp_3dlut_fl_mode_native_2 = 2, 75 hubp_3dlut_fl_mode_transform = 3 76 }; 77 78 enum hubp_3dlut_fl_format { 79 hubp_3dlut_fl_format_unorm_12msb_bitslice = 0, 80 hubp_3dlut_fl_format_unorm_12lsb_bitslice = 1, 81 hubp_3dlut_fl_format_float_fp1_5_10 = 2 82 }; 83 84 enum hubp_3dlut_fl_addressing_mode { 85 hubp_3dlut_fl_addressing_mode_sw_linear = 0, 86 hubp_3dlut_fl_addressing_mode_simple_linear = 1 87 }; 88 89 enum hubp_3dlut_fl_width { 90 hubp_3dlut_fl_width_17 = 17, 91 hubp_3dlut_fl_width_33 = 33, 92 hubp_3dlut_fl_width_17_transformed = 4916, //mpc default 93 }; 94 95 enum hubp_3dlut_fl_crossbar_bit_slice { 96 hubp_3dlut_fl_crossbar_bit_slice_0_15 = 0, 97 hubp_3dlut_fl_crossbar_bit_slice_16_31 = 1, 98 hubp_3dlut_fl_crossbar_bit_slice_32_47 = 2, 99 hubp_3dlut_fl_crossbar_bit_slice_48_63 = 3 100 }; 101 102 struct hubp { 103 const struct hubp_funcs *funcs; 104 struct dc_context *ctx; 105 struct dc_plane_address request_address; 106 int inst; 107 108 /* run time states */ 109 int opp_id; 110 int mpcc_id; 111 struct dc_cursor_attributes curs_attr; 112 struct dc_cursor_position curs_pos; 113 bool cursor_offload; 114 bool power_gated; 115 116 struct cursor_position_cache_hubp pos; 117 struct cursor_attribute_cache_hubp att; 118 struct cursor_rect cur_rect; 119 bool use_mall_for_cursor; 120 }; 121 122 struct surface_flip_registers { 123 uint32_t DCSURF_SURFACE_CONTROL; 124 uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH; 125 uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS; 126 uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH; 127 uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS; 128 uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH_C; 129 uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_C; 130 uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_C; 131 uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_C; 132 uint32_t DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH; 133 uint32_t DCSURF_SECONDARY_META_SURFACE_ADDRESS; 134 uint32_t DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH; 135 uint32_t DCSURF_SECONDARY_SURFACE_ADDRESS; 136 bool tmz_surface; 137 bool immediate; 138 uint8_t vmid; 139 bool grph_stereo; 140 }; 141 142 struct hubp_funcs { 143 void (*hubp_setup)( 144 struct hubp *hubp, 145 struct _vcs_dpi_display_dlg_regs_st *dlg_regs, 146 struct _vcs_dpi_display_ttu_regs_st *ttu_regs, 147 struct _vcs_dpi_display_rq_regs_st *rq_regs, 148 struct _vcs_dpi_display_pipe_dest_params_st *pipe_dest); 149 150 void (*hubp_setup2)( 151 struct hubp *hubp, 152 struct dml2_dchub_per_pipe_register_set *pipe_regs, 153 union dml2_global_sync_programming *pipe_global_sync, 154 struct dc_crtc_timing *timing); 155 156 void (*hubp_setup_interdependent)( 157 struct hubp *hubp, 158 struct _vcs_dpi_display_dlg_regs_st *dlg_regs, 159 struct _vcs_dpi_display_ttu_regs_st *ttu_regs); 160 161 void (*hubp_setup_interdependent2)( 162 struct hubp *hubp, 163 struct dml2_dchub_per_pipe_register_set *pipe_regs); 164 165 void (*dcc_control)(struct hubp *hubp, bool enable, 166 enum hubp_ind_block_size blk_size); 167 168 void (*hubp_reset)(struct hubp *hubp); 169 170 void (*mem_program_viewport)( 171 struct hubp *hubp, 172 const struct rect *viewport, 173 const struct rect *viewport_c); 174 175 bool (*hubp_program_surface_flip_and_addr)( 176 struct hubp *hubp, 177 const struct dc_plane_address *address, 178 bool flip_immediate); 179 180 void (*hubp_program_pte_vm)( 181 struct hubp *hubp, 182 enum surface_pixel_format format, 183 struct dc_tiling_info *tiling_info, 184 enum dc_rotation_angle rotation); 185 186 void (*hubp_set_vm_system_aperture_settings)( 187 struct hubp *hubp, 188 struct vm_system_aperture_param *apt); 189 190 void (*hubp_set_vm_context0_settings)( 191 struct hubp *hubp, 192 const struct vm_context0_param *vm0); 193 194 void (*hubp_program_surface_config)( 195 struct hubp *hubp, 196 enum surface_pixel_format format, 197 struct dc_tiling_info *tiling_info, 198 struct plane_size *plane_size, 199 enum dc_rotation_angle rotation, 200 struct dc_plane_dcc_param *dcc, 201 bool horizontal_mirror, 202 unsigned int compa_level); 203 204 bool (*hubp_is_flip_pending)(struct hubp *hubp); 205 206 void (*set_blank)(struct hubp *hubp, bool blank); 207 void (*set_blank_regs)(struct hubp *hubp, bool blank); 208 void (*phantom_hubp_post_enable)(struct hubp *hubp); 209 void (*set_hubp_blank_en)(struct hubp *hubp, bool blank); 210 211 void (*set_cursor_attributes)( 212 struct hubp *hubp, 213 const struct dc_cursor_attributes *attr); 214 215 void (*set_cursor_position)( 216 struct hubp *hubp, 217 const struct dc_cursor_position *pos, 218 const struct dc_cursor_mi_param *param); 219 220 void (*hubp_disconnect)(struct hubp *hubp); 221 222 void (*hubp_clk_cntl)(struct hubp *hubp, bool enable); 223 void (*hubp_vtg_sel)(struct hubp *hubp, uint32_t otg_inst); 224 void (*hubp_read_state)(struct hubp *hubp); 225 void (*hubp_read_reg_state)(struct hubp *hubp, struct dcn_hubp_reg_state *reg_state); 226 void (*hubp_clear_underflow)(struct hubp *hubp); 227 void (*hubp_disable_control)(struct hubp *hubp, bool disable_hubp); 228 unsigned int (*hubp_get_underflow_status)(struct hubp *hubp); 229 void (*hubp_init)(struct hubp *hubp); 230 void (*dmdata_set_attributes)( 231 struct hubp *hubp, 232 const struct dc_dmdata_attributes *attr); 233 234 void (*dmdata_load)( 235 struct hubp *hubp, 236 uint32_t dmdata_sw_size, 237 const uint32_t *dmdata_sw_data); 238 bool (*dmdata_status_done)(struct hubp *hubp); 239 void (*hubp_enable_tripleBuffer)( 240 struct hubp *hubp, 241 bool enable); 242 243 bool (*hubp_is_triplebuffer_enabled)( 244 struct hubp *hubp); 245 246 void (*hubp_set_flip_control_surface_gsl)( 247 struct hubp *hubp, 248 bool enable); 249 250 void (*validate_dml_output)( 251 struct hubp *hubp, 252 struct dc_context *ctx, 253 struct _vcs_dpi_display_rq_regs_st *dml_rq_regs, 254 struct _vcs_dpi_display_dlg_regs_st *dml_dlg_attr, 255 struct _vcs_dpi_display_ttu_regs_st *dml_ttu_attr); 256 void (*set_unbounded_requesting)( 257 struct hubp *hubp, 258 bool enable); 259 bool (*hubp_in_blank)(struct hubp *hubp); 260 void (*hubp_soft_reset)(struct hubp *hubp, bool reset); 261 262 void (*hubp_set_flip_int)(struct hubp *hubp); 263 264 void (*hubp_update_force_pstate_disallow)(struct hubp *hubp, bool allow); 265 void (*hubp_update_force_cursor_pstate_disallow)(struct hubp *hubp, bool allow); 266 void (*hubp_update_mall_sel)(struct hubp *hubp, uint32_t mall_sel, bool c_cursor); 267 void (*hubp_prepare_subvp_buffering)(struct hubp *hubp, bool enable); 268 void (*hubp_surface_update_lock)(struct hubp *hubp, 269 bool lock); 270 271 void (*program_extended_blank)(struct hubp *hubp, 272 unsigned int min_dst_y_next_start_optimized); 273 274 void (*hubp_wait_pipe_read_start)(struct hubp *hubp); 275 void (*hubp_program_mcache_id_and_split_coordinate)(struct hubp *hubp, struct dml2_hubp_pipe_mcache_regs *mcache_regs); 276 void (*hubp_program_3dlut_fl_addr)(struct hubp *hubp, 277 const struct dc_plane_address *address); 278 void (*hubp_program_3dlut_fl_config)(struct hubp *hubp, 279 const struct dc_3dlut_dma *config); 280 void (*hubp_program_3dlut_fl_dlg_param)(struct hubp *hubp, int refcyc_per_3dlut_group); 281 void (*hubp_enable_3dlut_fl)(struct hubp *hubp, bool enable); 282 void (*hubp_program_3dlut_fl_crossbar)(struct hubp *hubp, 283 enum dc_cm_lut_pixel_format format); 284 int (*hubp_get_3dlut_fl_done)(struct hubp *hubp); 285 void (*hubp_clear_tiling)(struct hubp *hubp); 286 uint32_t (*hubp_get_current_read_line)(struct hubp *hubp); 287 uint32_t (*hubp_get_det_config_error)(struct hubp *hubp); 288 }; 289 290 #endif 291