xref: /linux/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h (revision ae22a94997b8a03dcb3c922857c203246711f9d4)
1 /*
2  * Copyright 2012-15 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #ifndef __DAL_HUBP_H__
27 #define __DAL_HUBP_H__
28 
29 /**
30  * DOC: overview
31  *
32  * Display Controller Hub (DCHUB) is the gateway between the Scalable Data Port
33  * (SDP) and DCN. This component has multiple features, such as memory
34  * arbitration, rotation, and cursor manipulation.
35  *
36  * There is one HUBP allocated per pipe, which fetches data and converts
37  * different pixel formats (i.e. ARGB8888, NV12, etc) into linear, interleaved
38  * and fixed-depth streams of pixel data.
39  */
40 
41 #include "mem_input.h"
42 #include "cursor_reg_cache.h"
43 
44 #define OPP_ID_INVALID 0xf
45 #define MAX_TTU 0xffffff
46 
47 enum cursor_pitch {
48 	CURSOR_PITCH_64_PIXELS = 0,
49 	CURSOR_PITCH_128_PIXELS,
50 	CURSOR_PITCH_256_PIXELS
51 };
52 
53 enum cursor_lines_per_chunk {
54 	CURSOR_LINE_PER_CHUNK_1 = 0, /* new for DCN2 */
55 	CURSOR_LINE_PER_CHUNK_2 = 1,
56 	CURSOR_LINE_PER_CHUNK_4,
57 	CURSOR_LINE_PER_CHUNK_8,
58 	CURSOR_LINE_PER_CHUNK_16
59 };
60 
61 enum hubp_ind_block_size {
62 	hubp_ind_block_unconstrained = 0,
63 	hubp_ind_block_64b,
64 	hubp_ind_block_128b,
65 	hubp_ind_block_64b_no_128bcl,
66 };
67 
68 struct hubp {
69 	const struct hubp_funcs *funcs;
70 	struct dc_context *ctx;
71 	struct dc_plane_address request_address;
72 	int inst;
73 
74 	/* run time states */
75 	int opp_id;
76 	int mpcc_id;
77 	struct dc_cursor_attributes curs_attr;
78 	struct dc_cursor_position curs_pos;
79 	bool power_gated;
80 
81 	struct cursor_position_cache_hubp  pos;
82 	struct cursor_attribute_cache_hubp att;
83 	struct cursor_rect cur_rect;
84 };
85 
86 struct surface_flip_registers {
87 	uint32_t DCSURF_SURFACE_CONTROL;
88 	uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH;
89 	uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS;
90 	uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH;
91 	uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS;
92 	uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH_C;
93 	uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_C;
94 	uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_C;
95 	uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_C;
96 	uint32_t DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH;
97 	uint32_t DCSURF_SECONDARY_META_SURFACE_ADDRESS;
98 	uint32_t DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH;
99 	uint32_t DCSURF_SECONDARY_SURFACE_ADDRESS;
100 	bool tmz_surface;
101 	bool immediate;
102 	uint8_t vmid;
103 	bool grph_stereo;
104 };
105 
106 struct hubp_funcs {
107 	void (*hubp_setup)(
108 			struct hubp *hubp,
109 			struct _vcs_dpi_display_dlg_regs_st *dlg_regs,
110 			struct _vcs_dpi_display_ttu_regs_st *ttu_regs,
111 			struct _vcs_dpi_display_rq_regs_st *rq_regs,
112 			struct _vcs_dpi_display_pipe_dest_params_st *pipe_dest);
113 
114 	void (*hubp_setup_interdependent)(
115 			struct hubp *hubp,
116 			struct _vcs_dpi_display_dlg_regs_st *dlg_regs,
117 			struct _vcs_dpi_display_ttu_regs_st *ttu_regs);
118 
119 	void (*dcc_control)(struct hubp *hubp, bool enable,
120 			enum hubp_ind_block_size blk_size);
121 
122 	void (*mem_program_viewport)(
123 			struct hubp *hubp,
124 			const struct rect *viewport,
125 			const struct rect *viewport_c);
126 
127 	bool (*hubp_program_surface_flip_and_addr)(
128 		struct hubp *hubp,
129 		const struct dc_plane_address *address,
130 		bool flip_immediate);
131 
132 	void (*hubp_program_pte_vm)(
133 		struct hubp *hubp,
134 		enum surface_pixel_format format,
135 		union dc_tiling_info *tiling_info,
136 		enum dc_rotation_angle rotation);
137 
138 	void (*hubp_set_vm_system_aperture_settings)(
139 			struct hubp *hubp,
140 			struct vm_system_aperture_param *apt);
141 
142 	void (*hubp_set_vm_context0_settings)(
143 			struct hubp *hubp,
144 			const struct vm_context0_param *vm0);
145 
146 	void (*hubp_program_surface_config)(
147 		struct hubp *hubp,
148 		enum surface_pixel_format format,
149 		union dc_tiling_info *tiling_info,
150 		struct plane_size *plane_size,
151 		enum dc_rotation_angle rotation,
152 		struct dc_plane_dcc_param *dcc,
153 		bool horizontal_mirror,
154 		unsigned int compa_level);
155 
156 	bool (*hubp_is_flip_pending)(struct hubp *hubp);
157 
158 	void (*set_blank)(struct hubp *hubp, bool blank);
159 	void (*set_blank_regs)(struct hubp *hubp, bool blank);
160 	void (*phantom_hubp_post_enable)(struct hubp *hubp);
161 	void (*set_hubp_blank_en)(struct hubp *hubp, bool blank);
162 
163 	void (*set_cursor_attributes)(
164 			struct hubp *hubp,
165 			const struct dc_cursor_attributes *attr);
166 
167 	void (*set_cursor_position)(
168 			struct hubp *hubp,
169 			const struct dc_cursor_position *pos,
170 			const struct dc_cursor_mi_param *param);
171 
172 	void (*hubp_disconnect)(struct hubp *hubp);
173 
174 	void (*hubp_clk_cntl)(struct hubp *hubp, bool enable);
175 	void (*hubp_vtg_sel)(struct hubp *hubp, uint32_t otg_inst);
176 	void (*hubp_read_state)(struct hubp *hubp);
177 	void (*hubp_clear_underflow)(struct hubp *hubp);
178 	void (*hubp_disable_control)(struct hubp *hubp, bool disable_hubp);
179 	unsigned int (*hubp_get_underflow_status)(struct hubp *hubp);
180 	void (*hubp_init)(struct hubp *hubp);
181 
182 	void (*dmdata_set_attributes)(
183 			struct hubp *hubp,
184 			const struct dc_dmdata_attributes *attr);
185 
186 	void (*dmdata_load)(
187 			struct hubp *hubp,
188 			uint32_t dmdata_sw_size,
189 			const uint32_t *dmdata_sw_data);
190 	bool (*dmdata_status_done)(struct hubp *hubp);
191 	void (*hubp_enable_tripleBuffer)(
192 		struct hubp *hubp,
193 		bool enable);
194 
195 	bool (*hubp_is_triplebuffer_enabled)(
196 		struct hubp *hubp);
197 
198 	void (*hubp_set_flip_control_surface_gsl)(
199 		struct hubp *hubp,
200 		bool enable);
201 
202 	void (*validate_dml_output)(
203 			struct hubp *hubp,
204 			struct dc_context *ctx,
205 			struct _vcs_dpi_display_rq_regs_st *dml_rq_regs,
206 			struct _vcs_dpi_display_dlg_regs_st *dml_dlg_attr,
207 			struct _vcs_dpi_display_ttu_regs_st *dml_ttu_attr);
208 	void (*set_unbounded_requesting)(
209 		struct hubp *hubp,
210 		bool enable);
211 	bool (*hubp_in_blank)(struct hubp *hubp);
212 	void (*hubp_soft_reset)(struct hubp *hubp, bool reset);
213 
214 	void (*hubp_update_force_pstate_disallow)(struct hubp *hubp, bool allow);
215 	void (*hubp_update_force_cursor_pstate_disallow)(struct hubp *hubp, bool allow);
216 	void (*hubp_update_mall_sel)(struct hubp *hubp, uint32_t mall_sel, bool c_cursor);
217 	void (*hubp_prepare_subvp_buffering)(struct hubp *hubp, bool enable);
218 
219 	void (*hubp_set_flip_int)(struct hubp *hubp);
220 
221 	void (*program_extended_blank)(struct hubp *hubp,
222 			unsigned int min_dst_y_next_start_optimized);
223 
224 	void (*hubp_wait_pipe_read_start)(struct hubp *hubp);
225 };
226 
227 #endif
228