xref: /linux/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h (revision 8a922b7728a93d837954315c98b84f6b78de0c4f)
1 /*
2  * Copyright 2012-15 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #ifndef __DAL_HUBP_H__
27 #define __DAL_HUBP_H__
28 
29 #include "mem_input.h"
30 #include "cursor_reg_cache.h"
31 
32 #define OPP_ID_INVALID 0xf
33 #define MAX_TTU 0xffffff
34 
35 
36 enum cursor_pitch {
37 	CURSOR_PITCH_64_PIXELS = 0,
38 	CURSOR_PITCH_128_PIXELS,
39 	CURSOR_PITCH_256_PIXELS
40 };
41 
42 enum cursor_lines_per_chunk {
43 	CURSOR_LINE_PER_CHUNK_1 = 0, /* new for DCN2 */
44 	CURSOR_LINE_PER_CHUNK_2 = 1,
45 	CURSOR_LINE_PER_CHUNK_4,
46 	CURSOR_LINE_PER_CHUNK_8,
47 	CURSOR_LINE_PER_CHUNK_16
48 };
49 
50 enum hubp_ind_block_size {
51 	hubp_ind_block_unconstrained = 0,
52 	hubp_ind_block_64b,
53 	hubp_ind_block_128b,
54 	hubp_ind_block_64b_no_128bcl,
55 };
56 
57 struct hubp {
58 	const struct hubp_funcs *funcs;
59 	struct dc_context *ctx;
60 	struct dc_plane_address request_address;
61 	int inst;
62 
63 	/* run time states */
64 	int opp_id;
65 	int mpcc_id;
66 	struct dc_cursor_attributes curs_attr;
67 	struct dc_cursor_position curs_pos;
68 	bool power_gated;
69 
70 	struct cursor_position_cache_hubp  pos;
71 	struct cursor_attribute_cache_hubp att;
72 	struct cursor_rect cur_rect;
73 };
74 
75 struct surface_flip_registers {
76 	uint32_t DCSURF_SURFACE_CONTROL;
77 	uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH;
78 	uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS;
79 	uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH;
80 	uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS;
81 	uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH_C;
82 	uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_C;
83 	uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_C;
84 	uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_C;
85 	uint32_t DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH;
86 	uint32_t DCSURF_SECONDARY_META_SURFACE_ADDRESS;
87 	uint32_t DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH;
88 	uint32_t DCSURF_SECONDARY_SURFACE_ADDRESS;
89 	bool tmz_surface;
90 	bool immediate;
91 	uint8_t vmid;
92 	bool grph_stereo;
93 };
94 
95 struct hubp_funcs {
96 	void (*hubp_setup)(
97 			struct hubp *hubp,
98 			struct _vcs_dpi_display_dlg_regs_st *dlg_regs,
99 			struct _vcs_dpi_display_ttu_regs_st *ttu_regs,
100 			struct _vcs_dpi_display_rq_regs_st *rq_regs,
101 			struct _vcs_dpi_display_pipe_dest_params_st *pipe_dest);
102 
103 	void (*hubp_setup_interdependent)(
104 			struct hubp *hubp,
105 			struct _vcs_dpi_display_dlg_regs_st *dlg_regs,
106 			struct _vcs_dpi_display_ttu_regs_st *ttu_regs);
107 
108 	void (*dcc_control)(struct hubp *hubp, bool enable,
109 			enum hubp_ind_block_size blk_size);
110 
111 	void (*mem_program_viewport)(
112 			struct hubp *hubp,
113 			const struct rect *viewport,
114 			const struct rect *viewport_c);
115 
116 	bool (*hubp_program_surface_flip_and_addr)(
117 		struct hubp *hubp,
118 		const struct dc_plane_address *address,
119 		bool flip_immediate);
120 
121 	void (*hubp_program_pte_vm)(
122 		struct hubp *hubp,
123 		enum surface_pixel_format format,
124 		union dc_tiling_info *tiling_info,
125 		enum dc_rotation_angle rotation);
126 
127 	void (*hubp_set_vm_system_aperture_settings)(
128 			struct hubp *hubp,
129 			struct vm_system_aperture_param *apt);
130 
131 	void (*hubp_set_vm_context0_settings)(
132 			struct hubp *hubp,
133 			const struct vm_context0_param *vm0);
134 
135 	void (*hubp_program_surface_config)(
136 		struct hubp *hubp,
137 		enum surface_pixel_format format,
138 		union dc_tiling_info *tiling_info,
139 		struct plane_size *plane_size,
140 		enum dc_rotation_angle rotation,
141 		struct dc_plane_dcc_param *dcc,
142 		bool horizontal_mirror,
143 		unsigned int compa_level);
144 
145 	bool (*hubp_is_flip_pending)(struct hubp *hubp);
146 
147 	void (*set_blank)(struct hubp *hubp, bool blank);
148 	void (*set_blank_regs)(struct hubp *hubp, bool blank);
149 #ifdef CONFIG_DRM_AMD_DC_DCN
150 	void (*phantom_hubp_post_enable)(struct hubp *hubp);
151 #endif
152 	void (*set_hubp_blank_en)(struct hubp *hubp, bool blank);
153 
154 	void (*set_cursor_attributes)(
155 			struct hubp *hubp,
156 			const struct dc_cursor_attributes *attr);
157 
158 	void (*set_cursor_position)(
159 			struct hubp *hubp,
160 			const struct dc_cursor_position *pos,
161 			const struct dc_cursor_mi_param *param);
162 
163 	void (*hubp_disconnect)(struct hubp *hubp);
164 
165 	void (*hubp_clk_cntl)(struct hubp *hubp, bool enable);
166 	void (*hubp_vtg_sel)(struct hubp *hubp, uint32_t otg_inst);
167 	void (*hubp_read_state)(struct hubp *hubp);
168 	void (*hubp_clear_underflow)(struct hubp *hubp);
169 	void (*hubp_disable_control)(struct hubp *hubp, bool disable_hubp);
170 	unsigned int (*hubp_get_underflow_status)(struct hubp *hubp);
171 	void (*hubp_init)(struct hubp *hubp);
172 
173 	void (*dmdata_set_attributes)(
174 			struct hubp *hubp,
175 			const struct dc_dmdata_attributes *attr);
176 
177 	void (*dmdata_load)(
178 			struct hubp *hubp,
179 			uint32_t dmdata_sw_size,
180 			const uint32_t *dmdata_sw_data);
181 	bool (*dmdata_status_done)(struct hubp *hubp);
182 	void (*hubp_enable_tripleBuffer)(
183 		struct hubp *hubp,
184 		bool enable);
185 
186 	bool (*hubp_is_triplebuffer_enabled)(
187 		struct hubp *hubp);
188 
189 	void (*hubp_set_flip_control_surface_gsl)(
190 		struct hubp *hubp,
191 		bool enable);
192 
193 	void (*validate_dml_output)(
194 			struct hubp *hubp,
195 			struct dc_context *ctx,
196 			struct _vcs_dpi_display_rq_regs_st *dml_rq_regs,
197 			struct _vcs_dpi_display_dlg_regs_st *dml_dlg_attr,
198 			struct _vcs_dpi_display_ttu_regs_st *dml_ttu_attr);
199 	void (*set_unbounded_requesting)(
200 		struct hubp *hubp,
201 		bool enable);
202 	bool (*hubp_in_blank)(struct hubp *hubp);
203 	void (*hubp_soft_reset)(struct hubp *hubp, bool reset);
204 
205 	void (*hubp_update_force_pstate_disallow)(struct hubp *hubp, bool allow);
206 	void (*hubp_update_mall_sel)(struct hubp *hubp, uint32_t mall_sel, bool c_cursor);
207 	void (*hubp_prepare_subvp_buffering)(struct hubp *hubp, bool enable);
208 
209 	void (*hubp_set_flip_int)(struct hubp *hubp);
210 
211 	void (*program_extended_blank)(struct hubp *hubp,
212 			unsigned int min_dst_y_next_start_optimized);
213 
214 	void (*hubp_wait_pipe_read_start)(struct hubp *hubp);
215 };
216 
217 #endif
218