xref: /linux/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h (revision face6a3615a649456eb4549f6d474221d877d604)
1 /*
2  * Copyright 2012-15 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 
27 #ifndef __DAL_DPP_H__
28 #define __DAL_DPP_H__
29 
30 /**
31  * DOC: overview
32  *
33  * The DPP (Display Pipe and Plane) block is the unified display data
34  * processing engine in DCN for processing graphic or video data on per DPP
35  * rectangle base. This rectangle can be a part of SLS (Single Large Surface),
36  * or a layer to be blended with other DPP, or a rectangle associated with a
37  * display tile.
38  *
39  * It provides various functions including:
40  * - graphic color keyer
41  * - graphic cursor compositing
42  * - graphic or video image source to destination scaling
43  * - image sharping
44  * - video format conversion from 4:2:0 or 4:2:2 to 4:4:4
45  * - Color Space Conversion
46  * - Host LUT gamma adjustment
47  * - Color Gamut Remap
48  * - brightness and contrast adjustment.
49  *
50  * DPP pipe consists of Converter and Cursor (CNVC), Scaler (DSCL), Color
51  * Management (CM), Output Buffer (OBUF) and Digital Bypass (DPB) module
52  * connected in a video/graphics pipeline.
53  */
54 
55 #include "transform.h"
56 #include "cursor_reg_cache.h"
57 
58 union defer_reg_writes {
59 	struct {
60 		bool disable_blnd_lut:1;
61 		bool disable_3dlut:1;
62 		bool disable_shaper:1;
63 		bool disable_gamcor:1;
64 		bool disable_dscl:1;
65 	} bits;
66 	uint32_t raw;
67 };
68 struct dpp {
69 	const struct dpp_funcs *funcs;
70 	struct dc_context *ctx;
71 	/**
72 	 * @inst:
73 	 *
74 	 * inst stands for "instance," and it is an id number that references a
75 	 * specific DPP.
76 	 */
77 	int inst;
78 	struct dpp_caps *caps;
79 	struct pwl_params regamma_params;
80 	struct pwl_params degamma_params;
81 	struct dpp_cursor_attributes cur_attr;
82 	union defer_reg_writes deferred_reg_writes;
83 
84 	struct pwl_params shaper_params;
85 	bool cm_bypass_mode;
86 	bool cursor_offload;
87 
88 	struct cursor_position_cache_dpp  pos;
89 	struct cursor_attribute_cache_dpp att;
90 };
91 
92 struct dpp_input_csc_matrix {
93 	enum dc_color_space color_space;
94 	uint16_t regval[12];
95 };
96 
97 static const struct dpp_input_csc_matrix __maybe_unused dpp_input_csc_matrix[] = {
98 	{ COLOR_SPACE_SRGB,
99 		{ 0x2000, 0,      0,      0,
100 		  0,      0x2000, 0,      0,
101 		  0,      0,      0x2000, 0 } },
102 	{ COLOR_SPACE_SRGB_LIMITED,
103 		{ 0x2000, 0,      0,      0,
104 		  0,      0x2000, 0,      0,
105 		  0,      0,      0x2000, 0 } },
106 	{ COLOR_SPACE_YCBCR601,
107 		{ 0x2cdd, 0x2000, 0,      0xe991,
108 		  0xe926, 0x2000, 0xf4fd, 0x10ef,
109 		  0,      0x2000, 0x38b4, 0xe3a6 } },
110 	{ COLOR_SPACE_YCBCR601_LIMITED,
111 		{ 0x3353, 0x2568, 0,      0xe400,
112 		  0xe5dc, 0x2568, 0xf367, 0x1108,
113 		  0,      0x2568, 0x40de, 0xdd3a } },
114 	{ COLOR_SPACE_YCBCR709,
115 		{ 0x3265, 0x2000, 0,      0xe6ce,
116 		  0xf105, 0x2000, 0xfa01, 0xa7d,
117 		  0,      0x2000, 0x3b61, 0xe24f } },
118 	{ COLOR_SPACE_YCBCR709_LIMITED,
119 		{ 0x39a6, 0x2568, 0,      0xe0d6,
120 		  0xeedd, 0x2568, 0xf925, 0x9a8,
121 		  0,      0x2568, 0x43ee, 0xdbb2 } },
122 	{ COLOR_SPACE_2020_YCBCR_FULL,
123 		{ 0x2F30, 0x2000, 0,      0xE869,
124 		  0xEDB7, 0x2000, 0xFABC, 0xBC6,
125 		  0,      0x2000, 0x3C34, 0xE1E6 } },
126 	{ COLOR_SPACE_2020_YCBCR_LIMITED,
127 		{ 0x35B9, 0x2543, 0,      0xE2B2,
128 		  0xEB2F, 0x2543, 0xFA01, 0x0B1F,
129 		  0,      0x2543, 0x4489, 0xDB42 } },
130 	{ COLOR_SPACE_2020_RGB_LIMITEDRANGE,
131 		{ 0x35E0, 0x255F, 0,      0xE2B3,
132 		  0xEB20, 0x255F, 0xF9FD, 0xB1E,
133 		  0,      0x255F, 0x44BD, 0xDB43 } }
134 };
135 
136 struct dpp_grph_csc_adjustment {
137 	struct fixed31_32 temperature_matrix[CSC_TEMPERATURE_MATRIX_SIZE];
138 	enum graphics_gamut_adjust_type gamut_adjust_type;
139 };
140 
141 struct cnv_color_keyer_params {
142 	int color_keyer_en;
143 	int color_keyer_mode;
144 	int color_keyer_alpha_low;
145 	int color_keyer_alpha_high;
146 	int color_keyer_red_low;
147 	int color_keyer_red_high;
148 	int color_keyer_green_low;
149 	int color_keyer_green_high;
150 	int color_keyer_blue_low;
151 	int color_keyer_blue_high;
152 };
153 
154 /**
155  * struct cnv_alpha_2bit_lut - Set the 8bit alpha values based on the 2 bit alpha
156  */
157 struct cnv_alpha_2bit_lut {
158 	/**
159 	* @lut0: ALPHA_2BIT_LUT. ALPHA_2BIT_LUT0. Default: 0b00000000
160 	*/
161 	int lut0;
162 
163 	/**
164 	 * @lut1: ALPHA_2BIT_LUT. ALPHA_2BIT_LUT1. Default: 0b01010101
165 	 */
166 	int lut1;
167 
168 	/**
169 	 * @lut2: ALPHA_2BIT_LUT. ALPHA_2BIT_LUT2. Default: 0b10101010
170 	 */
171 	int lut2;
172 
173 	/**
174 	 * @lut3: ALPHA_2BIT_LUT. ALPHA_2BIT_LUT3. Default: 0b11111111
175 	 */
176 	int lut3;
177 };
178 
179 struct dcn_dpp_state {
180 	uint32_t is_enabled;
181 	uint32_t igam_lut_mode;
182 	uint32_t igam_input_format;
183 	uint32_t dgam_lut_mode;
184 	uint32_t rgam_lut_mode;
185 	// gamut_remap data for dcn10_get_cm_states()
186 	uint32_t gamut_remap_mode;
187 	uint32_t gamut_remap_c11_c12;
188 	uint32_t gamut_remap_c13_c14;
189 	uint32_t gamut_remap_c21_c22;
190 	uint32_t gamut_remap_c23_c24;
191 	uint32_t gamut_remap_c31_c32;
192 	uint32_t gamut_remap_c33_c34;
193 	// gamut_remap data for dcn*_log_color_state()
194 	struct dpp_grph_csc_adjustment gamut_remap;
195 	uint32_t shaper_lut_mode;
196 	uint32_t lut3d_mode;
197 	uint32_t lut3d_bit_depth;
198 	uint32_t lut3d_size;
199 	uint32_t blnd_lut_mode;
200 	uint32_t pre_dgam_mode;
201 	uint32_t pre_dgam_select;
202 	uint32_t gamcor_mode;
203 };
204 
205 struct dcn_dpp_reg_state {
206 	uint32_t recout_start;
207 	uint32_t recout_size;
208 	uint32_t scl_horz_filter_scale_ratio;
209 	uint32_t scl_vert_filter_scale_ratio;
210 	uint32_t scl_mode;
211 	uint32_t cm_control;
212 	uint32_t dpp_control;
213 	uint32_t dscl_control;
214 	uint32_t obuf_control;
215 	uint32_t mpc_size;
216 };
217 
218 struct CM_bias_params {
219 	uint32_t cm_bias_cr_r;
220 	uint32_t cm_bias_y_g;
221 	uint32_t cm_bias_cb_b;
222 	uint32_t cm_bias_format;
223 };
224 
225 struct dpp_funcs {
226 	bool (*dpp_program_gamcor_lut)(
227 		struct dpp *dpp_base, const struct pwl_params *params);
228 
229 	void (*dpp_set_pre_degam)(struct dpp *dpp_base,
230 			enum dc_transfer_func_predefined tr);
231 
232 	void (*dpp_program_cm_dealpha)(struct dpp *dpp_base,
233 		uint32_t enable, uint32_t additive_blending);
234 
235 	void (*dpp_program_cm_bias)(
236 		struct dpp *dpp_base,
237 		struct CM_bias_params *bias_params);
238 
239 	void (*dpp_read_state)(struct dpp *dpp, struct dcn_dpp_state *s);
240 
241 	void (*dpp_read_reg_state)(struct dpp *dpp, struct dcn_dpp_reg_state *dpp_reg_state);
242 
243 	void (*dpp_reset)(struct dpp *dpp);
244 
245 	void (*dpp_set_scaler)(struct dpp *dpp,
246 			const struct scaler_data *scl_data);
247 
248 	void (*dpp_set_pixel_storage_depth)(
249 			struct dpp *dpp,
250 			enum lb_pixel_depth depth,
251 			const struct bit_depth_reduction_params *bit_depth_params);
252 
253 	bool (*dpp_get_optimal_number_of_taps)(
254 			struct dpp *dpp,
255 			struct scaler_data *scl_data,
256 			const struct scaling_taps *in_taps);
257 
258 	void (*dpp_set_gamut_remap)(
259 			struct dpp *dpp,
260 			const struct dpp_grph_csc_adjustment *adjust);
261 
262 	void (*dpp_set_csc_default)(
263 		struct dpp *dpp,
264 		enum dc_color_space colorspace);
265 
266 	void (*dpp_set_csc_adjustment)(
267 		struct dpp *dpp,
268 		const uint16_t *regval);
269 
270 	void (*dpp_power_on_regamma_lut)(
271 		struct dpp *dpp,
272 		bool power_on);
273 
274 	void (*dpp_program_regamma_lut)(
275 			struct dpp *dpp,
276 			const struct pwl_result_data *rgb,
277 			uint32_t num);
278 
279 	void (*dpp_configure_regamma_lut)(
280 			struct dpp *dpp,
281 			bool is_ram_a);
282 
283 	void (*dpp_program_regamma_lutb_settings)(
284 			struct dpp *dpp,
285 			const struct pwl_params *params);
286 
287 	void (*dpp_program_regamma_luta_settings)(
288 			struct dpp *dpp,
289 			const struct pwl_params *params);
290 
291 	void (*dpp_program_regamma_pwl)(
292 		struct dpp *dpp,
293 		const struct pwl_params *params,
294 		enum opp_regamma mode);
295 
296 	void (*dpp_program_bias_and_scale)(
297 			struct dpp *dpp,
298 			struct dc_bias_and_scale *params);
299 
300 	void (*dpp_set_degamma)(
301 			struct dpp *dpp_base,
302 			enum ipp_degamma_mode mode);
303 
304 	void (*dpp_program_input_lut)(
305 			struct dpp *dpp_base,
306 			const struct dc_gamma *gamma);
307 
308 	void (*dpp_program_degamma_pwl)(struct dpp *dpp_base,
309 									 const struct pwl_params *params);
310 
311 	void (*dpp_setup)(
312 			struct dpp *dpp_base,
313 			enum surface_pixel_format format,
314 			enum expansion_mode mode,
315 			struct dc_csc_transform input_csc_color_matrix,
316 			enum dc_color_space input_color_space,
317 			struct cnv_alpha_2bit_lut *alpha_2bit_lut);
318 
319 	void (*dpp_full_bypass)(struct dpp *dpp_base);
320 
321 	void (*set_cursor_attributes)(
322 			struct dpp *dpp_base,
323 			struct dc_cursor_attributes *cursor_attributes);
324 
325 	void (*set_cursor_position)(
326 			struct dpp *dpp_base,
327 			const struct dc_cursor_position *pos,
328 			const struct dc_cursor_mi_param *param,
329 			uint32_t width,
330 			uint32_t height
331 			);
332 
333 	void (*dpp_set_hdr_multiplier)(
334 			struct dpp *dpp_base,
335 			uint32_t multiplier);
336 
337 	void (*set_optional_cursor_attributes)(
338 			struct dpp *dpp_base,
339 			struct dpp_cursor_attributes *attr);
340 
341 	void (*dpp_dppclk_control)(
342 			struct dpp *dpp_base,
343 			bool dppclk_div,
344 			bool enable);
345 
346 	void (*dpp_deferred_update)(
347 			struct dpp *dpp);
348 	bool (*dpp_program_blnd_lut)(
349 			struct dpp *dpp,
350 			const struct pwl_params *params);
351 	bool (*dpp_program_shaper_lut)(
352 			struct dpp *dpp,
353 			const struct pwl_params *params);
354 	bool (*dpp_program_3dlut)(
355 			struct dpp *dpp,
356 			const struct tetrahedral_params *params);
357 	void (*dpp_cnv_set_alpha_keyer)(
358 			struct dpp *dpp_base,
359 			struct cnv_color_keyer_params *color_keyer);
360 
361 	void (*dpp_get_gamut_remap)(struct dpp *dpp_base,
362 				    struct dpp_grph_csc_adjustment *adjust);
363 	void (*set_cursor_matrix)(
364 		struct dpp *dpp_base,
365 		enum dc_color_space color_space,
366 		struct dc_csc_transform cursor_csc_color_matrix);
367 
368 	void (*dpp_force_disable_cursor)(struct dpp *dpp_base);
369 
370 };
371 
372 
373 
374 #endif
375