xref: /linux/drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h (revision b7019ac550eb3916f34d79db583e9b7ea2524afa)
1 /*
2  * Copyright 2012-15 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #ifndef __DAL_DCHUBBUB_H__
27 #define __DAL_DCHUBBUB_H__
28 
29 
30 enum dcc_control {
31 	dcc_control__256_256_xxx,
32 	dcc_control__128_128_xxx,
33 	dcc_control__256_64_64,
34 };
35 
36 enum segment_order {
37 	segment_order__na,
38 	segment_order__contiguous,
39 	segment_order__non_contiguous,
40 };
41 
42 struct dcn_hubbub_wm_set {
43 	uint32_t wm_set;
44 	uint32_t data_urgent;
45 	uint32_t pte_meta_urgent;
46 	uint32_t sr_enter;
47 	uint32_t sr_exit;
48 	uint32_t dram_clk_chanage;
49 };
50 
51 struct dcn_hubbub_wm {
52 	struct dcn_hubbub_wm_set sets[4];
53 };
54 
55 #ifdef CONFIG_DRM_AMD_DC_DCN2_0
56 enum dcn_hubbub_page_table_depth {
57 	DCN_PAGE_TABLE_DEPTH_1_LEVEL,
58 	DCN_PAGE_TABLE_DEPTH_2_LEVEL,
59 	DCN_PAGE_TABLE_DEPTH_3_LEVEL,
60 	DCN_PAGE_TABLE_DEPTH_4_LEVEL
61 };
62 
63 enum dcn_hubbub_page_table_block_size {
64 	DCN_PAGE_TABLE_BLOCK_SIZE_4KB,
65 	DCN_PAGE_TABLE_BLOCK_SIZE_64KB
66 };
67 
68 struct dcn_hubbub_phys_addr_config {
69 	struct {
70 		uint64_t fb_top;
71 		uint64_t fb_offset;
72 		uint64_t fb_base;
73 		uint64_t agp_top;
74 		uint64_t agp_bot;
75 		uint64_t agp_base;
76 	} system_aperture;
77 
78 	struct {
79 		uint64_t page_table_start_addr;
80 		uint64_t page_table_end_addr;
81 		uint64_t page_table_base_addr;
82 	} gart_config;
83 };
84 
85 struct dcn_hubbub_virt_addr_config {
86 	uint64_t				page_table_start_addr;
87 	uint64_t				page_table_end_addr;
88 	enum dcn_hubbub_page_table_block_size	page_table_block_size;
89 	enum dcn_hubbub_page_table_depth	page_table_depth;
90 	uint64_t				page_table_base_addr;
91 };
92 
93 struct hubbub_addr_config {
94 	struct dcn_hubbub_phys_addr_config pa_config;
95 	struct dcn_hubbub_virt_addr_config va_config;
96 	struct {
97 		uint64_t aperture_check_fault;
98 		uint64_t generic_fault;
99 	} default_addrs;
100 };
101 
102 #endif
103 struct hubbub_funcs {
104 	void (*update_dchub)(
105 			struct hubbub *hubbub,
106 			struct dchub_init_data *dh_data);
107 
108 #ifdef CONFIG_DRM_AMD_DC_DCN2_0
109 	int (*init_dchub_sys_ctx)(
110 			struct hubbub *hubbub,
111 			struct dcn_hubbub_phys_addr_config *pa_config);
112 	void (*init_vm_ctx)(
113 			struct hubbub *hubbub,
114 			struct dcn_hubbub_virt_addr_config *va_config,
115 			int vmid);
116 
117 #endif
118 	bool (*get_dcc_compression_cap)(struct hubbub *hubbub,
119 			const struct dc_dcc_surface_param *input,
120 			struct dc_surface_dcc_cap *output);
121 
122 	bool (*dcc_support_swizzle)(
123 			enum swizzle_mode_values swizzle,
124 			unsigned int bytes_per_element,
125 			enum segment_order *segment_order_horz,
126 			enum segment_order *segment_order_vert);
127 
128 	bool (*dcc_support_pixel_format)(
129 			enum surface_pixel_format format,
130 			unsigned int *bytes_per_element);
131 
132 	void (*wm_read_state)(struct hubbub *hubbub,
133 			struct dcn_hubbub_wm *wm);
134 
135 	void (*get_dchub_ref_freq)(struct hubbub *hubbub,
136 			unsigned int dccg_ref_freq_inKhz,
137 			unsigned int *dchub_ref_freq_inKhz);
138 
139 	void (*program_watermarks)(
140 			struct hubbub *hubbub,
141 			struct dcn_watermark_set *watermarks,
142 			unsigned int refclk_mhz,
143 			bool safe_to_lower);
144 };
145 
146 struct hubbub {
147 	const struct hubbub_funcs *funcs;
148 	struct dc_context *ctx;
149 };
150 
151 #endif
152