1 /* 2 * Copyright 2012-15 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef __DAL_DCHUBBUB_H__ 27 #define __DAL_DCHUBBUB_H__ 28 29 /** 30 * DOC: overview 31 * 32 * There is only one common DCHUBBUB. It contains the common request and return 33 * blocks for the Data Fabric Interface that are not clock/power gated. 34 */ 35 36 enum dcc_control { 37 dcc_control__256_256_xxx, 38 dcc_control__128_128_xxx, 39 dcc_control__256_64_64, 40 dcc_control__256_128_128, 41 }; 42 43 enum segment_order { 44 segment_order__na, 45 segment_order__contiguous, 46 segment_order__non_contiguous, 47 }; 48 49 struct dcn_hubbub_wm_set { 50 uint32_t wm_set; 51 uint32_t data_urgent; 52 uint32_t pte_meta_urgent; 53 uint32_t sr_enter; 54 uint32_t sr_exit; 55 uint32_t dram_clk_change; 56 uint32_t usr_retrain; 57 uint32_t fclk_pstate_change; 58 uint32_t sr_enter_exit_Z8; 59 uint32_t sr_enter_Z8; 60 }; 61 62 struct dcn_hubbub_wm { 63 struct dcn_hubbub_wm_set sets[4]; 64 }; 65 66 enum dcn_hubbub_page_table_depth { 67 DCN_PAGE_TABLE_DEPTH_1_LEVEL, 68 DCN_PAGE_TABLE_DEPTH_2_LEVEL, 69 DCN_PAGE_TABLE_DEPTH_3_LEVEL, 70 DCN_PAGE_TABLE_DEPTH_4_LEVEL 71 }; 72 73 enum dcn_hubbub_page_table_block_size { 74 DCN_PAGE_TABLE_BLOCK_SIZE_4KB = 0, 75 DCN_PAGE_TABLE_BLOCK_SIZE_64KB = 4, 76 DCN_PAGE_TABLE_BLOCK_SIZE_32KB = 3 77 }; 78 79 struct dcn_hubbub_phys_addr_config { 80 struct { 81 uint64_t fb_top; 82 uint64_t fb_offset; 83 uint64_t fb_base; 84 uint64_t agp_top; 85 uint64_t agp_bot; 86 uint64_t agp_base; 87 } system_aperture; 88 89 struct { 90 uint64_t page_table_start_addr; 91 uint64_t page_table_end_addr; 92 uint64_t page_table_base_addr; 93 } gart_config; 94 95 uint64_t page_table_default_page_addr; 96 }; 97 98 struct dcn_hubbub_virt_addr_config { 99 uint64_t page_table_start_addr; 100 uint64_t page_table_end_addr; 101 enum dcn_hubbub_page_table_block_size page_table_block_size; 102 enum dcn_hubbub_page_table_depth page_table_depth; 103 uint64_t page_table_base_addr; 104 }; 105 106 struct hubbub_addr_config { 107 struct dcn_hubbub_phys_addr_config pa_config; 108 struct dcn_hubbub_virt_addr_config va_config; 109 struct { 110 uint64_t aperture_check_fault; 111 uint64_t generic_fault; 112 } default_addrs; 113 }; 114 115 struct dcn_hubbub_state { 116 uint32_t vm_fault_addr_msb; 117 uint32_t vm_fault_addr_lsb; 118 uint32_t vm_error_status; 119 uint32_t vm_error_vmid; 120 uint32_t vm_error_pipe; 121 uint32_t vm_error_mode; 122 uint32_t test_debug_data; 123 uint32_t watermark_change_cntl; 124 uint32_t dram_state_cntl; 125 }; 126 127 struct hubbub_funcs { 128 void (*update_dchub)( 129 struct hubbub *hubbub, 130 struct dchub_init_data *dh_data); 131 132 int (*init_dchub_sys_ctx)( 133 struct hubbub *hubbub, 134 struct dcn_hubbub_phys_addr_config *pa_config); 135 void (*init_vm_ctx)( 136 struct hubbub *hubbub, 137 struct dcn_hubbub_virt_addr_config *va_config, 138 int vmid); 139 140 bool (*get_dcc_compression_cap)(struct hubbub *hubbub, 141 const struct dc_dcc_surface_param *input, 142 struct dc_surface_dcc_cap *output); 143 144 bool (*dcc_support_swizzle)( 145 enum swizzle_mode_values swizzle, 146 unsigned int bytes_per_element, 147 enum segment_order *segment_order_horz, 148 enum segment_order *segment_order_vert); 149 150 bool (*dcc_support_pixel_format)( 151 enum surface_pixel_format format, 152 unsigned int *bytes_per_element); 153 154 void (*wm_read_state)(struct hubbub *hubbub, 155 struct dcn_hubbub_wm *wm); 156 157 void (*get_dchub_ref_freq)(struct hubbub *hubbub, 158 unsigned int dccg_ref_freq_inKhz, 159 unsigned int *dchub_ref_freq_inKhz); 160 161 bool (*program_watermarks)( 162 struct hubbub *hubbub, 163 union dcn_watermark_set *watermarks, 164 unsigned int refclk_mhz, 165 bool safe_to_lower); 166 167 bool (*is_allow_self_refresh_enabled)(struct hubbub *hubbub); 168 void (*allow_self_refresh_control)(struct hubbub *hubbub, bool allow); 169 170 bool (*verify_allow_pstate_change_high)(struct hubbub *hubbub); 171 172 void (*apply_DEDCN21_147_wa)(struct hubbub *hubbub); 173 174 void (*force_wm_propagate_to_pipes)(struct hubbub *hubbub); 175 176 void (*hubbub_read_state)(struct hubbub *hubbub, struct dcn_hubbub_state *hubbub_state); 177 178 void (*force_pstate_change_control)(struct hubbub *hubbub, bool force, bool allow); 179 180 void (*init_watermarks)(struct hubbub *hubbub); 181 182 /** 183 * @program_det_size: 184 * 185 * DE-Tile buffers (DET) is a memory that is used to convert the tiled 186 * data into linear, which the rest of the display can use to generate 187 * the graphics output. One of the main features of this component is 188 * that each pipe has a configurable DET buffer which means that when a 189 * pipe is not enabled, the device can assign the memory to other 190 * enabled pipes to try to be more efficient. 191 * 192 * DET logic is handled by dchubbub. Some ASICs provide a feature named 193 * Configurable Return Buffer (CRB) segments which can be allocated to 194 * compressed or detiled buffers. 195 */ 196 void (*program_det_size)(struct hubbub *hubbub, int hubp_inst, unsigned det_buffer_size_in_kbyte); 197 void (*wait_for_det_apply)(struct hubbub *hubbub, int hubp_inst); 198 void (*program_compbuf_size)(struct hubbub *hubbub, unsigned compbuf_size_kb, bool safe_to_increase); 199 void (*init_crb)(struct hubbub *hubbub); 200 void (*force_usr_retraining_allow)(struct hubbub *hubbub, bool allow); 201 void (*set_request_limit)(struct hubbub *hubbub, int memory_channel_count, int words_per_channel); 202 void (*dchubbub_init)(struct hubbub *hubbub); 203 void (*get_mall_en)(struct hubbub *hubbub, unsigned int *mall_in_use); 204 }; 205 206 struct hubbub { 207 const struct hubbub_funcs *funcs; 208 struct dc_context *ctx; 209 bool riommu_active; 210 }; 211 212 #endif 213