1 /* 2 * Copyright 2015-2026 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef __DC_HW_SEQUENCER_H__ 27 #define __DC_HW_SEQUENCER_H__ 28 #include "dc_types.h" 29 #include "inc/clock_source.h" 30 #include "inc/hw/timing_generator.h" 31 #include "inc/hw/opp.h" 32 #include "inc/hw/link_encoder.h" 33 #include "inc/core_status.h" 34 #include "inc/hw/hw_shared.h" 35 #include "dsc/dsc.h" 36 #include "link_service_types.h" 37 38 struct pipe_ctx; 39 struct dc_state; 40 struct dc_stream_status; 41 struct dc_writeback_info; 42 struct dchub_init_data; 43 struct dc_static_screen_params; 44 struct resource_pool; 45 struct dc_phy_addr_space_config; 46 struct dc_virtual_addr_space_config; 47 struct dpp; 48 struct dce_hwseq; 49 struct link_resource; 50 struct dc_dmub_cmd; 51 struct pg_block_update; 52 struct drr_params; 53 struct dc_underflow_debug_data; 54 struct dsc_optc_config; 55 struct vm_system_aperture_param; 56 struct dc_measured_memory_qos; 57 struct stream_encoder; 58 struct hpo_dp_stream_encoder; 59 struct hpo_frl_stream_encoder; 60 struct link_training_settings; 61 struct dc_link; 62 struct dc_crtc_timing; 63 struct subvp_pipe_control_lock_fast_params { 64 struct dc *dc; 65 bool lock; 66 bool subvp_immediate_flip; 67 }; 68 69 struct pipe_control_lock_params { 70 struct dc *dc; 71 struct pipe_ctx *pipe_ctx; 72 bool lock; 73 }; 74 75 struct set_flip_control_gsl_params { 76 struct hubp *hubp; 77 bool flip_immediate; 78 }; 79 80 struct program_triplebuffer_params { 81 const struct dc *dc; 82 struct pipe_ctx *pipe_ctx; 83 bool enableTripleBuffer; 84 }; 85 86 struct update_plane_addr_params { 87 struct dc *dc; 88 struct pipe_ctx *pipe_ctx; 89 }; 90 91 struct set_input_transfer_func_params { 92 struct dc *dc; 93 struct pipe_ctx *pipe_ctx; 94 struct dc_plane_state *plane_state; 95 }; 96 97 struct program_gamut_remap_params { 98 struct transform *xfm; 99 struct dpp *dpp; 100 struct mpc *mpc; 101 int mpcc_id; 102 const struct dc_stream_state *stream; 103 const struct dc_plane_state *plane; 104 bool is_top_pipe; 105 }; 106 107 struct hubp_enable_3dlut_fl_params { 108 struct hubp *hubp; 109 }; 110 111 struct tg_setup_vertical_interrupt0_params { 112 struct timing_generator *tg; 113 uint32_t start_line; 114 uint32_t end_line; 115 }; 116 117 struct update_info_frame_params { 118 struct dc *dc; 119 struct pipe_ctx *pipe_ctx; 120 }; 121 122 struct program_manual_trigger_params { 123 struct pipe_ctx *pipe_ctx; 124 }; 125 126 struct send_dmcub_cmd_params { 127 struct dc_context *ctx; 128 union dmub_rb_cmd *cmd; 129 enum dm_dmub_wait_type wait_type; 130 }; 131 132 struct setup_dpp_params { 133 struct pipe_ctx *pipe_ctx; 134 }; 135 136 struct program_bias_and_scale_params { 137 struct pipe_ctx *pipe_ctx; 138 }; 139 140 struct set_output_transfer_func_params { 141 struct transform *xfm; 142 struct dpp *dpp; 143 struct mpc *mpc; 144 int mpcc_id; 145 bool is_top_pipe; 146 const struct dc_stream_state *stream; 147 }; 148 149 struct update_visual_confirm_params { 150 struct dc *dc; 151 struct pipe_ctx *pipe_ctx; 152 int mpcc_id; 153 }; 154 155 struct power_on_mpc_mem_pwr_params { 156 struct mpc *mpc; 157 int mpcc_id; 158 bool power_on; 159 }; 160 161 struct set_output_csc_params { 162 struct mpc *mpc; 163 int opp_id; 164 const uint16_t *regval; 165 enum mpc_output_csc_mode ocsc_mode; 166 }; 167 168 struct set_ocsc_default_params { 169 struct mpc *mpc; 170 int opp_id; 171 enum dc_color_space color_space; 172 enum mpc_output_csc_mode ocsc_mode; 173 }; 174 175 struct subvp_save_surf_addr { 176 struct dc_dmub_srv *dc_dmub_srv; 177 const struct dc_plane_address *addr; 178 uint8_t subvp_index; 179 }; 180 181 struct wait_for_dcc_meta_propagation_params { 182 const struct dc *dc; 183 const struct pipe_ctx *top_pipe_to_program; 184 }; 185 186 struct dmub_hw_control_lock_fast_params { 187 struct dc *dc; 188 bool is_required; 189 bool lock; 190 }; 191 192 struct program_surface_config_params { 193 struct hubp *hubp; 194 enum surface_pixel_format format; 195 struct dc_tiling_info *tiling_info; 196 struct plane_size plane_size; 197 enum dc_rotation_angle rotation; 198 struct dc_plane_dcc_param *dcc; 199 bool horizontal_mirror; 200 int compat_level; 201 }; 202 203 struct program_mcache_id_and_split_coordinate { 204 struct hubp *hubp; 205 struct dml2_hubp_pipe_mcache_regs *mcache_regs; 206 }; 207 208 struct control_cm_hist_params { 209 struct dpp *dpp; 210 struct cm_hist_control cm_hist_control; 211 enum dc_color_space color_space; 212 }; 213 214 struct program_cursor_update_now_params { 215 struct dc *dc; 216 struct pipe_ctx *pipe_ctx; 217 }; 218 219 struct hubp_wait_pipe_read_start_params { 220 struct hubp *hubp; 221 }; 222 223 struct apply_update_flags_for_phantom_params { 224 struct pipe_ctx *pipe_ctx; 225 }; 226 227 struct update_phantom_vp_position_params { 228 struct dc *dc; 229 struct pipe_ctx *pipe_ctx; 230 struct dc_state *context; 231 }; 232 233 struct set_odm_combine_params { 234 struct timing_generator *tg; 235 int opp_inst[MAX_PIPES]; 236 int opp_head_count; 237 int odm_slice_width; 238 int last_odm_slice_width; 239 }; 240 241 struct set_odm_bypass_params { 242 struct timing_generator *tg; 243 const struct dc_crtc_timing *timing; 244 }; 245 246 struct opp_pipe_clock_control_params { 247 struct output_pixel_processor *opp; 248 bool enable; 249 }; 250 251 struct opp_program_left_edge_extra_pixel_params { 252 struct output_pixel_processor *opp; 253 enum dc_pixel_encoding pixel_encoding; 254 bool is_otg_master; 255 }; 256 257 struct dccg_set_dto_dscclk_params { 258 struct dccg *dccg; 259 int inst; 260 int num_slices_h; 261 }; 262 263 struct dsc_set_config_params { 264 struct display_stream_compressor *dsc; 265 struct dsc_config *dsc_cfg; 266 struct dsc_optc_config *dsc_optc_cfg; 267 }; 268 269 struct dsc_enable_params { 270 struct display_stream_compressor *dsc; 271 int opp_inst; 272 }; 273 274 struct tg_set_dsc_config_params { 275 struct timing_generator *tg; 276 struct dsc_optc_config *dsc_optc_cfg; 277 bool enable; 278 }; 279 280 struct dsc_disconnect_params { 281 struct display_stream_compressor *dsc; 282 }; 283 284 struct dsc_read_state_params { 285 struct display_stream_compressor *dsc; 286 struct dcn_dsc_state *dsc_state; 287 }; 288 289 struct dsc_calculate_and_set_config_params { 290 struct pipe_ctx *pipe_ctx; 291 struct dsc_optc_config dsc_optc_cfg; 292 bool enable; 293 int opp_cnt; 294 }; 295 296 struct dsc_enable_with_opp_params { 297 struct pipe_ctx *pipe_ctx; 298 }; 299 300 struct program_tg_params { 301 struct dc *dc; 302 struct pipe_ctx *pipe_ctx; 303 struct dc_state *context; 304 }; 305 306 struct tg_program_global_sync_params { 307 struct timing_generator *tg; 308 int vready_offset; 309 unsigned int vstartup_lines; 310 unsigned int vupdate_offset_pixels; 311 unsigned int vupdate_vupdate_width_pixels; 312 unsigned int pstate_keepout_start_lines; 313 }; 314 315 struct tg_wait_for_state_params { 316 struct timing_generator *tg; 317 enum crtc_state state; 318 }; 319 320 struct tg_set_vtg_params_params { 321 struct timing_generator *tg; 322 struct dc_crtc_timing *timing; 323 bool program_fp2; 324 }; 325 326 struct tg_set_gsl_params { 327 struct timing_generator *tg; 328 struct gsl_params gsl; 329 }; 330 331 struct tg_set_gsl_source_select_params { 332 struct timing_generator *tg; 333 int group_idx; 334 uint32_t gsl_ready_signal; 335 }; 336 337 struct setup_vupdate_interrupt_params { 338 struct dc *dc; 339 struct pipe_ctx *pipe_ctx; 340 }; 341 342 struct tg_setup_vertical_interrupt2_params { 343 struct timing_generator *tg; 344 int start_line; 345 }; 346 347 struct dpp_set_hdr_multiplier_params { 348 struct dpp *dpp; 349 uint32_t hw_mult; 350 }; 351 352 struct program_det_size_params { 353 struct hubbub *hubbub; 354 unsigned int hubp_inst; 355 unsigned int det_buffer_size_kb; 356 }; 357 358 struct program_det_segments_params { 359 struct hubbub *hubbub; 360 unsigned int hubp_inst; 361 unsigned int det_size; 362 }; 363 364 struct update_dchubp_dpp_params { 365 struct dc *dc; 366 struct pipe_ctx *pipe_ctx; 367 struct dc_state *context; 368 }; 369 370 struct opp_set_dyn_expansion_params { 371 struct output_pixel_processor *opp; 372 enum dc_color_space color_space; 373 enum dc_color_depth color_depth; 374 enum signal_type signal; 375 }; 376 377 struct opp_program_fmt_params { 378 struct output_pixel_processor *opp; 379 struct bit_depth_reduction_params *fmt_bit_depth; 380 struct clamping_and_pixel_encoding_params *clamping; 381 }; 382 383 struct opp_program_bit_depth_reduction_params { 384 struct output_pixel_processor *opp; 385 bool use_default_params; 386 struct pipe_ctx *pipe_ctx; 387 }; 388 389 struct opp_set_disp_pattern_generator_params { 390 struct output_pixel_processor *opp; 391 enum controller_dp_test_pattern test_pattern; 392 enum controller_dp_color_space color_space; 393 enum dc_color_depth color_depth; 394 struct tg_color solid_color; 395 bool use_solid_color; 396 int width; 397 int height; 398 int offset; 399 }; 400 401 struct set_abm_pipe_params { 402 struct dc *dc; 403 struct pipe_ctx *pipe_ctx; 404 }; 405 406 struct set_abm_level_params { 407 struct abm *abm; 408 unsigned int abm_level; 409 }; 410 411 struct set_abm_immediate_disable_params { 412 struct dc *dc; 413 struct pipe_ctx *pipe_ctx; 414 }; 415 416 struct set_disp_pattern_generator_params { 417 struct dc *dc; 418 struct pipe_ctx *pipe_ctx; 419 enum controller_dp_test_pattern test_pattern; 420 enum controller_dp_color_space color_space; 421 enum dc_color_depth color_depth; 422 const struct tg_color *solid_color; 423 int width; 424 int height; 425 int offset; 426 }; 427 428 struct mpc_update_blending_params { 429 struct mpc *mpc; 430 struct mpcc_blnd_cfg blnd_cfg; 431 int mpcc_id; 432 }; 433 434 struct mpc_assert_idle_mpcc_params { 435 struct mpc *mpc; 436 int mpcc_id; 437 }; 438 439 struct mpc_insert_plane_params { 440 struct mpc *mpc; 441 struct mpc_tree *mpc_tree_params; 442 struct mpcc_blnd_cfg blnd_cfg; 443 struct mpcc_sm_cfg *sm_cfg; 444 struct mpcc *insert_above_mpcc; 445 int dpp_id; 446 int mpcc_id; 447 }; 448 449 struct mpc_remove_mpcc_params { 450 struct mpc *mpc; 451 struct mpc_tree *mpc_tree_params; 452 struct mpcc *mpcc_to_remove; 453 }; 454 455 struct opp_set_mpcc_disconnect_pending_params { 456 struct output_pixel_processor *opp; 457 int mpcc_inst; 458 bool pending; 459 }; 460 461 struct dc_set_optimized_required_params { 462 struct dc *dc; 463 bool optimized_required; 464 }; 465 466 struct hubp_disconnect_params { 467 struct hubp *hubp; 468 }; 469 470 struct hubbub_force_pstate_change_control_params { 471 struct hubbub *hubbub; 472 bool enable; 473 bool wait; 474 }; 475 476 struct tg_enable_crtc_params { 477 struct timing_generator *tg; 478 }; 479 480 struct hubp_wait_flip_pending_params { 481 struct hubp *hubp; 482 unsigned int timeout_us; 483 unsigned int polling_interval_us; 484 }; 485 486 struct tg_wait_double_buffer_pending_params { 487 struct timing_generator *tg; 488 unsigned int timeout_us; 489 unsigned int polling_interval_us; 490 }; 491 492 struct update_force_pstate_params { 493 struct dc *dc; 494 struct dc_state *context; 495 }; 496 497 struct hubbub_apply_dedcn21_147_wa_params { 498 struct hubbub *hubbub; 499 }; 500 501 struct hubbub_allow_self_refresh_control_params { 502 struct hubbub *hubbub; 503 bool allow; 504 bool *disallow_self_refresh_applied; 505 }; 506 507 struct tg_get_frame_count_params { 508 struct timing_generator *tg; 509 unsigned int *frame_count; 510 }; 511 512 struct mpc_set_dwb_mux_params { 513 struct mpc *mpc; 514 int dwb_id; 515 int mpcc_id; 516 }; 517 518 struct mpc_disable_dwb_mux_params { 519 struct mpc *mpc; 520 unsigned int dwb_id; 521 }; 522 523 struct mcif_wb_config_buf_params { 524 struct mcif_wb *mcif_wb; 525 struct mcif_buf_params *mcif_buf_params; 526 unsigned int dest_height; 527 }; 528 529 struct mcif_wb_config_arb_params { 530 struct mcif_wb *mcif_wb; 531 struct mcif_arb_params *mcif_arb_params; 532 }; 533 534 struct mcif_wb_enable_params { 535 struct mcif_wb *mcif_wb; 536 }; 537 538 struct mcif_wb_disable_params { 539 struct mcif_wb *mcif_wb; 540 }; 541 542 struct dwbc_enable_params { 543 struct dwbc *dwb; 544 struct dc_dwb_params *dwb_params; 545 }; 546 547 struct dwbc_disable_params { 548 struct dwbc *dwb; 549 }; 550 551 struct dwbc_update_params { 552 struct dwbc *dwb; 553 struct dc_dwb_params *dwb_params; 554 }; 555 556 struct hubp_update_mall_sel_params { 557 struct hubp *hubp; 558 uint32_t mall_sel; 559 bool cache_cursor; 560 }; 561 562 struct hubp_prepare_subvp_buffering_params { 563 struct hubp *hubp; 564 bool enable; 565 }; 566 567 struct hubp_set_blank_en_params { 568 struct hubp *hubp; 569 bool enable; 570 }; 571 572 struct hubp_disable_control_params { 573 struct hubp *hubp; 574 bool disable; 575 }; 576 577 struct hubbub_soft_reset_params { 578 struct hubbub *hubbub; 579 void (*hubbub_soft_reset)(struct hubbub *hubbub, bool reset); 580 bool reset; 581 }; 582 583 struct hubp_clk_cntl_params { 584 struct hubp *hubp; 585 bool enable; 586 }; 587 588 struct hubp_init_params { 589 struct hubp *hubp; 590 }; 591 592 struct hubp_set_vm_system_aperture_settings_params { 593 struct hubp *hubp; 594 //struct vm_system_aperture_param apt; 595 PHYSICAL_ADDRESS_LOC sys_default; 596 PHYSICAL_ADDRESS_LOC sys_low; 597 PHYSICAL_ADDRESS_LOC sys_high; 598 }; 599 600 struct hubp_set_flip_int_params { 601 struct hubp *hubp; 602 }; 603 604 struct dpp_dppclk_control_params { 605 struct dpp *dpp; 606 bool dppclk_div; 607 bool enable; 608 }; 609 610 struct disable_phantom_crtc_params { 611 struct timing_generator *tg; 612 }; 613 614 struct dpp_pg_control_params { 615 struct dce_hwseq *hws; 616 unsigned int dpp_inst; 617 bool power_on; 618 }; 619 620 struct hubp_pg_control_params { 621 struct dce_hwseq *hws; 622 unsigned int hubp_inst; 623 bool power_on; 624 }; 625 626 struct hubp_reset_params { 627 struct hubp *hubp; 628 }; 629 630 struct dpp_reset_params { 631 struct dpp *dpp; 632 }; 633 634 struct dpp_root_clock_control_params { 635 struct dce_hwseq *hws; 636 unsigned int dpp_inst; 637 bool clock_on; 638 }; 639 640 struct dc_ip_request_cntl_params { 641 struct dc *dc; 642 bool enable; 643 }; 644 645 struct dsc_pg_status_params { 646 struct dce_hwseq *hws; 647 int dsc_inst; 648 bool is_ungated; 649 }; 650 651 struct dsc_wait_disconnect_pending_clear_params { 652 struct display_stream_compressor *dsc; 653 bool *is_ungated; 654 }; 655 656 struct dsc_disable_params { 657 struct display_stream_compressor *dsc; 658 bool *is_ungated; 659 }; 660 661 struct dccg_set_ref_dscclk_params { 662 struct dccg *dccg; 663 int dsc_inst; 664 bool *is_ungated; 665 }; 666 667 struct dccg_update_dpp_dto_params { 668 struct dccg *dccg; 669 int dpp_inst; 670 int dppclk_khz; 671 }; 672 673 struct hubp_vtg_sel_params { 674 struct hubp *hubp; 675 uint32_t otg_inst; 676 }; 677 678 struct hubp_setup2_params { 679 struct hubp *hubp; 680 struct dml2_dchub_per_pipe_register_set *hubp_regs; 681 union dml2_global_sync_programming *global_sync; 682 struct dc_crtc_timing *timing; 683 }; 684 685 struct hubp_setup_params { 686 struct hubp *hubp; 687 struct _vcs_dpi_display_dlg_regs_st *dlg_regs; 688 struct _vcs_dpi_display_ttu_regs_st *ttu_regs; 689 struct _vcs_dpi_display_rq_regs_st *rq_regs; 690 struct _vcs_dpi_display_pipe_dest_params_st *pipe_dest; 691 }; 692 693 struct hubp_set_unbounded_requesting_params { 694 struct hubp *hubp; 695 bool unbounded_req; 696 }; 697 698 struct hubp_setup_interdependent2_params { 699 struct hubp *hubp; 700 struct dml2_dchub_per_pipe_register_set *hubp_regs; 701 }; 702 703 struct hubp_setup_interdependent_params { 704 struct hubp *hubp; 705 struct _vcs_dpi_display_dlg_regs_st *dlg_regs; 706 struct _vcs_dpi_display_ttu_regs_st *ttu_regs; 707 }; 708 709 struct dpp_set_cursor_matrix_params { 710 struct dpp *dpp; 711 enum dc_color_space color_space; 712 struct dc_csc_transform *cursor_csc_color_matrix; 713 }; 714 715 struct mpc_update_mpcc_params { 716 struct dc *dc; 717 struct pipe_ctx *pipe_ctx; 718 }; 719 720 struct dpp_set_scaler_params { 721 struct dpp *dpp; 722 const struct scaler_data *scl_data; 723 }; 724 725 struct hubp_mem_program_viewport_params { 726 struct hubp *hubp; 727 const struct rect *viewport; 728 const struct rect *viewport_c; 729 }; 730 731 struct hubp_program_mcache_id_and_split_coordinate_params { 732 struct hubp *hubp; 733 struct mcache_regs_struct *mcache_regs; 734 }; 735 736 struct abort_cursor_offload_update_params { 737 struct dc *dc; 738 struct pipe_ctx *pipe_ctx; 739 }; 740 741 struct cursor_lock_params { 742 struct dc *dc; 743 struct pipe_ctx *pipe_ctx; 744 bool lock; 745 }; 746 747 struct setup_periodic_interrupt_params { 748 struct dc *dc; 749 struct pipe_ctx *pipe_ctx; 750 }; 751 752 struct send_cursor_info_to_dmu_params { 753 struct pipe_ctx *pipe_ctx; 754 int pipe_idx; 755 }; 756 757 struct set_cursor_attribute_params { 758 struct dc *dc; 759 struct pipe_ctx *pipe_ctx; 760 }; 761 762 struct hubp_set_cursor_attributes_params { 763 struct hubp *hubp; 764 const struct dc_cursor_attributes *attributes; 765 }; 766 767 struct dpp_set_cursor_attributes_params { 768 struct dpp *dpp; 769 struct dc_cursor_attributes *attributes; 770 }; 771 772 struct set_cursor_position_params { 773 struct dc *dc; 774 struct pipe_ctx *pipe_ctx; 775 }; 776 777 struct set_cursor_sdr_white_level_params { 778 struct dc *dc; 779 struct pipe_ctx *pipe_ctx; 780 }; 781 782 struct program_output_csc_params { 783 struct dc *dc; 784 struct pipe_ctx *pipe_ctx; 785 enum dc_color_space colorspace; 786 uint16_t *matrix; 787 int opp_id; 788 }; 789 790 struct hubp_set_blank_params { 791 struct hubp *hubp; 792 bool blank; 793 }; 794 795 struct phantom_hubp_post_enable_params { 796 struct hubp *hubp; 797 }; 798 799 struct begin_cursor_offload_update_params { 800 struct dc *dc; 801 struct pipe_ctx *pipe_ctx; 802 }; 803 804 struct update_cursor_offload_pipe_params { 805 struct dc *dc; 806 struct pipe_ctx *pipe_ctx; 807 }; 808 809 struct commit_cursor_offload_update_params { 810 struct dc *dc; 811 struct pipe_ctx *pipe_ctx; 812 }; 813 814 struct stream_enc_update_hdmi_info_packets_params { 815 struct pipe_ctx *pipe_ctx; 816 }; 817 818 struct hpo_frl_stream_enc_update_hdmi_info_packets_params { 819 struct pipe_ctx *pipe_ctx; 820 }; 821 822 struct hpo_dp_stream_enc_update_dp_info_packets_sdp_line_num_params { 823 struct pipe_ctx *pipe_ctx; 824 }; 825 826 struct hpo_dp_stream_enc_update_dp_info_packets_params { 827 struct pipe_ctx *pipe_ctx; 828 }; 829 830 struct stream_enc_update_dp_info_packets_sdp_line_num_params { 831 struct pipe_ctx *pipe_ctx; 832 }; 833 834 struct stream_enc_update_dp_info_packets_params { 835 struct pipe_ctx *pipe_ctx; 836 }; 837 838 struct dsc_set_config_simple_params { 839 struct display_stream_compressor *dsc; 840 struct dsc_config dsc_cfg; 841 struct dsc_optc_config dsc_optc_cfg; 842 }; 843 844 struct stream_enc_dp_set_dsc_config_params { 845 struct stream_encoder *stream_enc; 846 const struct dsc_optc_config *dsc_optc_cfg; 847 }; 848 849 struct hpo_dp_stream_enc_dp_set_dsc_pps_info_packet_params { 850 struct hpo_dp_stream_encoder *hpo_dp_stream_enc; 851 bool immediate_update; 852 uint8_t *dsc_packed_pps; 853 bool pps_sdp_stream; 854 }; 855 856 struct stream_enc_dp_set_dsc_pps_info_packet_params { 857 struct stream_encoder *stream_enc; 858 bool immediate_update; 859 uint8_t *dsc_packed_pps; 860 bool pps_sdp_stream; 861 }; 862 863 struct hpo_frl_stream_enc_set_dsc_config_params { 864 struct hpo_frl_stream_encoder *hpo_frl_stream_enc; 865 const struct dc_crtc_timing *timing; 866 uint8_t *dsc_packed_pps; 867 }; 868 869 struct dp_trace_source_sequence_params { 870 struct dc_link *link; 871 enum dpcd_source_sequence source; 872 }; 873 874 struct set_dmdata_attributes_params { 875 struct hubp *hubp; 876 struct dc_dmdata_attributes attr; 877 }; 878 879 struct link_increase_mst_payload_params { 880 struct pipe_ctx *pipe_ctx; 881 uint32_t mst_stream_bw; 882 }; 883 884 struct link_reduce_mst_payload_params { 885 struct pipe_ctx *pipe_ctx; 886 uint32_t mst_stream_bw; 887 }; 888 889 struct dp_set_test_pattern_params { 890 struct dc_link *link; 891 enum dp_test_pattern test_pattern; 892 enum dp_test_pattern_color_space test_pattern_color_space; 893 const struct link_training_settings *p_link_settings; 894 const unsigned char *p_custom_pattern; 895 unsigned int cust_pattern_size; 896 }; 897 898 struct link_set_dpms_off_params { 899 struct pipe_ctx *pipe_ctx; 900 }; 901 902 struct disable_audio_stream_params { 903 struct pipe_ctx *pipe_ctx; 904 }; 905 906 struct clk_mgr_set_max_memclk_params { 907 struct clk_mgr *clk_mgr; 908 unsigned int memclk_mhz; 909 }; 910 911 struct clk_mgr_update_clocks_params { 912 struct clk_mgr *clk_mgr; 913 }; 914 915 struct hubbub_program_watermarks_params { 916 struct dc *dc; 917 struct hubbub *hubbub; 918 union dcn_watermark_set *watermarks; 919 unsigned int refclk_mhz; 920 bool safe_to_lower; 921 }; 922 923 struct hubbub_program_arbiter_params { 924 struct dc *dc; 925 struct hubbub *hubbub; 926 struct dml2_display_arb_regs *arb_regs; 927 bool safe_to_lower; 928 }; 929 930 struct hubbub_program_compbuf_segments_params { 931 struct hubbub *hubbub; 932 unsigned int compbuf_size; 933 bool safe_to_lower; 934 }; 935 936 struct prepare_bandwidth_params { 937 struct dc *dc; 938 struct dc_state *context; 939 }; 940 941 struct link_set_dpms_on_params { 942 struct dc_state *state; 943 struct pipe_ctx *pipe_ctx; 944 }; 945 946 union block_sequence_params { 947 struct update_plane_addr_params update_plane_addr_params; 948 struct subvp_pipe_control_lock_fast_params subvp_pipe_control_lock_fast_params; 949 struct pipe_control_lock_params pipe_control_lock_params; 950 struct set_flip_control_gsl_params set_flip_control_gsl_params; 951 struct program_triplebuffer_params program_triplebuffer_params; 952 struct set_input_transfer_func_params set_input_transfer_func_params; 953 struct program_gamut_remap_params program_gamut_remap_params; 954 struct hubp_enable_3dlut_fl_params hubp_enable_3dlut_fl_params; 955 struct tg_setup_vertical_interrupt0_params tg_setup_vertical_interrupt0_params; 956 struct update_info_frame_params update_info_frame_params; 957 struct program_manual_trigger_params program_manual_trigger_params; 958 struct send_dmcub_cmd_params send_dmcub_cmd_params; 959 struct setup_dpp_params setup_dpp_params; 960 struct program_bias_and_scale_params program_bias_and_scale_params; 961 struct set_output_transfer_func_params set_output_transfer_func_params; 962 struct update_visual_confirm_params update_visual_confirm_params; 963 struct power_on_mpc_mem_pwr_params power_on_mpc_mem_pwr_params; 964 struct set_output_csc_params set_output_csc_params; 965 struct set_ocsc_default_params set_ocsc_default_params; 966 struct subvp_save_surf_addr subvp_save_surf_addr; 967 struct wait_for_dcc_meta_propagation_params wait_for_dcc_meta_propagation_params; 968 struct dmub_hw_control_lock_fast_params dmub_hw_control_lock_fast_params; 969 struct program_surface_config_params program_surface_config_params; 970 struct program_mcache_id_and_split_coordinate program_mcache_id_and_split_coordinate; 971 struct control_cm_hist_params control_cm_hist_params; 972 struct program_cursor_update_now_params program_cursor_update_now_params; 973 struct hubp_wait_pipe_read_start_params hubp_wait_pipe_read_start_params; 974 struct apply_update_flags_for_phantom_params apply_update_flags_for_phantom_params; 975 struct update_phantom_vp_position_params update_phantom_vp_position_params; 976 struct set_odm_combine_params set_odm_combine_params; 977 struct set_odm_bypass_params set_odm_bypass_params; 978 struct opp_pipe_clock_control_params opp_pipe_clock_control_params; 979 struct opp_program_left_edge_extra_pixel_params opp_program_left_edge_extra_pixel_params; 980 struct dccg_set_dto_dscclk_params dccg_set_dto_dscclk_params; 981 struct dsc_set_config_params dsc_set_config_params; 982 struct dsc_enable_params dsc_enable_params; 983 struct tg_set_dsc_config_params tg_set_dsc_config_params; 984 struct dsc_disconnect_params dsc_disconnect_params; 985 struct dsc_read_state_params dsc_read_state_params; 986 struct dsc_calculate_and_set_config_params dsc_calculate_and_set_config_params; 987 struct dsc_enable_with_opp_params dsc_enable_with_opp_params; 988 struct program_tg_params program_tg_params; 989 struct tg_program_global_sync_params tg_program_global_sync_params; 990 struct tg_wait_for_state_params tg_wait_for_state_params; 991 struct tg_set_vtg_params_params tg_set_vtg_params_params; 992 struct tg_setup_vertical_interrupt2_params tg_setup_vertical_interrupt2_params; 993 struct dpp_set_hdr_multiplier_params dpp_set_hdr_multiplier_params; 994 struct tg_set_gsl_params tg_set_gsl_params; 995 struct tg_set_gsl_source_select_params tg_set_gsl_source_select_params; 996 struct setup_vupdate_interrupt_params setup_vupdate_interrupt_params; 997 struct program_det_size_params program_det_size_params; 998 struct program_det_segments_params program_det_segments_params; 999 struct update_dchubp_dpp_params update_dchubp_dpp_params; 1000 struct opp_set_dyn_expansion_params opp_set_dyn_expansion_params; 1001 struct opp_program_fmt_params opp_program_fmt_params; 1002 struct opp_program_bit_depth_reduction_params opp_program_bit_depth_reduction_params; 1003 struct opp_set_disp_pattern_generator_params opp_set_disp_pattern_generator_params; 1004 struct set_abm_pipe_params set_abm_pipe_params; 1005 struct set_abm_level_params set_abm_level_params; 1006 struct set_abm_immediate_disable_params set_abm_immediate_disable_params; 1007 struct set_disp_pattern_generator_params set_disp_pattern_generator_params; 1008 struct mpc_remove_mpcc_params mpc_remove_mpcc_params; 1009 struct opp_set_mpcc_disconnect_pending_params opp_set_mpcc_disconnect_pending_params; 1010 struct dc_set_optimized_required_params dc_set_optimized_required_params; 1011 struct hubp_disconnect_params hubp_disconnect_params; 1012 struct hubbub_force_pstate_change_control_params hubbub_force_pstate_change_control_params; 1013 struct tg_enable_crtc_params tg_enable_crtc_params; 1014 struct hubp_wait_flip_pending_params hubp_wait_flip_pending_params; 1015 struct tg_wait_double_buffer_pending_params tg_wait_double_buffer_pending_params; 1016 struct update_force_pstate_params update_force_pstate_params; 1017 struct hubbub_apply_dedcn21_147_wa_params hubbub_apply_dedcn21_147_wa_params; 1018 struct hubbub_allow_self_refresh_control_params hubbub_allow_self_refresh_control_params; 1019 struct tg_get_frame_count_params tg_get_frame_count_params; 1020 struct mpc_set_dwb_mux_params mpc_set_dwb_mux_params; 1021 struct mpc_disable_dwb_mux_params mpc_disable_dwb_mux_params; 1022 struct mcif_wb_config_buf_params mcif_wb_config_buf_params; 1023 struct mcif_wb_config_arb_params mcif_wb_config_arb_params; 1024 struct mcif_wb_enable_params mcif_wb_enable_params; 1025 struct mcif_wb_disable_params mcif_wb_disable_params; 1026 struct dwbc_enable_params dwbc_enable_params; 1027 struct dwbc_disable_params dwbc_disable_params; 1028 struct dwbc_update_params dwbc_update_params; 1029 struct hubp_update_mall_sel_params hubp_update_mall_sel_params; 1030 struct hubp_prepare_subvp_buffering_params hubp_prepare_subvp_buffering_params; 1031 struct hubp_set_blank_en_params hubp_set_blank_en_params; 1032 struct hubp_disable_control_params hubp_disable_control_params; 1033 struct hubbub_soft_reset_params hubbub_soft_reset_params; 1034 struct hubp_clk_cntl_params hubp_clk_cntl_params; 1035 struct hubp_init_params hubp_init_params; 1036 struct hubp_set_vm_system_aperture_settings_params hubp_set_vm_system_aperture_settings_params; 1037 struct hubp_set_flip_int_params hubp_set_flip_int_params; 1038 struct dpp_dppclk_control_params dpp_dppclk_control_params; 1039 struct disable_phantom_crtc_params disable_phantom_crtc_params; 1040 struct dpp_pg_control_params dpp_pg_control_params; 1041 struct hubp_pg_control_params hubp_pg_control_params; 1042 struct hubp_reset_params hubp_reset_params; 1043 struct dpp_reset_params dpp_reset_params; 1044 struct dpp_root_clock_control_params dpp_root_clock_control_params; 1045 struct dc_ip_request_cntl_params dc_ip_request_cntl_params; 1046 struct dsc_pg_status_params dsc_pg_status_params; 1047 struct dsc_wait_disconnect_pending_clear_params dsc_wait_disconnect_pending_clear_params; 1048 struct dsc_disable_params dsc_disable_params; 1049 struct dccg_set_ref_dscclk_params dccg_set_ref_dscclk_params; 1050 struct dccg_update_dpp_dto_params dccg_update_dpp_dto_params; 1051 struct hubp_vtg_sel_params hubp_vtg_sel_params; 1052 struct hubp_setup2_params hubp_setup2_params; 1053 struct hubp_setup_params hubp_setup_params; 1054 struct hubp_set_unbounded_requesting_params hubp_set_unbounded_requesting_params; 1055 struct hubp_setup_interdependent2_params hubp_setup_interdependent2_params; 1056 struct hubp_setup_interdependent_params hubp_setup_interdependent_params; 1057 struct dpp_set_cursor_matrix_params dpp_set_cursor_matrix_params; 1058 struct mpc_update_mpcc_params mpc_update_mpcc_params; 1059 struct mpc_update_blending_params mpc_update_blending_params; 1060 struct mpc_assert_idle_mpcc_params mpc_assert_idle_mpcc_params; 1061 struct mpc_insert_plane_params mpc_insert_plane_params; 1062 struct dpp_set_scaler_params dpp_set_scaler_params; 1063 struct hubp_mem_program_viewport_params hubp_mem_program_viewport_params; 1064 struct abort_cursor_offload_update_params abort_cursor_offload_update_params; 1065 struct cursor_lock_params cursor_lock_params; 1066 struct setup_periodic_interrupt_params setup_periodic_interrupt_params; 1067 struct send_cursor_info_to_dmu_params send_cursor_info_to_dmu_params; 1068 struct set_cursor_attribute_params set_cursor_attribute_params; 1069 struct hubp_set_cursor_attributes_params hubp_set_cursor_attributes_params; 1070 struct dpp_set_cursor_attributes_params dpp_set_cursor_attributes_params; 1071 struct set_cursor_position_params set_cursor_position_params; 1072 struct set_cursor_sdr_white_level_params set_cursor_sdr_white_level_params; 1073 struct program_output_csc_params program_output_csc_params; 1074 struct hubp_set_blank_params hubp_set_blank_params; 1075 struct phantom_hubp_post_enable_params phantom_hubp_post_enable_params; 1076 struct begin_cursor_offload_update_params begin_cursor_offload_update_params; 1077 struct update_cursor_offload_pipe_params update_cursor_offload_pipe_params; 1078 struct commit_cursor_offload_update_params commit_cursor_offload_update_params; 1079 struct stream_enc_update_hdmi_info_packets_params stream_enc_update_hdmi_info_packets_params; 1080 struct hpo_frl_stream_enc_update_hdmi_info_packets_params hpo_frl_stream_enc_update_hdmi_info_packets_params; 1081 struct hpo_dp_stream_enc_update_dp_info_packets_sdp_line_num_params hpo_dp_stream_enc_update_dp_info_packets_sdp_line_num_params; 1082 struct hpo_dp_stream_enc_update_dp_info_packets_params hpo_dp_stream_enc_update_dp_info_packets_params; 1083 struct stream_enc_update_dp_info_packets_sdp_line_num_params stream_enc_update_dp_info_packets_sdp_line_num_params; 1084 struct stream_enc_update_dp_info_packets_params stream_enc_update_dp_info_packets_params; 1085 struct dsc_set_config_simple_params dsc_set_config_simple_params; 1086 struct stream_enc_dp_set_dsc_config_params stream_enc_dp_set_dsc_config_params; 1087 struct hpo_dp_stream_enc_dp_set_dsc_pps_info_packet_params hpo_dp_stream_enc_dp_set_dsc_pps_info_packet_params; 1088 struct stream_enc_dp_set_dsc_pps_info_packet_params stream_enc_dp_set_dsc_pps_info_packet_params; 1089 struct hpo_frl_stream_enc_set_dsc_config_params hpo_frl_stream_enc_set_dsc_config_params; 1090 struct dp_trace_source_sequence_params dp_trace_source_sequence_params; 1091 struct set_dmdata_attributes_params set_dmdata_attributes_params; 1092 struct link_increase_mst_payload_params link_increase_mst_payload_params; 1093 struct link_reduce_mst_payload_params link_reduce_mst_payload_params; 1094 struct dp_set_test_pattern_params dp_set_test_pattern_params; 1095 struct link_set_dpms_off_params link_set_dpms_off_params; 1096 struct disable_audio_stream_params disable_audio_stream_params; 1097 struct prepare_bandwidth_params prepare_bandwidth_params; 1098 struct link_set_dpms_on_params link_set_dpms_on_params; 1099 struct clk_mgr_set_max_memclk_params clk_mgr_set_max_memclk_params; 1100 struct clk_mgr_update_clocks_params clk_mgr_update_clocks_params; 1101 struct hubbub_program_watermarks_params hubbub_program_watermarks_params; 1102 struct hubbub_program_arbiter_params hubbub_program_arbiter_params; 1103 struct hubbub_program_compbuf_segments_params hubbub_program_compbuf_segments_params; 1104 }; 1105 1106 enum block_sequence_func { 1107 DMUB_SUBVP_PIPE_CONTROL_LOCK_FAST = 0, 1108 OPTC_PIPE_CONTROL_LOCK, 1109 HUBP_SET_FLIP_CONTROL_GSL, 1110 HUBP_PROGRAM_TRIPLEBUFFER, 1111 HUBP_UPDATE_PLANE_ADDR, 1112 DPP_SET_INPUT_TRANSFER_FUNC, 1113 DPP_PROGRAM_GAMUT_REMAP, 1114 HUBP_ENABLE_3DLUT_FL, 1115 OTG_SETUP_VERTICAL_INTERRUPT, 1116 HWSS_SETUP_PERIODIC_INTERRUPT, 1117 HWSS_UPDATE_INFO_FRAME, 1118 HUBP_SET_DMDATA_ATTRIBUTES, 1119 OPTC_PROGRAM_MANUAL_TRIGGER, 1120 DMUB_SEND_DMCUB_CMD, 1121 DPP_SETUP_DPP, 1122 DPP_PROGRAM_BIAS_AND_SCALE, 1123 DPP_SET_OUTPUT_TRANSFER_FUNC, 1124 DPP_SET_HDR_MULTIPLIER, 1125 MPC_UPDATE_VISUAL_CONFIRM, 1126 MPC_POWER_ON_MPC_MEM_PWR, 1127 MPC_SET_OUTPUT_CSC, 1128 MPC_SET_OCSC_DEFAULT, 1129 DMUB_SUBVP_SAVE_SURF_ADDR, 1130 HUBP_WAIT_FOR_DCC_META_PROP, 1131 DMUB_HW_CONTROL_LOCK_FAST, 1132 HUBP_PROGRAM_SURFACE_CONFIG, 1133 HUBP_PROGRAM_MCACHE_ID, 1134 DPP_PROGRAM_CM_HIST, 1135 PROGRAM_CURSOR_UPDATE_NOW, 1136 HUBP_WAIT_PIPE_READ_START, 1137 HWS_APPLY_UPDATE_FLAGS_FOR_PHANTOM, 1138 HWS_UPDATE_PHANTOM_VP_POSITION, 1139 OPTC_SET_ODM_COMBINE, 1140 OPTC_SET_ODM_BYPASS, 1141 OPP_PIPE_CLOCK_CONTROL, 1142 OPP_PROGRAM_LEFT_EDGE_EXTRA_PIXEL, 1143 DCCG_SET_DTO_DSCCLK, 1144 DSC_SET_CONFIG, 1145 DSC_ENABLE, 1146 TG_SET_DSC_CONFIG, 1147 DSC_DISCONNECT, 1148 DSC_READ_STATE, 1149 DSC_CALCULATE_AND_SET_CONFIG, 1150 DSC_ENABLE_WITH_OPP, 1151 TG_PROGRAM_GLOBAL_SYNC, 1152 TG_WAIT_FOR_STATE, 1153 TG_SET_VTG_PARAMS, 1154 TG_SETUP_VERTICAL_INTERRUPT2, 1155 HUBP_PROGRAM_DET_SIZE, 1156 HUBP_PROGRAM_DET_SEGMENTS, 1157 OPP_SET_DYN_EXPANSION, 1158 OPP_PROGRAM_FMT, 1159 OPP_PROGRAM_BIT_DEPTH_REDUCTION, 1160 OPP_SET_DISP_PATTERN_GENERATOR, 1161 ABM_SET_PIPE, 1162 ABM_SET_LEVEL, 1163 ABM_SET_IMMEDIATE_DISABLE, 1164 MPC_REMOVE_MPCC, 1165 OPP_SET_MPCC_DISCONNECT_PENDING, 1166 DC_SET_OPTIMIZED_REQUIRED, 1167 HUBP_DISCONNECT, 1168 HUBBUB_FORCE_PSTATE_CHANGE_CONTROL, 1169 TG_ENABLE_CRTC, 1170 TG_SET_GSL, 1171 TG_SET_GSL_SOURCE_SELECT, 1172 HUBP_WAIT_FLIP_PENDING, 1173 TG_WAIT_DOUBLE_BUFFER_PENDING, 1174 UPDATE_FORCE_PSTATE, 1175 PROGRAM_MALL_PIPE_CONFIG, 1176 HUBBUB_APPLY_DEDCN21_147_WA, 1177 HUBBUB_ALLOW_SELF_REFRESH_CONTROL, 1178 TG_GET_FRAME_COUNT, 1179 MPC_SET_DWB_MUX, 1180 MPC_DISABLE_DWB_MUX, 1181 MCIF_WB_CONFIG_BUF, 1182 MCIF_WB_CONFIG_ARB, 1183 MCIF_WB_ENABLE, 1184 MCIF_WB_DISABLE, 1185 DWBC_ENABLE, 1186 DWBC_DISABLE, 1187 DWBC_UPDATE, 1188 HUBP_UPDATE_MALL_SEL, 1189 HUBP_PREPARE_SUBVP_BUFFERING, 1190 HUBP_SET_BLANK_EN, 1191 HUBP_DISABLE_CONTROL, 1192 HUBBUB_SOFT_RESET, 1193 HUBP_CLK_CNTL, 1194 HUBP_INIT, 1195 HUBP_SET_VM_SYSTEM_APERTURE_SETTINGS, 1196 HUBP_SET_FLIP_INT, 1197 DPP_DPPCLK_CONTROL, 1198 DISABLE_PHANTOM_CRTC, 1199 DSC_PG_STATUS, 1200 DSC_WAIT_DISCONNECT_PENDING_CLEAR, 1201 DSC_DISABLE, 1202 DCCG_SET_REF_DSCCLK, 1203 DPP_PG_CONTROL, 1204 HUBP_PG_CONTROL, 1205 HUBP_RESET, 1206 DPP_RESET, 1207 DPP_ROOT_CLOCK_CONTROL, 1208 DC_IP_REQUEST_CNTL, 1209 DCCG_UPDATE_DPP_DTO, 1210 HUBP_VTG_SEL, 1211 HUBP_SETUP2, 1212 HUBP_SETUP, 1213 HUBP_SET_UNBOUNDED_REQUESTING, 1214 HUBP_SETUP_INTERDEPENDENT2, 1215 HUBP_SETUP_INTERDEPENDENT, 1216 DPP_SET_CURSOR_MATRIX, 1217 MPC_UPDATE_BLENDING, 1218 MPC_ASSERT_IDLE_MPCC, 1219 MPC_INSERT_PLANE, 1220 DPP_SET_SCALER, 1221 HUBP_MEM_PROGRAM_VIEWPORT, 1222 ABORT_CURSOR_OFFLOAD_UPDATE, 1223 HWSS_CURSOR_LOCK, 1224 HWSS_BEGIN_CURSOR_OFFLOAD_UPDATE, 1225 HWSS_COMMIT_CURSOR_OFFLOAD_UPDATE, 1226 HWSS_UPDATE_CURSOR_OFFLOAD_PIPE, 1227 DC_SEND_CURSOR_INFO_TO_DMU, 1228 SET_CURSOR_ATTRIBUTE, 1229 HUBP_SET_CURSOR_ATTRIBUTES, 1230 DPP_SET_CURSOR_ATTRIBUTES, 1231 SET_CURSOR_POSITION, 1232 SET_CURSOR_SDR_WHITE_LEVEL, 1233 PROGRAM_OUTPUT_CSC, 1234 HUBP_SET_LEGACY_TILING_COMPAT_LEVEL, 1235 HUBP_SET_BLANK, 1236 PHANTOM_HUBP_POST_ENABLE, 1237 STREAM_ENC_UPDATE_HDMI_INFO_PACKETS, 1238 HPO_FRL_STREAM_ENC_UPDATE_HDMI_INFO_PACKETS, 1239 HPO_DP_STREAM_ENC_UPDATE_DP_INFO_PACKETS_SDP_LINE_NUM, 1240 HPO_DP_STREAM_ENC_UPDATE_DP_INFO_PACKETS, 1241 STREAM_ENC_UPDATE_DP_INFO_PACKETS_SDP_LINE_NUM, 1242 STREAM_ENC_UPDATE_DP_INFO_PACKETS, 1243 DSC_SET_CONFIG_SIMPLE, 1244 STREAM_ENC_DP_SET_DSC_CONFIG, 1245 HPO_DP_STREAM_ENC_DP_SET_DSC_PPS_INFO_PACKET, 1246 STREAM_ENC_DP_SET_DSC_PPS_INFO_PACKET, 1247 HPO_FRL_STREAM_ENC_SET_DSC_CONFIG, 1248 LINK_INCREASE_MST_PAYLOAD, 1249 LINK_REDUCE_MST_PAYLOAD, 1250 DP_TRACE_SOURCE_SEQUENCE, 1251 DP_SET_TEST_PATTERN, 1252 LINK_SET_DPMS_OFF, 1253 DISABLE_AUDIO_STREAM, 1254 PREPARE_BANDWIDTH, 1255 LINK_SET_DPMS_ON, 1256 CLK_MGR_SET_MAX_MEMCLK, 1257 CLK_MGR_UPDATE_CLOCKS, 1258 HUBBUB_PROGRAM_WATERMARKS, 1259 HUBBUB_PROGRAM_ARBITER, 1260 HUBBUB_PROGRAM_COMPBUF_SEGMENTS, 1261 /* This must be the last value in this enum, add new ones above */ 1262 HWSS_BLOCK_SEQUENCE_FUNC_COUNT 1263 }; 1264 1265 struct block_sequence { 1266 union block_sequence_params params; 1267 enum block_sequence_func func; 1268 }; 1269 1270 struct block_sequence_state { 1271 struct block_sequence *steps; 1272 unsigned int *num_steps; 1273 }; 1274 1275 #define MAX_HWSS_BLOCK_SEQUENCE_SIZE (HWSS_BLOCK_SEQUENCE_FUNC_COUNT * MAX_PIPES) 1276 1277 struct hw_sequencer_funcs { 1278 void (*hardware_release)(struct dc *dc); 1279 /* Embedded Display Related */ 1280 void (*edp_power_control)(struct dc_link *link, bool enable); 1281 void (*edp_wait_for_hpd_ready)(struct dc_link *link, bool power_up); 1282 void (*edp_wait_for_T12)(struct dc_link *link); 1283 1284 /* Pipe Programming Related */ 1285 void (*init_hw)(struct dc *dc); 1286 void (*power_down_on_boot)(struct dc *dc); 1287 void (*enable_accelerated_mode)(struct dc *dc, 1288 struct dc_state *context); 1289 enum dc_status (*apply_ctx_to_hw)(struct dc *dc, 1290 struct dc_state *context); 1291 void (*disable_plane)(struct dc *dc, struct dc_state *state, struct pipe_ctx *pipe_ctx); 1292 void (*disable_plane_sequence)(struct dc *dc, struct dc_state *state, struct pipe_ctx *pipe_ctx, 1293 struct block_sequence_state *seq_state); 1294 void (*disable_pixel_data)(struct dc *dc, struct pipe_ctx *pipe_ctx, bool blank); 1295 void (*apply_ctx_for_surface)(struct dc *dc, 1296 const struct dc_stream_state *stream, 1297 int num_planes, struct dc_state *context); 1298 void (*program_front_end_for_ctx)(struct dc *dc, 1299 struct dc_state *context); 1300 void (*wait_for_pending_cleared)(struct dc *dc, 1301 struct dc_state *context); 1302 void (*post_unlock_program_front_end)(struct dc *dc, 1303 struct dc_state *context); 1304 void (*update_plane_addr)(const struct dc *dc, 1305 struct pipe_ctx *pipe_ctx); 1306 void (*update_dchub)(struct dce_hwseq *hws, 1307 struct dchub_init_data *dh_data); 1308 void (*wait_for_mpcc_disconnect)(struct dc *dc, 1309 struct resource_pool *res_pool, 1310 struct pipe_ctx *pipe_ctx); 1311 void (*wait_for_mpcc_disconnect_sequence)(struct dc *dc, 1312 struct resource_pool *res_pool, 1313 struct pipe_ctx *pipe_ctx, 1314 struct block_sequence_state *seq_state); 1315 void (*edp_backlight_control)( 1316 struct dc_link *link, 1317 bool enable); 1318 void (*program_triplebuffer)(const struct dc *dc, 1319 struct pipe_ctx *pipe_ctx, bool enableTripleBuffer); 1320 void (*update_pending_status)(struct pipe_ctx *pipe_ctx); 1321 void (*update_dsc_pg)(struct dc *dc, struct dc_state *context, bool safe_to_disable); 1322 void (*clear_surface_dcc_and_tiling)(struct pipe_ctx *pipe_ctx, struct dc_plane_state *plane_state, bool clear_tiling); 1323 1324 /* Pipe Lock Related */ 1325 void (*pipe_control_lock)(struct dc *dc, 1326 struct pipe_ctx *pipe, bool lock); 1327 void (*interdependent_update_lock)(struct dc *dc, 1328 struct dc_state *context, bool lock); 1329 void (*set_flip_control_gsl)(struct pipe_ctx *pipe_ctx, 1330 bool flip_immediate); 1331 void (*cursor_lock)(struct dc *dc, struct pipe_ctx *pipe, bool lock); 1332 1333 /* Timing Related */ 1334 void (*get_position)(struct pipe_ctx **pipe_ctx, int num_pipes, 1335 struct crtc_position *position); 1336 int (*get_vupdate_offset_from_vsync)(struct pipe_ctx *pipe_ctx); 1337 void (*calc_vupdate_position)( 1338 struct dc *dc, 1339 struct pipe_ctx *pipe_ctx, 1340 uint32_t *start_line, 1341 uint32_t *end_line); 1342 void (*enable_per_frame_crtc_position_reset)(struct dc *dc, 1343 int group_size, struct pipe_ctx *grouped_pipes[]); 1344 void (*enable_timing_synchronization)(struct dc *dc, 1345 struct dc_state *state, 1346 int group_index, int group_size, 1347 struct pipe_ctx *grouped_pipes[]); 1348 void (*enable_vblanks_synchronization)(struct dc *dc, 1349 int group_index, int group_size, 1350 struct pipe_ctx *grouped_pipes[]); 1351 void (*setup_periodic_interrupt)(struct dc *dc, 1352 struct pipe_ctx *pipe_ctx); 1353 void (*set_drr)(struct pipe_ctx **pipe_ctx, int num_pipes, 1354 struct dc_crtc_timing_adjust adjust); 1355 void (*set_static_screen_control)(struct pipe_ctx **pipe_ctx, 1356 int num_pipes, 1357 const struct dc_static_screen_params *events); 1358 1359 /* Stream Related */ 1360 void (*enable_stream)(struct pipe_ctx *pipe_ctx); 1361 void (*disable_stream)(struct pipe_ctx *pipe_ctx); 1362 void (*blank_stream)(struct pipe_ctx *pipe_ctx); 1363 void (*unblank_stream)(struct pipe_ctx *pipe_ctx, 1364 struct dc_link_settings *link_settings); 1365 1366 /* Bandwidth Related */ 1367 void (*prepare_bandwidth)(struct dc *dc, struct dc_state *context); 1368 void (*prepare_bandwidth_sequence)(struct dc *dc, 1369 struct dc_state *context, 1370 struct block_sequence_state *seq_state); 1371 bool (*update_bandwidth)(struct dc *dc, struct dc_state *context); 1372 void (*optimize_bandwidth)(struct dc *dc, struct dc_state *context); 1373 void (*optimize_bandwidth_sequence)(struct dc *dc, 1374 struct dc_state *context, 1375 struct block_sequence_state *seq_state); 1376 1377 /* Infopacket Related */ 1378 void (*set_avmute)(struct pipe_ctx *pipe_ctx, bool enable); 1379 void (*send_immediate_sdp_message)( 1380 struct pipe_ctx *pipe_ctx, 1381 const uint8_t *custom_sdp_message, 1382 unsigned int sdp_message_size); 1383 void (*update_info_frame)(struct pipe_ctx *pipe_ctx); 1384 void (*set_dmdata_attributes)(struct pipe_ctx *pipe); 1385 void (*program_dmdata_engine)(struct pipe_ctx *pipe_ctx); 1386 bool (*dmdata_status_done)(struct pipe_ctx *pipe_ctx); 1387 1388 /* Cursor Related */ 1389 void (*set_cursor_position)(struct pipe_ctx *pipe); 1390 void (*set_cursor_attribute)(struct pipe_ctx *pipe); 1391 void (*set_cursor_sdr_white_level)(struct pipe_ctx *pipe); 1392 void (*abort_cursor_offload_update)(struct dc *dc, const struct pipe_ctx *pipe); 1393 void (*begin_cursor_offload_update)(struct dc *dc, const struct pipe_ctx *pipe); 1394 void (*commit_cursor_offload_update)(struct dc *dc, const struct pipe_ctx *pipe); 1395 void (*update_cursor_offload_pipe)(struct dc *dc, const struct pipe_ctx *pipe); 1396 void (*notify_cursor_offload_drr_update)(struct dc *dc, struct dc_state *context, 1397 const struct dc_stream_state *stream); 1398 void (*program_cursor_offload_now)(struct dc *dc, const struct pipe_ctx *pipe); 1399 1400 /* Colour Related */ 1401 void (*program_gamut_remap)(struct program_gamut_remap_params *params); 1402 void (*program_output_csc)(struct dc *dc, struct pipe_ctx *pipe_ctx, 1403 enum dc_color_space colorspace, 1404 uint16_t *matrix, int opp_id); 1405 void (*trigger_3dlut_dma_load)(struct dc *dc, struct pipe_ctx *pipe_ctx); 1406 1407 /* VM Related */ 1408 int (*init_sys_ctx)(struct dce_hwseq *hws, 1409 struct dc *dc, 1410 struct dc_phy_addr_space_config *pa_config); 1411 void (*init_vm_ctx)(struct dce_hwseq *hws, 1412 struct dc *dc, 1413 struct dc_virtual_addr_space_config *va_config, 1414 int vmid); 1415 1416 /* Writeback Related */ 1417 void (*update_writeback)(struct dc *dc, 1418 struct dc_writeback_info *wb_info, 1419 struct dc_state *context); 1420 void (*enable_writeback)(struct dc *dc, 1421 struct dc_writeback_info *wb_info, 1422 struct dc_state *context); 1423 void (*disable_writeback)(struct dc *dc, 1424 unsigned int dwb_pipe_inst); 1425 1426 /* Clock Related */ 1427 enum dc_status (*set_clock)(struct dc *dc, 1428 enum dc_clock_type clock_type, 1429 uint32_t clk_khz, uint32_t stepping); 1430 void (*get_clock)(struct dc *dc, enum dc_clock_type clock_type, 1431 struct dc_clock_config *clock_cfg); 1432 void (*optimize_pwr_state)(const struct dc *dc, 1433 struct dc_state *context); 1434 void (*exit_optimized_pwr_state)(const struct dc *dc, 1435 struct dc_state *context); 1436 void (*calculate_pix_rate_divider)(struct dc *dc, 1437 struct dc_state *context, 1438 const struct dc_stream_state *stream); 1439 1440 /* Audio Related */ 1441 void (*enable_audio_stream)(struct pipe_ctx *pipe_ctx); 1442 void (*disable_audio_stream)(struct pipe_ctx *pipe_ctx); 1443 1444 /* Stereo 3D Related */ 1445 void (*setup_stereo)(struct pipe_ctx *pipe_ctx, struct dc *dc); 1446 1447 /* HW State Logging Related */ 1448 void (*log_hw_state)(struct dc *dc, struct dc_log_buffer_ctx *log_ctx); 1449 void (*log_color_state)(struct dc *dc, 1450 struct dc_log_buffer_ctx *log_ctx); 1451 void (*get_hw_state)(struct dc *dc, char *pBuf, 1452 unsigned int bufSize, unsigned int mask); 1453 void (*clear_status_bits)(struct dc *dc, unsigned int mask); 1454 1455 bool (*set_backlight_level)(struct pipe_ctx *pipe_ctx, 1456 struct set_backlight_level_params *params); 1457 1458 void (*set_abm_immediate_disable)(struct pipe_ctx *pipe_ctx); 1459 1460 void (*set_pipe)(struct pipe_ctx *pipe_ctx); 1461 1462 void (*enable_dp_link_output)(struct dc_link *link, 1463 const struct link_resource *link_res, 1464 enum signal_type signal, 1465 enum clock_source_id clock_source, 1466 const struct dc_link_settings *link_settings); 1467 void (*enable_tmds_link_output)(struct dc_link *link, 1468 const struct link_resource *link_res, 1469 enum signal_type signal, 1470 enum clock_source_id clock_source, 1471 enum dc_color_depth color_depth, 1472 uint32_t pixel_clock); 1473 void (*enable_lvds_link_output)(struct dc_link *link, 1474 const struct link_resource *link_res, 1475 enum clock_source_id clock_source, 1476 uint32_t pixel_clock); 1477 void (*enable_analog_link_output)(struct dc_link *link, 1478 uint32_t pixel_clock); 1479 void (*disable_link_output)(struct dc_link *link, 1480 const struct link_resource *link_res, 1481 enum signal_type signal); 1482 bool (*dac_load_detect)(struct dc_link *link); 1483 void (*prepare_ddc)(struct dc_link *link); 1484 1485 void (*get_dcc_en_bits)(struct dc *dc, int *dcc_en_bits); 1486 1487 enum dc_status (*setup_hdmi_frl_link)( 1488 struct dc_link *link, 1489 int hpo_inst, 1490 enum clock_source_id frl_phy_clock_source_id); 1491 1492 unsigned int (*get_max_dispclk_mhz)(struct dc *dc, 1493 struct dc_state *context); 1494 1495 /* Idle Optimization Related */ 1496 bool (*apply_idle_power_optimizations)(struct dc *dc, bool enable); 1497 1498 bool (*does_plane_fit_in_mall)(struct dc *dc, 1499 unsigned int pitch, 1500 unsigned int height, 1501 enum surface_pixel_format format, 1502 struct dc_cursor_attributes *cursor_attr); 1503 void (*commit_subvp_config)(struct dc *dc, struct dc_state *context); 1504 void (*enable_phantom_streams)(struct dc *dc, struct dc_state *context); 1505 void (*disable_phantom_streams)(struct dc *dc, struct dc_state *context); 1506 void (*subvp_pipe_control_lock)(struct dc *dc, 1507 struct dc_state *context, 1508 bool lock, 1509 bool should_lock_all_pipes, 1510 struct pipe_ctx *top_pipe_to_program, 1511 bool subvp_prev_use); 1512 void (*subvp_pipe_control_lock_fast)(union block_sequence_params *params); 1513 1514 void (*z10_restore)(const struct dc *dc); 1515 void (*z10_save_init)(struct dc *dc); 1516 bool (*is_abm_supported)(struct dc *dc, 1517 struct dc_state *context, struct dc_stream_state *stream); 1518 1519 void (*set_disp_pattern_generator)(const struct dc *dc, 1520 struct pipe_ctx *pipe_ctx, 1521 enum controller_dp_test_pattern test_pattern, 1522 enum controller_dp_color_space color_space, 1523 enum dc_color_depth color_depth, 1524 const struct tg_color *solid_color, 1525 int width, int height, int offset); 1526 void (*blank_phantom)(struct dc *dc, 1527 struct timing_generator *tg, 1528 int width, 1529 int height); 1530 void (*update_visual_confirm_color)(struct dc *dc, 1531 struct pipe_ctx *pipe_ctx, 1532 int mpcc_id); 1533 void (*update_phantom_vp_position)(struct dc *dc, 1534 struct dc_state *context, 1535 struct pipe_ctx *phantom_pipe); 1536 void (*apply_update_flags_for_phantom)(struct pipe_ctx *phantom_pipe); 1537 1538 void (*calc_blocks_to_gate)(struct dc *dc, struct dc_state *context, 1539 struct pg_block_update *update_state); 1540 void (*calc_blocks_to_ungate)(struct dc *dc, struct dc_state *context, 1541 struct pg_block_update *update_state); 1542 void (*hw_block_power_up)(struct dc *dc, 1543 struct pg_block_update *update_state); 1544 void (*hw_block_power_down)(struct dc *dc, 1545 struct pg_block_update *update_state); 1546 void (*root_clock_control)(struct dc *dc, 1547 struct pg_block_update *update_state, bool power_on); 1548 bool (*is_pipe_topology_transition_seamless)(struct dc *dc, 1549 const struct dc_state *cur_ctx, 1550 const struct dc_state *new_ctx); 1551 void (*wait_for_dcc_meta_propagation)(const struct dc *dc, 1552 const struct pipe_ctx *top_pipe_to_program); 1553 void (*dmub_hw_control_lock)(struct dc *dc, 1554 struct dc_state *context, 1555 bool lock); 1556 void (*fams2_update_config)(struct dc *dc, 1557 struct dc_state *context, 1558 bool enable); 1559 void (*dmub_hw_control_lock_fast)(union block_sequence_params *params); 1560 void (*set_long_vtotal)(struct pipe_ctx **pipe_ctx, int num_pipes, uint32_t v_total_min, uint32_t v_total_max); 1561 void (*program_outstanding_updates)(struct dc *dc, 1562 struct dc_state *context); 1563 void (*setup_hpo_hw_control)(const struct dce_hwseq *hws, bool enable); 1564 void (*wait_for_all_pending_updates)(const struct pipe_ctx *pipe_ctx); 1565 void (*detect_pipe_changes)(struct dc_state *old_state, 1566 struct dc_state *new_state, 1567 struct pipe_ctx *old_pipe, 1568 struct pipe_ctx *new_pipe); 1569 void (*enable_plane)(struct dc *dc, 1570 struct pipe_ctx *pipe_ctx, 1571 struct dc_state *context); 1572 void (*enable_plane_sequence)(struct dc *dc, 1573 struct pipe_ctx *pipe_ctx, 1574 struct dc_state *context, 1575 struct block_sequence_state *seq_state); 1576 void (*update_dchubp_dpp)(struct dc *dc, 1577 struct pipe_ctx *pipe_ctx, 1578 struct dc_state *context); 1579 void (*update_dchubp_dpp_sequence)(struct dc *dc, 1580 struct pipe_ctx *pipe_ctx, 1581 struct dc_state *context, 1582 struct block_sequence_state *seq_state); 1583 void (*post_unlock_reset_opp)(struct dc *dc, 1584 struct pipe_ctx *opp_head); 1585 void (*post_unlock_reset_opp_sequence)( 1586 struct dc *dc, 1587 struct pipe_ctx *opp_head, 1588 struct block_sequence_state *seq_state); 1589 void (*get_underflow_debug_data)(const struct dc *dc, 1590 struct timing_generator *tg, 1591 struct dc_underflow_debug_data *out_data); 1592 1593 /** 1594 * measure_memory_qos - Measure memory QoS metrics 1595 * @dc: DC structure 1596 * @qos: Pointer to dc_measured_memory_qos struct to populate with measured values 1597 * 1598 * Populates the provided dc_measured_memory_qos struct with peak bandwidth, average bandwidth, 1599 * max latency, min latency, and average latency from hardware performance counters. 1600 */ 1601 void (*measure_memory_qos)(struct dc *dc, struct dc_measured_memory_qos *qos); 1602 1603 }; 1604 1605 void color_space_to_black_color( 1606 const struct dc *dc, 1607 enum dc_color_space colorspace, 1608 struct tg_color *black_color); 1609 1610 bool hwss_wait_for_blank_complete( 1611 struct timing_generator *tg); 1612 1613 const uint16_t *find_color_matrix( 1614 enum dc_color_space color_space, 1615 uint32_t *array_size); 1616 1617 void get_surface_tile_visual_confirm_color( 1618 struct pipe_ctx *pipe_ctx, 1619 struct tg_color *color); 1620 void get_surface_visual_confirm_color( 1621 const struct pipe_ctx *pipe_ctx, 1622 struct tg_color *color); 1623 1624 void get_hdr_visual_confirm_color( 1625 struct pipe_ctx *pipe_ctx, 1626 struct tg_color *color); 1627 void get_mpctree_visual_confirm_color( 1628 struct pipe_ctx *pipe_ctx, 1629 struct tg_color *color); 1630 void get_smartmux_visual_confirm_color( 1631 struct dc *dc, 1632 struct tg_color *color); 1633 void get_vabc_visual_confirm_color( 1634 struct pipe_ctx *pipe_ctx, 1635 struct tg_color *color); 1636 void get_subvp_visual_confirm_color( 1637 struct pipe_ctx *pipe_ctx, 1638 struct tg_color *color); 1639 void get_fams2_visual_confirm_color( 1640 struct dc *dc, 1641 struct dc_state *context, 1642 struct pipe_ctx *pipe_ctx, 1643 struct tg_color *color); 1644 1645 void get_mclk_switch_visual_confirm_color( 1646 struct pipe_ctx *pipe_ctx, 1647 struct tg_color *color); 1648 1649 void get_cursor_visual_confirm_color( 1650 struct pipe_ctx *pipe_ctx, 1651 struct tg_color *color); 1652 1653 void get_dcc_visual_confirm_color( 1654 struct dc *dc, 1655 struct pipe_ctx *pipe_ctx, 1656 struct tg_color *color); 1657 1658 void get_refresh_rate_confirm_color( 1659 struct pipe_ctx *pipe_ctx, 1660 struct tg_color *color); 1661 1662 void set_p_state_switch_method( 1663 struct dc *dc, 1664 struct dc_state *context, 1665 struct pipe_ctx *pipe_ctx); 1666 1667 void set_drr_and_clear_adjust_pending( 1668 struct pipe_ctx *pipe_ctx, 1669 struct dc_stream_state *stream, 1670 struct drr_params *params); 1671 1672 void hwss_execute_sequence(struct dc *dc, 1673 struct block_sequence block_sequence[MAX_HWSS_BLOCK_SEQUENCE_SIZE], 1674 int num_steps); 1675 1676 void hwss_build_fast_sequence(struct dc *dc, 1677 struct dc_dmub_cmd *dc_dmub_cmd, 1678 unsigned int dmub_cmd_count, 1679 struct block_sequence block_sequence[MAX_HWSS_BLOCK_SEQUENCE_SIZE], 1680 unsigned int *num_steps, 1681 struct pipe_ctx *pipe_ctx, 1682 struct dc_stream_status *stream_status, 1683 struct dc_state *context); 1684 1685 void hwss_wait_for_all_blank_complete(struct dc *dc, 1686 struct dc_state *context); 1687 1688 void hwss_wait_for_odm_update_pending_complete(struct dc *dc, 1689 struct dc_state *context); 1690 1691 void hwss_wait_for_no_pipes_pending(struct dc *dc, 1692 struct dc_state *context); 1693 1694 void hwss_wait_for_outstanding_hw_updates(struct dc *dc, 1695 struct dc_state *dc_context); 1696 1697 void hwss_process_outstanding_hw_updates(struct dc *dc, 1698 struct dc_state *dc_context); 1699 1700 void hwss_send_dmcub_cmd(union block_sequence_params *params); 1701 1702 void hwss_program_manual_trigger(union block_sequence_params *params); 1703 1704 void hwss_setup_dpp(union block_sequence_params *params); 1705 1706 void hwss_program_bias_and_scale(union block_sequence_params *params); 1707 1708 void hwss_power_on_mpc_mem_pwr(union block_sequence_params *params); 1709 1710 void hwss_set_output_csc(union block_sequence_params *params); 1711 1712 void hwss_set_ocsc_default(union block_sequence_params *params); 1713 1714 void hwss_subvp_save_surf_addr(union block_sequence_params *params); 1715 1716 void hwss_program_surface_config(union block_sequence_params *params); 1717 1718 void hwss_program_mcache_id_and_split_coordinate(union block_sequence_params *params); 1719 1720 void hwss_program_cm_hist(union block_sequence_params *params); 1721 1722 void hwss_set_odm_combine(union block_sequence_params *params); 1723 1724 void hwss_set_odm_bypass(union block_sequence_params *params); 1725 1726 void hwss_opp_pipe_clock_control(union block_sequence_params *params); 1727 1728 void hwss_opp_program_left_edge_extra_pixel(union block_sequence_params *params); 1729 1730 void hwss_blank_pixel_data(union block_sequence_params *params); 1731 1732 void hwss_dccg_set_dto_dscclk(union block_sequence_params *params); 1733 1734 void hwss_dsc_set_config(union block_sequence_params *params); 1735 1736 void hwss_dsc_enable(union block_sequence_params *params); 1737 1738 void hwss_tg_set_dsc_config(union block_sequence_params *params); 1739 1740 void hwss_dsc_disconnect(union block_sequence_params *params); 1741 1742 void hwss_dsc_read_state(union block_sequence_params *params); 1743 1744 void hwss_dsc_calculate_and_set_config(union block_sequence_params *params); 1745 1746 void hwss_dsc_enable_with_opp(union block_sequence_params *params); 1747 1748 void hwss_dsc_set_config_simple(union block_sequence_params *params); 1749 1750 void hwss_stream_enc_update_hdmi_info_packets(union block_sequence_params *params); 1751 1752 void hwss_hpo_frl_stream_enc_update_hdmi_info_packets(union block_sequence_params *params); 1753 1754 void hwss_hpo_dp_stream_enc_update_dp_info_packets_sdp_line_num(union block_sequence_params *params); 1755 1756 void hwss_hpo_dp_stream_enc_update_dp_info_packets(union block_sequence_params *params); 1757 1758 void hwss_stream_enc_update_dp_info_packets_sdp_line_num(union block_sequence_params *params); 1759 1760 void hwss_stream_enc_update_dp_info_packets(union block_sequence_params *params); 1761 1762 void hwss_stream_enc_dp_set_dsc_config(union block_sequence_params *params); 1763 1764 void hwss_hpo_dp_stream_enc_dp_set_dsc_pps_info_packet(union block_sequence_params *params); 1765 1766 void hwss_stream_enc_dp_set_dsc_pps_info_packet(union block_sequence_params *params); 1767 1768 void hwss_hpo_frl_stream_enc_set_dsc_config(union block_sequence_params *params); 1769 1770 void hwss_set_dmdata_attributes(union block_sequence_params *params); 1771 1772 void hwss_dp_trace_source_sequence(union block_sequence_params *params); 1773 1774 void hwss_link_increase_mst_payload(union block_sequence_params *params); 1775 1776 void hwss_link_reduce_mst_payload(union block_sequence_params *params); 1777 1778 void hwss_dp_set_test_pattern(union block_sequence_params *params); 1779 1780 void hwss_link_set_dpms_off(union block_sequence_params *params); 1781 1782 void hwss_prepare_bandwidth(struct dc *dc, union block_sequence_params *params); 1783 1784 void hwss_link_set_dpms_on(union block_sequence_params *params); 1785 1786 void hwss_program_tg(union block_sequence_params *params); 1787 1788 void hwss_tg_program_global_sync(union block_sequence_params *params); 1789 1790 void hwss_tg_wait_for_state(union block_sequence_params *params); 1791 1792 void hwss_tg_set_vtg_params(union block_sequence_params *params); 1793 1794 void hwss_hubp_enable_3dlut_fl(union block_sequence_params *params); 1795 1796 void hwss_update_info_frame(struct dc *dc, union block_sequence_params *params); 1797 1798 void hwss_tg_setup_vertical_interrupt0(union block_sequence_params *params); 1799 1800 void hwss_tg_setup_vertical_interrupt2(union block_sequence_params *params); 1801 1802 void hwss_dpp_set_hdr_multiplier(union block_sequence_params *params); 1803 1804 void hwss_program_det_size(union block_sequence_params *params); 1805 1806 void hwss_program_det_segments(union block_sequence_params *params); 1807 1808 void hwss_opp_set_dyn_expansion(union block_sequence_params *params); 1809 1810 void hwss_opp_program_fmt(union block_sequence_params *params); 1811 1812 void hwss_opp_program_bit_depth_reduction(union block_sequence_params *params); 1813 1814 void hwss_opp_set_disp_pattern_generator(union block_sequence_params *params); 1815 1816 void hwss_set_abm_pipe(union block_sequence_params *params); 1817 1818 void hwss_set_abm_level(union block_sequence_params *params); 1819 1820 void hwss_set_abm_immediate_disable(union block_sequence_params *params); 1821 1822 void hwss_mpc_remove_mpcc(union block_sequence_params *params); 1823 1824 void hwss_opp_set_mpcc_disconnect_pending(union block_sequence_params *params); 1825 1826 void hwss_dc_set_optimized_required(union block_sequence_params *params); 1827 1828 void hwss_hubp_disconnect(union block_sequence_params *params); 1829 1830 void hwss_hubbub_force_pstate_change_control(union block_sequence_params *params); 1831 1832 void hwss_tg_enable_crtc(union block_sequence_params *params); 1833 1834 void hwss_tg_set_gsl(union block_sequence_params *params); 1835 1836 void hwss_tg_set_gsl_source_select(union block_sequence_params *params); 1837 1838 void hwss_hubp_wait_flip_pending(union block_sequence_params *params); 1839 1840 void hwss_tg_wait_double_buffer_pending(union block_sequence_params *params); 1841 1842 void hwss_update_force_pstate(union block_sequence_params *params); 1843 1844 void hwss_hubbub_apply_dedcn21_147_wa(union block_sequence_params *params); 1845 1846 void hwss_hubbub_allow_self_refresh_control(union block_sequence_params *params); 1847 1848 void hwss_tg_get_frame_count(union block_sequence_params *params); 1849 1850 void hwss_mpc_set_dwb_mux(union block_sequence_params *params); 1851 1852 void hwss_mpc_disable_dwb_mux(union block_sequence_params *params); 1853 1854 void hwss_mcif_wb_config_buf(union block_sequence_params *params); 1855 1856 void hwss_mcif_wb_config_arb(union block_sequence_params *params); 1857 1858 void hwss_mcif_wb_enable(union block_sequence_params *params); 1859 1860 void hwss_mcif_wb_disable(union block_sequence_params *params); 1861 1862 void hwss_dwbc_enable(union block_sequence_params *params); 1863 1864 void hwss_dwbc_disable(union block_sequence_params *params); 1865 1866 void hwss_dwbc_update(union block_sequence_params *params); 1867 1868 void hwss_hubp_update_mall_sel(union block_sequence_params *params); 1869 1870 void hwss_hubp_prepare_subvp_buffering(union block_sequence_params *params); 1871 1872 void hwss_hubp_set_blank_en(union block_sequence_params *params); 1873 1874 void hwss_hubp_disable_control(union block_sequence_params *params); 1875 1876 void hwss_hubbub_soft_reset(union block_sequence_params *params); 1877 1878 void hwss_hubp_clk_cntl(union block_sequence_params *params); 1879 1880 void hwss_hubp_init(union block_sequence_params *params); 1881 1882 void hwss_hubp_set_vm_system_aperture_settings(union block_sequence_params *params); 1883 1884 void hwss_hubp_set_flip_int(union block_sequence_params *params); 1885 1886 void hwss_dpp_dppclk_control(union block_sequence_params *params); 1887 1888 void hwss_disable_phantom_crtc(union block_sequence_params *params); 1889 1890 void hwss_dsc_pg_status(union block_sequence_params *params); 1891 1892 void hwss_dsc_wait_disconnect_pending_clear(union block_sequence_params *params); 1893 1894 void hwss_dsc_disable(union block_sequence_params *params); 1895 1896 void hwss_dccg_set_ref_dscclk(union block_sequence_params *params); 1897 1898 void hwss_dpp_pg_control(union block_sequence_params *params); 1899 1900 void hwss_hubp_pg_control(union block_sequence_params *params); 1901 1902 void hwss_hubp_reset(union block_sequence_params *params); 1903 1904 void hwss_dpp_reset(union block_sequence_params *params); 1905 1906 void hwss_dpp_root_clock_control(union block_sequence_params *params); 1907 1908 void hwss_dc_ip_request_cntl(union block_sequence_params *params); 1909 1910 void hwss_dccg_update_dpp_dto(union block_sequence_params *params); 1911 1912 void hwss_hubp_vtg_sel(union block_sequence_params *params); 1913 1914 void hwss_hubp_setup2(union block_sequence_params *params); 1915 1916 void hwss_hubp_setup(union block_sequence_params *params); 1917 1918 void hwss_hubp_set_unbounded_requesting(union block_sequence_params *params); 1919 1920 void hwss_hubp_setup_interdependent2(union block_sequence_params *params); 1921 1922 void hwss_hubp_setup_interdependent(union block_sequence_params *params); 1923 1924 void hwss_dpp_set_cursor_matrix(union block_sequence_params *params); 1925 1926 void hwss_mpc_update_mpcc(union block_sequence_params *params); 1927 1928 void hwss_mpc_update_blending(union block_sequence_params *params); 1929 1930 void hwss_mpc_assert_idle_mpcc(union block_sequence_params *params); 1931 1932 void hwss_mpc_insert_plane(union block_sequence_params *params); 1933 1934 void hwss_dpp_set_scaler(union block_sequence_params *params); 1935 1936 void hwss_hubp_mem_program_viewport(union block_sequence_params *params); 1937 1938 void hwss_abort_cursor_offload_update(union block_sequence_params *params); 1939 1940 void hwss_send_cursor_info_to_dmu(union block_sequence_params *params); 1941 1942 void hwss_set_cursor_attribute(union block_sequence_params *params); 1943 1944 void hwss_hubp_set_cursor_attributes(union block_sequence_params *params); 1945 1946 void hwss_dpp_set_cursor_attributes(union block_sequence_params *params); 1947 1948 void hwss_set_cursor_position(union block_sequence_params *params); 1949 1950 void hwss_set_cursor_sdr_white_level(union block_sequence_params *params); 1951 1952 void hwss_program_gamut_remap(struct pipe_ctx *pipe_ctx); 1953 1954 void hwss_program_output_csc(union block_sequence_params *params); 1955 1956 void hwss_hubp_set_legacy_tiling_compat_level(union block_sequence_params *params); 1957 1958 void hwss_hubp_set_blank(union block_sequence_params *params); 1959 1960 void hwss_phantom_hubp_post_enable(union block_sequence_params *params); 1961 1962 void hwss_cursor_lock(union block_sequence_params *params); 1963 1964 void hwss_begin_cursor_offload_update(union block_sequence_params *params); 1965 1966 void hwss_commit_cursor_offload_update(union block_sequence_params *params); 1967 1968 void hwss_update_cursor_offload_pipe(union block_sequence_params *params); 1969 1970 void hwss_setup_periodic_interrupt(struct dc *dc, union block_sequence_params *params); 1971 1972 void hwss_disable_audio_stream(struct dc *dc, union block_sequence_params *params); 1973 1974 void hwss_add_optc_pipe_control_lock(struct block_sequence_state *seq_state, 1975 struct dc *dc, struct pipe_ctx *pipe_ctx, bool lock); 1976 1977 void hwss_add_hubp_set_flip_control_gsl(struct block_sequence_state *seq_state, 1978 struct hubp *hubp, bool flip_immediate); 1979 1980 void hwss_add_hubp_program_triplebuffer(struct block_sequence_state *seq_state, 1981 struct dc *dc, struct pipe_ctx *pipe_ctx, bool enableTripleBuffer); 1982 1983 void hwss_add_hubp_update_plane_addr(struct block_sequence_state *seq_state, 1984 struct dc *dc, struct pipe_ctx *pipe_ctx); 1985 1986 void hwss_add_dpp_set_input_transfer_func(struct block_sequence_state *seq_state, 1987 struct dc *dc, struct pipe_ctx *pipe_ctx, struct dc_plane_state *plane_state); 1988 1989 void hwss_add_dpp_program_gamut_remap(struct block_sequence_state *seq_state, 1990 struct pipe_ctx *pipe_ctx); 1991 1992 void hwss_add_dpp_program_bias_and_scale(struct block_sequence_state *seq_state, 1993 struct pipe_ctx *pipe_ctx); 1994 1995 void hwss_add_optc_program_manual_trigger(struct block_sequence_state *seq_state, 1996 struct pipe_ctx *pipe_ctx); 1997 1998 void hwss_add_dpp_set_output_transfer_func(struct block_sequence_state *seq_state, 1999 struct dc *dc, struct pipe_ctx *pipe_ctx); 2000 2001 void hwss_set_output_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx); 2002 2003 void hwss_add_mpc_update_visual_confirm(struct block_sequence_state *seq_state, 2004 struct dc *dc, struct pipe_ctx *pipe_ctx, int mpcc_id); 2005 2006 void hwss_add_mpc_power_on_mpc_mem_pwr(struct block_sequence_state *seq_state, 2007 struct mpc *mpc, int mpcc_id, bool power_on); 2008 2009 void hwss_add_mpc_set_output_csc(struct block_sequence_state *seq_state, 2010 struct mpc *mpc, int opp_id, const uint16_t *regval, enum mpc_output_csc_mode ocsc_mode); 2011 2012 void hwss_add_mpc_set_ocsc_default(struct block_sequence_state *seq_state, 2013 struct mpc *mpc, int opp_id, enum dc_color_space colorspace, enum mpc_output_csc_mode ocsc_mode); 2014 2015 void hwss_add_dmub_send_dmcub_cmd(struct block_sequence_state *seq_state, 2016 struct dc_context *ctx, union dmub_rb_cmd *cmd, enum dm_dmub_wait_type wait_type); 2017 2018 void hwss_add_dmub_subvp_save_surf_addr(struct block_sequence_state *seq_state, 2019 struct dc_dmub_srv *dc_dmub_srv, struct dc_plane_address *addr, uint8_t subvp_index); 2020 2021 void hwss_add_hubp_wait_for_dcc_meta_prop(struct block_sequence_state *seq_state, 2022 struct dc *dc, struct pipe_ctx *top_pipe_to_program); 2023 2024 void hwss_add_hubp_wait_pipe_read_start(struct block_sequence_state *seq_state, 2025 struct hubp *hubp); 2026 2027 void hwss_add_hws_apply_update_flags_for_phantom(struct block_sequence_state *seq_state, 2028 struct pipe_ctx *pipe_ctx); 2029 2030 void hwss_add_hws_update_phantom_vp_position(struct block_sequence_state *seq_state, 2031 struct dc *dc, struct dc_state *context, struct pipe_ctx *pipe_ctx); 2032 2033 void hwss_add_optc_set_odm_combine(struct block_sequence_state *seq_state, 2034 struct timing_generator *tg, int opp_inst[MAX_PIPES], int opp_head_count, 2035 int odm_slice_width, int last_odm_slice_width); 2036 2037 void hwss_add_optc_set_odm_bypass(struct block_sequence_state *seq_state, 2038 struct timing_generator *optc, struct dc_crtc_timing *timing); 2039 2040 void hwss_add_tg_program_global_sync(struct block_sequence_state *seq_state, 2041 struct timing_generator *tg, 2042 int vready_offset, 2043 unsigned int vstartup_lines, 2044 unsigned int vupdate_offset_pixels, 2045 unsigned int vupdate_vupdate_width_pixels, 2046 unsigned int pstate_keepout_start_lines); 2047 2048 void hwss_add_tg_wait_for_state(struct block_sequence_state *seq_state, 2049 struct timing_generator *tg, enum crtc_state state); 2050 2051 void hwss_add_tg_set_vtg_params(struct block_sequence_state *seq_state, 2052 struct timing_generator *tg, struct dc_crtc_timing *dc_crtc_timing, bool program_fp2); 2053 2054 void hwss_add_vertical_interrupt_setup(struct block_sequence_state *seq_state, 2055 struct timing_generator *tg, uint32_t start_line, uint32_t end_line); 2056 2057 void hwss_add_tg_setup_vertical_interrupt2(struct block_sequence_state *seq_state, 2058 struct timing_generator *tg, int start_line); 2059 2060 void hwss_add_dpp_set_hdr_multiplier(struct block_sequence_state *seq_state, 2061 struct dpp *dpp, uint32_t hw_mult); 2062 2063 void hwss_add_hubp_program_det_size(struct block_sequence_state *seq_state, 2064 struct hubbub *hubbub, unsigned int hubp_inst, unsigned int det_buffer_size_kb); 2065 2066 void hwss_add_hubp_program_mcache_id(struct block_sequence_state *seq_state, 2067 struct hubp *hubp, struct dml2_hubp_pipe_mcache_regs *mcache_regs); 2068 2069 void hwss_add_hubbub_force_pstate_change_control(struct block_sequence_state *seq_state, 2070 struct hubbub *hubbub, bool enable, bool wait); 2071 2072 void hwss_add_hubp_program_det_segments(struct block_sequence_state *seq_state, 2073 struct hubbub *hubbub, unsigned int hubp_inst, unsigned int det_size); 2074 2075 void hwss_add_opp_set_dyn_expansion(struct block_sequence_state *seq_state, 2076 struct output_pixel_processor *opp, enum dc_color_space color_sp, 2077 enum dc_color_depth color_dpth, enum signal_type signal); 2078 2079 void hwss_add_opp_program_fmt(struct block_sequence_state *seq_state, 2080 struct output_pixel_processor *opp, struct bit_depth_reduction_params *fmt_bit_depth, 2081 struct clamping_and_pixel_encoding_params *clamping); 2082 2083 void hwss_add_abm_set_pipe(struct block_sequence_state *seq_state, 2084 struct dc *dc, struct pipe_ctx *pipe_ctx); 2085 2086 void hwss_add_abm_set_level(struct block_sequence_state *seq_state, 2087 struct abm *abm, uint32_t abm_level); 2088 2089 void hwss_add_tg_enable_crtc(struct block_sequence_state *seq_state, 2090 struct timing_generator *tg); 2091 2092 void hwss_add_hubp_wait_flip_pending(struct block_sequence_state *seq_state, 2093 struct hubp *hubp, unsigned int timeout_us, unsigned int polling_interval_us); 2094 2095 void hwss_add_tg_wait_double_buffer_pending(struct block_sequence_state *seq_state, 2096 struct timing_generator *tg, unsigned int timeout_us, unsigned int polling_interval_us); 2097 2098 void hwss_add_dccg_set_dto_dscclk(struct block_sequence_state *seq_state, 2099 struct dccg *dccg, int inst, int num_slices_h); 2100 2101 void hwss_add_dsc_calculate_and_set_config(struct block_sequence_state *seq_state, 2102 struct pipe_ctx *pipe_ctx, bool enable, int opp_cnt); 2103 2104 void hwss_add_mpc_remove_mpcc(struct block_sequence_state *seq_state, 2105 struct mpc *mpc, struct mpc_tree *mpc_tree_params, struct mpcc *mpcc_to_remove); 2106 2107 void hwss_add_opp_set_mpcc_disconnect_pending(struct block_sequence_state *seq_state, 2108 struct output_pixel_processor *opp, int mpcc_inst, bool pending); 2109 2110 void hwss_add_hubp_disconnect(struct block_sequence_state *seq_state, 2111 struct hubp *hubp); 2112 2113 void hwss_add_dsc_enable_with_opp(struct block_sequence_state *seq_state, 2114 struct pipe_ctx *pipe_ctx); 2115 2116 void hwss_add_dsc_disconnect(struct block_sequence_state *seq_state, 2117 struct display_stream_compressor *dsc); 2118 2119 void hwss_add_dc_set_optimized_required(struct block_sequence_state *seq_state, 2120 struct dc *dc, bool optimized_required); 2121 2122 void hwss_add_abm_set_immediate_disable(struct block_sequence_state *seq_state, 2123 struct dc *dc, struct pipe_ctx *pipe_ctx); 2124 2125 void hwss_add_opp_set_disp_pattern_generator(struct block_sequence_state *seq_state, 2126 struct output_pixel_processor *opp, 2127 enum controller_dp_test_pattern test_pattern, 2128 enum controller_dp_color_space color_space, 2129 enum dc_color_depth color_depth, 2130 struct tg_color solid_color, 2131 bool use_solid_color, 2132 int width, 2133 int height, 2134 int offset); 2135 2136 void hwss_add_opp_program_bit_depth_reduction(struct block_sequence_state *seq_state, 2137 struct output_pixel_processor *opp, 2138 bool use_default_params, 2139 struct pipe_ctx *pipe_ctx); 2140 2141 void hwss_add_dpp_program_cm_hist(struct block_sequence_state *seq_state, 2142 struct dpp *dpp, 2143 struct cm_hist_control cm_hist_control, 2144 enum dc_color_space color_space); 2145 2146 void hwss_add_dc_ip_request_cntl(struct block_sequence_state *seq_state, 2147 struct dc *dc, 2148 bool enable); 2149 2150 void hwss_add_dwbc_update(struct block_sequence_state *seq_state, 2151 struct dwbc *dwb, 2152 struct dc_dwb_params *dwb_params); 2153 2154 void hwss_add_mcif_wb_config_buf(struct block_sequence_state *seq_state, 2155 struct mcif_wb *mcif_wb, 2156 struct mcif_buf_params *mcif_buf_params, 2157 unsigned int dest_height); 2158 2159 void hwss_add_mcif_wb_config_arb(struct block_sequence_state *seq_state, 2160 struct mcif_wb *mcif_wb, 2161 struct mcif_arb_params *mcif_arb_params); 2162 2163 void hwss_add_mcif_wb_enable(struct block_sequence_state *seq_state, 2164 struct mcif_wb *mcif_wb); 2165 2166 void hwss_add_mcif_wb_disable(struct block_sequence_state *seq_state, 2167 struct mcif_wb *mcif_wb); 2168 2169 void hwss_add_mpc_set_dwb_mux(struct block_sequence_state *seq_state, 2170 struct mpc *mpc, 2171 int dwb_id, 2172 int mpcc_id); 2173 2174 void hwss_add_mpc_disable_dwb_mux(struct block_sequence_state *seq_state, 2175 struct mpc *mpc, 2176 unsigned int dwb_id); 2177 2178 void hwss_add_dwbc_enable(struct block_sequence_state *seq_state, 2179 struct dwbc *dwb, 2180 struct dc_dwb_params *dwb_params); 2181 2182 void hwss_add_dwbc_disable(struct block_sequence_state *seq_state, 2183 struct dwbc *dwb); 2184 2185 void hwss_add_tg_set_gsl(struct block_sequence_state *seq_state, 2186 struct timing_generator *tg, 2187 struct gsl_params gsl); 2188 2189 void hwss_add_tg_set_gsl_source_select(struct block_sequence_state *seq_state, 2190 struct timing_generator *tg, 2191 int group_idx, 2192 uint32_t gsl_ready_signal); 2193 2194 void hwss_add_hubp_update_mall_sel(struct block_sequence_state *seq_state, 2195 struct hubp *hubp, 2196 uint32_t mall_sel, 2197 bool cache_cursor); 2198 2199 void hwss_add_hubp_prepare_subvp_buffering(struct block_sequence_state *seq_state, 2200 struct hubp *hubp, 2201 bool enable); 2202 2203 void hwss_add_hubp_set_blank_en(struct block_sequence_state *seq_state, 2204 struct hubp *hubp, 2205 bool enable); 2206 2207 void hwss_add_hubp_disable_control(struct block_sequence_state *seq_state, 2208 struct hubp *hubp, 2209 bool disable); 2210 2211 void hwss_add_hubbub_soft_reset(struct block_sequence_state *seq_state, 2212 struct hubbub *hubbub, 2213 void (*hubbub_soft_reset)(struct hubbub *hubbub, bool reset), 2214 bool reset); 2215 2216 void hwss_add_hubp_clk_cntl(struct block_sequence_state *seq_state, 2217 struct hubp *hubp, 2218 bool enable); 2219 2220 void hwss_add_dpp_dppclk_control(struct block_sequence_state *seq_state, 2221 struct dpp *dpp, 2222 bool dppclk_div, 2223 bool enable); 2224 2225 void hwss_add_disable_phantom_crtc(struct block_sequence_state *seq_state, 2226 struct timing_generator *tg); 2227 2228 void hwss_add_dsc_pg_status(struct block_sequence_state *seq_state, 2229 struct dce_hwseq *hws, 2230 int dsc_inst, 2231 bool is_ungated); 2232 2233 void hwss_add_dsc_wait_disconnect_pending_clear(struct block_sequence_state *seq_state, 2234 struct display_stream_compressor *dsc, 2235 bool *is_ungated); 2236 2237 void hwss_add_dsc_disable(struct block_sequence_state *seq_state, 2238 struct display_stream_compressor *dsc, 2239 bool *is_ungated); 2240 2241 void hwss_add_dccg_set_ref_dscclk(struct block_sequence_state *seq_state, 2242 struct dccg *dccg, 2243 int dsc_inst, 2244 bool *is_ungated); 2245 2246 void hwss_add_dpp_root_clock_control(struct block_sequence_state *seq_state, 2247 struct dce_hwseq *hws, 2248 unsigned int dpp_inst, 2249 bool clock_on); 2250 2251 void hwss_add_dpp_pg_control(struct block_sequence_state *seq_state, 2252 struct dce_hwseq *hws, 2253 unsigned int dpp_inst, 2254 bool power_on); 2255 2256 void hwss_add_hubp_pg_control(struct block_sequence_state *seq_state, 2257 struct dce_hwseq *hws, 2258 unsigned int hubp_inst, 2259 bool power_on); 2260 2261 void hwss_add_hubp_set_blank(struct block_sequence_state *seq_state, 2262 struct hubp *hubp, 2263 bool blank); 2264 2265 void hwss_add_hubp_init(struct block_sequence_state *seq_state, 2266 struct hubp *hubp); 2267 2268 void hwss_add_hubp_reset(struct block_sequence_state *seq_state, 2269 struct hubp *hubp); 2270 2271 void hwss_add_dpp_reset(struct block_sequence_state *seq_state, 2272 struct dpp *dpp); 2273 2274 void hwss_add_opp_pipe_clock_control(struct block_sequence_state *seq_state, 2275 struct output_pixel_processor *opp, 2276 bool enable); 2277 2278 void hwss_add_hubp_set_vm_system_aperture_settings(struct block_sequence_state *seq_state, 2279 struct hubp *hubp, 2280 uint64_t sys_default, 2281 uint64_t sys_low, 2282 uint64_t sys_high); 2283 2284 void hwss_add_hubp_set_flip_int(struct block_sequence_state *seq_state, 2285 struct hubp *hubp); 2286 2287 void hwss_add_dccg_update_dpp_dto(struct block_sequence_state *seq_state, 2288 struct dccg *dccg, 2289 int dpp_inst, 2290 int dppclk_khz); 2291 2292 void hwss_add_hubp_vtg_sel(struct block_sequence_state *seq_state, 2293 struct hubp *hubp, 2294 uint32_t otg_inst); 2295 2296 void hwss_add_hubp_setup2(struct block_sequence_state *seq_state, 2297 struct hubp *hubp, 2298 struct dml2_dchub_per_pipe_register_set *hubp_regs, 2299 union dml2_global_sync_programming *global_sync, 2300 struct dc_crtc_timing *timing); 2301 2302 void hwss_add_hubp_setup(struct block_sequence_state *seq_state, 2303 struct hubp *hubp, 2304 struct _vcs_dpi_display_dlg_regs_st *dlg_regs, 2305 struct _vcs_dpi_display_ttu_regs_st *ttu_regs, 2306 struct _vcs_dpi_display_rq_regs_st *rq_regs, 2307 struct _vcs_dpi_display_pipe_dest_params_st *pipe_dest); 2308 2309 void hwss_add_hubp_set_unbounded_requesting(struct block_sequence_state *seq_state, 2310 struct hubp *hubp, 2311 bool unbounded_req); 2312 2313 void hwss_add_hubp_setup_interdependent2(struct block_sequence_state *seq_state, 2314 struct hubp *hubp, 2315 struct dml2_dchub_per_pipe_register_set *hubp_regs); 2316 2317 void hwss_add_hubp_setup_interdependent(struct block_sequence_state *seq_state, 2318 struct hubp *hubp, 2319 struct _vcs_dpi_display_dlg_regs_st *dlg_regs, 2320 struct _vcs_dpi_display_ttu_regs_st *ttu_regs); 2321 void hwss_add_hubp_program_surface_config(struct block_sequence_state *seq_state, 2322 struct hubp *hubp, 2323 enum surface_pixel_format format, 2324 struct dc_tiling_info *tiling_info, 2325 struct plane_size plane_size, 2326 enum dc_rotation_angle rotation, 2327 struct dc_plane_dcc_param *dcc, 2328 bool horizontal_mirror, 2329 int compat_level); 2330 2331 void hwss_add_dpp_setup_dpp(struct block_sequence_state *seq_state, 2332 struct pipe_ctx *pipe_ctx); 2333 2334 void hwss_add_dpp_set_cursor_matrix(struct block_sequence_state *seq_state, 2335 struct dpp *dpp, 2336 enum dc_color_space color_space, 2337 struct dc_csc_transform *cursor_csc_color_matrix); 2338 2339 void hwss_add_mpc_update_blending(struct block_sequence_state *seq_state, 2340 struct mpc *mpc, 2341 struct mpcc_blnd_cfg blnd_cfg, 2342 int mpcc_id); 2343 2344 void hwss_add_mpc_assert_idle_mpcc(struct block_sequence_state *seq_state, 2345 struct mpc *mpc, 2346 int mpcc_id); 2347 2348 void hwss_add_mpc_insert_plane(struct block_sequence_state *seq_state, 2349 struct mpc *mpc, 2350 struct mpc_tree *mpc_tree_params, 2351 struct mpcc_blnd_cfg blnd_cfg, 2352 struct mpcc_sm_cfg *sm_cfg, 2353 struct mpcc *insert_above_mpcc, 2354 int dpp_id, 2355 int mpcc_id); 2356 2357 void hwss_add_dpp_set_scaler(struct block_sequence_state *seq_state, 2358 struct dpp *dpp, 2359 const struct scaler_data *scl_data); 2360 2361 void hwss_add_hubp_mem_program_viewport(struct block_sequence_state *seq_state, 2362 struct hubp *hubp, 2363 const struct rect *viewport, 2364 const struct rect *viewport_c); 2365 2366 void hwss_add_abort_cursor_offload_update(struct block_sequence_state *seq_state, 2367 struct dc *dc, 2368 struct pipe_ctx *pipe_ctx); 2369 2370 void hwss_add_set_cursor_attribute(struct block_sequence_state *seq_state, 2371 struct dc *dc, 2372 struct pipe_ctx *pipe_ctx); 2373 2374 void hwss_add_hubp_set_cursor_attributes(struct block_sequence_state *seq_state, 2375 struct hubp *hubp, 2376 const struct dc_cursor_attributes *attributes); 2377 2378 void hwss_add_dpp_set_cursor_attributes(struct block_sequence_state *seq_state, 2379 struct dpp *dpp, 2380 struct dc_cursor_attributes *attributes); 2381 2382 void hwss_add_set_cursor_position(struct block_sequence_state *seq_state, 2383 struct dc *dc, 2384 struct pipe_ctx *pipe_ctx); 2385 2386 void hwss_add_set_cursor_sdr_white_level(struct block_sequence_state *seq_state, 2387 struct dc *dc, 2388 struct pipe_ctx *pipe_ctx); 2389 2390 void hwss_add_program_output_csc(struct block_sequence_state *seq_state, 2391 struct dc *dc, 2392 struct pipe_ctx *pipe_ctx, 2393 enum dc_color_space colorspace, 2394 uint16_t *matrix, 2395 int opp_id); 2396 2397 void hwss_add_phantom_hubp_post_enable(struct block_sequence_state *seq_state, 2398 struct hubp *hubp); 2399 2400 void hwss_add_update_force_pstate(struct block_sequence_state *seq_state, 2401 struct dc *dc, 2402 struct dc_state *context); 2403 2404 void hwss_add_hubbub_apply_dedcn21_147_wa(struct block_sequence_state *seq_state, 2405 struct hubbub *hubbub); 2406 2407 void hwss_add_hubbub_allow_self_refresh_control(struct block_sequence_state *seq_state, 2408 struct hubbub *hubbub, 2409 bool allow, 2410 bool *disallow_self_refresh_applied); 2411 2412 void hwss_add_tg_get_frame_count(struct block_sequence_state *seq_state, 2413 struct timing_generator *tg, 2414 unsigned int *frame_count); 2415 2416 void hwss_add_tg_set_dsc_config(struct block_sequence_state *seq_state, 2417 struct timing_generator *tg, 2418 struct dsc_optc_config *dsc_optc_cfg, 2419 bool enable); 2420 2421 void hwss_add_opp_program_left_edge_extra_pixel(struct block_sequence_state *seq_state, 2422 struct output_pixel_processor *opp, 2423 enum dc_pixel_encoding pixel_encoding, 2424 bool is_otg_master); 2425 2426 void hwss_add_hubp_enable_3dlut_fl(struct block_sequence_state *seq_state, 2427 struct hubp *hubp); 2428 2429 void hwss_add_begin_cursor_offload_update(struct block_sequence_state *seq_state, 2430 struct dc *dc, 2431 struct pipe_ctx *pipe_ctx); 2432 2433 void hwss_add_cursor_lock(struct block_sequence_state *seq_state, 2434 struct dc *dc, 2435 struct pipe_ctx *pipe_ctx, 2436 bool lock); 2437 2438 void hwss_add_send_update_cursor_info_to_dmu(struct block_sequence_state *seq_state, 2439 struct pipe_ctx *pipe_ctx, 2440 int index); 2441 2442 void hwss_add_update_cursor_offload_pipe(struct block_sequence_state *seq_state, 2443 struct dc *dc, 2444 struct pipe_ctx *pipe_ctx); 2445 2446 void hwss_add_commit_cursor_offload_update(struct block_sequence_state *seq_state, 2447 struct dc *dc, 2448 struct pipe_ctx *pipe_ctx); 2449 2450 void hwss_add_stream_enc_update_hdmi_info_packets(struct block_sequence_state *seq_state, 2451 struct pipe_ctx *pipe_ctx); 2452 2453 void hwss_add_hpo_frl_stream_enc_update_hdmi_info_packets(struct block_sequence_state *seq_state, 2454 struct pipe_ctx *pipe_ctx); 2455 2456 void hwss_add_hpo_dp_stream_enc_update_dp_info_packets_sdp_line_num(struct block_sequence_state *seq_state, 2457 struct pipe_ctx *pipe_ctx); 2458 2459 void hwss_add_hpo_dp_stream_enc_update_dp_info_packets(struct block_sequence_state *seq_state, 2460 struct pipe_ctx *pipe_ctx); 2461 2462 void hwss_add_stream_enc_update_dp_info_packets_sdp_line_num(struct block_sequence_state *seq_state, 2463 struct pipe_ctx *pipe_ctx); 2464 2465 void hwss_add_stream_enc_update_dp_info_packets(struct block_sequence_state *seq_state, 2466 struct pipe_ctx *pipe_ctx); 2467 2468 void hwss_add_dsc_set_config(struct block_sequence_state *seq_state, 2469 struct display_stream_compressor *dsc, 2470 const struct dsc_config *dsc_cfg, 2471 const struct dsc_optc_config *dsc_optc_cfg); 2472 2473 void hwss_add_stream_enc_dp_set_dsc_config(struct block_sequence_state *seq_state, 2474 struct stream_encoder *stream_enc, 2475 const struct dsc_optc_config *dsc_optc_cfg); 2476 2477 void hwss_add_hpo_dp_stream_enc_dp_set_dsc_pps_info_packet(struct block_sequence_state *seq_state, 2478 struct hpo_dp_stream_encoder *hpo_dp_stream_enc, 2479 bool immediate_update, 2480 uint8_t *dsc_packed_pps, 2481 bool pps_sdp_stream); 2482 2483 void hwss_add_stream_enc_dp_set_dsc_pps_info_packet(struct block_sequence_state *seq_state, 2484 struct stream_encoder *stream_enc, 2485 bool immediate_update, 2486 uint8_t *dsc_packed_pps, 2487 bool pps_sdp_stream); 2488 2489 void hwss_add_hpo_frl_stream_enc_set_dsc_config(struct block_sequence_state *seq_state, 2490 struct hpo_frl_stream_encoder *hpo_frl_stream_enc, 2491 const struct dc_crtc_timing *timing, 2492 uint8_t *dsc_packed_pps); 2493 2494 void hwss_add_setup_periodic_interrupt(struct block_sequence_state *seq_state, 2495 struct dc *dc, 2496 struct pipe_ctx *pipe_ctx); 2497 2498 void hwss_add_dp_trace_source_sequence(struct block_sequence_state *seq_state, 2499 struct dc_link *link, 2500 enum dpcd_source_sequence source); 2501 2502 void hwss_add_set_dmdata_attributes(struct block_sequence_state *seq_state, 2503 struct pipe_ctx *pipe_ctx); 2504 2505 void hwss_add_link_increase_mst_payload(struct block_sequence_state *seq_state, 2506 struct pipe_ctx *pipe_ctx, 2507 uint32_t mst_stream_bw); 2508 2509 void hwss_add_link_reduce_mst_payload(struct block_sequence_state *seq_state, 2510 struct pipe_ctx *pipe_ctx, 2511 uint32_t mst_stream_bw); 2512 2513 void hwss_add_dp_set_test_pattern(struct block_sequence_state *seq_state, 2514 struct dc_link *link, 2515 enum dp_test_pattern test_pattern, 2516 enum dp_test_pattern_color_space test_pattern_color_space, 2517 const struct link_training_settings *p_link_settings, 2518 const unsigned char *p_custom_pattern, 2519 unsigned int cust_pattern_size); 2520 2521 void hwss_add_link_set_dpms_off(struct block_sequence_state *seq_state, 2522 struct pipe_ctx *pipe_ctx); 2523 2524 void hwss_add_disable_audio_stream(struct block_sequence_state *seq_state, 2525 struct pipe_ctx *pipe_ctx); 2526 2527 void hwss_add_prepare_bandwidth(struct block_sequence_state *seq_state, 2528 struct dc *dc, 2529 struct dc_state *context); 2530 2531 void hwss_add_link_set_dpms_on(struct block_sequence_state *seq_state, 2532 struct dc_state *state, 2533 struct pipe_ctx *pipe_ctx); 2534 2535 /* Clock manager BLS executor functions */ 2536 void hwss_clk_mgr_set_max_memclk(union block_sequence_params *params); 2537 void hwss_clk_mgr_update_clocks(union block_sequence_params *params); 2538 2539 void hwss_hubbub_program_watermarks(union block_sequence_params *params); 2540 2541 void hwss_hubbub_program_arbiter(union block_sequence_params *params); 2542 2543 void hwss_hubbub_program_compbuf_segments(union block_sequence_params *params); 2544 2545 /* Clock manager BLS add-helper functions */ 2546 void hwss_add_clk_mgr_set_max_memclk(struct block_sequence_state *seq_state, 2547 struct clk_mgr *clk_mgr, 2548 unsigned int memclk_mhz); 2549 2550 void hwss_add_clk_mgr_update_clocks(struct block_sequence_state *seq_state, 2551 struct clk_mgr *clk_mgr); 2552 2553 void hwss_add_hubbub_program_watermarks(struct block_sequence_state *seq_state, 2554 struct dc *dc, 2555 struct hubbub *hubbub, 2556 union dcn_watermark_set *watermarks, 2557 unsigned int refclk_mhz, 2558 bool safe_to_lower); 2559 2560 void hwss_add_hubbub_program_arbiter(struct block_sequence_state *seq_state, 2561 struct dc *dc, 2562 struct hubbub *hubbub, 2563 struct dml2_display_arb_regs *arb_regs, 2564 bool safe_to_lower); 2565 2566 void hwss_add_hubbub_program_compbuf_segments(struct block_sequence_state *seq_state, 2567 struct hubbub *hubbub, 2568 unsigned int compbuf_size, 2569 bool safe_to_lower); 2570 2571 #endif /* __DC_HW_SEQUENCER_H__ */ 2572