1 /* 2 * Copyright 2012-15 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #include "dm_services.h" 27 28 /* 29 * Pre-requisites: headers required by header of this unit 30 */ 31 #include "include/gpio_types.h" 32 33 /* 34 * Header of this unit 35 */ 36 37 #include "hw_translate.h" 38 39 /* 40 * Post-requisites: headers required by this unit 41 */ 42 43 #if defined(CONFIG_DRM_AMD_DC_SI) 44 #include "dce60/hw_translate_dce60.h" 45 #endif 46 #include "dce80/hw_translate_dce80.h" 47 #include "dce110/hw_translate_dce110.h" 48 #include "dce120/hw_translate_dce120.h" 49 #include "dcn10/hw_translate_dcn10.h" 50 #include "dcn20/hw_translate_dcn20.h" 51 #include "dcn21/hw_translate_dcn21.h" 52 #include "dcn30/hw_translate_dcn30.h" 53 #include "dcn315/hw_translate_dcn315.h" 54 #include "dcn32/hw_translate_dcn32.h" 55 #include "dcn401/hw_translate_dcn401.h" 56 57 /* 58 * This unit 59 */ 60 61 bool dal_hw_translate_init( 62 struct hw_translate *translate, 63 enum dce_version dce_version, 64 enum dce_environment dce_environment) 65 { 66 switch (dce_version) { 67 #if defined(CONFIG_DRM_AMD_DC_SI) 68 case DCE_VERSION_6_0: 69 case DCE_VERSION_6_1: 70 case DCE_VERSION_6_4: 71 dal_hw_translate_dce60_init(translate); 72 return true; 73 #endif 74 case DCE_VERSION_8_0: 75 case DCE_VERSION_8_1: 76 case DCE_VERSION_8_3: 77 dal_hw_translate_dce80_init(translate); 78 return true; 79 case DCE_VERSION_10_0: 80 case DCE_VERSION_11_0: 81 case DCE_VERSION_11_2: 82 case DCE_VERSION_11_22: 83 dal_hw_translate_dce110_init(translate); 84 return true; 85 case DCE_VERSION_12_0: 86 case DCE_VERSION_12_1: 87 dal_hw_translate_dce120_init(translate); 88 return true; 89 case DCN_VERSION_1_0: 90 case DCN_VERSION_1_01: 91 dal_hw_translate_dcn10_init(translate); 92 return true; 93 case DCN_VERSION_2_0: 94 dal_hw_translate_dcn20_init(translate); 95 return true; 96 case DCN_VERSION_2_01: 97 case DCN_VERSION_2_1: 98 dal_hw_translate_dcn21_init(translate); 99 return true; 100 case DCN_VERSION_3_0: 101 case DCN_VERSION_3_01: 102 case DCN_VERSION_3_02: 103 case DCN_VERSION_3_03: 104 case DCN_VERSION_3_1: 105 case DCN_VERSION_3_14: 106 case DCN_VERSION_3_16: 107 dal_hw_translate_dcn30_init(translate); 108 return true; 109 case DCN_VERSION_3_15: 110 dal_hw_translate_dcn315_init(translate); 111 return true; 112 case DCN_VERSION_3_2: 113 case DCN_VERSION_3_21: 114 case DCN_VERSION_3_5: 115 case DCN_VERSION_3_51: 116 dal_hw_translate_dcn32_init(translate); 117 return true; 118 case DCN_VERSION_4_01: 119 dal_hw_translate_dcn401_init(translate); 120 return true; 121 default: 122 BREAK_TO_DEBUGGER(); 123 return false; 124 } 125 } 126